1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
5 #ifndef _HINIC_PMD_EQS_H_
6 #define _HINIC_PMD_EQS_H_
8 #define HINIC_EQ_PAGE_SIZE 0x00001000
10 #define HINIC_AEQN_START 0
11 #define HINIC_MAX_AEQS 4
12 #define HINIC_MIN_AEQS 2
13 #define HINIC_AEQN_0 0
14 #define HINIC_AEQN_1 1
15 #define HINIC_AEQN_2 2
17 #define HINIC_EQ_MAX_PAGES 8
19 #define HINIC_AEQE_SIZE 64
20 #define HINIC_CEQE_SIZE 4
22 #define HINIC_AEQE_DESC_SIZE 4
23 #define HINIC_AEQE_DATA_SIZE \
24 (HINIC_AEQE_SIZE - HINIC_AEQE_DESC_SIZE)
26 #define HINIC_DEFAULT_AEQ_LEN 64
28 #define GET_EQ_ELEMENT(eq, idx) \
29 (((u8 *)(eq)->virt_addr[(idx) / (eq)->num_elem_in_pg]) + \
30 (((u32)(idx) & ((eq)->num_elem_in_pg - 1)) * (eq)->elem_size))
32 #define GET_AEQ_ELEM(eq, idx) \
33 ((struct hinic_aeq_elem *)GET_EQ_ELEMENT((eq), (idx)))
35 #define GET_CEQ_ELEM(eq, idx) ((u32 *)GET_EQ_ELEMENT((eq), (idx)))
37 enum hinic_eq_intr_mode {
38 HINIC_INTR_MODE_ARMED,
39 HINIC_INTR_MODE_ALWAYS,
42 enum hinic_eq_ci_arm_state {
48 HINIC_HW_INTER_INT = 0,
49 HINIC_MBX_FROM_FUNC = 1,
50 HINIC_MSG_FROM_MGMT_CPU = 2,
52 HINIC_API_CHAIN_STS = 4,
53 HINIC_MBX_SEND_RSLT = 5,
57 #define HINIC_RETRY_NUM (10)
60 struct hinic_hwdev *hwdev;
73 struct irq_info eq_irq;
81 struct hinic_aeq_elem {
82 u8 aeqe_data[HINIC_AEQE_DATA_SIZE];
87 struct hinic_hwdev *hwdev;
90 struct hinic_eq aeq[HINIC_MAX_AEQS];
94 void eq_update_ci(struct hinic_eq *eq);
96 void hinic_dump_aeq_info(struct hinic_hwdev *hwdev);
98 int hinic_comm_aeqs_init(struct hinic_hwdev *hwdev);
100 void hinic_comm_aeqs_free(struct hinic_hwdev *hwdev);
102 #endif /* _HINIC_PMD_EQS_H_ */