1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
5 #ifndef _HINIC_PMD_HWDEV_H_
6 #define _HINIC_PMD_HWDEV_H_
8 #include "hinic_pmd_cmd.h"
10 #define HINIC_PAGE_SIZE_MAX 20
12 #define HINIC_MGMT_CMD_UNSUPPORTED 0xFF
13 #define HINIC_PF_SET_VF_ALREADY 0x4
15 #define MAX_PCIE_DFX_BUF_SIZE 1024
28 enum hinic_res_state {
33 enum hilink_info_print_event {
34 HILINK_EVENT_LINK_UP = 1,
35 HILINK_EVENT_LINK_DOWN,
36 HILINK_EVENT_CABLE_PLUGGED,
37 HILINK_EVENT_MAX_TYPE,
40 struct hinic_port_link_status {
41 struct hinic_mgmt_msg_head mgmt_msg_head;
48 enum link_err_status {
49 LINK_ERR_MODULE_UNRECOGENIZED,
53 struct hinic_cable_plug_event {
54 struct hinic_mgmt_msg_head mgmt_msg_head;
57 u8 plugged; /* 0: unplugged, 1: plugged */
61 struct hinic_link_err_event {
62 struct hinic_mgmt_msg_head mgmt_msg_head;
69 struct hinic_cons_idx_attr {
70 struct hinic_mgmt_msg_head mgmt_msg_head;
83 struct hinic_clear_doorbell {
84 struct hinic_mgmt_msg_head mgmt_msg_head;
91 struct hinic_clear_resource {
92 struct hinic_mgmt_msg_head mgmt_msg_head;
99 struct hinic_cmd_set_res_state {
100 struct hinic_mgmt_msg_head mgmt_msg_head;
108 struct hinic_l2nic_reset {
109 struct hinic_mgmt_msg_head mgmt_msg_head;
115 struct hinic_page_size {
116 struct hinic_mgmt_msg_head mgmt_msg_head;
124 struct hinic_msix_config {
125 struct hinic_mgmt_msg_head mgmt_msg_head;
130 u8 coalesct_timer_cnt;
137 /* defined by chip */
138 enum hinic_fault_type {
141 FAULT_TYPE_MEM_RD_TIMEOUT,
142 FAULT_TYPE_MEM_WR_TIMEOUT,
143 FAULT_TYPE_REG_RD_TIMEOUT,
144 FAULT_TYPE_REG_WR_TIMEOUT,
148 /* defined by chip */
149 enum hinic_fault_err_level {
150 /* default err_level=FAULT_LEVEL_FATAL if
151 * type==FAULT_TYPE_MEM_RD_TIMEOUT || FAULT_TYPE_MEM_WR_TIMEOUT ||
152 * FAULT_TYPE_REG_RD_TIMEOUT || FAULT_TYPE_REG_WR_TIMEOUT ||
154 * other: err_level in event.chip.err_level if type==FAULT_TYPE_CHIP
157 FAULT_LEVEL_SERIOUS_RESET,
158 FAULT_LEVEL_SERIOUS_FLR,
160 FAULT_LEVEL_SUGGESTION,
164 /* defined by chip */
165 struct hinic_fault_event {
166 /* enum hinic_fault_type */
171 /* valid only type==FAULT_TYPE_CHIP */
174 /* enum hinic_fault_err_level */
180 /* func_id valid only err_level==FAULT_LEVEL_SERIOUS_FLR */
185 /* valid only type==FAULT_TYPE_UCODE */
196 /* valid only type==FAULT_TYPE_MEM_RD_TIMEOUT ||
197 * FAULT_TYPE_MEM_WR_TIMEOUT
206 /* valid only type==FAULT_TYPE_REG_RD_TIMEOUT ||
207 * FAULT_TYPE_REG_WR_TIMEOUT
218 struct hinic_cmd_fault_event {
219 struct hinic_mgmt_msg_head mgmt_msg_head;
221 struct hinic_fault_event event;
224 struct hinic_mgmt_watchdog_info {
225 struct hinic_mgmt_msg_head mgmt_msg_head;
248 struct hinic_pcie_dfx_ntc {
249 struct hinic_mgmt_msg_head mgmt_msg_head;
255 struct hinic_pcie_dfx_info {
256 struct hinic_mgmt_msg_head mgmt_msg_head;
263 u8 data[MAX_PCIE_DFX_BUF_SIZE];
266 struct ffm_intr_info {
268 /* error level of the interrupt source */
270 /* Classification by interrupt source properties */
276 struct hinic_board_info {
294 struct hinic_comm_board_info {
295 struct hinic_mgmt_msg_head mgmt_msg_head;
297 struct hinic_board_info info;
302 struct hi30_ctle_data {
312 struct hi30_ffe_data {
320 enum hilink_fec_type {
327 enum hinic_link_port_type {
337 enum hilink_fibre_subtype {
338 FIBRE_SUBTYPE_SR = 1,
343 struct hinic_link_info {
346 * 1 - fiber; 2 - electric; 3 - copper; 4 - AOC; 5 - backplane;
347 * 6 - baseT; 0xffff - unknown
350 * Only when port_type is fiber:
357 u8 cable_max_speed;/* 1(G)/10(G)/25(G)... */
358 u8 sfp_type; /* 0 - qsfp; 1 - sfp */
360 u32 power[4]; /* uW; if is sfp, only power[2] is valid */
362 u8 an_state; /* 0 - off; 1 - on */
363 u8 fec; /* 0 - RSFEC; 1 - BASEFEC; 2 - NOFEC */
364 u16 speed; /* 1(G)/10(G)/25(G)... */
366 u8 cable_absent; /* 0 - cable present; 1 - cable unpresent */
367 u8 alos; /* 0 - yes; 1 - no */
368 u8 rx_los; /* 0 - yes; 1 - no */
370 u32 pma_dbg_info_reg; /* pma debug info: */
371 u32 pma_signal_ok_reg; /* signal ok: */
373 u32 pcs_err_blk_cnt_reg; /* error block counter: */
374 u32 rf_lf_status_reg; /* RF/LF status: */
375 u8 pcs_link_reg; /* pcs link: */
376 u8 mac_link_reg; /* mac link: */
388 struct hinic_hilink_link_info {
389 struct hinic_mgmt_msg_head mgmt_msg_head;
392 u8 info_type; /* 1: link up 2: link down 3 cable plugged */
395 struct hinic_link_info info;
400 /* dma os dependency implementation */
401 struct hinic_os_dep {
402 /* kernel dma alloc api */
403 rte_atomic32_t dma_alloc_cnt;
404 rte_spinlock_t dma_hash_lock;
405 struct rte_hash *dma_addr_hash;
408 struct nic_interrupt_info {
410 u32 interrupt_coalesc_set;
415 u8 coalesc_timer_cfg;
419 struct hinic_sq_attr {
426 /* bit[63:2] is addr's high 62bit, bit[0] is valid flag */
431 struct rte_pci_device *pcidev_hdl;
434 /* dma memory allocator */
435 struct hinic_os_dep os_dep;
436 struct hinic_hwif *hwif;
437 struct cfg_mgmt_info *cfg_mgmt;
438 struct hinic_aeqs *aeqs;
439 struct hinic_msg_pf_to_mgmt *pf_to_mgmt;
440 struct hinic_cmdqs *cmdqs;
441 struct hinic_nic_io *nic_io;
445 int hinic_osdep_init(struct hinic_hwdev *hwdev);
447 void hinic_osdep_deinit(struct hinic_hwdev *hwdev);
449 void dma_free_coherent_volatile(void *hwdev, size_t size,
450 volatile void *virt, dma_addr_t phys);
452 int hinic_get_board_info(void *hwdev, struct hinic_board_info *info);
454 int hinic_set_ci_table(void *hwdev, u16 q_id, struct hinic_sq_attr *attr);
456 int hinic_func_rx_tx_flush(struct hinic_hwdev *hwdev);
458 int hinic_set_interrupt_cfg(struct hinic_hwdev *hwdev,
459 struct nic_interrupt_info interrupt_info);
461 int init_aeqs_msix_attr(void *hwdev);
463 void hinic_comm_async_event_handle(struct hinic_hwdev *hwdev, u8 cmd,
464 void *buf_in, u16 in_size,
465 void *buf_out, u16 *out_size);
467 void hinic_l2nic_async_event_handle(struct hinic_hwdev *hwdev, void *param,
468 u8 cmd, void *buf_in, u16 in_size,
469 void *buf_out, u16 *out_size);
471 void hinic_hilink_async_event_handle(struct hinic_hwdev *hwdev, u8 cmd,
472 void *buf_in, u16 in_size, void *buf_out,
475 int hinic_init_attr_table(struct hinic_hwdev *hwdev);
477 int hinic_activate_hwdev_state(struct hinic_hwdev *hwdev);
479 void hinic_deactivate_hwdev_state(struct hinic_hwdev *hwdev);
481 int hinic_l2nic_reset(struct hinic_hwdev *hwdev);
483 int hinic_set_pagesize(void *hwdev, u8 page_size);
485 #endif /* _HINIC_PMD_HWDEV_H_ */