1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
5 #ifndef _HINIC_PMD_HWDEV_H_
6 #define _HINIC_PMD_HWDEV_H_
8 #include "hinic_pmd_cmd.h"
10 #define HINIC_PAGE_SIZE_MAX 20
12 #define HINIC_MGMT_CMD_UNSUPPORTED 0xFF
13 #define HINIC_PF_SET_VF_ALREADY 0x4
15 #define MAX_PCIE_DFX_BUF_SIZE 1024
17 #define HINIC_DEV_BUSY_ACTIVE_FW 0xFE
30 enum hinic_res_state {
35 enum hilink_info_print_event {
36 HILINK_EVENT_LINK_UP = 1,
37 HILINK_EVENT_LINK_DOWN,
38 HILINK_EVENT_CABLE_PLUGGED,
39 HILINK_EVENT_MAX_TYPE,
42 struct hinic_port_link_status {
43 struct hinic_mgmt_msg_head mgmt_msg_head;
50 enum link_err_status {
51 LINK_ERR_MODULE_UNRECOGENIZED,
55 struct hinic_cable_plug_event {
56 struct hinic_mgmt_msg_head mgmt_msg_head;
59 u8 plugged; /* 0: unplugged, 1: plugged */
63 struct hinic_link_err_event {
64 struct hinic_mgmt_msg_head mgmt_msg_head;
71 struct hinic_cons_idx_attr {
72 struct hinic_mgmt_msg_head mgmt_msg_head;
85 struct hinic_clear_doorbell {
86 struct hinic_mgmt_msg_head mgmt_msg_head;
93 struct hinic_clear_resource {
94 struct hinic_mgmt_msg_head mgmt_msg_head;
101 struct hinic_cmd_set_res_state {
102 struct hinic_mgmt_msg_head mgmt_msg_head;
110 struct hinic_l2nic_reset {
111 struct hinic_mgmt_msg_head mgmt_msg_head;
117 struct hinic_page_size {
118 struct hinic_mgmt_msg_head mgmt_msg_head;
126 struct hinic_msix_config {
127 struct hinic_mgmt_msg_head mgmt_msg_head;
132 u8 coalesct_timer_cnt;
139 /* defined by chip */
140 enum hinic_fault_type {
143 FAULT_TYPE_MEM_RD_TIMEOUT,
144 FAULT_TYPE_MEM_WR_TIMEOUT,
145 FAULT_TYPE_REG_RD_TIMEOUT,
146 FAULT_TYPE_REG_WR_TIMEOUT,
150 /* defined by chip */
151 enum hinic_fault_err_level {
152 /* default err_level=FAULT_LEVEL_FATAL if
153 * type==FAULT_TYPE_MEM_RD_TIMEOUT || FAULT_TYPE_MEM_WR_TIMEOUT ||
154 * FAULT_TYPE_REG_RD_TIMEOUT || FAULT_TYPE_REG_WR_TIMEOUT ||
156 * other: err_level in event.chip.err_level if type==FAULT_TYPE_CHIP
159 FAULT_LEVEL_SERIOUS_RESET,
160 FAULT_LEVEL_SERIOUS_FLR,
162 FAULT_LEVEL_SUGGESTION,
166 /* defined by chip */
167 struct hinic_fault_event {
168 /* enum hinic_fault_type */
173 /* valid only type==FAULT_TYPE_CHIP */
176 /* enum hinic_fault_err_level */
182 /* func_id valid only err_level==FAULT_LEVEL_SERIOUS_FLR */
187 /* valid only type==FAULT_TYPE_UCODE */
198 /* valid only type==FAULT_TYPE_MEM_RD_TIMEOUT ||
199 * FAULT_TYPE_MEM_WR_TIMEOUT
208 /* valid only type==FAULT_TYPE_REG_RD_TIMEOUT ||
209 * FAULT_TYPE_REG_WR_TIMEOUT
220 struct hinic_cmd_fault_event {
221 struct hinic_mgmt_msg_head mgmt_msg_head;
223 struct hinic_fault_event event;
226 struct hinic_mgmt_watchdog_info {
227 struct hinic_mgmt_msg_head mgmt_msg_head;
250 struct hinic_pcie_dfx_ntc {
251 struct hinic_mgmt_msg_head mgmt_msg_head;
257 struct hinic_pcie_dfx_info {
258 struct hinic_mgmt_msg_head mgmt_msg_head;
265 u8 data[MAX_PCIE_DFX_BUF_SIZE];
268 struct ffm_intr_info {
270 /* error level of the interrupt source */
272 /* Classification by interrupt source properties */
278 struct hinic_board_info {
296 struct hinic_comm_board_info {
297 struct hinic_mgmt_msg_head mgmt_msg_head;
299 struct hinic_board_info info;
304 struct hi30_ctle_data {
314 struct hi30_ffe_data {
322 enum hilink_fec_type {
329 enum hinic_link_port_type {
339 enum hilink_fibre_subtype {
340 FIBRE_SUBTYPE_SR = 1,
345 struct hinic_link_info {
348 * 1 - fiber; 2 - electric; 3 - copper; 4 - AOC; 5 - backplane;
349 * 6 - baseT; 0xffff - unknown
352 * Only when port_type is fiber:
359 u8 cable_max_speed;/* 1(G)/10(G)/25(G)... */
360 u8 sfp_type; /* 0 - qsfp; 1 - sfp */
362 u32 power[4]; /* uW; if is sfp, only power[2] is valid */
364 u8 an_state; /* 0 - off; 1 - on */
365 u8 fec; /* 0 - RSFEC; 1 - BASEFEC; 2 - NOFEC */
366 u16 speed; /* 1(G)/10(G)/25(G)... */
368 u8 cable_absent; /* 0 - cable present; 1 - cable unpresent */
369 u8 alos; /* 0 - yes; 1 - no */
370 u8 rx_los; /* 0 - yes; 1 - no */
372 u32 pma_dbg_info_reg; /* pma debug info: */
373 u32 pma_signal_ok_reg; /* signal ok: */
375 u32 pcs_err_blk_cnt_reg; /* error block counter: */
376 u32 rf_lf_status_reg; /* RF/LF status: */
377 u8 pcs_link_reg; /* pcs link: */
378 u8 mac_link_reg; /* mac link: */
390 struct hinic_hilink_link_info {
391 struct hinic_mgmt_msg_head mgmt_msg_head;
394 u8 info_type; /* 1: link up 2: link down 3 cable plugged */
397 struct hinic_link_info info;
402 /* dma os dependency implementation */
403 struct hinic_os_dep {
404 /* kernel dma alloc api */
405 rte_atomic32_t dma_alloc_cnt;
406 rte_spinlock_t dma_hash_lock;
407 struct rte_hash *dma_addr_hash;
410 struct nic_interrupt_info {
412 u32 interrupt_coalesc_set;
417 u8 coalesc_timer_cfg;
421 struct hinic_sq_attr {
428 /* bit[63:2] is addr's high 62bit, bit[0] is valid flag */
433 struct rte_pci_device *pcidev_hdl;
436 /* dma memory allocator */
437 struct hinic_os_dep os_dep;
438 struct hinic_hwif *hwif;
439 struct cfg_mgmt_info *cfg_mgmt;
440 struct hinic_aeqs *aeqs;
441 struct hinic_mbox_func_to_func *func_to_func;
442 struct hinic_msg_pf_to_mgmt *pf_to_mgmt;
443 struct hinic_cmdqs *cmdqs;
444 struct hinic_nic_io *nic_io;
448 int hinic_osdep_init(struct hinic_hwdev *hwdev);
450 void hinic_osdep_deinit(struct hinic_hwdev *hwdev);
452 void dma_free_coherent_volatile(void *hwdev, size_t size,
453 volatile void *virt, dma_addr_t phys);
455 int hinic_get_board_info(void *hwdev, struct hinic_board_info *info);
457 int hinic_set_ci_table(void *hwdev, u16 q_id, struct hinic_sq_attr *attr);
459 int hinic_func_rx_tx_flush(struct hinic_hwdev *hwdev);
461 int hinic_set_interrupt_cfg(struct hinic_hwdev *hwdev,
462 struct nic_interrupt_info interrupt_info);
464 int init_aeqs_msix_attr(void *hwdev);
466 void hinic_comm_async_event_handle(struct hinic_hwdev *hwdev, u8 cmd,
467 void *buf_in, u16 in_size,
468 void *buf_out, u16 *out_size);
470 void hinic_l2nic_async_event_handle(struct hinic_hwdev *hwdev, void *param,
471 u8 cmd, void *buf_in, u16 in_size,
472 void *buf_out, u16 *out_size);
474 void hinic_hilink_async_event_handle(struct hinic_hwdev *hwdev, u8 cmd,
475 void *buf_in, u16 in_size, void *buf_out,
478 int hinic_init_attr_table(struct hinic_hwdev *hwdev);
480 int hinic_activate_hwdev_state(struct hinic_hwdev *hwdev);
482 void hinic_deactivate_hwdev_state(struct hinic_hwdev *hwdev);
484 int hinic_l2nic_reset(struct hinic_hwdev *hwdev);
486 int hinic_set_pagesize(void *hwdev, u8 page_size);
488 #endif /* _HINIC_PMD_HWDEV_H_ */