1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
5 #ifndef _HINIC_PMD_HWIF_H_
6 #define _HINIC_PMD_HWIF_H_
8 #define HINIC_WAIT_DOORBELL_AND_OUTBOUND_TIMEOUT 30000
10 #define HINIC_HWIF_NUM_AEQS(hwif) ((hwif)->attr.num_aeqs)
11 #define HINIC_HWIF_NUM_CEQS(hwif) ((hwif)->attr.num_ceqs)
12 #define HINIC_HWIF_NUM_IRQS(hwif) ((hwif)->attr.num_irqs)
13 #define HINIC_HWIF_GLOBAL_IDX(hwif) ((hwif)->attr.func_global_idx)
14 #define HINIC_HWIF_GLOBAL_VF_OFFSET(hwif) ((hwif)->attr.global_vf_id_of_pf)
15 #define HINIC_HWIF_PPF_IDX(hwif) ((hwif)->attr.ppf_idx)
16 #define HINIC_PCI_INTF_IDX(hwif) ((hwif)->attr.pci_intf_idx)
18 #define HINIC_FUNC_TYPE(dev) ((dev)->hwif->attr.func_type)
19 #define HINIC_IS_PF(dev) (HINIC_FUNC_TYPE(dev) == TYPE_PF)
20 #define HINIC_IS_VF(dev) (HINIC_FUNC_TYPE(dev) == TYPE_VF)
21 #define HINIC_IS_PPF(dev) (HINIC_FUNC_TYPE(dev) == TYPE_PPF)
29 enum hinic_msix_state {
34 /* Defines the IRQ information structure */
36 u16 msix_entry_idx; /* IRQ corresponding index number */
37 u32 irq_id; /* the IRQ number from OS */
40 struct hinic_free_db_area {
41 u32 db_idx[HINIC_DB_MAX_AREAS];
47 /* spinlock for idx */
51 struct hinic_func_attr {
56 enum func_type func_type;
62 u16 num_irqs; /* max: 2 ^ 15 */
63 u8 num_aeqs; /* max: 2 ^ 3 */
64 u8 num_ceqs; /* max: 2 ^ 7 */
66 u8 num_dma_attr; /* max: 2 ^ 6 */
68 u16 global_vf_id_of_pf;
72 u8 __iomem *cfg_regs_base;
73 u8 __iomem *intr_regs_base;
77 struct hinic_free_db_area free_db_area;
78 struct hinic_func_attr attr;
81 static inline u32 hinic_hwif_read_reg(struct hinic_hwif *hwif, u32 reg)
83 return be32_to_cpu(readl(hwif->cfg_regs_base + reg));
87 hinic_hwif_write_reg(struct hinic_hwif *hwif, u32 reg, u32 val)
89 writel(cpu_to_be32(val), hwif->cfg_regs_base + reg);
92 u16 hinic_global_func_id(void *hwdev); /* func_attr.glb_func_idx */
94 enum func_type hinic_func_type(void *hwdev);
96 void hinic_set_pf_status(struct hinic_hwif *hwif, enum hinic_pf_status status);
98 enum hinic_pf_status hinic_get_pf_status(struct hinic_hwif *hwif);
100 void hinic_enable_doorbell(struct hinic_hwif *hwif);
102 void hinic_disable_doorbell(struct hinic_hwif *hwif);
104 int hinic_alloc_db_addr(void *hwdev, void __iomem **db_base);
106 void hinic_free_db_addr(void *hwdev, void __iomem *db_base);
108 int wait_until_doorbell_flush_states(struct hinic_hwif *hwif,
109 enum hinic_doorbell_ctrl states);
111 void hinic_set_msix_state(void *hwdev, u16 msix_idx,
112 enum hinic_msix_state flag);
114 void hinic_misx_intr_clear_resend_bit(void *hwdev, u16 msix_idx,
117 u8 hinic_ppf_idx(void *hwdev);
119 int hinic_hwif_res_init(struct hinic_hwdev *hwdev);
121 void hinic_hwif_res_free(struct hinic_hwdev *hwdev);
123 u8 hinic_dma_attr_entry_num(void *hwdev);
125 #endif /* _HINIC_PMD_HWIF_H_ */