1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
6 #include <rte_bus_pci.h>
7 #include <rte_ethdev_pci.h>
9 #include <rte_malloc.h>
10 #include <rte_memcpy.h>
11 #include <rte_mempool.h>
12 #include <rte_errno.h>
13 #include <rte_ether.h>
15 #include "base/hinic_compat.h"
16 #include "base/hinic_pmd_hwdev.h"
17 #include "base/hinic_pmd_hwif.h"
18 #include "base/hinic_pmd_wq.h"
19 #include "base/hinic_pmd_cfg.h"
20 #include "base/hinic_pmd_mgmt.h"
21 #include "base/hinic_pmd_cmdq.h"
22 #include "base/hinic_pmd_niccfg.h"
23 #include "base/hinic_pmd_nicio.h"
24 #include "base/hinic_pmd_mbox.h"
25 #include "hinic_pmd_ethdev.h"
26 #include "hinic_pmd_tx.h"
27 #include "hinic_pmd_rx.h"
29 /* Vendor ID used by Huawei devices */
30 #define HINIC_HUAWEI_VENDOR_ID 0x19E5
33 #define HINIC_DEV_ID_PRD 0x1822
34 #define HINIC_DEV_ID_VF 0x375E
35 #define HINIC_DEV_ID_VF_HV 0x379E
37 /* Mezz card for Blade Server */
38 #define HINIC_DEV_ID_MEZZ_25GE 0x0210
39 #define HINIC_DEV_ID_MEZZ_40GE 0x020D
40 #define HINIC_DEV_ID_MEZZ_100GE 0x0205
42 /* 2*25G and 2*100G card */
43 #define HINIC_DEV_ID_1822_DUAL_25GE 0x0206
44 #define HINIC_DEV_ID_1822_100GE 0x0200
46 #define HINIC_SERVICE_MODE_NIC 2
48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
50 #define DEFAULT_BASE_COS 4
53 #define HINIC_MIN_RX_BUF_SIZE 1024
54 #define HINIC_MAX_UC_MAC_ADDRS 128
55 #define HINIC_MAX_MC_MAC_ADDRS 2048
57 #define HINIC_DEFAULT_BURST_SIZE 32
58 #define HINIC_DEFAULT_NB_QUEUES 1
59 #define HINIC_DEFAULT_RING_SIZE 1024
62 * vlan_id is a 12 bit number.
63 * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
64 * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
65 * The higher 7 bit val specifies VFTA array index.
67 #define HINIC_VFTA_BIT(vlan_id) (1 << ((vlan_id) & 0x1F))
68 #define HINIC_VFTA_IDX(vlan_id) ((vlan_id) >> 5)
70 #define HINIC_VLAN_FILTER_EN (1U << 0)
72 #define HINIC_MTU_TO_PKTLEN(mtu) \
73 ((mtu) + ETH_HLEN + ETH_CRC_LEN)
75 #define HINIC_PKTLEN_TO_MTU(pktlen) \
76 ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
78 /* lro numer limit for one packet */
79 #define HINIC_LRO_WQE_NUM_DEFAULT 8
81 /* Driver-specific log messages type */
84 struct hinic_xstats_name_off {
85 char name[RTE_ETH_XSTATS_NAME_SIZE];
89 #define HINIC_FUNC_STAT(_stat_item) { \
90 .name = #_stat_item, \
91 .offset = offsetof(struct hinic_vport_stats, _stat_item) \
94 #define HINIC_PORT_STAT(_stat_item) { \
95 .name = #_stat_item, \
96 .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
99 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
100 HINIC_FUNC_STAT(tx_unicast_pkts_vport),
101 HINIC_FUNC_STAT(tx_unicast_bytes_vport),
102 HINIC_FUNC_STAT(tx_multicast_pkts_vport),
103 HINIC_FUNC_STAT(tx_multicast_bytes_vport),
104 HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
105 HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
107 HINIC_FUNC_STAT(rx_unicast_pkts_vport),
108 HINIC_FUNC_STAT(rx_unicast_bytes_vport),
109 HINIC_FUNC_STAT(rx_multicast_pkts_vport),
110 HINIC_FUNC_STAT(rx_multicast_bytes_vport),
111 HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
112 HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
114 HINIC_FUNC_STAT(tx_discard_vport),
115 HINIC_FUNC_STAT(rx_discard_vport),
116 HINIC_FUNC_STAT(tx_err_vport),
117 HINIC_FUNC_STAT(rx_err_vport),
120 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
121 sizeof(hinic_vport_stats_strings[0]))
123 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
124 HINIC_PORT_STAT(mac_rx_total_pkt_num),
125 HINIC_PORT_STAT(mac_rx_total_oct_num),
126 HINIC_PORT_STAT(mac_rx_bad_pkt_num),
127 HINIC_PORT_STAT(mac_rx_bad_oct_num),
128 HINIC_PORT_STAT(mac_rx_good_pkt_num),
129 HINIC_PORT_STAT(mac_rx_good_oct_num),
130 HINIC_PORT_STAT(mac_rx_uni_pkt_num),
131 HINIC_PORT_STAT(mac_rx_multi_pkt_num),
132 HINIC_PORT_STAT(mac_rx_broad_pkt_num),
133 HINIC_PORT_STAT(mac_tx_total_pkt_num),
134 HINIC_PORT_STAT(mac_tx_total_oct_num),
135 HINIC_PORT_STAT(mac_tx_bad_pkt_num),
136 HINIC_PORT_STAT(mac_tx_bad_oct_num),
137 HINIC_PORT_STAT(mac_tx_good_pkt_num),
138 HINIC_PORT_STAT(mac_tx_good_oct_num),
139 HINIC_PORT_STAT(mac_tx_uni_pkt_num),
140 HINIC_PORT_STAT(mac_tx_multi_pkt_num),
141 HINIC_PORT_STAT(mac_tx_broad_pkt_num),
142 HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
143 HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
144 HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
145 HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
146 HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
147 HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
148 HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
149 HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
150 HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
151 HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
152 HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
153 HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
154 HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
155 HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
156 HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
157 HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
158 HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
159 HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
160 HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
161 HINIC_PORT_STAT(mac_rx_mac_pause_num),
162 HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
163 HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
164 HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
165 HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
166 HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
167 HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
168 HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
169 HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
170 HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
171 HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
172 HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
173 HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
174 HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
175 HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
176 HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
177 HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
178 HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
179 HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
180 HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
181 HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
182 HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
183 HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
184 HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
185 HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
186 HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
187 HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
188 HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
189 HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
190 HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
191 HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
192 HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
193 HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
194 HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
195 HINIC_PORT_STAT(mac_tx_mac_pause_num),
196 HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
197 HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
198 HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
199 HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
200 HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
201 HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
202 HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
203 HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
204 HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
205 HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
206 HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
207 HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
208 HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
211 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
212 sizeof(hinic_phyport_stats_strings[0]))
214 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
215 {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
216 {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
219 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
220 sizeof(hinic_rxq_stats_strings[0]))
222 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
223 {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
224 {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
225 {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
226 {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
227 {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
230 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
231 sizeof(hinic_txq_stats_strings[0]))
233 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
235 if (HINIC_IS_VF(nic_dev->hwdev)) {
236 return (HINIC_VPORT_XSTATS_NUM +
237 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
238 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
240 return (HINIC_VPORT_XSTATS_NUM +
241 HINIC_PHYPORT_XSTATS_NUM +
242 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
243 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
247 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
248 .nb_max = HINIC_MAX_QUEUE_DEPTH,
249 .nb_min = HINIC_MIN_QUEUE_DEPTH,
250 .nb_align = HINIC_RXD_ALIGN,
253 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
254 .nb_max = HINIC_MAX_QUEUE_DEPTH,
255 .nb_min = HINIC_MIN_QUEUE_DEPTH,
256 .nb_align = HINIC_TXD_ALIGN,
259 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
262 * Interrupt handler triggered by NIC for handling
265 * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
267 static void hinic_dev_interrupt_handler(void *param)
269 struct rte_eth_dev *dev = param;
270 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
272 if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
273 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
274 nic_dev->proc_dev_name, dev->data->port_id);
278 /* aeq0 msg handler */
279 hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
283 * Ethernet device configuration.
285 * Prepare the driver for a given number of TX and RX queues, mtu size
289 * Pointer to Ethernet device structure.
292 * 0 on success, negative error value otherwise.
294 static int hinic_dev_configure(struct rte_eth_dev *dev)
296 struct hinic_nic_dev *nic_dev;
297 struct hinic_nic_io *nic_io;
300 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
301 nic_io = nic_dev->hwdev->nic_io;
303 nic_dev->num_sq = dev->data->nb_tx_queues;
304 nic_dev->num_rq = dev->data->nb_rx_queues;
306 nic_io->num_sqs = dev->data->nb_tx_queues;
307 nic_io->num_rqs = dev->data->nb_rx_queues;
309 /* queue pair is max_num(sq, rq) */
310 nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
311 nic_dev->num_sq : nic_dev->num_rq;
312 nic_io->num_qps = nic_dev->num_qps;
314 if (nic_dev->num_qps > nic_io->max_qps) {
316 "Queue number out of range, get queue_num:%d, max_queue_num:%d",
317 nic_dev->num_qps, nic_io->max_qps);
321 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
323 /* mtu size is 256~9600 */
324 if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
325 dev->data->dev_conf.rxmode.max_rx_pkt_len >
326 HINIC_MAX_JUMBO_FRAME_SIZE) {
328 "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
329 "expect between %d and %d",
330 dev->data->dev_conf.rxmode.max_rx_pkt_len,
331 HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
336 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
339 err = hinic_config_mq_mode(dev, TRUE);
341 PMD_DRV_LOG(ERR, "Config multi-queue failed");
345 /* init vlan offoad */
346 err = hinic_vlan_offload_set(dev,
347 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
349 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
350 (void)hinic_config_mq_mode(dev, FALSE);
354 /*clear fdir filter flag in function table*/
355 hinic_free_fdir_filter(nic_dev);
361 * DPDK callback to create the receive queue.
364 * Pointer to Ethernet device structure.
368 * Number of descriptors for receive queue.
370 * NUMA socket on which memory must be allocated.
372 * Thresholds parameters (unused_).
374 * Memory pool for buffer allocations.
377 * 0 on success, negative error value otherwise.
379 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
380 uint16_t nb_desc, unsigned int socket_id,
381 __rte_unused const struct rte_eth_rxconf *rx_conf,
382 struct rte_mempool *mp)
385 struct hinic_nic_dev *nic_dev;
386 struct hinic_hwdev *hwdev;
387 struct hinic_rxq *rxq;
388 u16 rq_depth, rx_free_thresh;
391 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
392 hwdev = nic_dev->hwdev;
394 /* queue depth must be power of 2, otherwise will be aligned up */
395 rq_depth = (nb_desc & (nb_desc - 1)) ?
396 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
399 * Validate number of receive descriptors.
400 * It must not exceed hardware maximum and minimum.
402 if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
403 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
404 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
405 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
406 (int)nb_desc, (int)rq_depth,
407 (int)dev->data->port_id, (int)queue_idx);
412 * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
413 * descriptors are used or if the number of descriptors required
414 * to transmit a packet is greater than the number of free RX
416 * The following constraints must be satisfied:
417 * rx_free_thresh must be greater than 0.
418 * rx_free_thresh must be less than the size of the ring minus 1.
419 * When set to zero use default values.
421 rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
422 rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
423 if (rx_free_thresh >= (rq_depth - 1)) {
424 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
425 (unsigned int)rx_free_thresh,
426 (int)dev->data->port_id,
431 rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
432 RTE_CACHE_LINE_SIZE, socket_id);
434 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
435 queue_idx, dev->data->name);
438 nic_dev->rxqs[queue_idx] = rxq;
440 /* alloc rx sq hw wqepage*/
441 rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
443 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
444 queue_idx, dev->data->name, rq_depth);
448 /* mbuf pool must be assigned before setup rx resources */
452 hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
453 RTE_PKTMBUF_HEADROOM, &buf_size);
455 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
457 goto adjust_bufsize_fail;
460 /* rx queue info, rearm control */
461 rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
462 rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
463 rxq->nic_dev = nic_dev;
464 rxq->q_id = queue_idx;
465 rxq->q_depth = rq_depth;
466 rxq->buf_len = (u16)buf_size;
467 rxq->rx_free_thresh = rx_free_thresh;
469 /* the last point cant do mbuf rearm in bulk */
470 rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
472 /* device port identifier */
473 rxq->port_id = dev->data->port_id;
475 /* alloc rx_cqe and prepare rq_wqe */
476 rc = hinic_setup_rx_resources(rxq);
478 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
479 queue_idx, dev->data->name);
480 goto setup_rx_res_err;
483 /* record nic_dev rxq in rte_eth rx_queues */
484 dev->data->rx_queues[queue_idx] = rxq;
490 hinic_destroy_rq(hwdev, queue_idx);
498 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
500 struct hinic_rxq *rxq;
501 struct hinic_nic_dev *nic_dev;
504 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
506 for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
507 rxq = dev->data->rx_queues[q_id];
509 rxq->wq->cons_idx = 0;
510 rxq->wq->prod_idx = 0;
511 rxq->wq->delta = rxq->q_depth;
512 rxq->wq->mask = rxq->q_depth - 1;
514 /* alloc mbuf to rq */
515 hinic_rx_alloc_pkts(rxq);
520 * DPDK callback to configure the transmit queue.
523 * Pointer to Ethernet device structure.
525 * Transmit queue index.
527 * Number of descriptors for transmit queue.
529 * NUMA socket on which memory must be allocated.
531 * Tx queue configuration parameters.
534 * 0 on success, negative error value otherwise.
536 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
537 uint16_t nb_desc, unsigned int socket_id,
538 __rte_unused const struct rte_eth_txconf *tx_conf)
541 struct hinic_nic_dev *nic_dev;
542 struct hinic_hwdev *hwdev;
543 struct hinic_txq *txq;
544 u16 sq_depth, tx_free_thresh;
546 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
547 hwdev = nic_dev->hwdev;
549 /* queue depth must be power of 2, otherwise will be aligned up */
550 sq_depth = (nb_desc & (nb_desc - 1)) ?
551 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
554 * Validate number of transmit descriptors.
555 * It must not exceed hardware maximum and minimum.
557 if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
558 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
559 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
560 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
561 (int)nb_desc, (int)sq_depth,
562 (int)dev->data->port_id, (int)queue_idx);
567 * The TX descriptor ring will be cleaned after txq->tx_free_thresh
568 * descriptors are used or if the number of descriptors required
569 * to transmit a packet is greater than the number of free TX
571 * The following constraints must be satisfied:
572 * tx_free_thresh must be greater than 0.
573 * tx_free_thresh must be less than the size of the ring minus 1.
574 * When set to zero use default values.
576 tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
577 tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
578 if (tx_free_thresh >= (sq_depth - 1)) {
579 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
580 (unsigned int)tx_free_thresh, (int)dev->data->port_id,
585 txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
586 RTE_CACHE_LINE_SIZE, socket_id);
588 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
589 queue_idx, dev->data->name);
592 nic_dev->txqs[queue_idx] = txq;
594 /* alloc tx sq hw wqepage */
595 rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
597 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
598 queue_idx, dev->data->name, sq_depth);
602 txq->q_id = queue_idx;
603 txq->q_depth = sq_depth;
604 txq->port_id = dev->data->port_id;
605 txq->tx_free_thresh = tx_free_thresh;
606 txq->nic_dev = nic_dev;
607 txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
608 txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
609 txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
610 txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
611 txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
612 sizeof(struct hinic_sq_bufdesc);
613 txq->cos = nic_dev->default_cos;
615 /* alloc software txinfo */
616 rc = hinic_setup_tx_resources(txq);
618 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
619 queue_idx, dev->data->name);
620 goto setup_tx_res_fail;
623 /* record nic_dev txq in rte_eth tx_queues */
624 dev->data->tx_queues[queue_idx] = txq;
629 hinic_destroy_sq(hwdev, queue_idx);
637 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
639 struct hinic_nic_dev *nic_dev;
640 struct hinic_txq *txq;
641 struct hinic_nic_io *nic_io;
642 struct hinic_hwdev *hwdev;
643 volatile u32 *ci_addr;
646 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
647 hwdev = nic_dev->hwdev;
648 nic_io = hwdev->nic_io;
650 for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
651 txq = dev->data->tx_queues[q_id];
653 txq->wq->cons_idx = 0;
654 txq->wq->prod_idx = 0;
655 txq->wq->delta = txq->q_depth;
656 txq->wq->mask = txq->q_depth - 1;
658 /* clear hardware ci */
659 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
666 * Get link speed from NIC.
669 * Pointer to Ethernet device structure.
671 * Pointer to link speed structure.
673 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
675 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
676 u32 supported_link, advertised_link;
679 #define HINIC_LINK_MODE_SUPPORT_1G (1U << HINIC_GE_BASE_KX)
681 #define HINIC_LINK_MODE_SUPPORT_10G (1U << HINIC_10GE_BASE_KR)
683 #define HINIC_LINK_MODE_SUPPORT_25G ((1U << HINIC_25GE_BASE_KR_S) | \
684 (1U << HINIC_25GE_BASE_CR_S) | \
685 (1U << HINIC_25GE_BASE_KR) | \
686 (1U << HINIC_25GE_BASE_CR))
688 #define HINIC_LINK_MODE_SUPPORT_40G ((1U << HINIC_40GE_BASE_KR4) | \
689 (1U << HINIC_40GE_BASE_CR4))
691 #define HINIC_LINK_MODE_SUPPORT_100G ((1U << HINIC_100GE_BASE_KR4) | \
692 (1U << HINIC_100GE_BASE_CR4))
694 err = hinic_get_link_mode(nic_dev->hwdev,
695 &supported_link, &advertised_link);
696 if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
697 advertised_link == HINIC_SUPPORTED_UNKNOWN) {
698 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
699 nic_dev->proc_dev_name, dev->data->port_id);
702 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
703 *speed_capa |= ETH_LINK_SPEED_1G;
704 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
705 *speed_capa |= ETH_LINK_SPEED_10G;
706 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
707 *speed_capa |= ETH_LINK_SPEED_25G;
708 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
709 *speed_capa |= ETH_LINK_SPEED_40G;
710 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
711 *speed_capa |= ETH_LINK_SPEED_100G;
716 * DPDK callback to get information about the device.
719 * Pointer to Ethernet device structure.
721 * Pointer to Info structure output buffer.
724 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
726 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
728 info->max_rx_queues = nic_dev->nic_cap.max_rqs;
729 info->max_tx_queues = nic_dev->nic_cap.max_sqs;
730 info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
731 info->max_rx_pktlen = HINIC_MAX_JUMBO_FRAME_SIZE;
732 info->max_mac_addrs = HINIC_MAX_UC_MAC_ADDRS;
733 info->min_mtu = HINIC_MIN_MTU_SIZE;
734 info->max_mtu = HINIC_MAX_MTU_SIZE;
736 hinic_get_speed_capa(dev, &info->speed_capa);
737 info->rx_queue_offload_capa = 0;
738 info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
739 DEV_RX_OFFLOAD_IPV4_CKSUM |
740 DEV_RX_OFFLOAD_UDP_CKSUM |
741 DEV_RX_OFFLOAD_TCP_CKSUM |
742 DEV_RX_OFFLOAD_VLAN_FILTER |
743 DEV_RX_OFFLOAD_SCATTER |
744 DEV_RX_OFFLOAD_JUMBO_FRAME |
745 DEV_RX_OFFLOAD_TCP_LRO |
746 DEV_RX_OFFLOAD_RSS_HASH;
748 info->tx_queue_offload_capa = 0;
749 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
750 DEV_TX_OFFLOAD_IPV4_CKSUM |
751 DEV_TX_OFFLOAD_UDP_CKSUM |
752 DEV_TX_OFFLOAD_TCP_CKSUM |
753 DEV_TX_OFFLOAD_SCTP_CKSUM |
754 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
755 DEV_TX_OFFLOAD_TCP_TSO |
756 DEV_TX_OFFLOAD_MULTI_SEGS;
758 info->hash_key_size = HINIC_RSS_KEY_SIZE;
759 info->reta_size = HINIC_RSS_INDIR_SIZE;
760 info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
761 info->rx_desc_lim = hinic_rx_desc_lim;
762 info->tx_desc_lim = hinic_tx_desc_lim;
764 /* Driver-preferred Rx/Tx parameters */
765 info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
766 info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
767 info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
768 info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
769 info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
770 info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
775 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
778 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
779 char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
782 err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
784 PMD_DRV_LOG(ERR, "Failed to get fw version\n");
788 if (fw_size < strlen(fw_ver) + 1)
789 return (strlen(fw_ver) + 1);
791 snprintf(fw_version, fw_size, "%s", fw_ver);
796 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
800 err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
802 PMD_DRV_LOG(ERR, "Failed to set rx mode");
805 nic_dev->rx_mode_status = rx_mode_ctrl;
811 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
814 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
817 /* rx configure, if rss enable, need to init default configuration */
818 err = hinic_rx_configure(dev);
820 PMD_DRV_LOG(ERR, "Configure rss failed");
825 err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
827 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
828 HINIC_DEFAULT_RX_MODE);
829 goto set_rx_mode_fail;
833 lro_en = dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO ?
836 err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en,
837 HINIC_LRO_WQE_NUM_DEFAULT);
839 PMD_DRV_LOG(ERR, "%s lro failed, err: %d",
840 lro_en ? "Enable" : "Disable", err);
841 goto set_rx_mode_fail;
847 hinic_rx_remove_configure(dev);
852 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
854 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
856 (void)hinic_config_rx_mode(nic_dev, 0);
857 hinic_rx_remove_configure(dev);
860 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
861 struct rte_eth_link *link)
864 u8 port_link_status = 0;
865 struct nic_port_info port_link_info;
866 struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
867 uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
868 ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
869 ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
870 ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
872 rc = hinic_get_link_status(nic_hwdev, &port_link_status);
876 if (!port_link_status) {
877 link->link_status = ETH_LINK_DOWN;
878 link->link_speed = 0;
879 link->link_duplex = ETH_LINK_HALF_DUPLEX;
880 link->link_autoneg = ETH_LINK_FIXED;
884 memset(&port_link_info, 0, sizeof(port_link_info));
885 rc = hinic_get_port_info(nic_hwdev, &port_link_info);
889 link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
890 link->link_duplex = port_link_info.duplex;
891 link->link_autoneg = port_link_info.autoneg_state;
892 link->link_status = port_link_status;
898 * DPDK callback to retrieve physical link information.
901 * Pointer to Ethernet device structure.
902 * @param wait_to_complete
903 * Wait for request completion.
906 * 0 link status changed, -1 link status not changed
908 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
910 #define CHECK_INTERVAL 10 /* 10ms */
911 #define MAX_REPEAT_TIME 100 /* 1s (100 * 10ms) in total */
913 struct rte_eth_link link;
914 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
915 unsigned int rep_cnt = MAX_REPEAT_TIME;
917 memset(&link, 0, sizeof(link));
919 /* Get link status information from hardware */
920 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
921 if (rc != HINIC_OK) {
922 link.link_speed = ETH_SPEED_NUM_NONE;
923 link.link_duplex = ETH_LINK_FULL_DUPLEX;
924 PMD_DRV_LOG(ERR, "Get link status failed");
928 if (!wait_to_complete || link.link_status)
931 rte_delay_ms(CHECK_INTERVAL);
935 rc = rte_eth_linkstatus_set(dev, &link);
940 * DPDK callback to bring the link UP.
943 * Pointer to Ethernet device structure.
946 * 0 on success, negative errno value on failure.
948 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
950 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
953 ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
955 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
956 nic_dev->proc_dev_name, dev->data->port_id);
960 /* link status follow phy port status, up will open pma */
961 ret = hinic_set_port_enable(nic_dev->hwdev, true);
963 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
964 nic_dev->proc_dev_name, dev->data->port_id);
970 * DPDK callback to bring the link DOWN.
973 * Pointer to Ethernet device structure.
976 * 0 on success, negative errno value on failure.
978 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
980 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
983 ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
985 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
986 nic_dev->proc_dev_name, dev->data->port_id);
990 /* link status follow phy port status, up will close pma */
991 ret = hinic_set_port_enable(nic_dev->hwdev, false);
993 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
994 nic_dev->proc_dev_name, dev->data->port_id);
1000 * DPDK callback to start the device.
1003 * Pointer to Ethernet device structure.
1006 * 0 on success, negative errno value on failure.
1008 static int hinic_dev_start(struct rte_eth_dev *dev)
1012 struct hinic_nic_dev *nic_dev;
1014 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1015 name = dev->data->name;
1017 /* reset rx and tx queue */
1018 hinic_reset_rx_queue(dev);
1019 hinic_reset_tx_queue(dev);
1021 /* get func rx buf size */
1022 hinic_get_func_rx_buf_size(nic_dev);
1024 /* init txq and rxq context */
1025 rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1027 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
1033 rc = hinic_config_mq_mode(dev, TRUE);
1035 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1037 goto cfg_mq_mode_fail;
1040 /* set default mtu */
1041 rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1043 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1044 nic_dev->mtu_size, name);
1048 /* configure rss rx_mode and other rx or tx default feature */
1049 rc = hinic_rxtx_configure(dev);
1051 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1056 /* reactive pf status, so that uP report asyn event */
1057 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1059 /* open virtual port and ready to start packet receiving */
1060 rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1062 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1066 /* open physical port and start packet receiving */
1067 rc = hinic_set_port_enable(nic_dev->hwdev, true);
1069 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
1074 /* update eth_dev link status */
1075 if (dev->data->dev_conf.intr_conf.lsc != 0)
1076 (void)hinic_link_update(dev, 0);
1078 hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
1083 (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1086 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1088 /* Flush tx && rx chip resources in case of set vport fake fail */
1089 (void)hinic_flush_qp_res(nic_dev->hwdev);
1092 hinic_remove_rxtx_configure(dev);
1097 hinic_free_qp_ctxts(nic_dev->hwdev);
1100 hinic_free_all_rx_mbuf(dev);
1101 hinic_free_all_tx_mbuf(dev);
1107 * DPDK callback to release the receive queue.
1110 * Generic receive queue pointer.
1112 static void hinic_rx_queue_release(void *queue)
1114 struct hinic_rxq *rxq = queue;
1115 struct hinic_nic_dev *nic_dev;
1118 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1121 nic_dev = rxq->nic_dev;
1123 /* free rxq_pkt mbuf */
1124 hinic_free_all_rx_mbufs(rxq);
1126 /* free rxq_cqe, rxq_info */
1127 hinic_free_rx_resources(rxq);
1129 /* free root rq wq */
1130 hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1132 nic_dev->rxqs[rxq->q_id] = NULL;
1139 * DPDK callback to release the transmit queue.
1142 * Generic transmit queue pointer.
1144 static void hinic_tx_queue_release(void *queue)
1146 struct hinic_txq *txq = queue;
1147 struct hinic_nic_dev *nic_dev;
1150 PMD_DRV_LOG(WARNING, "Txq is null when release");
1153 nic_dev = txq->nic_dev;
1155 /* free txq_pkt mbuf */
1156 hinic_free_all_tx_mbufs(txq);
1159 hinic_free_tx_resources(txq);
1161 /* free root sq wq */
1162 hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1163 nic_dev->txqs[txq->q_id] = NULL;
1169 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1173 for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1174 hinic_destroy_rq(nic_dev->hwdev, q_id);
1177 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1181 for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1182 hinic_destroy_sq(nic_dev->hwdev, q_id);
1186 * DPDK callback to stop the device.
1189 * Pointer to Ethernet device structure.
1191 static void hinic_dev_stop(struct rte_eth_dev *dev)
1196 struct hinic_nic_dev *nic_dev;
1197 struct rte_eth_link link;
1199 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1200 name = dev->data->name;
1201 port_id = dev->data->port_id;
1203 if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1204 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1208 /* just stop phy port and vport */
1209 rc = hinic_set_port_enable(nic_dev->hwdev, false);
1211 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1214 rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1216 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1219 /* Clear recorded link status */
1220 memset(&link, 0, sizeof(link));
1221 (void)rte_eth_linkstatus_set(dev, &link);
1223 /* flush pending io request */
1224 rc = hinic_rx_tx_flush(nic_dev->hwdev);
1226 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1229 /* clean rss table and rx_mode */
1230 hinic_remove_rxtx_configure(dev);
1232 /* clean root context */
1233 hinic_free_qp_ctxts(nic_dev->hwdev);
1235 hinic_free_fdir_filter(nic_dev);
1238 hinic_free_all_rx_mbuf(dev);
1239 hinic_free_all_tx_mbuf(dev);
1242 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1244 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1245 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1246 int ret, retries = 0;
1248 hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1250 /* disable msix interrupt in hardware */
1251 hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1253 /* disable rte interrupt */
1254 ret = rte_intr_disable(&pci_dev->intr_handle);
1256 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1260 rte_intr_callback_unregister(&pci_dev->intr_handle,
1261 hinic_dev_interrupt_handler, dev);
1264 } else if (ret == -EAGAIN) {
1268 PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1272 } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1274 if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1275 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1279 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1281 u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1284 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1286 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1288 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1292 * DPDK callback to get device statistics.
1295 * Pointer to Ethernet device structure.
1297 * Stats structure output buffer.
1300 * 0 on success and stats is filled,
1301 * negative error value otherwise.
1304 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1307 u64 rx_discards_pmd = 0;
1308 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1309 struct hinic_vport_stats vport_stats;
1310 struct hinic_rxq *rxq = NULL;
1311 struct hinic_rxq_stats rxq_stats;
1312 struct hinic_txq *txq = NULL;
1313 struct hinic_txq_stats txq_stats;
1315 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1317 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1318 nic_dev->proc_dev_name);
1322 /* rx queue stats */
1323 q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1324 nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1325 for (i = 0; i < q_num; i++) {
1326 rxq = nic_dev->rxqs[i];
1327 hinic_rxq_get_stats(rxq, &rxq_stats);
1328 stats->q_ipackets[i] = rxq_stats.packets;
1329 stats->q_ibytes[i] = rxq_stats.bytes;
1330 stats->q_errors[i] = rxq_stats.rx_discards;
1332 stats->ierrors += rxq_stats.errors;
1333 rx_discards_pmd += rxq_stats.rx_discards;
1334 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1337 /* tx queue stats */
1338 q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1339 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1340 for (i = 0; i < q_num; i++) {
1341 txq = nic_dev->txqs[i];
1342 hinic_txq_get_stats(txq, &txq_stats);
1343 stats->q_opackets[i] = txq_stats.packets;
1344 stats->q_obytes[i] = txq_stats.bytes;
1345 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1349 stats->oerrors += vport_stats.tx_discard_vport;
1351 stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1353 stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1354 vport_stats.rx_multicast_pkts_vport +
1355 vport_stats.rx_broadcast_pkts_vport -
1358 stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1359 vport_stats.tx_multicast_pkts_vport +
1360 vport_stats.tx_broadcast_pkts_vport);
1362 stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1363 vport_stats.rx_multicast_bytes_vport +
1364 vport_stats.rx_broadcast_bytes_vport);
1366 stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1367 vport_stats.tx_multicast_bytes_vport +
1368 vport_stats.tx_broadcast_bytes_vport);
1373 * DPDK callback to clear device statistics.
1376 * Pointer to Ethernet device structure.
1378 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1381 struct hinic_rxq *rxq = NULL;
1382 struct hinic_txq *txq = NULL;
1383 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1386 ret = hinic_clear_vport_stats(nic_dev->hwdev);
1390 for (qid = 0; qid < nic_dev->num_rq; qid++) {
1391 rxq = nic_dev->rxqs[qid];
1392 hinic_rxq_stats_reset(rxq);
1395 for (qid = 0; qid < nic_dev->num_sq; qid++) {
1396 txq = nic_dev->txqs[qid];
1397 hinic_txq_stats_reset(txq);
1404 * DPDK callback to clear device extended statistics.
1407 * Pointer to Ethernet device structure.
1409 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1411 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1414 ret = hinic_dev_stats_reset(dev);
1418 if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1419 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1427 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1429 uint64_t random_value;
1431 /* Set Organizationally Unique Identifier (OUI) prefix */
1432 mac_addr->addr_bytes[0] = 0x00;
1433 mac_addr->addr_bytes[1] = 0x09;
1434 mac_addr->addr_bytes[2] = 0xC0;
1435 /* Force indication of locally assigned MAC address. */
1436 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1437 /* Generate the last 3 bytes of the MAC address with a random number. */
1438 random_value = rte_rand();
1439 memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1443 * Init mac_vlan table in NIC.
1446 * Pointer to Ethernet device structure.
1449 * 0 on success and stats is filled,
1450 * negative error value otherwise.
1452 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1454 struct hinic_nic_dev *nic_dev =
1455 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1456 uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1460 rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1464 rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1465 ð_dev->data->mac_addrs[0]);
1466 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[0]))
1467 hinic_gen_random_mac_addr(ð_dev->data->mac_addrs[0]);
1469 func_id = hinic_global_func_id(nic_dev->hwdev);
1470 rc = hinic_set_mac(nic_dev->hwdev,
1471 eth_dev->data->mac_addrs[0].addr_bytes,
1473 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1476 rte_ether_addr_copy(ð_dev->data->mac_addrs[0],
1477 &nic_dev->default_addr);
1482 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1487 func_id = hinic_global_func_id(nic_dev->hwdev);
1489 for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1490 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1493 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1495 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1500 * Deinit mac_vlan table in NIC.
1503 * Pointer to Ethernet device structure.
1506 * 0 on success and stats is filled,
1507 * negative error value otherwise.
1509 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1511 struct hinic_nic_dev *nic_dev =
1512 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1517 func_id = hinic_global_func_id(nic_dev->hwdev);
1519 for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1520 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[i]))
1523 rc = hinic_del_mac(nic_dev->hwdev,
1524 eth_dev->data->mac_addrs[i].addr_bytes,
1526 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1527 PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1528 eth_dev->data->name);
1530 memset(ð_dev->data->mac_addrs[i], 0,
1531 sizeof(struct rte_ether_addr));
1534 /* delete multicast mac addrs */
1535 hinic_delete_mc_addr_list(nic_dev);
1538 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1541 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1543 PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1544 dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1546 if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1547 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1548 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1552 ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1554 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1558 /* update max frame size */
1559 dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1560 nic_dev->mtu_size = mtu;
1565 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1566 u16 vlan_id, bool on)
1568 u32 vid_idx, vid_bit;
1570 vid_idx = HINIC_VFTA_IDX(vlan_id);
1571 vid_bit = HINIC_VFTA_BIT(vlan_id);
1574 nic_dev->vfta[vid_idx] |= vid_bit;
1576 nic_dev->vfta[vid_idx] &= ~vid_bit;
1579 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1582 u32 vid_idx, vid_bit;
1584 vid_idx = HINIC_VFTA_IDX(vlan_id);
1585 vid_bit = HINIC_VFTA_BIT(vlan_id);
1587 return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1591 * DPDK callback to set vlan filter.
1594 * Pointer to Ethernet device structure.
1596 * vlan id is used to filter vlan packets
1598 * enable disable or enable vlan filter function
1600 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1601 uint16_t vlan_id, int enable)
1603 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1607 if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1610 func_id = hinic_global_func_id(nic_dev->hwdev);
1613 /* If vlanid is already set, just return */
1614 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1615 PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1616 vlan_id, nic_dev->proc_dev_name);
1620 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1623 /* If vlanid can't be found, just return */
1624 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1625 PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1626 vlan_id, nic_dev->proc_dev_name);
1630 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1635 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1636 enable ? "Add" : "Remove", func_id, vlan_id, err);
1640 hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1642 PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1643 enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1648 * DPDK callback to enable or disable vlan offload.
1651 * Pointer to Ethernet device structure.
1653 * Definitions used for VLAN setting
1655 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1657 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1658 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1662 /* Enable or disable VLAN filter */
1663 if (mask & ETH_VLAN_FILTER_MASK) {
1664 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1666 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1667 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1668 PMD_DRV_LOG(WARNING,
1669 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1670 nic_dev->proc_dev_name, dev->data->port_id);
1672 PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1673 on ? "enable" : "disable",
1674 nic_dev->proc_dev_name,
1675 dev->data->port_id, err);
1679 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1680 on ? "Enable" : "Disable",
1681 nic_dev->proc_dev_name, dev->data->port_id);
1684 /* Enable or disable VLAN stripping */
1685 if (mask & ETH_VLAN_STRIP_MASK) {
1686 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1688 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1690 PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1691 on ? "enable" : "disable",
1692 nic_dev->proc_dev_name,
1693 dev->data->port_id, err);
1697 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1698 on ? "Enable" : "Disable",
1699 nic_dev->proc_dev_name, dev->data->port_id);
1702 if (mask & ETH_VLAN_EXTEND_MASK) {
1703 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1704 nic_dev->proc_dev_name, dev->data->port_id);
1711 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1713 struct hinic_nic_dev *nic_dev =
1714 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1718 func_id = hinic_global_func_id(nic_dev->hwdev);
1719 for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1720 /* If can't find it, continue */
1721 if (!hinic_find_vlan_filter(nic_dev, i))
1724 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1725 hinic_store_vlan_filter(nic_dev, i, false);
1729 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1732 u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1735 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1737 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1739 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1743 * DPDK callback to enable allmulticast mode.
1746 * Pointer to Ethernet device structure.
1750 * negative error value otherwise.
1752 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1755 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1757 ret = hinic_set_dev_allmulticast(nic_dev, true);
1759 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1763 PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1764 nic_dev->proc_dev_name, dev->data->port_id);
1769 * DPDK callback to disable allmulticast mode.
1772 * Pointer to Ethernet device structure.
1776 * negative error value otherwise.
1778 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1781 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1783 ret = hinic_set_dev_allmulticast(nic_dev, false);
1785 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1789 PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1790 nic_dev->proc_dev_name, dev->data->port_id);
1795 * DPDK callback to enable promiscuous mode.
1798 * Pointer to Ethernet device structure.
1802 * negative error value otherwise.
1804 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1807 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1809 PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1810 nic_dev->proc_dev_name, dev->data->port_id,
1811 dev->data->promiscuous);
1813 rc = hinic_set_dev_promiscuous(nic_dev, true);
1815 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1821 * DPDK callback to disable promiscuous mode.
1824 * Pointer to Ethernet device structure.
1828 * negative error value otherwise.
1830 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1833 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1835 PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1836 nic_dev->proc_dev_name, dev->data->port_id,
1837 dev->data->promiscuous);
1839 rc = hinic_set_dev_promiscuous(nic_dev, false);
1841 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1847 * DPDK callback to update the RSS hash key and RSS hash type.
1850 * Pointer to Ethernet device structure.
1852 * RSS configuration data.
1855 * 0 on success, negative error value otherwise.
1857 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1858 struct rte_eth_rss_conf *rss_conf)
1860 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1861 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1862 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1863 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1864 u64 rss_hf = rss_conf->rss_hf;
1865 struct nic_rss_type rss_type = {0};
1868 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1869 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1873 if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1874 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1875 rss_conf->rss_key_len);
1879 if (rss_conf->rss_key) {
1880 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1881 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1884 PMD_DRV_LOG(ERR, "Set rss template table failed");
1889 rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1890 rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1891 rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1892 rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1893 rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1894 rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1895 rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1896 rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1898 err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1900 PMD_DRV_LOG(ERR, "Set rss type table failed");
1907 memset(prio_tc, 0, sizeof(prio_tc));
1908 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1913 * DPDK callback to get the RSS hash configuration.
1916 * Pointer to Ethernet device structure.
1918 * RSS configuration data.
1921 * 0 on success, negative error value otherwise.
1923 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1924 struct rte_eth_rss_conf *rss_conf)
1926 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1927 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1928 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1929 struct nic_rss_type rss_type = {0};
1932 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1933 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1937 err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1941 if (rss_conf->rss_key &&
1942 rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1943 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1944 rss_conf->rss_key_len = sizeof(hashkey);
1947 err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1951 rss_conf->rss_hf = 0;
1952 rss_conf->rss_hf |= rss_type.ipv4 ?
1953 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1954 rss_conf->rss_hf |= rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1955 rss_conf->rss_hf |= rss_type.ipv6 ?
1956 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1957 rss_conf->rss_hf |= rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1958 rss_conf->rss_hf |= rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1959 rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1960 rss_conf->rss_hf |= rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1961 rss_conf->rss_hf |= rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1967 * DPDK callback to update the RETA indirection table.
1970 * Pointer to Ethernet device structure.
1972 * Pointer to RETA configuration structure array.
1974 * Size of the RETA table.
1977 * 0 on success, negative error value otherwise.
1979 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1980 struct rte_eth_rss_reta_entry64 *reta_conf,
1983 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1984 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1985 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1986 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1991 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1994 if (reta_size != NIC_RSS_INDIR_SIZE) {
1995 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1999 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2003 /* update rss indir_tbl */
2004 for (i = 0; i < reta_size; i++) {
2005 idx = i / RTE_RETA_GROUP_SIZE;
2006 shift = i % RTE_RETA_GROUP_SIZE;
2007 if (reta_conf[idx].mask & (1ULL << shift))
2008 indirtbl[i] = reta_conf[idx].reta[shift];
2011 for (i = 0 ; i < reta_size; i++) {
2012 if (indirtbl[i] >= nic_dev->num_rq) {
2013 PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
2014 i, nic_dev->num_rq);
2019 err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2023 nic_dev->rss_indir_flag = true;
2028 memset(prio_tc, 0, sizeof(prio_tc));
2029 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2036 * DPDK callback to get the RETA indirection table.
2039 * Pointer to Ethernet device structure.
2041 * Pointer to RETA configuration structure array.
2043 * Size of the RETA table.
2046 * 0 on success, negative error value otherwise.
2048 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2049 struct rte_eth_rss_reta_entry64 *reta_conf,
2052 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2053 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2055 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2059 if (reta_size != NIC_RSS_INDIR_SIZE) {
2060 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
2064 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2066 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
2071 for (i = 0; i < reta_size; i++) {
2072 idx = i / RTE_RETA_GROUP_SIZE;
2073 shift = i % RTE_RETA_GROUP_SIZE;
2074 if (reta_conf[idx].mask & (1ULL << shift))
2075 reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2082 * DPDK callback to get extended device statistics.
2085 * Pointer to Ethernet device.
2087 * Pointer to rte extended stats table.
2089 * The size of the stats table.
2092 * Number of extended stats on success and stats is filled,
2093 * negative error value otherwise.
2095 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2096 struct rte_eth_xstat *xstats,
2102 struct hinic_nic_dev *nic_dev;
2103 struct hinic_phy_port_stats port_stats;
2104 struct hinic_vport_stats vport_stats;
2105 struct hinic_rxq *rxq = NULL;
2106 struct hinic_rxq_stats rxq_stats;
2107 struct hinic_txq *txq = NULL;
2108 struct hinic_txq_stats txq_stats;
2110 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2111 count = hinic_xstats_calc_num(nic_dev);
2117 /* Get stats from hinic_rxq_stats */
2118 for (qid = 0; qid < nic_dev->num_rq; qid++) {
2119 rxq = nic_dev->rxqs[qid];
2120 hinic_rxq_get_stats(rxq, &rxq_stats);
2122 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2123 xstats[count].value =
2124 *(uint64_t *)(((char *)&rxq_stats) +
2125 hinic_rxq_stats_strings[i].offset);
2126 xstats[count].id = count;
2131 /* Get stats from hinic_txq_stats */
2132 for (qid = 0; qid < nic_dev->num_sq; qid++) {
2133 txq = nic_dev->txqs[qid];
2134 hinic_txq_get_stats(txq, &txq_stats);
2136 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2137 xstats[count].value =
2138 *(uint64_t *)(((char *)&txq_stats) +
2139 hinic_txq_stats_strings[i].offset);
2140 xstats[count].id = count;
2145 /* Get stats from hinic_vport_stats */
2146 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2150 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2151 xstats[count].value =
2152 *(uint64_t *)(((char *)&vport_stats) +
2153 hinic_vport_stats_strings[i].offset);
2154 xstats[count].id = count;
2158 if (HINIC_IS_VF(nic_dev->hwdev))
2161 /* Get stats from hinic_phy_port_stats */
2162 err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2166 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2167 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2168 hinic_phyport_stats_strings[i].offset);
2169 xstats[count].id = count;
2176 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2177 struct rte_eth_rxq_info *qinfo)
2179 struct hinic_rxq *rxq = dev->data->rx_queues[queue_id];
2181 qinfo->mp = rxq->mb_pool;
2182 qinfo->nb_desc = rxq->q_depth;
2185 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2186 struct rte_eth_txq_info *qinfo)
2188 struct hinic_txq *txq = dev->data->tx_queues[queue_id];
2190 qinfo->nb_desc = txq->q_depth;
2194 * DPDK callback to retrieve names of extended device statistics
2197 * Pointer to Ethernet device structure.
2198 * @param xstats_names
2199 * Buffer to insert names into.
2202 * Number of xstats names.
2204 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2205 struct rte_eth_xstat_name *xstats_names,
2206 __rte_unused unsigned int limit)
2208 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2212 if (xstats_names == NULL)
2213 return hinic_xstats_calc_num(nic_dev);
2215 /* get pmd rxq stats */
2216 for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2217 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2218 snprintf(xstats_names[count].name,
2219 sizeof(xstats_names[count].name),
2221 q_num, hinic_rxq_stats_strings[i].name);
2226 /* get pmd txq stats */
2227 for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2228 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2229 snprintf(xstats_names[count].name,
2230 sizeof(xstats_names[count].name),
2232 q_num, hinic_txq_stats_strings[i].name);
2237 /* get vport stats */
2238 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2239 snprintf(xstats_names[count].name,
2240 sizeof(xstats_names[count].name),
2242 hinic_vport_stats_strings[i].name);
2246 if (HINIC_IS_VF(nic_dev->hwdev))
2249 /* get phy port stats */
2250 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2251 snprintf(xstats_names[count].name,
2252 sizeof(xstats_names[count].name),
2254 hinic_phyport_stats_strings[i].name);
2261 * DPDK callback to set mac address
2264 * Pointer to Ethernet device structure.
2266 * Pointer to mac address
2268 * 0 on success, negative error value otherwise.
2270 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2271 struct rte_ether_addr *addr)
2273 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2277 func_id = hinic_global_func_id(nic_dev->hwdev);
2278 err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2279 addr->addr_bytes, 0, func_id);
2283 rte_ether_addr_copy(addr, &nic_dev->default_addr);
2285 PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
2286 addr->addr_bytes[0], addr->addr_bytes[1],
2287 addr->addr_bytes[2], addr->addr_bytes[3],
2288 addr->addr_bytes[4], addr->addr_bytes[5]);
2294 * DPDK callback to remove a MAC address.
2297 * Pointer to Ethernet device structure.
2299 * MAC address index.
2301 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2303 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2307 if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2308 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2313 func_id = hinic_global_func_id(nic_dev->hwdev);
2314 ret = hinic_del_mac(nic_dev->hwdev,
2315 dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2319 memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2323 * DPDK callback to add a MAC address.
2326 * Pointer to Ethernet device structure.
2328 * MAC address to register.
2330 * MAC address index.
2332 * VMDq pool index to associate address with (ignored).
2335 * 0 on success, a negative errno value otherwise and rte_errno is set.
2338 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2339 struct rte_ether_addr *mac_addr, uint32_t index,
2340 __rte_unused uint32_t vmdq)
2342 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2347 if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2348 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
2352 /* First, make sure this address isn't already configured. */
2353 for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2354 /* Skip this index, it's going to be reconfigured. */
2358 if (memcmp(&dev->data->mac_addrs[i],
2359 mac_addr, sizeof(*mac_addr)))
2362 PMD_DRV_LOG(INFO, "MAC address already configured");
2366 func_id = hinic_global_func_id(nic_dev->hwdev);
2367 ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2371 dev->data->mac_addrs[index] = *mac_addr;
2376 * DPDK callback to set multicast mac address
2379 * Pointer to Ethernet device structure.
2380 * @param mc_addr_set
2381 * Pointer to multicast mac address
2385 * 0 on success, negative error value otherwise.
2387 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2388 struct rte_ether_addr *mc_addr_set,
2389 uint32_t nb_mc_addr)
2391 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2396 func_id = hinic_global_func_id(nic_dev->hwdev);
2398 /* delete old multi_cast addrs firstly */
2399 hinic_delete_mc_addr_list(nic_dev);
2401 if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2404 for (i = 0; i < nb_mc_addr; i++) {
2405 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2407 /* if add mc addr failed, set all multi_cast */
2409 hinic_delete_mc_addr_list(nic_dev);
2413 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2419 hinic_dev_allmulticast_enable(dev);
2425 * DPDK callback to manage filter operations
2428 * Pointer to Ethernet device structure.
2429 * @param filter_type
2432 * Operation to perform.
2434 * Pointer to operation-specific structure.
2437 * 0 on success, negative errno value on failure.
2439 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2440 enum rte_filter_type filter_type,
2441 enum rte_filter_op filter_op,
2444 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2445 int func_id = hinic_global_func_id(nic_dev->hwdev);
2447 switch (filter_type) {
2448 case RTE_ETH_FILTER_GENERIC:
2449 if (filter_op != RTE_ETH_FILTER_GET)
2451 *(const void **)arg = &hinic_flow_ops;
2454 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2459 PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2460 "filter_op: 0x%x.", func_id, filter_type, filter_op);
2464 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2466 struct nic_pause_config pause_config = {0};
2468 pause_config.auto_neg = 0;
2469 pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2470 pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2472 return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2475 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2477 u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2478 u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2479 u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2480 u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2481 u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2485 for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2488 return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2489 up_pgid, up_bw, up_strict);
2492 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2497 if (!HINIC_IS_VF(nic_dev->hwdev)) {
2498 nic_dev->default_cos =
2499 (hinic_global_func_id(nic_dev->hwdev) +
2500 DEFAULT_BASE_COS) % NR_MAX_COS;
2502 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2504 PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2509 nic_dev->default_cos = cos_id;
2515 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2519 err = hinic_init_default_cos(nic_dev);
2523 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2526 /* Restore DCB configure to default status */
2527 err = hinic_set_default_dcb_feature(nic_dev);
2531 /* Set pause enable, and up will disable pfc. */
2532 err = hinic_set_default_pause_feature(nic_dev);
2536 err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2540 err = hinic_set_link_status_follow(nic_dev->hwdev,
2541 HINIC_LINK_FOLLOW_PORT);
2542 if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2543 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2547 return hinic_set_anti_attack(nic_dev->hwdev, true);
2550 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2552 struct hinic_board_info info = { 0 };
2555 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2558 rc = hinic_get_board_info(nic_dev->hwdev, &info);
2562 return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2566 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2568 nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2569 if (nic_dev->cpy_mpool == NULL) {
2570 nic_dev->cpy_mpool =
2571 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2572 HINIC_COPY_MEMPOOL_DEPTH,
2574 HINIC_COPY_MBUF_SIZE,
2576 if (!nic_dev->cpy_mpool) {
2577 PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2578 rte_errno, nic_dev->proc_dev_name);
2586 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2588 if (nic_dev->cpy_mpool != NULL)
2589 rte_mempool_free(nic_dev->cpy_mpool);
2592 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2597 /* allocate software txq array */
2598 txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2599 nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2600 if (!nic_dev->txqs) {
2601 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2605 /* allocate software rxq array */
2606 rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2607 nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2608 if (!nic_dev->rxqs) {
2610 kfree(nic_dev->txqs);
2611 nic_dev->txqs = NULL;
2613 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2620 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2622 kfree(nic_dev->txqs);
2623 nic_dev->txqs = NULL;
2625 kfree(nic_dev->rxqs);
2626 nic_dev->rxqs = NULL;
2629 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2631 struct hinic_nic_dev *nic_dev =
2632 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2635 nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2636 RTE_CACHE_LINE_SIZE);
2637 if (!nic_dev->hwdev) {
2638 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2639 eth_dev->data->name);
2642 nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2645 rc = hinic_osdep_init(nic_dev->hwdev);
2647 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2648 eth_dev->data->name);
2649 goto init_osdep_fail;
2653 rc = hinic_hwif_res_init(nic_dev->hwdev);
2655 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2656 eth_dev->data->name);
2657 goto init_hwif_fail;
2661 rc = init_cfg_mgmt(nic_dev->hwdev);
2663 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2664 eth_dev->data->name);
2665 goto init_cfgmgnt_fail;
2669 rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2671 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2672 eth_dev->data->name);
2673 goto init_aeqs_fail;
2676 /* init_pf_to_mgnt */
2677 rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2679 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2680 eth_dev->data->name);
2681 goto init_pf_to_mgmt_fail;
2685 rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2687 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2688 eth_dev->data->name);
2689 goto init_func_to_func_fail;
2692 rc = hinic_card_workmode_check(nic_dev);
2694 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2695 eth_dev->data->name);
2696 goto workmode_check_fail;
2699 /* do l2nic reset to make chip clear */
2700 rc = hinic_l2nic_reset(nic_dev->hwdev);
2702 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2703 eth_dev->data->name);
2704 goto l2nic_reset_fail;
2707 /* init dma and aeq msix attribute table */
2708 (void)hinic_init_attr_table(nic_dev->hwdev);
2711 rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2713 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2714 eth_dev->data->name);
2715 goto init_cmdq_fail;
2718 /* set hardware state active */
2719 rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2721 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2722 eth_dev->data->name);
2723 goto init_resources_state_fail;
2726 /* init_capability */
2727 rc = hinic_init_capability(nic_dev->hwdev);
2729 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2730 eth_dev->data->name);
2734 /* get nic capability */
2735 if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2736 goto nic_check_fail;
2738 /* init root cla and function table */
2739 rc = hinic_init_nicio(nic_dev->hwdev);
2741 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2742 eth_dev->data->name);
2743 goto init_nicio_fail;
2746 /* init_software_txrxq */
2747 rc = hinic_init_sw_rxtxqs(nic_dev);
2749 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2750 eth_dev->data->name);
2751 goto init_sw_rxtxqs_fail;
2754 rc = hinic_copy_mempool_init(nic_dev);
2756 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2757 eth_dev->data->name);
2758 goto init_mpool_fail;
2761 /* set hardware feature to default status */
2762 rc = hinic_set_default_hw_feature(nic_dev);
2764 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2765 eth_dev->data->name);
2766 goto set_default_hw_feature_fail;
2771 set_default_hw_feature_fail:
2772 hinic_copy_mempool_uninit(nic_dev);
2775 hinic_deinit_sw_rxtxqs(nic_dev);
2777 init_sw_rxtxqs_fail:
2778 hinic_deinit_nicio(nic_dev->hwdev);
2783 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2785 init_resources_state_fail:
2786 hinic_comm_cmdqs_free(nic_dev->hwdev);
2790 workmode_check_fail:
2791 hinic_comm_func_to_func_free(nic_dev->hwdev);
2793 init_func_to_func_fail:
2794 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2796 init_pf_to_mgmt_fail:
2797 hinic_comm_aeqs_free(nic_dev->hwdev);
2800 free_cfg_mgmt(nic_dev->hwdev);
2803 hinic_hwif_res_free(nic_dev->hwdev);
2806 hinic_osdep_deinit(nic_dev->hwdev);
2809 rte_free(nic_dev->hwdev);
2810 nic_dev->hwdev = NULL;
2815 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2817 struct hinic_nic_dev *nic_dev =
2818 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2820 (void)hinic_set_link_status_follow(nic_dev->hwdev,
2821 HINIC_LINK_FOLLOW_DEFAULT);
2822 hinic_copy_mempool_uninit(nic_dev);
2823 hinic_deinit_sw_rxtxqs(nic_dev);
2824 hinic_deinit_nicio(nic_dev->hwdev);
2825 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2826 hinic_comm_cmdqs_free(nic_dev->hwdev);
2827 hinic_comm_func_to_func_free(nic_dev->hwdev);
2828 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2829 hinic_comm_aeqs_free(nic_dev->hwdev);
2830 free_cfg_mgmt(nic_dev->hwdev);
2831 hinic_hwif_res_free(nic_dev->hwdev);
2832 hinic_osdep_deinit(nic_dev->hwdev);
2833 rte_free(nic_dev->hwdev);
2834 nic_dev->hwdev = NULL;
2838 * DPDK callback to close the device.
2841 * Pointer to Ethernet device structure.
2843 static void hinic_dev_close(struct rte_eth_dev *dev)
2845 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2847 if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2848 PMD_DRV_LOG(WARNING, "Device %s already closed",
2853 /* stop device first */
2854 hinic_dev_stop(dev);
2856 /* rx_cqe, rx_info */
2857 hinic_free_all_rx_resources(dev);
2860 hinic_free_all_tx_resources(dev);
2862 /* free wq, pi_dma_addr */
2863 hinic_free_all_rq(nic_dev);
2865 /* free wq, db_addr */
2866 hinic_free_all_sq(nic_dev);
2868 /* deinit mac vlan tbl */
2869 hinic_deinit_mac_addr(dev);
2870 hinic_remove_all_vlanid(dev);
2872 /* disable hardware and uio interrupt */
2873 hinic_disable_interrupt(dev);
2875 /* deinit nic hardware device */
2876 hinic_nic_dev_destroy(dev);
2879 static const struct eth_dev_ops hinic_pmd_ops = {
2880 .dev_configure = hinic_dev_configure,
2881 .dev_infos_get = hinic_dev_infos_get,
2882 .fw_version_get = hinic_fw_version_get,
2883 .rx_queue_setup = hinic_rx_queue_setup,
2884 .tx_queue_setup = hinic_tx_queue_setup,
2885 .dev_start = hinic_dev_start,
2886 .dev_set_link_up = hinic_dev_set_link_up,
2887 .dev_set_link_down = hinic_dev_set_link_down,
2888 .link_update = hinic_link_update,
2889 .rx_queue_release = hinic_rx_queue_release,
2890 .tx_queue_release = hinic_tx_queue_release,
2891 .dev_stop = hinic_dev_stop,
2892 .dev_close = hinic_dev_close,
2893 .mtu_set = hinic_dev_set_mtu,
2894 .vlan_filter_set = hinic_vlan_filter_set,
2895 .vlan_offload_set = hinic_vlan_offload_set,
2896 .allmulticast_enable = hinic_dev_allmulticast_enable,
2897 .allmulticast_disable = hinic_dev_allmulticast_disable,
2898 .promiscuous_enable = hinic_dev_promiscuous_enable,
2899 .promiscuous_disable = hinic_dev_promiscuous_disable,
2900 .rss_hash_update = hinic_rss_hash_update,
2901 .rss_hash_conf_get = hinic_rss_conf_get,
2902 .reta_update = hinic_rss_indirtbl_update,
2903 .reta_query = hinic_rss_indirtbl_query,
2904 .stats_get = hinic_dev_stats_get,
2905 .stats_reset = hinic_dev_stats_reset,
2906 .xstats_get = hinic_dev_xstats_get,
2907 .xstats_reset = hinic_dev_xstats_reset,
2908 .xstats_get_names = hinic_dev_xstats_get_names,
2909 .rxq_info_get = hinic_rxq_info_get,
2910 .txq_info_get = hinic_txq_info_get,
2911 .mac_addr_set = hinic_set_mac_addr,
2912 .mac_addr_remove = hinic_mac_addr_remove,
2913 .mac_addr_add = hinic_mac_addr_add,
2914 .set_mc_addr_list = hinic_set_mc_addr_list,
2915 .filter_ctrl = hinic_dev_filter_ctrl,
2918 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2919 .dev_configure = hinic_dev_configure,
2920 .dev_infos_get = hinic_dev_infos_get,
2921 .fw_version_get = hinic_fw_version_get,
2922 .rx_queue_setup = hinic_rx_queue_setup,
2923 .tx_queue_setup = hinic_tx_queue_setup,
2924 .dev_start = hinic_dev_start,
2925 .link_update = hinic_link_update,
2926 .rx_queue_release = hinic_rx_queue_release,
2927 .tx_queue_release = hinic_tx_queue_release,
2928 .dev_stop = hinic_dev_stop,
2929 .dev_close = hinic_dev_close,
2930 .mtu_set = hinic_dev_set_mtu,
2931 .vlan_filter_set = hinic_vlan_filter_set,
2932 .vlan_offload_set = hinic_vlan_offload_set,
2933 .allmulticast_enable = hinic_dev_allmulticast_enable,
2934 .allmulticast_disable = hinic_dev_allmulticast_disable,
2935 .rss_hash_update = hinic_rss_hash_update,
2936 .rss_hash_conf_get = hinic_rss_conf_get,
2937 .reta_update = hinic_rss_indirtbl_update,
2938 .reta_query = hinic_rss_indirtbl_query,
2939 .stats_get = hinic_dev_stats_get,
2940 .stats_reset = hinic_dev_stats_reset,
2941 .xstats_get = hinic_dev_xstats_get,
2942 .xstats_reset = hinic_dev_xstats_reset,
2943 .xstats_get_names = hinic_dev_xstats_get_names,
2944 .rxq_info_get = hinic_rxq_info_get,
2945 .txq_info_get = hinic_txq_info_get,
2946 .mac_addr_set = hinic_set_mac_addr,
2947 .mac_addr_remove = hinic_mac_addr_remove,
2948 .mac_addr_add = hinic_mac_addr_add,
2949 .set_mc_addr_list = hinic_set_mc_addr_list,
2950 .filter_ctrl = hinic_dev_filter_ctrl,
2953 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2955 struct rte_pci_device *pci_dev;
2956 struct rte_ether_addr *eth_addr;
2957 struct hinic_nic_dev *nic_dev;
2958 struct hinic_filter_info *filter_info;
2962 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2964 /* EAL is SECONDARY and eth_dev is already created */
2965 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2966 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2967 hinic_dev_interrupt_handler,
2970 PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2971 eth_dev->data->name);
2976 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2977 memset(nic_dev, 0, sizeof(*nic_dev));
2979 snprintf(nic_dev->proc_dev_name,
2980 sizeof(nic_dev->proc_dev_name),
2981 "hinic-%.4x:%.2x:%.2x.%x",
2982 pci_dev->addr.domain, pci_dev->addr.bus,
2983 pci_dev->addr.devid, pci_dev->addr.function);
2985 /* alloc mac_addrs */
2986 mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2987 eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
2989 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2990 eth_dev->data->name);
2994 eth_dev->data->mac_addrs = eth_addr;
2996 mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2997 nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
2998 if (!nic_dev->mc_list) {
2999 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
3000 eth_dev->data->name);
3006 * Pass the information to the rte_eth_dev_close() that it should also
3007 * release the private port resources.
3009 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
3011 /* create hardware nic_device */
3012 rc = hinic_nic_dev_create(eth_dev);
3014 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3015 eth_dev->data->name);
3016 goto create_nic_dev_fail;
3019 if (HINIC_IS_VF(nic_dev->hwdev))
3020 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3022 eth_dev->dev_ops = &hinic_pmd_ops;
3024 rc = hinic_init_mac_addr(eth_dev);
3026 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3027 eth_dev->data->name);
3031 /* register callback func to eal lib */
3032 rc = rte_intr_callback_register(&pci_dev->intr_handle,
3033 hinic_dev_interrupt_handler,
3036 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3037 eth_dev->data->name);
3038 goto reg_intr_cb_fail;
3041 /* enable uio/vfio intr/eventfd mapping */
3042 rc = rte_intr_enable(&pci_dev->intr_handle);
3044 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3045 eth_dev->data->name);
3046 goto enable_intr_fail;
3048 hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3050 /* initialize filter info */
3051 filter_info = &nic_dev->filter;
3052 memset(filter_info, 0, sizeof(struct hinic_filter_info));
3053 /* initialize 5tuple filter list */
3054 TAILQ_INIT(&filter_info->fivetuple_list);
3055 TAILQ_INIT(&nic_dev->filter_ntuple_list);
3056 TAILQ_INIT(&nic_dev->filter_ethertype_list);
3057 TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3058 TAILQ_INIT(&nic_dev->hinic_flow_list);
3060 hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3061 PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3062 eth_dev->data->name);
3067 (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3068 hinic_dev_interrupt_handler,
3072 hinic_deinit_mac_addr(eth_dev);
3075 eth_dev->dev_ops = NULL;
3076 hinic_nic_dev_destroy(eth_dev);
3078 create_nic_dev_fail:
3079 rte_free(nic_dev->mc_list);
3080 nic_dev->mc_list = NULL;
3084 eth_dev->data->mac_addrs = NULL;
3087 PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3088 eth_dev->data->name);
3092 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3094 struct rte_pci_device *pci_dev;
3096 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3098 PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3099 pci_dev->addr.domain, pci_dev->addr.bus,
3100 pci_dev->addr.devid, pci_dev->addr.function,
3101 (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3102 "primary" : "secondary");
3104 /* rte_eth_dev rx_burst and tx_burst */
3105 eth_dev->rx_pkt_burst = hinic_recv_pkts;
3106 eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3108 return hinic_func_init(eth_dev);
3111 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3113 struct hinic_nic_dev *nic_dev;
3115 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3116 hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3118 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3121 hinic_dev_close(dev);
3123 dev->dev_ops = NULL;
3124 dev->rx_pkt_burst = NULL;
3125 dev->tx_pkt_burst = NULL;
3127 rte_free(nic_dev->mc_list);
3129 rte_free(dev->data->mac_addrs);
3130 dev->data->mac_addrs = NULL;
3135 static struct rte_pci_id pci_id_hinic_map[] = {
3136 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3137 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3138 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
3139 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3140 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3141 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3142 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3143 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3147 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3148 struct rte_pci_device *pci_dev)
3150 return rte_eth_dev_pci_generic_probe(pci_dev,
3151 sizeof(struct hinic_nic_dev), hinic_dev_init);
3154 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3156 return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3159 static struct rte_pci_driver rte_hinic_pmd = {
3160 .id_table = pci_id_hinic_map,
3161 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3162 .probe = hinic_pci_probe,
3163 .remove = hinic_pci_remove,
3166 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3167 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3169 RTE_INIT(hinic_init_log)
3171 hinic_logtype = rte_log_register("pmd.net.hinic");
3172 if (hinic_logtype >= 0)
3173 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);