1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
6 #include <rte_bus_pci.h>
7 #include <rte_ethdev_pci.h>
9 #include <rte_malloc.h>
10 #include <rte_memcpy.h>
11 #include <rte_mempool.h>
12 #include <rte_errno.h>
13 #include <rte_ether.h>
15 #include "base/hinic_compat.h"
16 #include "base/hinic_pmd_hwdev.h"
17 #include "base/hinic_pmd_hwif.h"
18 #include "base/hinic_pmd_wq.h"
19 #include "base/hinic_pmd_cfg.h"
20 #include "base/hinic_pmd_mgmt.h"
21 #include "base/hinic_pmd_cmdq.h"
22 #include "base/hinic_pmd_niccfg.h"
23 #include "base/hinic_pmd_nicio.h"
24 #include "base/hinic_pmd_mbox.h"
25 #include "hinic_pmd_ethdev.h"
26 #include "hinic_pmd_tx.h"
27 #include "hinic_pmd_rx.h"
29 /* Vendor ID used by Huawei devices */
30 #define HINIC_HUAWEI_VENDOR_ID 0x19E5
33 #define HINIC_DEV_ID_PRD 0x1822
34 #define HINIC_DEV_ID_VF 0x375E
35 #define HINIC_DEV_ID_VF_HV 0x379E
37 /* Mezz card for Blade Server */
38 #define HINIC_DEV_ID_MEZZ_25GE 0x0210
39 #define HINIC_DEV_ID_MEZZ_40GE 0x020D
40 #define HINIC_DEV_ID_MEZZ_100GE 0x0205
42 /* 2*25G and 2*100G card */
43 #define HINIC_DEV_ID_1822_DUAL_25GE 0x0206
44 #define HINIC_DEV_ID_1822_100GE 0x0200
46 #define HINIC_SERVICE_MODE_NIC 2
48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
50 #define DEFAULT_BASE_COS 4
53 #define HINIC_MIN_RX_BUF_SIZE 1024
54 #define HINIC_MAX_MAC_ADDRS 1
57 * vlan_id is a 12 bit number.
58 * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
59 * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
60 * The higher 7 bit val specifies VFTA array index.
62 #define HINIC_VFTA_BIT(vlan_id) (1 << ((vlan_id) & 0x1F))
63 #define HINIC_VFTA_IDX(vlan_id) ((vlan_id) >> 5)
65 #define HINIC_VLAN_FILTER_EN (1U << 0)
67 /* Driver-specific log messages type */
70 struct hinic_xstats_name_off {
71 char name[RTE_ETH_XSTATS_NAME_SIZE];
75 #define HINIC_FUNC_STAT(_stat_item) { \
76 .name = #_stat_item, \
77 .offset = offsetof(struct hinic_vport_stats, _stat_item) \
80 #define HINIC_PORT_STAT(_stat_item) { \
81 .name = #_stat_item, \
82 .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
85 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
86 HINIC_FUNC_STAT(tx_unicast_pkts_vport),
87 HINIC_FUNC_STAT(tx_unicast_bytes_vport),
88 HINIC_FUNC_STAT(tx_multicast_pkts_vport),
89 HINIC_FUNC_STAT(tx_multicast_bytes_vport),
90 HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
91 HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
93 HINIC_FUNC_STAT(rx_unicast_pkts_vport),
94 HINIC_FUNC_STAT(rx_unicast_bytes_vport),
95 HINIC_FUNC_STAT(rx_multicast_pkts_vport),
96 HINIC_FUNC_STAT(rx_multicast_bytes_vport),
97 HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
98 HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
100 HINIC_FUNC_STAT(tx_discard_vport),
101 HINIC_FUNC_STAT(rx_discard_vport),
102 HINIC_FUNC_STAT(tx_err_vport),
103 HINIC_FUNC_STAT(rx_err_vport),
106 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
107 sizeof(hinic_vport_stats_strings[0]))
109 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
110 HINIC_PORT_STAT(mac_rx_total_pkt_num),
111 HINIC_PORT_STAT(mac_rx_total_oct_num),
112 HINIC_PORT_STAT(mac_rx_bad_pkt_num),
113 HINIC_PORT_STAT(mac_rx_bad_oct_num),
114 HINIC_PORT_STAT(mac_rx_good_pkt_num),
115 HINIC_PORT_STAT(mac_rx_good_oct_num),
116 HINIC_PORT_STAT(mac_rx_uni_pkt_num),
117 HINIC_PORT_STAT(mac_rx_multi_pkt_num),
118 HINIC_PORT_STAT(mac_rx_broad_pkt_num),
119 HINIC_PORT_STAT(mac_tx_total_pkt_num),
120 HINIC_PORT_STAT(mac_tx_total_oct_num),
121 HINIC_PORT_STAT(mac_tx_bad_pkt_num),
122 HINIC_PORT_STAT(mac_tx_bad_oct_num),
123 HINIC_PORT_STAT(mac_tx_good_pkt_num),
124 HINIC_PORT_STAT(mac_tx_good_oct_num),
125 HINIC_PORT_STAT(mac_tx_uni_pkt_num),
126 HINIC_PORT_STAT(mac_tx_multi_pkt_num),
127 HINIC_PORT_STAT(mac_tx_broad_pkt_num),
128 HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
129 HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
130 HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
131 HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
132 HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
133 HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
134 HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
135 HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
136 HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
137 HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
138 HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
139 HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
140 HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
141 HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
142 HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
143 HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
144 HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
145 HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
146 HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
147 HINIC_PORT_STAT(mac_rx_mac_pause_num),
148 HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
149 HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
150 HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
151 HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
152 HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
153 HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
154 HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
155 HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
156 HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
157 HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
158 HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
159 HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
160 HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
161 HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
162 HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
163 HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
164 HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
165 HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
166 HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
167 HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
168 HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
169 HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
170 HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
171 HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
172 HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
173 HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
174 HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
175 HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
176 HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
177 HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
178 HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
179 HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
180 HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
181 HINIC_PORT_STAT(mac_tx_mac_pause_num),
182 HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
183 HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
184 HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
185 HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
186 HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
187 HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
188 HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
189 HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
190 HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
191 HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
192 HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
193 HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
194 HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
197 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
198 sizeof(hinic_phyport_stats_strings[0]))
200 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
201 {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
202 {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
205 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
206 sizeof(hinic_rxq_stats_strings[0]))
208 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
209 {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
210 {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
211 {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
212 {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
213 {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
216 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
217 sizeof(hinic_txq_stats_strings[0]))
219 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
221 if (HINIC_IS_VF(nic_dev->hwdev)) {
222 return (HINIC_VPORT_XSTATS_NUM +
223 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
224 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
226 return (HINIC_VPORT_XSTATS_NUM +
227 HINIC_PHYPORT_XSTATS_NUM +
228 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
229 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
233 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
234 .nb_max = HINIC_MAX_QUEUE_DEPTH,
235 .nb_min = HINIC_MIN_QUEUE_DEPTH,
236 .nb_align = HINIC_RXD_ALIGN,
239 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
240 .nb_max = HINIC_MAX_QUEUE_DEPTH,
241 .nb_min = HINIC_MIN_QUEUE_DEPTH,
242 .nb_align = HINIC_TXD_ALIGN,
245 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
248 * Interrupt handler triggered by NIC for handling
251 * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
253 static void hinic_dev_interrupt_handler(void *param)
255 struct rte_eth_dev *dev = param;
256 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
258 if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
259 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
260 nic_dev->proc_dev_name, dev->data->port_id);
264 /* aeq0 msg handler */
265 hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
269 * Ethernet device configuration.
271 * Prepare the driver for a given number of TX and RX queues, mtu size
275 * Pointer to Ethernet device structure.
278 * 0 on success, negative error value otherwise.
280 static int hinic_dev_configure(struct rte_eth_dev *dev)
282 struct hinic_nic_dev *nic_dev;
283 struct hinic_nic_io *nic_io;
286 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
287 nic_io = nic_dev->hwdev->nic_io;
289 nic_dev->num_sq = dev->data->nb_tx_queues;
290 nic_dev->num_rq = dev->data->nb_rx_queues;
292 nic_io->num_sqs = dev->data->nb_tx_queues;
293 nic_io->num_rqs = dev->data->nb_rx_queues;
295 /* queue pair is max_num(sq, rq) */
296 nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
297 nic_dev->num_sq : nic_dev->num_rq;
298 nic_io->num_qps = nic_dev->num_qps;
300 if (nic_dev->num_qps > nic_io->max_qps) {
302 "Queue number out of range, get queue_num:%d, max_queue_num:%d",
303 nic_dev->num_qps, nic_io->max_qps);
307 /* mtu size is 256~9600 */
308 if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
309 dev->data->dev_conf.rxmode.max_rx_pkt_len >
310 HINIC_MAX_JUMBO_FRAME_SIZE) {
312 "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
313 "expect between %d and %d",
314 dev->data->dev_conf.rxmode.max_rx_pkt_len,
315 HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
320 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
323 err = hinic_config_mq_mode(dev, TRUE);
325 PMD_DRV_LOG(ERR, "Config multi-queue failed");
329 /* init vlan offoad */
330 err = hinic_vlan_offload_set(dev,
331 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
333 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
334 (void)hinic_config_mq_mode(dev, FALSE);
342 * DPDK callback to create the receive queue.
345 * Pointer to Ethernet device structure.
349 * Number of descriptors for receive queue.
351 * NUMA socket on which memory must be allocated.
353 * Thresholds parameters (unused_).
355 * Memory pool for buffer allocations.
358 * 0 on success, negative error value otherwise.
360 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
361 uint16_t nb_desc, unsigned int socket_id,
362 __rte_unused const struct rte_eth_rxconf *rx_conf,
363 struct rte_mempool *mp)
366 struct hinic_nic_dev *nic_dev;
367 struct hinic_hwdev *hwdev;
368 struct hinic_rxq *rxq;
369 u16 rq_depth, rx_free_thresh;
372 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
373 hwdev = nic_dev->hwdev;
375 /* queue depth must be power of 2, otherwise will be aligned up */
376 rq_depth = (nb_desc & (nb_desc - 1)) ?
377 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
380 * Validate number of receive descriptors.
381 * It must not exceed hardware maximum and minimum.
383 if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
384 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
385 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
386 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
387 (int)nb_desc, (int)rq_depth,
388 (int)dev->data->port_id, (int)queue_idx);
393 * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
394 * descriptors are used or if the number of descriptors required
395 * to transmit a packet is greater than the number of free RX
397 * The following constraints must be satisfied:
398 * rx_free_thresh must be greater than 0.
399 * rx_free_thresh must be less than the size of the ring minus 1.
400 * When set to zero use default values.
402 rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
403 rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
404 if (rx_free_thresh >= (rq_depth - 1)) {
405 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
406 (unsigned int)rx_free_thresh,
407 (int)dev->data->port_id,
412 rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
413 RTE_CACHE_LINE_SIZE, socket_id);
415 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
416 queue_idx, dev->data->name);
419 nic_dev->rxqs[queue_idx] = rxq;
421 /* alloc rx sq hw wqepage*/
422 rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
424 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
425 queue_idx, dev->data->name, rq_depth);
429 /* mbuf pool must be assigned before setup rx resources */
433 hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
434 RTE_PKTMBUF_HEADROOM, &buf_size);
436 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
438 goto adjust_bufsize_fail;
441 /* rx queue info, rearm control */
442 rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
443 rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
444 rxq->nic_dev = nic_dev;
445 rxq->q_id = queue_idx;
446 rxq->q_depth = rq_depth;
447 rxq->buf_len = (u16)buf_size;
448 rxq->rx_free_thresh = rx_free_thresh;
450 /* the last point cant do mbuf rearm in bulk */
451 rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
453 /* device port identifier */
454 rxq->port_id = dev->data->port_id;
456 /* alloc rx_cqe and prepare rq_wqe */
457 rc = hinic_setup_rx_resources(rxq);
459 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
460 queue_idx, dev->data->name);
461 goto setup_rx_res_err;
464 /* record nic_dev rxq in rte_eth rx_queues */
465 dev->data->rx_queues[queue_idx] = rxq;
471 hinic_destroy_rq(hwdev, queue_idx);
479 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
481 struct hinic_rxq *rxq;
482 struct hinic_nic_dev *nic_dev;
485 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
487 for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
488 rxq = dev->data->rx_queues[q_id];
490 rxq->wq->cons_idx = 0;
491 rxq->wq->prod_idx = 0;
492 rxq->wq->delta = rxq->q_depth;
493 rxq->wq->mask = rxq->q_depth - 1;
495 /* alloc mbuf to rq */
496 hinic_rx_alloc_pkts(rxq);
501 * DPDK callback to configure the transmit queue.
504 * Pointer to Ethernet device structure.
506 * Transmit queue index.
508 * Number of descriptors for transmit queue.
510 * NUMA socket on which memory must be allocated.
512 * Tx queue configuration parameters.
515 * 0 on success, negative error value otherwise.
517 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
518 uint16_t nb_desc, unsigned int socket_id,
519 __rte_unused const struct rte_eth_txconf *tx_conf)
522 struct hinic_nic_dev *nic_dev;
523 struct hinic_hwdev *hwdev;
524 struct hinic_txq *txq;
525 u16 sq_depth, tx_free_thresh;
527 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
528 hwdev = nic_dev->hwdev;
530 /* queue depth must be power of 2, otherwise will be aligned up */
531 sq_depth = (nb_desc & (nb_desc - 1)) ?
532 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
535 * Validate number of transmit descriptors.
536 * It must not exceed hardware maximum and minimum.
538 if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
539 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
540 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
541 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
542 (int)nb_desc, (int)sq_depth,
543 (int)dev->data->port_id, (int)queue_idx);
548 * The TX descriptor ring will be cleaned after txq->tx_free_thresh
549 * descriptors are used or if the number of descriptors required
550 * to transmit a packet is greater than the number of free TX
552 * The following constraints must be satisfied:
553 * tx_free_thresh must be greater than 0.
554 * tx_free_thresh must be less than the size of the ring minus 1.
555 * When set to zero use default values.
557 tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
558 tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
559 if (tx_free_thresh >= (sq_depth - 1)) {
560 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
561 (unsigned int)tx_free_thresh, (int)dev->data->port_id,
566 txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
567 RTE_CACHE_LINE_SIZE, socket_id);
569 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
570 queue_idx, dev->data->name);
573 nic_dev->txqs[queue_idx] = txq;
575 /* alloc tx sq hw wqepage */
576 rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
578 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
579 queue_idx, dev->data->name, sq_depth);
583 txq->q_id = queue_idx;
584 txq->q_depth = sq_depth;
585 txq->port_id = dev->data->port_id;
586 txq->tx_free_thresh = tx_free_thresh;
587 txq->nic_dev = nic_dev;
588 txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
589 txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
590 txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
591 txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
592 txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
593 sizeof(struct hinic_sq_bufdesc);
594 txq->cos = nic_dev->default_cos;
596 /* alloc software txinfo */
597 rc = hinic_setup_tx_resources(txq);
599 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
600 queue_idx, dev->data->name);
601 goto setup_tx_res_fail;
604 /* record nic_dev txq in rte_eth tx_queues */
605 dev->data->tx_queues[queue_idx] = txq;
610 hinic_destroy_sq(hwdev, queue_idx);
618 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
620 struct hinic_nic_dev *nic_dev;
621 struct hinic_txq *txq;
622 struct hinic_nic_io *nic_io;
623 struct hinic_hwdev *hwdev;
624 volatile u32 *ci_addr;
627 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
628 hwdev = nic_dev->hwdev;
629 nic_io = hwdev->nic_io;
631 for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
632 txq = dev->data->tx_queues[q_id];
634 txq->wq->cons_idx = 0;
635 txq->wq->prod_idx = 0;
636 txq->wq->delta = txq->q_depth;
637 txq->wq->mask = txq->q_depth - 1;
639 /* clear hardware ci */
640 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
647 * Get link speed from NIC.
650 * Pointer to Ethernet device structure.
652 * Pointer to link speed structure.
654 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
656 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
657 u32 supported_link, advertised_link;
660 #define HINIC_LINK_MODE_SUPPORT_1G (1U << HINIC_GE_BASE_KX)
662 #define HINIC_LINK_MODE_SUPPORT_10G (1U << HINIC_10GE_BASE_KR)
664 #define HINIC_LINK_MODE_SUPPORT_25G ((1U << HINIC_25GE_BASE_KR_S) | \
665 (1U << HINIC_25GE_BASE_CR_S) | \
666 (1U << HINIC_25GE_BASE_KR) | \
667 (1U << HINIC_25GE_BASE_CR))
669 #define HINIC_LINK_MODE_SUPPORT_40G ((1U << HINIC_40GE_BASE_KR4) | \
670 (1U << HINIC_40GE_BASE_CR4))
672 #define HINIC_LINK_MODE_SUPPORT_100G ((1U << HINIC_100GE_BASE_KR4) | \
673 (1U << HINIC_100GE_BASE_CR4))
675 err = hinic_get_link_mode(nic_dev->hwdev,
676 &supported_link, &advertised_link);
677 if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
678 advertised_link == HINIC_SUPPORTED_UNKNOWN) {
679 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
680 nic_dev->proc_dev_name, dev->data->port_id);
683 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
684 *speed_capa |= ETH_LINK_SPEED_1G;
685 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
686 *speed_capa |= ETH_LINK_SPEED_10G;
687 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
688 *speed_capa |= ETH_LINK_SPEED_25G;
689 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
690 *speed_capa |= ETH_LINK_SPEED_40G;
691 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
692 *speed_capa |= ETH_LINK_SPEED_100G;
697 * DPDK callback to get information about the device.
700 * Pointer to Ethernet device structure.
702 * Pointer to Info structure output buffer.
705 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
707 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
709 info->max_rx_queues = nic_dev->nic_cap.max_rqs;
710 info->max_tx_queues = nic_dev->nic_cap.max_sqs;
711 info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
712 info->max_rx_pktlen = HINIC_MAX_JUMBO_FRAME_SIZE;
713 info->max_mac_addrs = HINIC_MAX_MAC_ADDRS;
715 hinic_get_speed_capa(dev, &info->speed_capa);
716 info->rx_queue_offload_capa = 0;
717 info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
718 DEV_RX_OFFLOAD_IPV4_CKSUM |
719 DEV_RX_OFFLOAD_UDP_CKSUM |
720 DEV_RX_OFFLOAD_TCP_CKSUM |
721 DEV_RX_OFFLOAD_VLAN_FILTER;
723 info->tx_queue_offload_capa = 0;
724 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
725 DEV_TX_OFFLOAD_IPV4_CKSUM |
726 DEV_TX_OFFLOAD_UDP_CKSUM |
727 DEV_TX_OFFLOAD_TCP_CKSUM |
728 DEV_TX_OFFLOAD_SCTP_CKSUM |
729 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
730 DEV_TX_OFFLOAD_TCP_TSO |
731 DEV_TX_OFFLOAD_MULTI_SEGS;
733 info->hash_key_size = HINIC_RSS_KEY_SIZE;
734 info->reta_size = HINIC_RSS_INDIR_SIZE;
735 info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
736 info->rx_desc_lim = hinic_rx_desc_lim;
737 info->tx_desc_lim = hinic_tx_desc_lim;
742 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
746 err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
748 PMD_DRV_LOG(ERR, "Failed to set rx mode");
751 nic_dev->rx_mode_status = rx_mode_ctrl;
757 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
760 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
762 /* rx configure, if rss enable, need to init default configuration */
763 err = hinic_rx_configure(dev);
765 PMD_DRV_LOG(ERR, "Configure rss failed");
770 err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
772 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
773 HINIC_DEFAULT_RX_MODE);
774 goto set_rx_mode_fail;
780 hinic_rx_remove_configure(dev);
785 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
787 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
789 (void)hinic_config_rx_mode(nic_dev, 0);
790 hinic_rx_remove_configure(dev);
793 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
794 struct rte_eth_link *link)
797 u8 port_link_status = 0;
798 struct nic_port_info port_link_info;
799 struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
800 uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
801 ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
802 ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
803 ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
805 rc = hinic_get_link_status(nic_hwdev, &port_link_status);
809 if (!port_link_status) {
810 link->link_status = ETH_LINK_DOWN;
811 link->link_speed = 0;
812 link->link_duplex = ETH_LINK_HALF_DUPLEX;
813 link->link_autoneg = ETH_LINK_FIXED;
817 memset(&port_link_info, 0, sizeof(port_link_info));
818 rc = hinic_get_port_info(nic_hwdev, &port_link_info);
822 link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
823 link->link_duplex = port_link_info.duplex;
824 link->link_autoneg = port_link_info.autoneg_state;
825 link->link_status = port_link_status;
831 * DPDK callback to retrieve physical link information.
834 * Pointer to Ethernet device structure.
835 * @param wait_to_complete
836 * Wait for request completion.
839 * 0 link status changed, -1 link status not changed
841 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
843 #define CHECK_INTERVAL 10 /* 10ms */
844 #define MAX_REPEAT_TIME 100 /* 1s (100 * 10ms) in total */
846 struct rte_eth_link link;
847 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
848 unsigned int rep_cnt = MAX_REPEAT_TIME;
850 memset(&link, 0, sizeof(link));
852 /* Get link status information from hardware */
853 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
854 if (rc != HINIC_OK) {
855 link.link_speed = ETH_SPEED_NUM_NONE;
856 link.link_duplex = ETH_LINK_FULL_DUPLEX;
857 PMD_DRV_LOG(ERR, "Get link status failed");
861 if (!wait_to_complete || link.link_status)
864 rte_delay_ms(CHECK_INTERVAL);
868 rc = rte_eth_linkstatus_set(dev, &link);
873 * DPDK callback to start the device.
876 * Pointer to Ethernet device structure.
879 * 0 on success, negative errno value on failure.
881 static int hinic_dev_start(struct rte_eth_dev *dev)
885 struct hinic_nic_dev *nic_dev;
887 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
888 name = dev->data->name;
890 /* reset rx and tx queue */
891 hinic_reset_rx_queue(dev);
892 hinic_reset_tx_queue(dev);
894 /* get func rx buf size */
895 hinic_get_func_rx_buf_size(nic_dev);
897 /* init txq and rxq context */
898 rc = hinic_init_qp_ctxts(nic_dev->hwdev);
900 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
906 rc = hinic_config_mq_mode(dev, TRUE);
908 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
910 goto cfg_mq_mode_fail;
913 /* set default mtu */
914 rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
916 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
917 nic_dev->mtu_size, name);
921 /* configure rss rx_mode and other rx or tx default feature */
922 rc = hinic_rxtx_configure(dev);
924 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
929 /* reactive pf status, so that uP report asyn event */
930 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
932 /* open virtual port and ready to start packet receiving */
933 rc = hinic_set_vport_enable(nic_dev->hwdev, true);
935 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
939 /* open physical port and start packet receiving */
940 rc = hinic_set_port_enable(nic_dev->hwdev, true);
942 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
947 /* update eth_dev link status */
948 if (dev->data->dev_conf.intr_conf.lsc != 0)
949 (void)hinic_link_update(dev, 0);
951 hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
956 (void)hinic_set_vport_enable(nic_dev->hwdev, false);
959 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
961 /* Flush tx && rx chip resources in case of set vport fake fail */
962 (void)hinic_flush_qp_res(nic_dev->hwdev);
965 hinic_remove_rxtx_configure(dev);
970 hinic_free_qp_ctxts(nic_dev->hwdev);
973 hinic_free_all_rx_mbuf(dev);
974 hinic_free_all_tx_mbuf(dev);
980 * DPDK callback to release the receive queue.
983 * Generic receive queue pointer.
985 static void hinic_rx_queue_release(void *queue)
987 struct hinic_rxq *rxq = queue;
988 struct hinic_nic_dev *nic_dev;
991 PMD_DRV_LOG(WARNING, "Rxq is null when release");
994 nic_dev = rxq->nic_dev;
996 /* free rxq_pkt mbuf */
997 hinic_free_all_rx_skbs(rxq);
999 /* free rxq_cqe, rxq_info */
1000 hinic_free_rx_resources(rxq);
1002 /* free root rq wq */
1003 hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1005 nic_dev->rxqs[rxq->q_id] = NULL;
1012 * DPDK callback to release the transmit queue.
1015 * Generic transmit queue pointer.
1017 static void hinic_tx_queue_release(void *queue)
1019 struct hinic_txq *txq = queue;
1020 struct hinic_nic_dev *nic_dev;
1023 PMD_DRV_LOG(WARNING, "Txq is null when release");
1026 nic_dev = txq->nic_dev;
1028 /* free txq_pkt mbuf */
1029 hinic_free_all_tx_skbs(txq);
1032 hinic_free_tx_resources(txq);
1034 /* free root sq wq */
1035 hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1036 nic_dev->txqs[txq->q_id] = NULL;
1042 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1046 for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1047 hinic_destroy_rq(nic_dev->hwdev, q_id);
1050 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1054 for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1055 hinic_destroy_sq(nic_dev->hwdev, q_id);
1059 * DPDK callback to stop the device.
1062 * Pointer to Ethernet device structure.
1064 static void hinic_dev_stop(struct rte_eth_dev *dev)
1069 struct hinic_nic_dev *nic_dev;
1070 struct rte_eth_link link;
1072 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1073 name = dev->data->name;
1074 port_id = dev->data->port_id;
1076 if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1077 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1081 /* just stop phy port and vport */
1082 rc = hinic_set_port_enable(nic_dev->hwdev, false);
1084 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1087 rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1089 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1092 /* Clear recorded link status */
1093 memset(&link, 0, sizeof(link));
1094 (void)rte_eth_linkstatus_set(dev, &link);
1096 /* flush pending io request */
1097 rc = hinic_rx_tx_flush(nic_dev->hwdev);
1099 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1102 /* clean rss table and rx_mode */
1103 hinic_remove_rxtx_configure(dev);
1105 /* clean root context */
1106 hinic_free_qp_ctxts(nic_dev->hwdev);
1109 hinic_free_all_rx_mbuf(dev);
1110 hinic_free_all_tx_mbuf(dev);
1113 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1115 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1116 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1117 int ret, retries = 0;
1119 hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1121 /* disable msix interrupt in hardware */
1122 hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1124 /* disable rte interrupt */
1125 ret = rte_intr_disable(&pci_dev->intr_handle);
1127 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1131 rte_intr_callback_unregister(&pci_dev->intr_handle,
1132 hinic_dev_interrupt_handler, dev);
1135 } else if (ret == -EAGAIN) {
1139 PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1143 } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1145 if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1146 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1150 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1152 u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1155 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1157 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1159 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1163 * DPDK callback to get device statistics.
1166 * Pointer to Ethernet device structure.
1168 * Stats structure output buffer.
1171 * 0 on success and stats is filled,
1172 * negative error value otherwise.
1175 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1178 u64 rx_discards_pmd = 0;
1179 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1180 struct hinic_vport_stats vport_stats;
1181 struct hinic_rxq *rxq = NULL;
1182 struct hinic_rxq_stats rxq_stats;
1183 struct hinic_txq *txq = NULL;
1184 struct hinic_txq_stats txq_stats;
1186 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1188 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1189 nic_dev->proc_dev_name);
1193 /* rx queue stats */
1194 q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1195 nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1196 for (i = 0; i < q_num; i++) {
1197 rxq = nic_dev->rxqs[i];
1198 hinic_rxq_get_stats(rxq, &rxq_stats);
1199 stats->q_ipackets[i] = rxq_stats.packets;
1200 stats->q_ibytes[i] = rxq_stats.bytes;
1201 stats->q_errors[i] = rxq_stats.rx_discards;
1203 stats->ierrors += rxq_stats.errors;
1204 rx_discards_pmd += rxq_stats.rx_discards;
1205 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1208 /* tx queue stats */
1209 q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1210 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1211 for (i = 0; i < q_num; i++) {
1212 txq = nic_dev->txqs[i];
1213 hinic_txq_get_stats(txq, &txq_stats);
1214 stats->q_opackets[i] = txq_stats.packets;
1215 stats->q_obytes[i] = txq_stats.bytes;
1216 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1220 stats->oerrors += vport_stats.tx_discard_vport;
1222 stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1224 stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1225 vport_stats.rx_multicast_pkts_vport +
1226 vport_stats.rx_broadcast_pkts_vport -
1229 stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1230 vport_stats.tx_multicast_pkts_vport +
1231 vport_stats.tx_broadcast_pkts_vport);
1233 stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1234 vport_stats.rx_multicast_bytes_vport +
1235 vport_stats.rx_broadcast_bytes_vport);
1237 stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1238 vport_stats.tx_multicast_bytes_vport +
1239 vport_stats.tx_broadcast_bytes_vport);
1244 * DPDK callback to clear device statistics.
1247 * Pointer to Ethernet device structure.
1249 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1252 struct hinic_rxq *rxq = NULL;
1253 struct hinic_txq *txq = NULL;
1254 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1257 ret = hinic_clear_vport_stats(nic_dev->hwdev);
1261 for (qid = 0; qid < nic_dev->num_rq; qid++) {
1262 rxq = nic_dev->rxqs[qid];
1263 hinic_rxq_stats_reset(rxq);
1266 for (qid = 0; qid < nic_dev->num_sq; qid++) {
1267 txq = nic_dev->txqs[qid];
1268 hinic_txq_stats_reset(txq);
1275 * DPDK callback to clear device extended statistics.
1278 * Pointer to Ethernet device structure.
1280 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1282 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1285 ret = hinic_dev_stats_reset(dev);
1289 if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1290 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1298 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1300 uint64_t random_value;
1302 /* Set Organizationally Unique Identifier (OUI) prefix */
1303 mac_addr->addr_bytes[0] = 0x00;
1304 mac_addr->addr_bytes[1] = 0x09;
1305 mac_addr->addr_bytes[2] = 0xC0;
1306 /* Force indication of locally assigned MAC address. */
1307 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1308 /* Generate the last 3 bytes of the MAC address with a random number. */
1309 random_value = rte_rand();
1310 memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1314 * Init mac_vlan table in NIC.
1317 * Pointer to Ethernet device structure.
1320 * 0 on success and stats is filled,
1321 * negative error value otherwise.
1323 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1325 struct hinic_nic_dev *nic_dev =
1326 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1327 uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1331 rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1335 memmove(eth_dev->data->mac_addrs->addr_bytes,
1336 addr_bytes, RTE_ETHER_ADDR_LEN);
1338 if (rte_is_zero_ether_addr(eth_dev->data->mac_addrs))
1339 hinic_gen_random_mac_addr(eth_dev->data->mac_addrs);
1341 func_id = hinic_global_func_id(nic_dev->hwdev);
1342 rc = hinic_set_mac(nic_dev->hwdev, eth_dev->data->mac_addrs->addr_bytes,
1344 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1351 * Deinit mac_vlan table in NIC.
1354 * Pointer to Ethernet device structure.
1357 * 0 on success and stats is filled,
1358 * negative error value otherwise.
1360 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1362 struct hinic_nic_dev *nic_dev =
1363 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1367 if (rte_is_zero_ether_addr(eth_dev->data->mac_addrs))
1370 func_id = hinic_global_func_id(nic_dev->hwdev);
1371 rc = hinic_del_mac(nic_dev->hwdev,
1372 eth_dev->data->mac_addrs->addr_bytes,
1374 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1375 PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1376 eth_dev->data->name);
1379 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1380 u16 vlan_id, bool on)
1382 u32 vid_idx, vid_bit;
1384 vid_idx = HINIC_VFTA_IDX(vlan_id);
1385 vid_bit = HINIC_VFTA_BIT(vlan_id);
1388 nic_dev->vfta[vid_idx] |= vid_bit;
1390 nic_dev->vfta[vid_idx] &= ~vid_bit;
1393 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1396 u32 vid_idx, vid_bit;
1398 vid_idx = HINIC_VFTA_IDX(vlan_id);
1399 vid_bit = HINIC_VFTA_BIT(vlan_id);
1401 return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1405 * DPDK callback to set vlan filter.
1408 * Pointer to Ethernet device structure.
1410 * vlan id is used to filter vlan packets
1412 * enable disable or enable vlan filter function
1414 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1415 uint16_t vlan_id, int enable)
1417 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1421 if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1424 func_id = hinic_global_func_id(nic_dev->hwdev);
1427 /* If vlanid is already set, just return */
1428 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1429 PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1430 vlan_id, nic_dev->proc_dev_name);
1434 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1437 /* If vlanid can't be found, just return */
1438 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1439 PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1440 vlan_id, nic_dev->proc_dev_name);
1444 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1449 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1450 enable ? "Add" : "Remove", func_id, vlan_id, err);
1454 hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1456 PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1457 enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1462 * DPDK callback to enable or disable vlan offload.
1465 * Pointer to Ethernet device structure.
1467 * Definitions used for VLAN setting
1469 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1471 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1472 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1476 /* Enable or disable VLAN filter */
1477 if (mask & ETH_VLAN_FILTER_MASK) {
1478 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1480 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1481 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1482 PMD_DRV_LOG(WARNING,
1483 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1484 nic_dev->proc_dev_name, dev->data->port_id);
1486 PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1487 on ? "enable" : "disable",
1488 nic_dev->proc_dev_name,
1489 dev->data->port_id, err);
1493 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1494 on ? "Enable" : "Disable",
1495 nic_dev->proc_dev_name, dev->data->port_id);
1498 /* Enable or disable VLAN stripping */
1499 if (mask & ETH_VLAN_STRIP_MASK) {
1500 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1502 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1504 PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1505 on ? "enable" : "disable",
1506 nic_dev->proc_dev_name,
1507 dev->data->port_id, err);
1511 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1512 on ? "Enable" : "Disable",
1513 nic_dev->proc_dev_name, dev->data->port_id);
1516 if (mask & ETH_VLAN_EXTEND_MASK) {
1517 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1518 nic_dev->proc_dev_name, dev->data->port_id);
1525 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1527 struct hinic_nic_dev *nic_dev =
1528 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1532 func_id = hinic_global_func_id(nic_dev->hwdev);
1533 for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1534 /* If can't find it, continue */
1535 if (!hinic_find_vlan_filter(nic_dev, i))
1538 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1539 hinic_store_vlan_filter(nic_dev, i, false);
1544 * DPDK callback to enable promiscuous mode.
1547 * Pointer to Ethernet device structure.
1551 * negative error value otherwise.
1553 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1556 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1558 PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1559 nic_dev->proc_dev_name, dev->data->port_id,
1560 dev->data->promiscuous);
1562 rc = hinic_set_dev_promiscuous(nic_dev, true);
1564 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1570 * DPDK callback to disable promiscuous mode.
1573 * Pointer to Ethernet device structure.
1577 * negative error value otherwise.
1579 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1582 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1584 PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1585 nic_dev->proc_dev_name, dev->data->port_id,
1586 dev->data->promiscuous);
1588 rc = hinic_set_dev_promiscuous(nic_dev, false);
1590 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1596 * DPDK callback to update the RSS hash key and RSS hash type.
1599 * Pointer to Ethernet device structure.
1601 * RSS configuration data.
1604 * 0 on success, negative error value otherwise.
1606 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1607 struct rte_eth_rss_conf *rss_conf)
1609 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1610 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1611 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1612 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1613 u64 rss_hf = rss_conf->rss_hf;
1614 struct nic_rss_type rss_type = {0};
1617 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1618 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1622 if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1623 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1624 rss_conf->rss_key_len);
1628 if (rss_conf->rss_key) {
1629 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1630 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1633 PMD_DRV_LOG(ERR, "Set rss template table failed");
1638 rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1639 rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1640 rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1641 rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1642 rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1643 rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1644 rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1645 rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1647 err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1649 PMD_DRV_LOG(ERR, "Set rss type table failed");
1656 memset(prio_tc, 0, sizeof(prio_tc));
1657 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1662 * DPDK callback to get the RSS hash configuration.
1665 * Pointer to Ethernet device structure.
1667 * RSS configuration data.
1670 * 0 on success, negative error value otherwise.
1672 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1673 struct rte_eth_rss_conf *rss_conf)
1675 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1676 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1677 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1678 struct nic_rss_type rss_type = {0};
1681 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1682 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1686 err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1690 if (rss_conf->rss_key &&
1691 rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1692 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1693 rss_conf->rss_key_len = sizeof(hashkey);
1696 err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1700 rss_conf->rss_hf = 0;
1701 rss_conf->rss_hf |= rss_type.ipv4 ?
1702 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1703 rss_conf->rss_hf |= rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1704 rss_conf->rss_hf |= rss_type.ipv6 ?
1705 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1706 rss_conf->rss_hf |= rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1707 rss_conf->rss_hf |= rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1708 rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1709 rss_conf->rss_hf |= rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1710 rss_conf->rss_hf |= rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1716 * DPDK callback to update the RETA indirection table.
1719 * Pointer to Ethernet device structure.
1721 * Pointer to RETA configuration structure array.
1723 * Size of the RETA table.
1726 * 0 on success, negative error value otherwise.
1728 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1729 struct rte_eth_rss_reta_entry64 *reta_conf,
1732 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1733 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1734 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1735 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1740 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1743 if (reta_size != NIC_RSS_INDIR_SIZE) {
1744 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1748 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1752 /* update rss indir_tbl */
1753 for (i = 0; i < reta_size; i++) {
1754 idx = i / RTE_RETA_GROUP_SIZE;
1755 shift = i % RTE_RETA_GROUP_SIZE;
1756 if (reta_conf[idx].mask & (1ULL << shift))
1757 indirtbl[i] = reta_conf[idx].reta[shift];
1760 for (i = 0 ; i < reta_size; i++) {
1761 if (indirtbl[i] >= nic_dev->num_rq) {
1762 PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
1763 i, nic_dev->num_rq);
1768 err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1772 nic_dev->rss_indir_flag = true;
1777 memset(prio_tc, 0, sizeof(prio_tc));
1778 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1785 * DPDK callback to get the RETA indirection table.
1788 * Pointer to Ethernet device structure.
1790 * Pointer to RETA configuration structure array.
1792 * Size of the RETA table.
1795 * 0 on success, negative error value otherwise.
1797 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
1798 struct rte_eth_rss_reta_entry64 *reta_conf,
1801 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1802 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1804 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1808 if (reta_size != NIC_RSS_INDIR_SIZE) {
1809 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1813 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1815 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
1820 for (i = 0; i < reta_size; i++) {
1821 idx = i / RTE_RETA_GROUP_SIZE;
1822 shift = i % RTE_RETA_GROUP_SIZE;
1823 if (reta_conf[idx].mask & (1ULL << shift))
1824 reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
1831 * DPDK callback to get extended device statistics.
1834 * Pointer to Ethernet device.
1836 * Pointer to rte extended stats table.
1838 * The size of the stats table.
1841 * Number of extended stats on success and stats is filled,
1842 * negative error value otherwise.
1844 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
1845 struct rte_eth_xstat *xstats,
1851 struct hinic_nic_dev *nic_dev;
1852 struct hinic_phy_port_stats port_stats;
1853 struct hinic_vport_stats vport_stats;
1854 struct hinic_rxq *rxq = NULL;
1855 struct hinic_rxq_stats rxq_stats;
1856 struct hinic_txq *txq = NULL;
1857 struct hinic_txq_stats txq_stats;
1859 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1860 count = hinic_xstats_calc_num(nic_dev);
1866 /* Get stats from hinic_rxq_stats */
1867 for (qid = 0; qid < nic_dev->num_rq; qid++) {
1868 rxq = nic_dev->rxqs[qid];
1869 hinic_rxq_get_stats(rxq, &rxq_stats);
1871 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
1872 xstats[count].value =
1873 *(uint64_t *)(((char *)&rxq_stats) +
1874 hinic_rxq_stats_strings[i].offset);
1875 xstats[count].id = count;
1880 /* Get stats from hinic_txq_stats */
1881 for (qid = 0; qid < nic_dev->num_sq; qid++) {
1882 txq = nic_dev->txqs[qid];
1883 hinic_txq_get_stats(txq, &txq_stats);
1885 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
1886 xstats[count].value =
1887 *(uint64_t *)(((char *)&txq_stats) +
1888 hinic_txq_stats_strings[i].offset);
1889 xstats[count].id = count;
1894 /* Get stats from hinic_vport_stats */
1895 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1899 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
1900 xstats[count].value =
1901 *(uint64_t *)(((char *)&vport_stats) +
1902 hinic_vport_stats_strings[i].offset);
1903 xstats[count].id = count;
1907 if (HINIC_IS_VF(nic_dev->hwdev))
1910 /* Get stats from hinic_phy_port_stats */
1911 err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
1915 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
1916 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
1917 hinic_phyport_stats_strings[i].offset);
1918 xstats[count].id = count;
1926 * DPDK callback to retrieve names of extended device statistics
1929 * Pointer to Ethernet device structure.
1930 * @param xstats_names
1931 * Buffer to insert names into.
1934 * Number of xstats names.
1936 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
1937 struct rte_eth_xstat_name *xstats_names,
1938 __rte_unused unsigned int limit)
1940 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1944 if (xstats_names == NULL)
1945 return hinic_xstats_calc_num(nic_dev);
1947 /* get pmd rxq stats */
1948 for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
1949 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
1950 snprintf(xstats_names[count].name,
1951 sizeof(xstats_names[count].name),
1953 q_num, hinic_rxq_stats_strings[i].name);
1958 /* get pmd txq stats */
1959 for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
1960 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
1961 snprintf(xstats_names[count].name,
1962 sizeof(xstats_names[count].name),
1964 q_num, hinic_txq_stats_strings[i].name);
1969 /* get vport stats */
1970 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
1971 snprintf(xstats_names[count].name,
1972 sizeof(xstats_names[count].name),
1974 hinic_vport_stats_strings[i].name);
1978 if (HINIC_IS_VF(nic_dev->hwdev))
1981 /* get phy port stats */
1982 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
1983 snprintf(xstats_names[count].name,
1984 sizeof(xstats_names[count].name),
1986 hinic_phyport_stats_strings[i].name);
1993 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
1995 struct nic_pause_config pause_config = {0};
1997 pause_config.auto_neg = 0;
1998 pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
1999 pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2001 return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2004 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2006 u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2007 u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2008 u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2009 u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2010 u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2014 for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2017 return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2018 up_pgid, up_bw, up_strict);
2021 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2026 if (!HINIC_IS_VF(nic_dev->hwdev)) {
2027 nic_dev->default_cos =
2028 (hinic_global_func_id(nic_dev->hwdev) +
2029 DEFAULT_BASE_COS) % NR_MAX_COS;
2031 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2033 PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2038 nic_dev->default_cos = cos_id;
2044 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2048 err = hinic_init_default_cos(nic_dev);
2052 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2055 /* Restore DCB configure to default status */
2056 err = hinic_set_default_dcb_feature(nic_dev);
2061 err = hinic_set_rx_lro(nic_dev->hwdev, 0, 0, (u8)0);
2065 /* Set pause enable, and up will disable pfc. */
2066 err = hinic_set_default_pause_feature(nic_dev);
2070 err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2074 err = hinic_set_link_status_follow(nic_dev->hwdev,
2075 HINIC_LINK_FOLLOW_PORT);
2076 if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2077 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2081 return hinic_set_anti_attack(nic_dev->hwdev, true);
2084 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2086 struct hinic_board_info info = { 0 };
2089 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2092 rc = hinic_get_board_info(nic_dev->hwdev, &info);
2096 return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2100 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2102 nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2103 if (nic_dev->cpy_mpool == NULL) {
2104 nic_dev->cpy_mpool =
2105 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2106 HINIC_COPY_MEMPOOL_DEPTH,
2108 HINIC_COPY_MBUF_SIZE,
2110 if (!nic_dev->cpy_mpool) {
2111 PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2112 rte_errno, nic_dev->proc_dev_name);
2120 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2122 if (nic_dev->cpy_mpool != NULL)
2123 rte_mempool_free(nic_dev->cpy_mpool);
2126 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2131 /* allocate software txq array */
2132 txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2133 nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2134 if (!nic_dev->txqs) {
2135 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2139 /* allocate software rxq array */
2140 rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2141 nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2142 if (!nic_dev->rxqs) {
2144 kfree(nic_dev->txqs);
2145 nic_dev->txqs = NULL;
2147 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2154 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2156 kfree(nic_dev->txqs);
2157 nic_dev->txqs = NULL;
2159 kfree(nic_dev->rxqs);
2160 nic_dev->rxqs = NULL;
2163 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2165 struct hinic_nic_dev *nic_dev =
2166 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2169 nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2170 RTE_CACHE_LINE_SIZE);
2171 if (!nic_dev->hwdev) {
2172 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2173 eth_dev->data->name);
2176 nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2179 rc = hinic_osdep_init(nic_dev->hwdev);
2181 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2182 eth_dev->data->name);
2183 goto init_osdep_fail;
2187 rc = hinic_hwif_res_init(nic_dev->hwdev);
2189 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2190 eth_dev->data->name);
2191 goto init_hwif_fail;
2195 rc = init_cfg_mgmt(nic_dev->hwdev);
2197 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2198 eth_dev->data->name);
2199 goto init_cfgmgnt_fail;
2203 rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2205 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2206 eth_dev->data->name);
2207 goto init_aeqs_fail;
2210 /* init_pf_to_mgnt */
2211 rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2213 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2214 eth_dev->data->name);
2215 goto init_pf_to_mgmt_fail;
2219 rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2221 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2222 eth_dev->data->name);
2223 goto init_func_to_func_fail;
2226 rc = hinic_card_workmode_check(nic_dev);
2228 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2229 eth_dev->data->name);
2230 goto workmode_check_fail;
2233 /* do l2nic reset to make chip clear */
2234 rc = hinic_l2nic_reset(nic_dev->hwdev);
2236 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2237 eth_dev->data->name);
2238 goto l2nic_reset_fail;
2241 /* init dma and aeq msix attribute table */
2242 (void)hinic_init_attr_table(nic_dev->hwdev);
2245 rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2247 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2248 eth_dev->data->name);
2249 goto init_cmdq_fail;
2252 /* set hardware state active */
2253 rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2255 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2256 eth_dev->data->name);
2257 goto init_resources_state_fail;
2260 /* init_capability */
2261 rc = hinic_init_capability(nic_dev->hwdev);
2263 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2264 eth_dev->data->name);
2268 /* get nic capability */
2269 if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2270 goto nic_check_fail;
2272 /* init root cla and function table */
2273 rc = hinic_init_nicio(nic_dev->hwdev);
2275 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2276 eth_dev->data->name);
2277 goto init_nicio_fail;
2280 /* init_software_txrxq */
2281 rc = hinic_init_sw_rxtxqs(nic_dev);
2283 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2284 eth_dev->data->name);
2285 goto init_sw_rxtxqs_fail;
2288 rc = hinic_copy_mempool_init(nic_dev);
2290 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2291 eth_dev->data->name);
2292 goto init_mpool_fail;
2295 /* set hardware feature to default status */
2296 rc = hinic_set_default_hw_feature(nic_dev);
2298 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2299 eth_dev->data->name);
2300 goto set_default_hw_feature_fail;
2305 set_default_hw_feature_fail:
2306 hinic_copy_mempool_uninit(nic_dev);
2309 hinic_deinit_sw_rxtxqs(nic_dev);
2311 init_sw_rxtxqs_fail:
2312 hinic_deinit_nicio(nic_dev->hwdev);
2317 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2319 init_resources_state_fail:
2320 hinic_comm_cmdqs_free(nic_dev->hwdev);
2324 workmode_check_fail:
2325 hinic_comm_func_to_func_free(nic_dev->hwdev);
2327 init_func_to_func_fail:
2328 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2330 init_pf_to_mgmt_fail:
2331 hinic_comm_aeqs_free(nic_dev->hwdev);
2334 free_cfg_mgmt(nic_dev->hwdev);
2337 hinic_hwif_res_free(nic_dev->hwdev);
2340 hinic_osdep_deinit(nic_dev->hwdev);
2343 rte_free(nic_dev->hwdev);
2344 nic_dev->hwdev = NULL;
2349 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2351 struct hinic_nic_dev *nic_dev =
2352 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2354 (void)hinic_set_link_status_follow(nic_dev->hwdev,
2355 HINIC_LINK_FOLLOW_DEFAULT);
2356 hinic_copy_mempool_uninit(nic_dev);
2357 hinic_deinit_sw_rxtxqs(nic_dev);
2358 hinic_deinit_nicio(nic_dev->hwdev);
2359 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2360 hinic_comm_cmdqs_free(nic_dev->hwdev);
2361 hinic_comm_func_to_func_free(nic_dev->hwdev);
2362 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2363 hinic_comm_aeqs_free(nic_dev->hwdev);
2364 free_cfg_mgmt(nic_dev->hwdev);
2365 hinic_hwif_res_free(nic_dev->hwdev);
2366 hinic_osdep_deinit(nic_dev->hwdev);
2367 rte_free(nic_dev->hwdev);
2368 nic_dev->hwdev = NULL;
2372 * DPDK callback to close the device.
2375 * Pointer to Ethernet device structure.
2377 static void hinic_dev_close(struct rte_eth_dev *dev)
2379 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2381 if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2382 PMD_DRV_LOG(WARNING, "Device %s already closed",
2387 /* stop device first */
2388 hinic_dev_stop(dev);
2390 /* rx_cqe, rx_info */
2391 hinic_free_all_rx_resources(dev);
2394 hinic_free_all_tx_resources(dev);
2396 /* free wq, pi_dma_addr */
2397 hinic_free_all_rq(nic_dev);
2399 /* free wq, db_addr */
2400 hinic_free_all_sq(nic_dev);
2402 /* deinit mac vlan tbl */
2403 hinic_deinit_mac_addr(dev);
2404 hinic_remove_all_vlanid(dev);
2406 /* disable hardware and uio interrupt */
2407 hinic_disable_interrupt(dev);
2409 /* deinit nic hardware device */
2410 hinic_nic_dev_destroy(dev);
2413 static const struct eth_dev_ops hinic_pmd_ops = {
2414 .dev_configure = hinic_dev_configure,
2415 .dev_infos_get = hinic_dev_infos_get,
2416 .rx_queue_setup = hinic_rx_queue_setup,
2417 .tx_queue_setup = hinic_tx_queue_setup,
2418 .dev_start = hinic_dev_start,
2419 .link_update = hinic_link_update,
2420 .rx_queue_release = hinic_rx_queue_release,
2421 .tx_queue_release = hinic_tx_queue_release,
2422 .dev_stop = hinic_dev_stop,
2423 .dev_close = hinic_dev_close,
2424 .vlan_filter_set = hinic_vlan_filter_set,
2425 .vlan_offload_set = hinic_vlan_offload_set,
2426 .promiscuous_enable = hinic_dev_promiscuous_enable,
2427 .promiscuous_disable = hinic_dev_promiscuous_disable,
2428 .rss_hash_update = hinic_rss_hash_update,
2429 .rss_hash_conf_get = hinic_rss_conf_get,
2430 .reta_update = hinic_rss_indirtbl_update,
2431 .reta_query = hinic_rss_indirtbl_query,
2432 .stats_get = hinic_dev_stats_get,
2433 .stats_reset = hinic_dev_stats_reset,
2434 .xstats_get = hinic_dev_xstats_get,
2435 .xstats_reset = hinic_dev_xstats_reset,
2436 .xstats_get_names = hinic_dev_xstats_get_names,
2439 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2440 .dev_configure = hinic_dev_configure,
2441 .dev_infos_get = hinic_dev_infos_get,
2442 .rx_queue_setup = hinic_rx_queue_setup,
2443 .tx_queue_setup = hinic_tx_queue_setup,
2444 .dev_start = hinic_dev_start,
2445 .link_update = hinic_link_update,
2446 .rx_queue_release = hinic_rx_queue_release,
2447 .tx_queue_release = hinic_tx_queue_release,
2448 .dev_stop = hinic_dev_stop,
2449 .dev_close = hinic_dev_close,
2450 .vlan_filter_set = hinic_vlan_filter_set,
2451 .vlan_offload_set = hinic_vlan_offload_set,
2452 .rss_hash_update = hinic_rss_hash_update,
2453 .rss_hash_conf_get = hinic_rss_conf_get,
2454 .reta_update = hinic_rss_indirtbl_update,
2455 .reta_query = hinic_rss_indirtbl_query,
2456 .stats_get = hinic_dev_stats_get,
2457 .stats_reset = hinic_dev_stats_reset,
2458 .xstats_get = hinic_dev_xstats_get,
2459 .xstats_reset = hinic_dev_xstats_reset,
2460 .xstats_get_names = hinic_dev_xstats_get_names,
2463 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2465 struct rte_pci_device *pci_dev;
2466 struct rte_ether_addr *eth_addr;
2467 struct hinic_nic_dev *nic_dev;
2470 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2472 /* EAL is SECONDARY and eth_dev is already created */
2473 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2474 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2475 hinic_dev_interrupt_handler,
2478 PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2479 eth_dev->data->name);
2484 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2485 memset(nic_dev, 0, sizeof(*nic_dev));
2487 snprintf(nic_dev->proc_dev_name,
2488 sizeof(nic_dev->proc_dev_name),
2489 "hinic-%.4x:%.2x:%.2x.%x",
2490 pci_dev->addr.domain, pci_dev->addr.bus,
2491 pci_dev->addr.devid, pci_dev->addr.function);
2493 /* alloc mac_addrs */
2494 eth_addr = rte_zmalloc("hinic_mac", sizeof(*eth_addr), 0);
2496 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2497 eth_dev->data->name);
2501 eth_dev->data->mac_addrs = eth_addr;
2504 * Pass the information to the rte_eth_dev_close() that it should also
2505 * release the private port resources.
2507 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2509 /* create hardware nic_device */
2510 rc = hinic_nic_dev_create(eth_dev);
2512 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
2513 eth_dev->data->name);
2514 goto create_nic_dev_fail;
2517 if (HINIC_IS_VF(nic_dev->hwdev))
2518 eth_dev->dev_ops = &hinic_pmd_vf_ops;
2520 eth_dev->dev_ops = &hinic_pmd_ops;
2522 rc = hinic_init_mac_addr(eth_dev);
2524 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
2525 eth_dev->data->name);
2529 /* register callback func to eal lib */
2530 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2531 hinic_dev_interrupt_handler,
2534 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
2535 eth_dev->data->name);
2536 goto reg_intr_cb_fail;
2539 /* enable uio/vfio intr/eventfd mapping */
2540 rc = rte_intr_enable(&pci_dev->intr_handle);
2542 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
2543 eth_dev->data->name);
2544 goto enable_intr_fail;
2546 hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
2548 hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2549 PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
2550 eth_dev->data->name);
2555 (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
2556 hinic_dev_interrupt_handler,
2560 hinic_deinit_mac_addr(eth_dev);
2563 eth_dev->dev_ops = NULL;
2564 hinic_nic_dev_destroy(eth_dev);
2566 create_nic_dev_fail:
2568 eth_dev->data->mac_addrs = NULL;
2571 PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
2572 eth_dev->data->name);
2576 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
2578 struct rte_pci_device *pci_dev;
2580 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2582 PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
2583 pci_dev->addr.domain, pci_dev->addr.bus,
2584 pci_dev->addr.devid, pci_dev->addr.function,
2585 (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
2586 "primary" : "secondary");
2588 /* rte_eth_dev rx_burst and tx_burst */
2589 eth_dev->rx_pkt_burst = hinic_recv_pkts;
2590 eth_dev->tx_pkt_burst = hinic_xmit_pkts;
2592 return hinic_func_init(eth_dev);
2595 static int hinic_dev_uninit(struct rte_eth_dev *dev)
2597 struct hinic_nic_dev *nic_dev;
2599 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2600 hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2602 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2605 hinic_dev_close(dev);
2607 dev->dev_ops = NULL;
2608 dev->rx_pkt_burst = NULL;
2609 dev->tx_pkt_burst = NULL;
2611 rte_free(dev->data->mac_addrs);
2612 dev->data->mac_addrs = NULL;
2617 static struct rte_pci_id pci_id_hinic_map[] = {
2618 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
2619 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
2620 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
2621 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
2622 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
2623 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
2624 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
2625 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
2629 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2630 struct rte_pci_device *pci_dev)
2632 return rte_eth_dev_pci_generic_probe(pci_dev,
2633 sizeof(struct hinic_nic_dev), hinic_dev_init);
2636 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
2638 return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
2641 static struct rte_pci_driver rte_hinic_pmd = {
2642 .id_table = pci_id_hinic_map,
2643 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
2644 .probe = hinic_pci_probe,
2645 .remove = hinic_pci_remove,
2648 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
2649 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
2651 RTE_INIT(hinic_init_log)
2653 hinic_logtype = rte_log_register("pmd.net.hinic");
2654 if (hinic_logtype >= 0)
2655 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);