drivers/net/hinic/hinic_pmd_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev_pci.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memcpy.h>
  11 #include <rte_mempool.h>
  12 #include <rte_errno.h>
  13 #include <rte_ether.h>
  14
  15 #include "base/hinic_compat.h"
  16 #include "base/hinic_pmd_hwdev.h"
  17 #include "base/hinic_pmd_hwif.h"
  18 #include "base/hinic_pmd_wq.h"
  19 #include "base/hinic_pmd_cfg.h"
  20 #include "base/hinic_pmd_mgmt.h"
  21 #include "base/hinic_pmd_cmdq.h"
  22 #include "base/hinic_pmd_niccfg.h"
  23 #include "base/hinic_pmd_nicio.h"
  24 #include "base/hinic_pmd_mbox.h"
  25 #include "hinic_pmd_ethdev.h"
  26 #include "hinic_pmd_tx.h"
  27 #include "hinic_pmd_rx.h"
  28
  29 /* Vendor ID used by Huawei devices */
  30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
  31
  32 /* Hinic devices */
  33 #define HINIC_DEV_ID_PRD                0x1822
  34 #define HINIC_DEV_ID_VF                 0x375E
  35 #define HINIC_DEV_ID_VF_HV              0x379E
  36
  37 /* Mezz card for Blade Server */
  38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
  39 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
  40
  41 /* 2*25G and 2*100G card */
  42 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
  43 #define HINIC_DEV_ID_1822_100GE         0x0200
  44
  45 #define HINIC_SERVICE_MODE_NIC          2
  46
  47 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
  48
  49 #define DEFAULT_BASE_COS                4
  50 #define NR_MAX_COS                      8
  51
  52 #define HINIC_MIN_RX_BUF_SIZE           1024
  53 #define HINIC_MAX_UC_MAC_ADDRS          128
  54 #define HINIC_MAX_MC_MAC_ADDRS          2048
  55
  56 #define HINIC_DEFAULT_BURST_SIZE        32
  57 #define HINIC_DEFAULT_NB_QUEUES         1
  58 #define HINIC_DEFAULT_RING_SIZE         1024
  59 #define HINIC_MAX_LRO_SIZE              65536
  60
  61 /*
  62  * vlan_id is a 12 bit number.
  63  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
  64  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
  65  * The higher 7 bit val specifies VFTA array index.
  66  */
  67 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
  68 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
  69
  70 #define HINIC_VLAN_FILTER_EN            (1U << 0)
  71
  72 #define HINIC_MTU_TO_PKTLEN(mtu)        \
  73         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
  74
  75 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
  76         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
  77
  78 /* lro numer limit for one packet */
  79 #define HINIC_LRO_WQE_NUM_DEFAULT       8
  80
  81 struct hinic_xstats_name_off {
  82         char name[RTE_ETH_XSTATS_NAME_SIZE];
  83         u32  offset;
  84 };
  85
  86 #define HINIC_FUNC_STAT(_stat_item) {   \
  87         .name = #_stat_item, \
  88         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
  89 }
  90
  91 #define HINIC_PORT_STAT(_stat_item) { \
  92         .name = #_stat_item, \
  93         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
  94 }
  95
  96 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
  97         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
  98         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
  99         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
 100         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
 101         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
 102         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
 103
 104         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
 105         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
 106         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
 107         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
 108         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
 109         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
 110
 111         HINIC_FUNC_STAT(tx_discard_vport),
 112         HINIC_FUNC_STAT(rx_discard_vport),
 113         HINIC_FUNC_STAT(tx_err_vport),
 114         HINIC_FUNC_STAT(rx_err_vport),
 115 };
 116
 117 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
 118                 sizeof(hinic_vport_stats_strings[0]))
 119
 120 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
 121         HINIC_PORT_STAT(mac_rx_total_pkt_num),
 122         HINIC_PORT_STAT(mac_rx_total_oct_num),
 123         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
 124         HINIC_PORT_STAT(mac_rx_bad_oct_num),
 125         HINIC_PORT_STAT(mac_rx_good_pkt_num),
 126         HINIC_PORT_STAT(mac_rx_good_oct_num),
 127         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
 128         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
 129         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
 130         HINIC_PORT_STAT(mac_tx_total_pkt_num),
 131         HINIC_PORT_STAT(mac_tx_total_oct_num),
 132         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
 133         HINIC_PORT_STAT(mac_tx_bad_oct_num),
 134         HINIC_PORT_STAT(mac_tx_good_pkt_num),
 135         HINIC_PORT_STAT(mac_tx_good_oct_num),
 136         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
 137         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
 138         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
 139         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
 140         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
 141         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
 142         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
 143         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
 144         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
 145         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
 146         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
 147         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
 148         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
 149         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
 150         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
 151         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
 152         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
 153         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
 154         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
 155         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
 156         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
 157         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
 158         HINIC_PORT_STAT(mac_rx_mac_pause_num),
 159         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
 160         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
 161         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
 162         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
 163         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
 164         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
 165         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
 166         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
 167         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
 168         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
 169         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
 170         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
 171         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
 172         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
 173         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
 174         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
 175         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
 176         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
 177         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
 178         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
 179         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
 180         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
 181         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
 182         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
 183         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
 184         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
 185         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
 186         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
 187         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
 188         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
 189         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
 190         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
 191         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
 192         HINIC_PORT_STAT(mac_tx_mac_pause_num),
 193         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
 194         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
 195         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
 196         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
 197         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
 198         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
 199         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
 200         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
 201         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
 202         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
 203         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
 204         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
 205         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
 206 };
 207
 208 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
 209                 sizeof(hinic_phyport_stats_strings[0]))
 210
 211 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
 212         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
 213         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
 214 };
 215
 216 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
 217                 sizeof(hinic_rxq_stats_strings[0]))
 218
 219 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
 220         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
 221         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
 222         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
 223         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
 224         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
 225         {"sge_len0", offsetof(struct hinic_txq_stats, sge_len0)},
 226         {"mbuf_null", offsetof(struct hinic_txq_stats, mbuf_null)},
 227 };
 228
 229 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
 230                 sizeof(hinic_txq_stats_strings[0]))
 231
 232 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
 233 {
 234         if (HINIC_IS_VF(nic_dev->hwdev)) {
 235                 return (HINIC_VPORT_XSTATS_NUM +
 236                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 237                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 238         } else {
 239                 return (HINIC_VPORT_XSTATS_NUM +
 240                         HINIC_PHYPORT_XSTATS_NUM +
 241                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 242                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 243         }
 244 }
 245
 246 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
 247         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 248         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 249         .nb_align = HINIC_RXD_ALIGN,
 250 };
 251
 252 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
 253         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 254         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 255         .nb_align = HINIC_TXD_ALIGN,
 256 };
 257
 258 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 259
 260 /**
 261  * Interrupt handler triggered by NIC  for handling
 262  * specific event.
 263  *
 264  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
 265  */
 266 static void hinic_dev_interrupt_handler(void *param)
 267 {
 268         struct rte_eth_dev *dev = param;
 269         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 270
 271         if (!rte_bit_relaxed_get32(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
 272                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
 273                             nic_dev->proc_dev_name, dev->data->port_id);
 274                 return;
 275         }
 276
 277         /* aeq0 msg handler */
 278         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
 279 }
 280
 281 /**
 282  * Ethernet device configuration.
 283  *
 284  * Prepare the driver for a given number of TX and RX queues, mtu size
 285  * and configure RSS.
 286  *
 287  * @param dev
 288  *   Pointer to Ethernet device structure.
 289  *
 290  * @return
 291  *   0 on success, negative error value otherwise.
 292  */
 293 static int hinic_dev_configure(struct rte_eth_dev *dev)
 294 {
 295         struct hinic_nic_dev *nic_dev;
 296         struct hinic_nic_io *nic_io;
 297         int err;
 298
 299         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 300         nic_io = nic_dev->hwdev->nic_io;
 301
 302         nic_dev->num_sq =  dev->data->nb_tx_queues;
 303         nic_dev->num_rq = dev->data->nb_rx_queues;
 304
 305         nic_io->num_sqs =  dev->data->nb_tx_queues;
 306         nic_io->num_rqs = dev->data->nb_rx_queues;
 307
 308         /* queue pair is max_num(sq, rq) */
 309         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
 310                         nic_dev->num_sq : nic_dev->num_rq;
 311         nic_io->num_qps = nic_dev->num_qps;
 312
 313         if (nic_dev->num_qps > nic_io->max_qps) {
 314                 PMD_DRV_LOG(ERR,
 315                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
 316                         nic_dev->num_qps, nic_io->max_qps);
 317                 return -EINVAL;
 318         }
 319
 320         if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
 321                 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
 322
 323         /* mtu size is 256~9600 */
 324         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
 325             dev->data->dev_conf.rxmode.max_rx_pkt_len >
 326             HINIC_MAX_JUMBO_FRAME_SIZE) {
 327                 PMD_DRV_LOG(ERR,
 328                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
 329                         "expect between %d and %d",
 330                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
 331                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
 332                 return -EINVAL;
 333         }
 334
 335         nic_dev->mtu_size =
 336                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
 337
 338         /* rss template */
 339         err = hinic_config_mq_mode(dev, TRUE);
 340         if (err) {
 341                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
 342                 return err;
 343         }
 344
 345         /* init vlan offoad */
 346         err = hinic_vlan_offload_set(dev,
 347                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 348         if (err) {
 349                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed");
 350                 (void)hinic_config_mq_mode(dev, FALSE);
 351                 return err;
 352         }
 353
 354         /* clear fdir filter flag in function table */
 355         hinic_free_fdir_filter(nic_dev);
 356
 357         return HINIC_OK;
 358 }
 359
 360 /**
 361  * DPDK callback to create the receive queue.
 362  *
 363  * @param dev
 364  *   Pointer to Ethernet device structure.
 365  * @param queue_idx
 366  *   RX queue index.
 367  * @param nb_desc
 368  *   Number of descriptors for receive queue.
 369  * @param socket_id
 370  *   NUMA socket on which memory must be allocated.
 371  * @param rx_conf
 372  *   Thresholds parameters (unused_).
 373  * @param mp
 374  *   Memory pool for buffer allocations.
 375  *
 376  * @return
 377  *   0 on success, negative error value otherwise.
 378  */
 379 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 380                          uint16_t nb_desc, unsigned int socket_id,
 381                          __rte_unused const struct rte_eth_rxconf *rx_conf,
 382                          struct rte_mempool *mp)
 383 {
 384         int rc;
 385         struct hinic_nic_dev *nic_dev;
 386         struct hinic_hwdev *hwdev;
 387         struct hinic_rxq *rxq;
 388         u16 rq_depth, rx_free_thresh;
 389         u32 buf_size;
 390
 391         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 392         hwdev = nic_dev->hwdev;
 393
 394         /* queue depth must be power of 2, otherwise will be aligned up */
 395         rq_depth = (nb_desc & (nb_desc - 1)) ?
 396                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 397
 398         /*
 399          * Validate number of receive descriptors.
 400          * It must not exceed hardware maximum and minimum.
 401          */
 402         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
 403                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
 404                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 405                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 406                             (int)nb_desc, (int)rq_depth,
 407                             (int)dev->data->port_id, (int)queue_idx);
 408                 return -EINVAL;
 409         }
 410
 411         /*
 412          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
 413          * descriptors are used or if the number of descriptors required
 414          * to transmit a packet is greater than the number of free RX
 415          * descriptors.
 416          * The following constraints must be satisfied:
 417          *  rx_free_thresh must be greater than 0.
 418          *  rx_free_thresh must be less than the size of the ring minus 1.
 419          * When set to zero use default values.
 420          */
 421         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
 422                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
 423         if (rx_free_thresh >= (rq_depth - 1)) {
 424                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
 425                             (unsigned int)rx_free_thresh,
 426                             (int)dev->data->port_id,
 427                             (int)queue_idx);
 428                 return -EINVAL;
 429         }
 430
 431         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
 432                                  RTE_CACHE_LINE_SIZE, socket_id);
 433         if (!rxq) {
 434                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
 435                             queue_idx, dev->data->name);
 436                 return -ENOMEM;
 437         }
 438         nic_dev->rxqs[queue_idx] = rxq;
 439
 440         /* alloc rx sq hw wqe page */
 441         rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
 442         if (rc) {
 443                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
 444                             queue_idx, dev->data->name, rq_depth);
 445                 goto ceate_rq_fail;
 446         }
 447
 448         /* mbuf pool must be assigned before setup rx resources */
 449         rxq->mb_pool = mp;
 450
 451         rc =
 452         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 453                                   RTE_PKTMBUF_HEADROOM, &buf_size);
 454         if (rc) {
 455                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
 456                             dev->data->name);
 457                 goto adjust_bufsize_fail;
 458         }
 459
 460         /* rx queue info, rearm control */
 461         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
 462         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
 463         rxq->nic_dev = nic_dev;
 464         rxq->q_id = queue_idx;
 465         rxq->q_depth = rq_depth;
 466         rxq->buf_len = (u16)buf_size;
 467         rxq->rx_free_thresh = rx_free_thresh;
 468         rxq->socket_id = socket_id;
 469
 470         /* the last point cant do mbuf rearm in bulk */
 471         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
 472
 473         /* device port identifier */
 474         rxq->port_id = dev->data->port_id;
 475
 476         /* alloc rx_cqe and prepare rq_wqe */
 477         rc = hinic_setup_rx_resources(rxq);
 478         if (rc) {
 479                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name: %s",
 480                             queue_idx, dev->data->name);
 481                 goto setup_rx_res_err;
 482         }
 483
 484         /* record nic_dev rxq in rte_eth rx_queues */
 485         dev->data->rx_queues[queue_idx] = rxq;
 486
 487         return 0;
 488
 489 setup_rx_res_err:
 490 adjust_bufsize_fail:
 491         hinic_destroy_rq(hwdev, queue_idx);
 492
 493 ceate_rq_fail:
 494         rte_free(rxq);
 495
 496         return rc;
 497 }
 498
 499 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
 500 {
 501         struct hinic_rxq *rxq;
 502         struct hinic_nic_dev *nic_dev;
 503         int q_id = 0;
 504
 505         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 506
 507         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
 508                 rxq = dev->data->rx_queues[q_id];
 509
 510                 rxq->wq->cons_idx = 0;
 511                 rxq->wq->prod_idx = 0;
 512                 rxq->wq->delta = rxq->q_depth;
 513                 rxq->wq->mask = rxq->q_depth - 1;
 514
 515                 /* alloc mbuf to rq */
 516                 hinic_rx_alloc_pkts(rxq);
 517         }
 518 }
 519
 520 /**
 521  * DPDK callback to configure the transmit queue.
 522  *
 523  * @param dev
 524  *   Pointer to Ethernet device structure.
 525  * @param queue_idx
 526  *   Transmit queue index.
 527  * @param nb_desc
 528  *   Number of descriptors for transmit queue.
 529  * @param socket_id
 530  *   NUMA socket on which memory must be allocated.
 531  * @param tx_conf
 532  *   Tx queue configuration parameters.
 533  *
 534  * @return
 535  *   0 on success, negative error value otherwise.
 536  */
 537 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 538                          uint16_t nb_desc, unsigned int socket_id,
 539                          __rte_unused const struct rte_eth_txconf *tx_conf)
 540 {
 541         int rc;
 542         struct hinic_nic_dev *nic_dev;
 543         struct hinic_hwdev *hwdev;
 544         struct hinic_txq *txq;
 545         u16 sq_depth, tx_free_thresh;
 546
 547         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 548         hwdev = nic_dev->hwdev;
 549
 550         /* queue depth must be power of 2, otherwise will be aligned up */
 551         sq_depth = (nb_desc & (nb_desc - 1)) ?
 552                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 553
 554         /*
 555          * Validate number of transmit descriptors.
 556          * It must not exceed hardware maximum and minimum.
 557          */
 558         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
 559                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
 560                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 561                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 562                           (int)nb_desc, (int)sq_depth,
 563                           (int)dev->data->port_id, (int)queue_idx);
 564                 return -EINVAL;
 565         }
 566
 567         /*
 568          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
 569          * descriptors are used or if the number of descriptors required
 570          * to transmit a packet is greater than the number of free TX
 571          * descriptors.
 572          * The following constraints must be satisfied:
 573          *  tx_free_thresh must be greater than 0.
 574          *  tx_free_thresh must be less than the size of the ring minus 1.
 575          * When set to zero use default values.
 576          */
 577         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
 578                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
 579         if (tx_free_thresh >= (sq_depth - 1)) {
 580                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
 581                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
 582                         (int)queue_idx);
 583                 return -EINVAL;
 584         }
 585
 586         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
 587                                  RTE_CACHE_LINE_SIZE, socket_id);
 588         if (!txq) {
 589                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
 590                             queue_idx, dev->data->name);
 591                 return -ENOMEM;
 592         }
 593         nic_dev->txqs[queue_idx] = txq;
 594
 595         /* alloc tx sq hw wqepage */
 596         rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
 597         if (rc) {
 598                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
 599                             queue_idx, dev->data->name, sq_depth);
 600                 goto create_sq_fail;
 601         }
 602
 603         txq->q_id = queue_idx;
 604         txq->q_depth = sq_depth;
 605         txq->port_id = dev->data->port_id;
 606         txq->tx_free_thresh = tx_free_thresh;
 607         txq->nic_dev = nic_dev;
 608         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
 609         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
 610         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
 611         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
 612         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
 613                                         sizeof(struct hinic_sq_bufdesc);
 614         txq->cos = nic_dev->default_cos;
 615         txq->socket_id = socket_id;
 616
 617         /* alloc software txinfo */
 618         rc = hinic_setup_tx_resources(txq);
 619         if (rc) {
 620                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
 621                             queue_idx, dev->data->name);
 622                 goto setup_tx_res_fail;
 623         }
 624
 625         /* record nic_dev txq in rte_eth tx_queues */
 626         dev->data->tx_queues[queue_idx] = txq;
 627
 628         return HINIC_OK;
 629
 630 setup_tx_res_fail:
 631         hinic_destroy_sq(hwdev, queue_idx);
 632
 633 create_sq_fail:
 634         rte_free(txq);
 635
 636         return rc;
 637 }
 638
 639 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
 640 {
 641         struct hinic_nic_dev *nic_dev;
 642         struct hinic_txq *txq;
 643         struct hinic_nic_io *nic_io;
 644         struct hinic_hwdev *hwdev;
 645         volatile u32 *ci_addr;
 646         int q_id = 0;
 647
 648         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 649         hwdev = nic_dev->hwdev;
 650         nic_io = hwdev->nic_io;
 651
 652         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
 653                 txq = dev->data->tx_queues[q_id];
 654
 655                 txq->wq->cons_idx = 0;
 656                 txq->wq->prod_idx = 0;
 657                 txq->wq->delta = txq->q_depth;
 658                 txq->wq->mask  = txq->q_depth - 1;
 659
 660                 /* clear hardware ci */
 661                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
 662                                                         q_id);
 663                 *ci_addr = 0;
 664         }
 665 }
 666
 667 /**
 668  * Get link speed from NIC.
 669  *
 670  * @param dev
 671  *   Pointer to Ethernet device structure.
 672  * @param speed_capa
 673  *   Pointer to link speed structure.
 674  */
 675 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
 676 {
 677         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 678         u32 supported_link, advertised_link;
 679         int err;
 680
 681 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
 682
 683 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
 684
 685 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
 686                                         (1U << HINIC_25GE_BASE_CR_S) | \
 687                                         (1U << HINIC_25GE_BASE_KR) | \
 688                                         (1U << HINIC_25GE_BASE_CR))
 689
 690 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
 691                                         (1U << HINIC_40GE_BASE_CR4))
 692
 693 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
 694                                         (1U << HINIC_100GE_BASE_CR4))
 695
 696         err = hinic_get_link_mode(nic_dev->hwdev,
 697                                   &supported_link, &advertised_link);
 698         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
 699             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
 700                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
 701                           nic_dev->proc_dev_name, dev->data->port_id);
 702         } else {
 703                 *speed_capa = 0;
 704                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
 705                         *speed_capa |= ETH_LINK_SPEED_1G;
 706                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
 707                         *speed_capa |= ETH_LINK_SPEED_10G;
 708                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
 709                         *speed_capa |= ETH_LINK_SPEED_25G;
 710                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
 711                         *speed_capa |= ETH_LINK_SPEED_40G;
 712                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
 713                         *speed_capa |= ETH_LINK_SPEED_100G;
 714         }
 715 }
 716
 717 /**
 718  * DPDK callback to get information about the device.
 719  *
 720  * @param dev
 721  *   Pointer to Ethernet device structure.
 722  * @param info
 723  *   Pointer to Info structure output buffer.
 724  */
 725 static int
 726 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 727 {
 728         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 729
 730         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
 731         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
 732         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
 733         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
 734         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
 735         info->min_mtu = HINIC_MIN_MTU_SIZE;
 736         info->max_mtu = HINIC_MAX_MTU_SIZE;
 737         info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
 738
 739         hinic_get_speed_capa(dev, &info->speed_capa);
 740         info->rx_queue_offload_capa = 0;
 741         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 742                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 743                                 DEV_RX_OFFLOAD_UDP_CKSUM |
 744                                 DEV_RX_OFFLOAD_TCP_CKSUM |
 745                                 DEV_RX_OFFLOAD_VLAN_FILTER |
 746                                 DEV_RX_OFFLOAD_SCATTER |
 747                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 748                                 DEV_RX_OFFLOAD_TCP_LRO |
 749                                 DEV_RX_OFFLOAD_RSS_HASH;
 750
 751         info->tx_queue_offload_capa = 0;
 752         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 753                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 754                                 DEV_TX_OFFLOAD_UDP_CKSUM |
 755                                 DEV_TX_OFFLOAD_TCP_CKSUM |
 756                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 757                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 758                                 DEV_TX_OFFLOAD_TCP_TSO |
 759                                 DEV_TX_OFFLOAD_MULTI_SEGS;
 760
 761         info->hash_key_size = HINIC_RSS_KEY_SIZE;
 762         info->reta_size = HINIC_RSS_INDIR_SIZE;
 763         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
 764         info->rx_desc_lim = hinic_rx_desc_lim;
 765         info->tx_desc_lim = hinic_tx_desc_lim;
 766
 767         /* Driver-preferred Rx/Tx parameters */
 768         info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
 769         info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
 770         info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
 771         info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
 772         info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
 773         info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
 774
 775         return 0;
 776 }
 777
 778 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
 779                                 size_t fw_size)
 780 {
 781         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 782         char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
 783         int err;
 784
 785         err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
 786         if (err) {
 787                 PMD_DRV_LOG(ERR, "Failed to get fw version");
 788                 return -EINVAL;
 789         }
 790
 791         if (fw_size < strlen(fw_ver) + 1)
 792                 return (strlen(fw_ver) + 1);
 793
 794         snprintf(fw_version, fw_size, "%s", fw_ver);
 795
 796         return 0;
 797 }
 798
 799 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
 800 {
 801         int err;
 802
 803         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
 804         if (err) {
 805                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
 806                 return -EINVAL;
 807         }
 808         nic_dev->rx_mode_status = rx_mode_ctrl;
 809
 810         return 0;
 811 }
 812
 813 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 814 {
 815         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 816         int err;
 817
 818         /* rx configure, if rss enable, need to init default configuration */
 819         err = hinic_rx_configure(dev);
 820         if (err) {
 821                 PMD_DRV_LOG(ERR, "Configure rss failed");
 822                 return err;
 823         }
 824
 825         /* rx mode init */
 826         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
 827         if (err) {
 828                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
 829                         HINIC_DEFAULT_RX_MODE);
 830                 goto set_rx_mode_fail;
 831         }
 832
 833         return HINIC_OK;
 834
 835 set_rx_mode_fail:
 836         hinic_rx_remove_configure(dev);
 837
 838         return err;
 839 }
 840
 841 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
 842 {
 843         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 844
 845         (void)hinic_config_rx_mode(nic_dev, 0);
 846         hinic_rx_remove_configure(dev);
 847 }
 848
 849 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
 850                                           struct rte_eth_link *link)
 851 {
 852         int rc;
 853         u8 port_link_status = 0;
 854         struct nic_port_info port_link_info;
 855         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
 856         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
 857                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
 858                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
 859                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
 860
 861         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
 862         if (rc)
 863                 return rc;
 864
 865         if (!port_link_status) {
 866                 link->link_status = ETH_LINK_DOWN;
 867                 link->link_speed = 0;
 868                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
 869                 link->link_autoneg = ETH_LINK_FIXED;
 870                 return HINIC_OK;
 871         }
 872
 873         memset(&port_link_info, 0, sizeof(port_link_info));
 874         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
 875         if (rc)
 876                 return rc;
 877
 878         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
 879         link->link_duplex = port_link_info.duplex;
 880         link->link_autoneg = port_link_info.autoneg_state;
 881         link->link_status = port_link_status;
 882
 883         return HINIC_OK;
 884 }
 885
 886 /**
 887  * DPDK callback to retrieve physical link information.
 888  *
 889  * @param dev
 890  *   Pointer to Ethernet device structure.
 891  * @param wait_to_complete
 892  *   Wait for request completion.
 893  *
 894  * @return
 895  *   0 link status changed, -1 link status not changed
 896  */
 897 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 898 {
 899 #define CHECK_INTERVAL 10  /* 10ms */
 900 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
 901         int rc = HINIC_OK;
 902         struct rte_eth_link link;
 903         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 904         unsigned int rep_cnt = MAX_REPEAT_TIME;
 905
 906         memset(&link, 0, sizeof(link));
 907         do {
 908                 /* Get link status information from hardware */
 909                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
 910                 if (rc != HINIC_OK) {
 911                         link.link_speed = ETH_SPEED_NUM_NONE;
 912                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 913                         PMD_DRV_LOG(ERR, "Get link status failed");
 914                         goto out;
 915                 }
 916
 917                 if (!wait_to_complete || link.link_status)
 918                         break;
 919
 920                 rte_delay_ms(CHECK_INTERVAL);
 921         } while (rep_cnt--);
 922
 923 out:
 924         rc = rte_eth_linkstatus_set(dev, &link);
 925         return rc;
 926 }
 927
 928 /**
 929  * DPDK callback to bring the link UP.
 930  *
 931  * @param dev
 932  *   Pointer to Ethernet device structure.
 933  *
 934  * @return
 935  *   0 on success, negative errno value on failure.
 936  */
 937 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
 938 {
 939         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 940         int ret;
 941
 942         /* link status follow phy port status, up will open pma */
 943         ret = hinic_set_port_enable(nic_dev->hwdev, true);
 944         if (ret)
 945                 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
 946                             nic_dev->proc_dev_name, dev->data->port_id);
 947
 948         return ret;
 949 }
 950
 951 /**
 952  * DPDK callback to bring the link DOWN.
 953  *
 954  * @param dev
 955  *   Pointer to Ethernet device structure.
 956  *
 957  * @return
 958  *   0 on success, negative errno value on failure.
 959  */
 960 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
 961 {
 962         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 963         int ret;
 964
 965         /* link status follow phy port status, up will close pma */
 966         ret = hinic_set_port_enable(nic_dev->hwdev, false);
 967         if (ret)
 968                 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
 969                             nic_dev->proc_dev_name, dev->data->port_id);
 970
 971         return ret;
 972 }
 973
 974 /**
 975  * DPDK callback to start the device.
 976  *
 977  * @param dev
 978  *   Pointer to Ethernet device structure.
 979  *
 980  * @return
 981  *   0 on success, negative errno value on failure.
 982  */
 983 static int hinic_dev_start(struct rte_eth_dev *dev)
 984 {
 985         int rc;
 986         char *name;
 987         struct hinic_nic_dev *nic_dev;
 988
 989         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 990         name = dev->data->name;
 991
 992         /* reset rx and tx queue */
 993         hinic_reset_rx_queue(dev);
 994         hinic_reset_tx_queue(dev);
 995
 996         /* get func rx buf size */
 997         hinic_get_func_rx_buf_size(nic_dev);
 998
 999         /* init txq and rxq context */
1000         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1001         if (rc) {
1002                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name: %s",
1003                             name);
1004                 goto init_qp_fail;
1005         }
1006
1007         /* rss template */
1008         rc = hinic_config_mq_mode(dev, TRUE);
1009         if (rc) {
1010                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1011                             name);
1012                 goto cfg_mq_mode_fail;
1013         }
1014
1015         /* set default mtu */
1016         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1017         if (rc) {
1018                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1019                             nic_dev->mtu_size, name);
1020                 goto set_mtu_fail;
1021         }
1022
1023         /* configure rss rx_mode and other rx or tx default feature */
1024         rc = hinic_rxtx_configure(dev);
1025         if (rc) {
1026                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1027                             name);
1028                 goto cfg_rxtx_fail;
1029         }
1030
1031         /* reactive pf status, so that uP report asyn event */
1032         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1033
1034         /* open virtual port and ready to start packet receiving */
1035         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1036         if (rc) {
1037                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1038                 goto en_vport_fail;
1039         }
1040
1041         /* open physical port and start packet receiving */
1042         rc = hinic_set_port_enable(nic_dev->hwdev, true);
1043         if (rc) {
1044                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name: %s",
1045                             name);
1046                 goto en_port_fail;
1047         }
1048
1049         /* update eth_dev link status */
1050         if (dev->data->dev_conf.intr_conf.lsc != 0)
1051                 (void)hinic_link_update(dev, 0);
1052
1053         rte_bit_relaxed_set32(HINIC_DEV_START, &nic_dev->dev_status);
1054
1055         return 0;
1056
1057 en_port_fail:
1058         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1059
1060 en_vport_fail:
1061         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1062
1063         /* Flush tx && rx chip resources in case of set vport fake fail */
1064         (void)hinic_flush_qp_res(nic_dev->hwdev);
1065         rte_delay_ms(100);
1066
1067         hinic_remove_rxtx_configure(dev);
1068
1069 cfg_rxtx_fail:
1070 set_mtu_fail:
1071 cfg_mq_mode_fail:
1072         hinic_free_qp_ctxts(nic_dev->hwdev);
1073
1074 init_qp_fail:
1075         hinic_free_all_rx_mbuf(dev);
1076         hinic_free_all_tx_mbuf(dev);
1077
1078         return rc;
1079 }
1080
1081 /**
1082  * DPDK callback to release the receive queue.
1083  *
1084  * @param queue
1085  *   Generic receive queue pointer.
1086  */
1087 static void hinic_rx_queue_release(void *queue)
1088 {
1089         struct hinic_rxq *rxq = queue;
1090         struct hinic_nic_dev *nic_dev;
1091
1092         if (!rxq) {
1093                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1094                 return;
1095         }
1096         nic_dev = rxq->nic_dev;
1097
1098         /* free rxq_pkt mbuf */
1099         hinic_free_all_rx_mbufs(rxq);
1100
1101         /* free rxq_cqe, rxq_info */
1102         hinic_free_rx_resources(rxq);
1103
1104         /* free root rq wq */
1105         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1106
1107         nic_dev->rxqs[rxq->q_id] = NULL;
1108
1109         /* free rxq */
1110         rte_free(rxq);
1111 }
1112
1113 /**
1114  * DPDK callback to release the transmit queue.
1115  *
1116  * @param queue
1117  *   Generic transmit queue pointer.
1118  */
1119 static void hinic_tx_queue_release(void *queue)
1120 {
1121         struct hinic_txq *txq = queue;
1122         struct hinic_nic_dev *nic_dev;
1123
1124         if (!txq) {
1125                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1126                 return;
1127         }
1128         nic_dev = txq->nic_dev;
1129
1130         /* free txq_pkt mbuf */
1131         hinic_free_all_tx_mbufs(txq);
1132
1133         /* free txq_info */
1134         hinic_free_tx_resources(txq);
1135
1136         /* free root sq wq */
1137         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1138         nic_dev->txqs[txq->q_id] = NULL;
1139
1140         /* free txq */
1141         rte_free(txq);
1142 }
1143
1144 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1145 {
1146         u16 q_id;
1147
1148         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1149                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1150 }
1151
1152 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1153 {
1154         u16 q_id;
1155
1156         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1157                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1158 }
1159
1160 /**
1161  * DPDK callback to stop the device.
1162  *
1163  * @param dev
1164  *   Pointer to Ethernet device structure.
1165  */
1166 static int hinic_dev_stop(struct rte_eth_dev *dev)
1167 {
1168         int rc;
1169         char *name;
1170         uint16_t port_id;
1171         struct hinic_nic_dev *nic_dev;
1172         struct rte_eth_link link;
1173
1174         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1175         name = dev->data->name;
1176         port_id = dev->data->port_id;
1177
1178         dev->data->dev_started = 0;
1179
1180         if (!rte_bit_relaxed_test_and_clear32(HINIC_DEV_START,
1181                                               &nic_dev->dev_status)) {
1182                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1183                 return 0;
1184         }
1185
1186         /* just stop phy port and vport */
1187         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1188         if (rc)
1189                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name: %s, port_id: %d",
1190                           rc, name, port_id);
1191
1192         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1193         if (rc)
1194                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name: %s, port_id: %d",
1195                           rc, name, port_id);
1196
1197         /* Clear recorded link status */
1198         memset(&link, 0, sizeof(link));
1199         (void)rte_eth_linkstatus_set(dev, &link);
1200
1201         /* flush pending io request */
1202         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1203         if (rc)
1204                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1205                             rc, name, port_id);
1206
1207         /* clean rss table and rx_mode */
1208         hinic_remove_rxtx_configure(dev);
1209
1210         /* clean root context */
1211         hinic_free_qp_ctxts(nic_dev->hwdev);
1212
1213         hinic_destroy_fdir_filter(dev);
1214
1215         /* free mbuf */
1216         hinic_free_all_rx_mbuf(dev);
1217         hinic_free_all_tx_mbuf(dev);
1218
1219         return 0;
1220 }
1221
1222 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1223 {
1224         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1225         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1226         int ret, retries = 0;
1227
1228         rte_bit_relaxed_clear32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1229
1230         /* disable msix interrupt in hardware */
1231         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1232
1233         /* disable rte interrupt */
1234         ret = rte_intr_disable(&pci_dev->intr_handle);
1235         if (ret)
1236                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1237
1238         do {
1239                 ret =
1240                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1241                                              hinic_dev_interrupt_handler, dev);
1242                 if (ret >= 0) {
1243                         break;
1244                 } else if (ret == -EAGAIN) {
1245                         rte_delay_ms(100);
1246                         retries++;
1247                 } else {
1248                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1249                                     ret);
1250                         break;
1251                 }
1252         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1253
1254         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1255                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1256                             retries);
1257
1258         rte_bit_relaxed_clear32(HINIC_DEV_INIT, &nic_dev->dev_status);
1259 }
1260
1261 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1262 {
1263         u32 rx_mode_ctrl;
1264         int err;
1265
1266         err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1267         if (err)
1268                 return err;
1269
1270         rx_mode_ctrl = nic_dev->rx_mode_status;
1271
1272         if (enable)
1273                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1274         else
1275                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1276
1277         err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1278
1279         (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1280
1281         return err;
1282 }
1283
1284 /**
1285  * DPDK callback to get device statistics.
1286  *
1287  * @param dev
1288  *   Pointer to Ethernet device structure.
1289  * @param stats
1290  *   Stats structure output buffer.
1291  *
1292  * @return
1293  *   0 on success and stats is filled,
1294  *   negative error value otherwise.
1295  */
1296 static int
1297 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1298 {
1299         int i, err, q_num;
1300         u64 rx_discards_pmd = 0;
1301         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1302         struct hinic_vport_stats vport_stats;
1303         struct hinic_rxq        *rxq = NULL;
1304         struct hinic_rxq_stats rxq_stats;
1305         struct hinic_txq        *txq = NULL;
1306         struct hinic_txq_stats txq_stats;
1307
1308         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1309         if (err) {
1310                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1311                         nic_dev->proc_dev_name);
1312                 return err;
1313         }
1314
1315         dev->data->rx_mbuf_alloc_failed = 0;
1316
1317         /* rx queue stats */
1318         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1319                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1320         for (i = 0; i < q_num; i++) {
1321                 rxq = nic_dev->rxqs[i];
1322                 hinic_rxq_get_stats(rxq, &rxq_stats);
1323                 stats->q_ipackets[i] = rxq_stats.packets;
1324                 stats->q_ibytes[i] = rxq_stats.bytes;
1325                 stats->q_errors[i] = rxq_stats.rx_discards;
1326
1327                 stats->ierrors += rxq_stats.errors;
1328                 rx_discards_pmd += rxq_stats.rx_discards;
1329                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1330         }
1331
1332         /* tx queue stats */
1333         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1334                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1335         for (i = 0; i < q_num; i++) {
1336                 txq = nic_dev->txqs[i];
1337                 hinic_txq_get_stats(txq, &txq_stats);
1338                 stats->q_opackets[i] = txq_stats.packets;
1339                 stats->q_obytes[i] = txq_stats.bytes;
1340                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1341         }
1342
1343         /* vport stats */
1344         stats->oerrors += vport_stats.tx_discard_vport;
1345
1346         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1347
1348         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1349                         vport_stats.rx_multicast_pkts_vport +
1350                         vport_stats.rx_broadcast_pkts_vport -
1351                         rx_discards_pmd);
1352
1353         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1354                         vport_stats.tx_multicast_pkts_vport +
1355                         vport_stats.tx_broadcast_pkts_vport);
1356
1357         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1358                         vport_stats.rx_multicast_bytes_vport +
1359                         vport_stats.rx_broadcast_bytes_vport);
1360
1361         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1362                         vport_stats.tx_multicast_bytes_vport +
1363                         vport_stats.tx_broadcast_bytes_vport);
1364         return 0;
1365 }
1366
1367 /**
1368  * DPDK callback to clear device statistics.
1369  *
1370  * @param dev
1371  *   Pointer to Ethernet device structure.
1372  */
1373 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1374 {
1375         int qid;
1376         struct hinic_rxq        *rxq = NULL;
1377         struct hinic_txq        *txq = NULL;
1378         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1379         int ret;
1380
1381         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1382         if (ret != 0)
1383                 return ret;
1384
1385         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1386                 rxq = nic_dev->rxqs[qid];
1387                 hinic_rxq_stats_reset(rxq);
1388         }
1389
1390         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1391                 txq = nic_dev->txqs[qid];
1392                 hinic_txq_stats_reset(txq);
1393         }
1394
1395         return 0;
1396 }
1397
1398 /**
1399  * DPDK callback to clear device extended statistics.
1400  *
1401  * @param dev
1402  *   Pointer to Ethernet device structure.
1403  */
1404 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1405 {
1406         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1407         int ret;
1408
1409         ret = hinic_dev_stats_reset(dev);
1410         if (ret != 0)
1411                 return ret;
1412
1413         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1414                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1415                 if (ret != 0)
1416                         return ret;
1417         }
1418
1419         return 0;
1420 }
1421
1422 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1423 {
1424         uint64_t random_value;
1425
1426         /* Set Organizationally Unique Identifier (OUI) prefix */
1427         mac_addr->addr_bytes[0] = 0x00;
1428         mac_addr->addr_bytes[1] = 0x09;
1429         mac_addr->addr_bytes[2] = 0xC0;
1430         /* Force indication of locally assigned MAC address. */
1431         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1432         /* Generate the last 3 bytes of the MAC address with a random number. */
1433         random_value = rte_rand();
1434         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1435 }
1436
1437 /**
1438  * Init mac_vlan table in NIC.
1439  *
1440  * @param dev
1441  *   Pointer to Ethernet device structure.
1442  *
1443  * @return
1444  *   0 on success and stats is filled,
1445  *   negative error value otherwise.
1446  */
1447 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1448 {
1449         struct hinic_nic_dev *nic_dev =
1450                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1451         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1452         u16 func_id = 0;
1453         int rc = 0;
1454
1455         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1456         if (rc)
1457                 return rc;
1458
1459         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1460                 &eth_dev->data->mac_addrs[0]);
1461         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1462                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1463
1464         func_id = hinic_global_func_id(nic_dev->hwdev);
1465         rc = hinic_set_mac(nic_dev->hwdev,
1466                         eth_dev->data->mac_addrs[0].addr_bytes,
1467                         0, func_id);
1468         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1469                 return rc;
1470
1471         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1472                         &nic_dev->default_addr);
1473
1474         return 0;
1475 }
1476
1477 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1478 {
1479         u16 func_id;
1480         u32 i;
1481
1482         func_id = hinic_global_func_id(nic_dev->hwdev);
1483
1484         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1485                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1486                         break;
1487
1488                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1489                               0, func_id);
1490                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1491         }
1492 }
1493
1494 /**
1495  * Deinit mac_vlan table in NIC.
1496  *
1497  * @param dev
1498  *   Pointer to Ethernet device structure.
1499  *
1500  * @return
1501  *   0 on success and stats is filled,
1502  *   negative error value otherwise.
1503  */
1504 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1505 {
1506         struct hinic_nic_dev *nic_dev =
1507                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1508         u16 func_id = 0;
1509         int rc;
1510         int i;
1511
1512         func_id = hinic_global_func_id(nic_dev->hwdev);
1513
1514         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1515                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1516                         continue;
1517
1518                 rc = hinic_del_mac(nic_dev->hwdev,
1519                                    eth_dev->data->mac_addrs[i].addr_bytes,
1520                                    0, func_id);
1521                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1522                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1523                                     eth_dev->data->name);
1524
1525                 memset(&eth_dev->data->mac_addrs[i], 0,
1526                        sizeof(struct rte_ether_addr));
1527         }
1528
1529         /* delete multicast mac addrs */
1530         hinic_delete_mc_addr_list(nic_dev);
1531
1532         rte_free(nic_dev->mc_list);
1533
1534 }
1535
1536 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1537 {
1538         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1539         uint32_t frame_size;
1540         int ret = 0;
1541
1542         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1543                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1544
1545         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1546                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1547                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1548                 return -EINVAL;
1549         }
1550
1551         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1552         if (ret) {
1553                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1554                 return ret;
1555         }
1556
1557         /* update max frame size */
1558         frame_size = HINIC_MTU_TO_PKTLEN(mtu);
1559         if (frame_size > RTE_ETHER_MAX_LEN)
1560                 dev->data->dev_conf.rxmode.offloads |=
1561                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1562         else
1563                 dev->data->dev_conf.rxmode.offloads &=
1564                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1565
1566         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1567         nic_dev->mtu_size = mtu;
1568
1569         return ret;
1570 }
1571
1572 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1573                                         u16 vlan_id, bool on)
1574 {
1575         u32 vid_idx, vid_bit;
1576
1577         vid_idx = HINIC_VFTA_IDX(vlan_id);
1578         vid_bit = HINIC_VFTA_BIT(vlan_id);
1579
1580         if (on)
1581                 nic_dev->vfta[vid_idx] |= vid_bit;
1582         else
1583                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1584 }
1585
1586 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1587                                 uint16_t vlan_id)
1588 {
1589         u32 vid_idx, vid_bit;
1590
1591         vid_idx = HINIC_VFTA_IDX(vlan_id);
1592         vid_bit = HINIC_VFTA_BIT(vlan_id);
1593
1594         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1595 }
1596
1597 /**
1598  * DPDK callback to set vlan filter.
1599  *
1600  * @param dev
1601  *   Pointer to Ethernet device structure.
1602  * @param vlan_id
1603  *   vlan id is used to filter vlan packets
1604  * @param enable
1605  *   enable disable or enable vlan filter function
1606  */
1607 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1608                                 uint16_t vlan_id, int enable)
1609 {
1610         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1611         int err = 0;
1612         u16 func_id;
1613
1614         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1615                 return -EINVAL;
1616
1617         func_id = hinic_global_func_id(nic_dev->hwdev);
1618
1619         if (enable) {
1620                 /* If vlanid is already set, just return */
1621                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1622                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1623                                   vlan_id, nic_dev->proc_dev_name);
1624                         return 0;
1625                 }
1626
1627                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1628                                             func_id, TRUE);
1629         } else {
1630                 /* If vlanid can't be found, just return */
1631                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1632                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1633                                   vlan_id, nic_dev->proc_dev_name);
1634                         return 0;
1635                 }
1636
1637                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1638                                             func_id, FALSE);
1639         }
1640
1641         if (err) {
1642                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1643                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1644                 return err;
1645         }
1646
1647         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1648
1649         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1650                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1651         return 0;
1652 }
1653
1654 /**
1655  * DPDK callback to enable or disable vlan offload.
1656  *
1657  * @param dev
1658  *   Pointer to Ethernet device structure.
1659  * @param mask
1660  *   Definitions used for VLAN setting
1661  */
1662 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1663 {
1664         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1665         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1666         bool on;
1667         int err;
1668
1669         /* Enable or disable VLAN filter */
1670         if (mask & ETH_VLAN_FILTER_MASK) {
1671                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1672                         TRUE : FALSE;
1673                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1674                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1675                         PMD_DRV_LOG(WARNING,
1676                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1677                                   nic_dev->proc_dev_name, dev->data->port_id);
1678                 } else if (err) {
1679                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1680                                   on ? "enable" : "disable",
1681                                   nic_dev->proc_dev_name,
1682                                   dev->data->port_id, err);
1683                         return err;
1684                 }
1685
1686                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1687                           on ? "Enable" : "Disable",
1688                           nic_dev->proc_dev_name, dev->data->port_id);
1689         }
1690
1691         /* Enable or disable VLAN stripping */
1692         if (mask & ETH_VLAN_STRIP_MASK) {
1693                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1694                         TRUE : FALSE;
1695                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1696                 if (err) {
1697                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1698                                   on ? "enable" : "disable",
1699                                   nic_dev->proc_dev_name,
1700                                   dev->data->port_id, err);
1701                         return err;
1702                 }
1703
1704                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1705                           on ? "Enable" : "Disable",
1706                           nic_dev->proc_dev_name, dev->data->port_id);
1707         }
1708
1709         return 0;
1710 }
1711
1712 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1713 {
1714         struct hinic_nic_dev *nic_dev =
1715                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1716         u16 func_id;
1717         int i;
1718
1719         func_id = hinic_global_func_id(nic_dev->hwdev);
1720         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1721                 /* If can't find it, continue */
1722                 if (!hinic_find_vlan_filter(nic_dev, i))
1723                         continue;
1724
1725                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1726                 hinic_store_vlan_filter(nic_dev, i, false);
1727         }
1728 }
1729
1730 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1731                                 bool enable)
1732 {
1733         u32 rx_mode_ctrl;
1734         int err;
1735
1736         err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1737         if (err)
1738                 return err;
1739
1740         rx_mode_ctrl = nic_dev->rx_mode_status;
1741
1742         if (enable)
1743                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1744         else
1745                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1746
1747         err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1748
1749         (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1750
1751         return err;
1752 }
1753
1754 /**
1755  * DPDK callback to enable allmulticast mode.
1756  *
1757  * @param dev
1758  *   Pointer to Ethernet device structure.
1759  *
1760  * @return
1761  *   0 on success,
1762  *   negative error value otherwise.
1763  */
1764 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1765 {
1766         int ret = HINIC_OK;
1767         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1768
1769         ret = hinic_set_dev_allmulticast(nic_dev, true);
1770         if (ret) {
1771                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1772                 return ret;
1773         }
1774
1775         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1776                 nic_dev->proc_dev_name, dev->data->port_id);
1777         return 0;
1778 }
1779
1780 /**
1781  * DPDK callback to disable allmulticast mode.
1782  *
1783  * @param dev
1784  *   Pointer to Ethernet device structure.
1785  *
1786  * @return
1787  *   0 on success,
1788  *   negative error value otherwise.
1789  */
1790 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1791 {
1792         int ret = HINIC_OK;
1793         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1794
1795         ret = hinic_set_dev_allmulticast(nic_dev, false);
1796         if (ret) {
1797                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1798                 return ret;
1799         }
1800
1801         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1802                 nic_dev->proc_dev_name, dev->data->port_id);
1803         return 0;
1804 }
1805
1806 /**
1807  * DPDK callback to enable promiscuous mode.
1808  *
1809  * @param dev
1810  *   Pointer to Ethernet device structure.
1811  *
1812  * @return
1813  *   0 on success,
1814  *   negative error value otherwise.
1815  */
1816 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1817 {
1818         int rc = HINIC_OK;
1819         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1820
1821         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1822                     nic_dev->proc_dev_name, dev->data->port_id,
1823                     dev->data->promiscuous);
1824
1825         rc = hinic_set_dev_promiscuous(nic_dev, true);
1826         if (rc)
1827                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1828
1829         return rc;
1830 }
1831
1832 /**
1833  * DPDK callback to disable promiscuous mode.
1834  *
1835  * @param dev
1836  *   Pointer to Ethernet device structure.
1837  *
1838  * @return
1839  *   0 on success,
1840  *   negative error value otherwise.
1841  */
1842 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1843 {
1844         int rc = HINIC_OK;
1845         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1846
1847         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1848                     nic_dev->proc_dev_name, dev->data->port_id,
1849                     dev->data->promiscuous);
1850
1851         rc = hinic_set_dev_promiscuous(nic_dev, false);
1852         if (rc)
1853                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1854
1855         return rc;
1856 }
1857
1858 static int hinic_flow_ctrl_get(struct rte_eth_dev *dev,
1859                         struct rte_eth_fc_conf *fc_conf)
1860 {
1861         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1862         struct nic_pause_config nic_pause;
1863         int err;
1864
1865         memset(&nic_pause, 0, sizeof(nic_pause));
1866
1867         err = hinic_get_pause_info(nic_dev->hwdev, &nic_pause);
1868         if (err)
1869                 return err;
1870
1871         if (nic_dev->pause_set || !nic_pause.auto_neg) {
1872                 nic_pause.rx_pause = nic_dev->nic_pause.rx_pause;
1873                 nic_pause.tx_pause = nic_dev->nic_pause.tx_pause;
1874         }
1875
1876         fc_conf->autoneg = nic_pause.auto_neg;
1877
1878         if (nic_pause.tx_pause && nic_pause.rx_pause)
1879                 fc_conf->mode = RTE_FC_FULL;
1880         else if (nic_pause.tx_pause)
1881                 fc_conf->mode = RTE_FC_TX_PAUSE;
1882         else if (nic_pause.rx_pause)
1883                 fc_conf->mode = RTE_FC_RX_PAUSE;
1884         else
1885                 fc_conf->mode = RTE_FC_NONE;
1886
1887         return 0;
1888 }
1889
1890 static int hinic_flow_ctrl_set(struct rte_eth_dev *dev,
1891                         struct rte_eth_fc_conf *fc_conf)
1892 {
1893         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1894         struct nic_pause_config nic_pause;
1895         int err;
1896
1897         nic_pause.auto_neg = fc_conf->autoneg;
1898
1899         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1900                 (fc_conf->mode & RTE_FC_TX_PAUSE))
1901                 nic_pause.tx_pause = true;
1902         else
1903                 nic_pause.tx_pause = false;
1904
1905         if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
1906                 (fc_conf->mode & RTE_FC_RX_PAUSE))
1907                 nic_pause.rx_pause = true;
1908         else
1909                 nic_pause.rx_pause = false;
1910
1911         err = hinic_set_pause_config(nic_dev->hwdev, nic_pause);
1912         if (err)
1913                 return err;
1914
1915         nic_dev->pause_set = true;
1916         nic_dev->nic_pause.auto_neg = nic_pause.auto_neg;
1917         nic_dev->nic_pause.rx_pause = nic_pause.rx_pause;
1918         nic_dev->nic_pause.tx_pause = nic_pause.tx_pause;
1919
1920         PMD_DRV_LOG(INFO, "Set pause options, tx: %s, rx: %s, auto: %s\n",
1921                 nic_pause.tx_pause ? "on" : "off",
1922                 nic_pause.rx_pause ? "on" : "off",
1923                 nic_pause.auto_neg ? "on" : "off");
1924
1925         return 0;
1926 }
1927
1928 /**
1929  * DPDK callback to update the RSS hash key and RSS hash type.
1930  *
1931  * @param dev
1932  *   Pointer to Ethernet device structure.
1933  * @param rss_conf
1934  *   RSS configuration data.
1935  *
1936  * @return
1937  *   0 on success, negative error value otherwise.
1938  */
1939 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1940                           struct rte_eth_rss_conf *rss_conf)
1941 {
1942         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1943         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1944         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1945         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1946         u64 rss_hf = rss_conf->rss_hf;
1947         struct nic_rss_type rss_type = {0};
1948         int err = 0;
1949
1950         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1951                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1952                 return HINIC_OK;
1953         }
1954
1955         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1956                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len: %d",
1957                             rss_conf->rss_key_len);
1958                 return HINIC_ERROR;
1959         }
1960
1961         if (rss_conf->rss_key) {
1962                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1963                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1964                                                  hashkey);
1965                 if (err) {
1966                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1967                         goto disable_rss;
1968                 }
1969         }
1970
1971         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1972         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1973         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1974         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1975         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1976         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1977         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1978         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1979
1980         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1981         if (err) {
1982                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1983                 goto disable_rss;
1984         }
1985
1986         return 0;
1987
1988 disable_rss:
1989         memset(prio_tc, 0, sizeof(prio_tc));
1990         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1991         return err;
1992 }
1993
1994 /**
1995  * DPDK callback to get the RSS hash configuration.
1996  *
1997  * @param dev
1998  *   Pointer to Ethernet device structure.
1999  * @param rss_conf
2000  *   RSS configuration data.
2001  *
2002  * @return
2003  *   0 on success, negative error value otherwise.
2004  */
2005 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
2006                        struct rte_eth_rss_conf *rss_conf)
2007 {
2008         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2009         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2010         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
2011         struct nic_rss_type rss_type = {0};
2012         int err;
2013
2014         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
2015                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
2016                 return HINIC_ERROR;
2017         }
2018
2019         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
2020         if (err)
2021                 return err;
2022
2023         if (rss_conf->rss_key &&
2024             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
2025                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
2026                 rss_conf->rss_key_len = sizeof(hashkey);
2027         }
2028
2029         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
2030         if (err)
2031                 return err;
2032
2033         rss_conf->rss_hf = 0;
2034         rss_conf->rss_hf |=  rss_type.ipv4 ?
2035                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
2036         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
2037         rss_conf->rss_hf |=  rss_type.ipv6 ?
2038                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
2039         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
2040         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
2041         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
2042         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
2043         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
2044
2045         return HINIC_OK;
2046 }
2047
2048 /**
2049  * DPDK callback to update the RSS redirection table.
2050  *
2051  * @param dev
2052  *   Pointer to Ethernet device structure.
2053  * @param reta_conf
2054  *   Pointer to RSS reta configuration data.
2055  * @param reta_size
2056  *   Size of the RETA table.
2057  *
2058  * @return
2059  *   0 on success, negative error value otherwise.
2060  */
2061 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
2062                               struct rte_eth_rss_reta_entry64 *reta_conf,
2063                               uint16_t reta_size)
2064 {
2065         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2066         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2067         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
2068         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2069         int err = 0;
2070         u16 i = 0;
2071         u16 idx, shift;
2072
2073         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
2074                 return HINIC_OK;
2075
2076         if (reta_size != NIC_RSS_INDIR_SIZE) {
2077                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2078                 return HINIC_ERROR;
2079         }
2080
2081         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2082         if (err)
2083                 return err;
2084
2085         /* update rss indir_tbl */
2086         for (i = 0; i < reta_size; i++) {
2087                 idx = i / RTE_RETA_GROUP_SIZE;
2088                 shift = i % RTE_RETA_GROUP_SIZE;
2089
2090                 if (reta_conf[idx].reta[shift] >= nic_dev->num_rq) {
2091                         PMD_DRV_LOG(ERR, "Invalid reta entry, indirtbl[%d]: %d "
2092                                 "exceeds the maximum rxq num: %d", i,
2093                                 reta_conf[idx].reta[shift], nic_dev->num_rq);
2094                         return -EINVAL;
2095                 }
2096
2097                 if (reta_conf[idx].mask & (1ULL << shift))
2098                         indirtbl[i] = reta_conf[idx].reta[shift];
2099         }
2100
2101         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2102         if (err)
2103                 goto disable_rss;
2104
2105         nic_dev->rss_indir_flag = true;
2106
2107         return 0;
2108
2109 disable_rss:
2110         memset(prio_tc, 0, sizeof(prio_tc));
2111         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2112
2113         return HINIC_ERROR;
2114 }
2115
2116 /**
2117  * DPDK callback to get the RSS indirection table.
2118  *
2119  * @param dev
2120  *   Pointer to Ethernet device structure.
2121  * @param reta_conf
2122  *   Pointer to RSS reta configuration data.
2123  * @param reta_size
2124  *   Size of the RETA table.
2125  *
2126  * @return
2127  *   0 on success, negative error value otherwise.
2128  */
2129 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2130                              struct rte_eth_rss_reta_entry64 *reta_conf,
2131                              uint16_t reta_size)
2132 {
2133         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2134         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2135         int err = 0;
2136         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2137         u16 idx, shift;
2138         u16 i = 0;
2139
2140         if (reta_size != NIC_RSS_INDIR_SIZE) {
2141                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2142                 return HINIC_ERROR;
2143         }
2144
2145         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2146         if (err) {
2147                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error: %d",
2148                             err);
2149                 return err;
2150         }
2151
2152         for (i = 0; i < reta_size; i++) {
2153                 idx = i / RTE_RETA_GROUP_SIZE;
2154                 shift = i % RTE_RETA_GROUP_SIZE;
2155                 if (reta_conf[idx].mask & (1ULL << shift))
2156                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2157         }
2158
2159         return HINIC_OK;
2160 }
2161
2162 /**
2163  * DPDK callback to get extended device statistics.
2164  *
2165  * @param dev
2166  *   Pointer to Ethernet device.
2167  * @param xstats
2168  *   Pointer to rte extended stats table.
2169  * @param n
2170  *   The size of the stats table.
2171  *
2172  * @return
2173  *   Number of extended stats on success and stats is filled,
2174  *   negative error value otherwise.
2175  */
2176 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2177                          struct rte_eth_xstat *xstats,
2178                          unsigned int n)
2179 {
2180         u16 qid = 0;
2181         u32 i;
2182         int err, count;
2183         struct hinic_nic_dev *nic_dev;
2184         struct hinic_phy_port_stats port_stats;
2185         struct hinic_vport_stats vport_stats;
2186         struct hinic_rxq        *rxq = NULL;
2187         struct hinic_rxq_stats rxq_stats;
2188         struct hinic_txq        *txq = NULL;
2189         struct hinic_txq_stats txq_stats;
2190
2191         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2192         count = hinic_xstats_calc_num(nic_dev);
2193         if ((int)n < count)
2194                 return count;
2195
2196         count = 0;
2197
2198         /* Get stats from hinic_rxq_stats */
2199         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2200                 rxq = nic_dev->rxqs[qid];
2201                 hinic_rxq_get_stats(rxq, &rxq_stats);
2202
2203                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2204                         xstats[count].value =
2205                                 *(uint64_t *)(((char *)&rxq_stats) +
2206                                 hinic_rxq_stats_strings[i].offset);
2207                         xstats[count].id = count;
2208                         count++;
2209                 }
2210         }
2211
2212         /* Get stats from hinic_txq_stats */
2213         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2214                 txq = nic_dev->txqs[qid];
2215                 hinic_txq_get_stats(txq, &txq_stats);
2216
2217                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2218                         xstats[count].value =
2219                                 *(uint64_t *)(((char *)&txq_stats) +
2220                                 hinic_txq_stats_strings[i].offset);
2221                         xstats[count].id = count;
2222                         count++;
2223                 }
2224         }
2225
2226         /* Get stats from hinic_vport_stats */
2227         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2228         if (err)
2229                 return err;
2230
2231         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2232                 xstats[count].value =
2233                         *(uint64_t *)(((char *)&vport_stats) +
2234                         hinic_vport_stats_strings[i].offset);
2235                 xstats[count].id = count;
2236                 count++;
2237         }
2238
2239         if (HINIC_IS_VF(nic_dev->hwdev))
2240                 return count;
2241
2242         /* Get stats from hinic_phy_port_stats */
2243         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2244         if (err)
2245                 return err;
2246
2247         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2248                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2249                                 hinic_phyport_stats_strings[i].offset);
2250                 xstats[count].id = count;
2251                 count++;
2252         }
2253
2254         return count;
2255 }
2256
2257 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2258                                 struct rte_eth_rxq_info *qinfo)
2259 {
2260         struct hinic_rxq  *rxq = dev->data->rx_queues[queue_id];
2261
2262         qinfo->mp = rxq->mb_pool;
2263         qinfo->nb_desc = rxq->q_depth;
2264 }
2265
2266 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2267                                 struct rte_eth_txq_info *qinfo)
2268 {
2269         struct hinic_txq  *txq = dev->data->tx_queues[queue_id];
2270
2271         qinfo->nb_desc = txq->q_depth;
2272 }
2273
2274 /**
2275  * DPDK callback to retrieve names of extended device statistics
2276  *
2277  * @param dev
2278  *   Pointer to Ethernet device structure.
2279  * @param xstats_names
2280  *   Buffer to insert names into.
2281  *
2282  * @return
2283  *   Number of xstats names.
2284  */
2285 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2286                                struct rte_eth_xstat_name *xstats_names,
2287                                __rte_unused unsigned int limit)
2288 {
2289         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2290         int count = 0;
2291         u16 i = 0, q_num;
2292
2293         if (xstats_names == NULL)
2294                 return hinic_xstats_calc_num(nic_dev);
2295
2296         /* get pmd rxq stats */
2297         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2298                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2299                         snprintf(xstats_names[count].name,
2300                                  sizeof(xstats_names[count].name),
2301                                  "rxq%d_%s_pmd",
2302                                  q_num, hinic_rxq_stats_strings[i].name);
2303                         count++;
2304                 }
2305         }
2306
2307         /* get pmd txq stats */
2308         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2309                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2310                         snprintf(xstats_names[count].name,
2311                                  sizeof(xstats_names[count].name),
2312                                  "txq%d_%s_pmd",
2313                                  q_num, hinic_txq_stats_strings[i].name);
2314                         count++;
2315                 }
2316         }
2317
2318         /* get vport stats */
2319         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2320                 snprintf(xstats_names[count].name,
2321                          sizeof(xstats_names[count].name),
2322                          "%s", hinic_vport_stats_strings[i].name);
2323                 count++;
2324         }
2325
2326         if (HINIC_IS_VF(nic_dev->hwdev))
2327                 return count;
2328
2329         /* get phy port stats */
2330         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2331                 snprintf(xstats_names[count].name,
2332                          sizeof(xstats_names[count].name),
2333                          "%s", hinic_phyport_stats_strings[i].name);
2334                 count++;
2335         }
2336
2337         return count;
2338 }
2339
2340 /**
2341  *  DPDK callback to set mac address
2342  *
2343  * @param dev
2344  *   Pointer to Ethernet device structure.
2345  * @param addr
2346  *   Pointer to mac address
2347  * @return
2348  *   0 on success, negative error value otherwise.
2349  */
2350 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2351                               struct rte_ether_addr *addr)
2352 {
2353         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2354         u16 func_id;
2355         int err;
2356
2357         func_id = hinic_global_func_id(nic_dev->hwdev);
2358         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2359                                addr->addr_bytes, 0, func_id);
2360         if (err)
2361                 return err;
2362
2363         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2364
2365         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x",
2366                     addr->addr_bytes[0], addr->addr_bytes[1],
2367                     addr->addr_bytes[2], addr->addr_bytes[3],
2368                     addr->addr_bytes[4], addr->addr_bytes[5]);
2369
2370         return 0;
2371 }
2372
2373 /**
2374  * DPDK callback to remove a MAC address.
2375  *
2376  * @param dev
2377  *   Pointer to Ethernet device structure.
2378  * @param index
2379  *   MAC address index, should less than 128.
2380  */
2381 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2382 {
2383         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2384         u16 func_id;
2385         int ret;
2386
2387         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2388                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2389                             index);
2390                 return;
2391         }
2392
2393         func_id = hinic_global_func_id(nic_dev->hwdev);
2394         ret = hinic_del_mac(nic_dev->hwdev,
2395                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2396         if (ret)
2397                 return;
2398
2399         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2400 }
2401
2402 /**
2403  * DPDK callback to add a MAC address.
2404  *
2405  * @param dev
2406  *   Pointer to Ethernet device structure.
2407  * @param mac_addr
2408  *   Pointer to MAC address
2409  * @param index
2410  *   MAC address index, should less than 128.
2411  * @param vmdq
2412  *   VMDq pool index(not used).
2413  *
2414  * @return
2415  *   0 on success, negative error value otherwise.
2416  */
2417 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2418                               struct rte_ether_addr *mac_addr, uint32_t index,
2419                               __rte_unused uint32_t vmdq)
2420 {
2421         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2422         unsigned int i;
2423         u16 func_id;
2424         int ret;
2425
2426         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2427                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range", index);
2428                 return -EINVAL;
2429         }
2430
2431         /* First, make sure this address isn't already configured. */
2432         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2433                 /* Skip this index, it's going to be reconfigured. */
2434                 if (i == index)
2435                         continue;
2436
2437                 if (memcmp(&dev->data->mac_addrs[i],
2438                         mac_addr, sizeof(*mac_addr)))
2439                         continue;
2440
2441                 PMD_DRV_LOG(INFO, "MAC address already configured");
2442                 return -EADDRINUSE;
2443         }
2444
2445         func_id = hinic_global_func_id(nic_dev->hwdev);
2446         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2447         if (ret)
2448                 return ret;
2449
2450         dev->data->mac_addrs[index] = *mac_addr;
2451         return 0;
2452 }
2453
2454 /**
2455  *  DPDK callback to set multicast mac address
2456  *
2457  * @param dev
2458  *   Pointer to Ethernet device structure.
2459  * @param mc_addr_set
2460  *   Pointer to multicast mac address
2461  * @param nb_mc_addr
2462  *   mc addr count
2463  * @return
2464  *   0 on success, negative error value otherwise.
2465  */
2466 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2467                                   struct rte_ether_addr *mc_addr_set,
2468                                   uint32_t nb_mc_addr)
2469 {
2470         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2471         u16 func_id;
2472         int ret;
2473         u32 i;
2474
2475         func_id = hinic_global_func_id(nic_dev->hwdev);
2476
2477         /* delete old multi_cast addrs firstly */
2478         hinic_delete_mc_addr_list(nic_dev);
2479
2480         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2481                 goto allmulti;
2482
2483         for (i = 0; i < nb_mc_addr; i++) {
2484                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2485                                     0, func_id);
2486                 /* if add mc addr failed, set all multi_cast */
2487                 if (ret) {
2488                         hinic_delete_mc_addr_list(nic_dev);
2489                         goto allmulti;
2490                 }
2491
2492                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2493         }
2494
2495         return 0;
2496
2497 allmulti:
2498         hinic_dev_allmulticast_enable(dev);
2499
2500         return 0;
2501 }
2502
2503 /**
2504  * DPDK callback to manage filter control operations
2505  *
2506  * @param dev
2507  *   Pointer to Ethernet device structure.
2508  * @param filter_type
2509  *   Filter type, which just supports generic type.
2510  * @param filter_op
2511  *   Filter operation to perform.
2512  * @param arg
2513  *   Pointer to operation-specific structure.
2514  *
2515  * @return
2516  *   0 on success, negative error value otherwise.
2517  */
2518 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2519                      enum rte_filter_type filter_type,
2520                      enum rte_filter_op filter_op,
2521                      void *arg)
2522 {
2523         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2524         int func_id = hinic_global_func_id(nic_dev->hwdev);
2525
2526         switch (filter_type) {
2527         case RTE_ETH_FILTER_GENERIC:
2528                 if (filter_op != RTE_ETH_FILTER_GET)
2529                         return -EINVAL;
2530                 *(const void **)arg = &hinic_flow_ops;
2531                 break;
2532         default:
2533                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2534                         filter_type);
2535                 return -EINVAL;
2536         }
2537
2538         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2539                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2540         return 0;
2541 }
2542
2543 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2544 {
2545         struct nic_pause_config pause_config = {0};
2546         int err;
2547
2548         pause_config.auto_neg = 0;
2549         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2550         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2551
2552         err = hinic_set_pause_config(nic_dev->hwdev, pause_config);
2553         if (err)
2554                 return err;
2555
2556         nic_dev->pause_set = true;
2557         nic_dev->nic_pause.auto_neg = pause_config.auto_neg;
2558         nic_dev->nic_pause.rx_pause = pause_config.rx_pause;
2559         nic_dev->nic_pause.tx_pause = pause_config.tx_pause;
2560
2561         return 0;
2562 }
2563
2564 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2565 {
2566         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2567         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2568         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2569         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2570         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2571         int i = 0;
2572
2573         pg_bw[0] = 100;
2574         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2575                 up_bw[i] = 100;
2576
2577         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2578                                         up_pgid, up_bw, up_strict);
2579 }
2580
2581 static int hinic_pf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)
2582 {
2583         u8 default_cos = 0;
2584         u8 valid_cos_bitmap;
2585         u8 i;
2586
2587         valid_cos_bitmap = hwdev->cfg_mgmt->svc_cap.valid_cos_bitmap;
2588         if (!valid_cos_bitmap) {
2589                 PMD_DRV_LOG(ERR, "PF has none cos to support\n");
2590                 return -EFAULT;
2591         }
2592
2593         for (i = 0; i < NR_MAX_COS; i++) {
2594                 if (valid_cos_bitmap & BIT(i))
2595                         default_cos = i; /* Find max cos id as default cos */
2596         }
2597
2598         *cos_id = default_cos;
2599
2600         return 0;
2601 }
2602
2603 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2604 {
2605         u8 cos_id = 0;
2606         int err;
2607
2608         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2609                 err = hinic_pf_get_default_cos(nic_dev->hwdev, &cos_id);
2610                 if (err) {
2611                         PMD_DRV_LOG(ERR, "Get PF default cos failed, err: %d",
2612                                     err);
2613                         return HINIC_ERROR;
2614                 }
2615         } else {
2616                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2617                 if (err) {
2618                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2619                                     err);
2620                         return HINIC_ERROR;
2621                 }
2622         }
2623
2624         nic_dev->default_cos = cos_id;
2625
2626         PMD_DRV_LOG(INFO, "Default cos %d", nic_dev->default_cos);
2627
2628         return 0;
2629 }
2630
2631 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2632 {
2633         int err;
2634
2635         err = hinic_init_default_cos(nic_dev);
2636         if (err)
2637                 return err;
2638
2639         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2640                 return 0;
2641
2642         /* Restore DCB configure to default status */
2643         err = hinic_set_default_dcb_feature(nic_dev);
2644         if (err)
2645                 return err;
2646
2647         /* Set pause enable, and up will disable pfc. */
2648         err = hinic_set_default_pause_feature(nic_dev);
2649         if (err)
2650                 return err;
2651
2652         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2653         if (err)
2654                 return err;
2655
2656         err = hinic_set_link_status_follow(nic_dev->hwdev,
2657                                            HINIC_LINK_FOLLOW_PORT);
2658         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2659                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2660         else if (err)
2661                 return err;
2662
2663         return hinic_set_anti_attack(nic_dev->hwdev, true);
2664 }
2665
2666 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2667 {
2668         struct hinic_board_info info = { 0 };
2669         int rc;
2670
2671         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2672                 return 0;
2673
2674         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2675         if (rc)
2676                 return rc;
2677
2678         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2679                                                 HINIC_ERROR);
2680 }
2681
2682 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2683 {
2684         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2685         if (nic_dev->cpy_mpool == NULL) {
2686                 nic_dev->cpy_mpool =
2687                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2688                                         HINIC_COPY_MEMPOOL_DEPTH,
2689                                         0, 0,
2690                                         HINIC_COPY_MBUF_SIZE,
2691                                         rte_socket_id());
2692                 if (!nic_dev->cpy_mpool) {
2693                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2694                                     rte_errno, nic_dev->proc_dev_name);
2695                         return -ENOMEM;
2696                 }
2697         }
2698
2699         return 0;
2700 }
2701
2702 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2703 {
2704         if (nic_dev->cpy_mpool != NULL)
2705                 rte_mempool_free(nic_dev->cpy_mpool);
2706 }
2707
2708 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2709 {
2710         u32 txq_size;
2711         u32 rxq_size;
2712
2713         /* allocate software txq array */
2714         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2715         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2716         if (!nic_dev->txqs) {
2717                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2718                 return -ENOMEM;
2719         }
2720
2721         /* allocate software rxq array */
2722         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2723         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2724         if (!nic_dev->rxqs) {
2725                 /* free txqs */
2726                 kfree(nic_dev->txqs);
2727                 nic_dev->txqs = NULL;
2728
2729                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2730                 return -ENOMEM;
2731         }
2732
2733         return HINIC_OK;
2734 }
2735
2736 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2737 {
2738         kfree(nic_dev->txqs);
2739         nic_dev->txqs = NULL;
2740
2741         kfree(nic_dev->rxqs);
2742         nic_dev->rxqs = NULL;
2743 }
2744
2745 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2746 {
2747         struct hinic_nic_dev *nic_dev =
2748                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2749         int rc;
2750
2751         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2752                                      RTE_CACHE_LINE_SIZE);
2753         if (!nic_dev->hwdev) {
2754                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2755                             eth_dev->data->name);
2756                 return -ENOMEM;
2757         }
2758         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2759
2760         /* init osdep*/
2761         rc = hinic_osdep_init(nic_dev->hwdev);
2762         if (rc) {
2763                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2764                             eth_dev->data->name);
2765                 goto init_osdep_fail;
2766         }
2767
2768         /* init_hwif */
2769         rc = hinic_hwif_res_init(nic_dev->hwdev);
2770         if (rc) {
2771                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2772                             eth_dev->data->name);
2773                 goto init_hwif_fail;
2774         }
2775
2776         /* init_cfg_mgmt */
2777         rc = init_cfg_mgmt(nic_dev->hwdev);
2778         if (rc) {
2779                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2780                             eth_dev->data->name);
2781                 goto init_cfgmgnt_fail;
2782         }
2783
2784         /* init_aeqs */
2785         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2786         if (rc) {
2787                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2788                             eth_dev->data->name);
2789                 goto init_aeqs_fail;
2790         }
2791
2792         /* init_pf_to_mgnt */
2793         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2794         if (rc) {
2795                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2796                             eth_dev->data->name);
2797                 goto init_pf_to_mgmt_fail;
2798         }
2799
2800         /* init mailbox */
2801         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2802         if (rc) {
2803                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2804                             eth_dev->data->name);
2805                 goto init_func_to_func_fail;
2806         }
2807
2808         rc = hinic_card_workmode_check(nic_dev);
2809         if (rc) {
2810                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2811                             eth_dev->data->name);
2812                 goto workmode_check_fail;
2813         }
2814
2815         /* do l2nic reset to make chip clear */
2816         rc = hinic_l2nic_reset(nic_dev->hwdev);
2817         if (rc) {
2818                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2819                             eth_dev->data->name);
2820                 goto l2nic_reset_fail;
2821         }
2822
2823         /* init dma and aeq msix attribute table */
2824         (void)hinic_init_attr_table(nic_dev->hwdev);
2825
2826         /* init_cmdqs */
2827         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2828         if (rc) {
2829                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2830                             eth_dev->data->name);
2831                 goto init_cmdq_fail;
2832         }
2833
2834         /* set hardware state active */
2835         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2836         if (rc) {
2837                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2838                             eth_dev->data->name);
2839                 goto init_resources_state_fail;
2840         }
2841
2842         /* init_capability */
2843         rc = hinic_init_capability(nic_dev->hwdev);
2844         if (rc) {
2845                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2846                             eth_dev->data->name);
2847                 goto init_cap_fail;
2848         }
2849
2850         /* get nic capability */
2851         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap)) {
2852                 PMD_DRV_LOG(ERR, "Hw doesn't support nic, dev_name: %s",
2853                             eth_dev->data->name);
2854                 rc = -EINVAL;
2855                 goto nic_check_fail;
2856         }
2857
2858         /* init root cla and function table */
2859         rc = hinic_init_nicio(nic_dev->hwdev);
2860         if (rc) {
2861                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2862                             eth_dev->data->name);
2863                 goto init_nicio_fail;
2864         }
2865
2866         /* init_software_txrxq */
2867         rc = hinic_init_sw_rxtxqs(nic_dev);
2868         if (rc) {
2869                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2870                             eth_dev->data->name);
2871                 goto init_sw_rxtxqs_fail;
2872         }
2873
2874         rc = hinic_copy_mempool_init(nic_dev);
2875         if (rc) {
2876                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2877                          eth_dev->data->name);
2878                 goto init_mpool_fail;
2879         }
2880
2881         /* set hardware feature to default status */
2882         rc = hinic_set_default_hw_feature(nic_dev);
2883         if (rc) {
2884                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2885                             eth_dev->data->name);
2886                 goto set_default_hw_feature_fail;
2887         }
2888
2889         return 0;
2890
2891 set_default_hw_feature_fail:
2892         hinic_copy_mempool_uninit(nic_dev);
2893
2894 init_mpool_fail:
2895         hinic_deinit_sw_rxtxqs(nic_dev);
2896
2897 init_sw_rxtxqs_fail:
2898         hinic_deinit_nicio(nic_dev->hwdev);
2899
2900 nic_check_fail:
2901 init_nicio_fail:
2902 init_cap_fail:
2903         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2904
2905 init_resources_state_fail:
2906         hinic_comm_cmdqs_free(nic_dev->hwdev);
2907
2908 init_cmdq_fail:
2909 l2nic_reset_fail:
2910 workmode_check_fail:
2911         hinic_comm_func_to_func_free(nic_dev->hwdev);
2912
2913 init_func_to_func_fail:
2914         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2915
2916 init_pf_to_mgmt_fail:
2917         hinic_comm_aeqs_free(nic_dev->hwdev);
2918
2919 init_aeqs_fail:
2920         free_cfg_mgmt(nic_dev->hwdev);
2921
2922 init_cfgmgnt_fail:
2923         hinic_hwif_res_free(nic_dev->hwdev);
2924
2925 init_hwif_fail:
2926         hinic_osdep_deinit(nic_dev->hwdev);
2927
2928 init_osdep_fail:
2929         rte_free(nic_dev->hwdev);
2930         nic_dev->hwdev = NULL;
2931
2932         return rc;
2933 }
2934
2935 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2936 {
2937         struct hinic_nic_dev *nic_dev =
2938                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2939
2940         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2941                                            HINIC_LINK_FOLLOW_DEFAULT);
2942         hinic_copy_mempool_uninit(nic_dev);
2943         hinic_deinit_sw_rxtxqs(nic_dev);
2944         hinic_deinit_nicio(nic_dev->hwdev);
2945         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2946         hinic_comm_cmdqs_free(nic_dev->hwdev);
2947         hinic_comm_func_to_func_free(nic_dev->hwdev);
2948         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2949         hinic_comm_aeqs_free(nic_dev->hwdev);
2950         free_cfg_mgmt(nic_dev->hwdev);
2951         hinic_hwif_res_free(nic_dev->hwdev);
2952         hinic_osdep_deinit(nic_dev->hwdev);
2953         rte_free(nic_dev->hwdev);
2954         nic_dev->hwdev = NULL;
2955 }
2956
2957 /**
2958  * DPDK callback to close the device.
2959  *
2960  * @param dev
2961  *   Pointer to Ethernet device structure.
2962  */
2963 static int hinic_dev_close(struct rte_eth_dev *dev)
2964 {
2965         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2966         int ret;
2967
2968         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2969                 return 0;
2970
2971         if (rte_bit_relaxed_test_and_set32(HINIC_DEV_CLOSE,
2972                                            &nic_dev->dev_status)) {
2973                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2974                             dev->data->name);
2975                 return 0;
2976         }
2977
2978         /* stop device first */
2979         ret = hinic_dev_stop(dev);
2980
2981         /* rx_cqe, rx_info */
2982         hinic_free_all_rx_resources(dev);
2983
2984         /* tx_info */
2985         hinic_free_all_tx_resources(dev);
2986
2987         /* free wq, pi_dma_addr */
2988         hinic_free_all_rq(nic_dev);
2989
2990         /* free wq, db_addr */
2991         hinic_free_all_sq(nic_dev);
2992
2993         /* deinit mac vlan tbl */
2994         hinic_deinit_mac_addr(dev);
2995         hinic_remove_all_vlanid(dev);
2996
2997         /* disable hardware and uio interrupt */
2998         hinic_disable_interrupt(dev);
2999
3000         /* destroy rx mode mutex */
3001         hinic_mutex_destroy(&nic_dev->rx_mode_mutex);
3002
3003         /* deinit nic hardware device */
3004         hinic_nic_dev_destroy(dev);
3005
3006         return ret;
3007 }
3008
3009 static const struct eth_dev_ops hinic_pmd_ops = {
3010         .dev_configure                 = hinic_dev_configure,
3011         .dev_infos_get                 = hinic_dev_infos_get,
3012         .fw_version_get                = hinic_fw_version_get,
3013         .rx_queue_setup                = hinic_rx_queue_setup,
3014         .tx_queue_setup                = hinic_tx_queue_setup,
3015         .dev_start                     = hinic_dev_start,
3016         .dev_set_link_up               = hinic_dev_set_link_up,
3017         .dev_set_link_down             = hinic_dev_set_link_down,
3018         .link_update                   = hinic_link_update,
3019         .rx_queue_release              = hinic_rx_queue_release,
3020         .tx_queue_release              = hinic_tx_queue_release,
3021         .dev_stop                      = hinic_dev_stop,
3022         .dev_close                     = hinic_dev_close,
3023         .mtu_set                       = hinic_dev_set_mtu,
3024         .vlan_filter_set               = hinic_vlan_filter_set,
3025         .vlan_offload_set              = hinic_vlan_offload_set,
3026         .allmulticast_enable           = hinic_dev_allmulticast_enable,
3027         .allmulticast_disable          = hinic_dev_allmulticast_disable,
3028         .promiscuous_enable            = hinic_dev_promiscuous_enable,
3029         .promiscuous_disable           = hinic_dev_promiscuous_disable,
3030         .flow_ctrl_get                 = hinic_flow_ctrl_get,
3031         .flow_ctrl_set                 = hinic_flow_ctrl_set,
3032         .rss_hash_update               = hinic_rss_hash_update,
3033         .rss_hash_conf_get             = hinic_rss_conf_get,
3034         .reta_update                   = hinic_rss_indirtbl_update,
3035         .reta_query                    = hinic_rss_indirtbl_query,
3036         .stats_get                     = hinic_dev_stats_get,
3037         .stats_reset                   = hinic_dev_stats_reset,
3038         .xstats_get                    = hinic_dev_xstats_get,
3039         .xstats_reset                  = hinic_dev_xstats_reset,
3040         .xstats_get_names              = hinic_dev_xstats_get_names,
3041         .rxq_info_get                  = hinic_rxq_info_get,
3042         .txq_info_get                  = hinic_txq_info_get,
3043         .mac_addr_set                  = hinic_set_mac_addr,
3044         .mac_addr_remove               = hinic_mac_addr_remove,
3045         .mac_addr_add                  = hinic_mac_addr_add,
3046         .set_mc_addr_list              = hinic_set_mc_addr_list,
3047         .filter_ctrl                   = hinic_dev_filter_ctrl,
3048 };
3049
3050 static const struct eth_dev_ops hinic_pmd_vf_ops = {
3051         .dev_configure                 = hinic_dev_configure,
3052         .dev_infos_get                 = hinic_dev_infos_get,
3053         .fw_version_get                = hinic_fw_version_get,
3054         .rx_queue_setup                = hinic_rx_queue_setup,
3055         .tx_queue_setup                = hinic_tx_queue_setup,
3056         .dev_start                     = hinic_dev_start,
3057         .link_update                   = hinic_link_update,
3058         .rx_queue_release              = hinic_rx_queue_release,
3059         .tx_queue_release              = hinic_tx_queue_release,
3060         .dev_stop                      = hinic_dev_stop,
3061         .dev_close                     = hinic_dev_close,
3062         .mtu_set                       = hinic_dev_set_mtu,
3063         .vlan_filter_set               = hinic_vlan_filter_set,
3064         .vlan_offload_set              = hinic_vlan_offload_set,
3065         .allmulticast_enable           = hinic_dev_allmulticast_enable,
3066         .allmulticast_disable          = hinic_dev_allmulticast_disable,
3067         .rss_hash_update               = hinic_rss_hash_update,
3068         .rss_hash_conf_get             = hinic_rss_conf_get,
3069         .reta_update                   = hinic_rss_indirtbl_update,
3070         .reta_query                    = hinic_rss_indirtbl_query,
3071         .stats_get                     = hinic_dev_stats_get,
3072         .stats_reset                   = hinic_dev_stats_reset,
3073         .xstats_get                    = hinic_dev_xstats_get,
3074         .xstats_reset                  = hinic_dev_xstats_reset,
3075         .xstats_get_names              = hinic_dev_xstats_get_names,
3076         .rxq_info_get                  = hinic_rxq_info_get,
3077         .txq_info_get                  = hinic_txq_info_get,
3078         .mac_addr_set                  = hinic_set_mac_addr,
3079         .mac_addr_remove               = hinic_mac_addr_remove,
3080         .mac_addr_add                  = hinic_mac_addr_add,
3081         .set_mc_addr_list              = hinic_set_mc_addr_list,
3082         .filter_ctrl                   = hinic_dev_filter_ctrl,
3083 };
3084
3085 static int hinic_func_init(struct rte_eth_dev *eth_dev)
3086 {
3087         struct rte_pci_device *pci_dev;
3088         struct rte_ether_addr *eth_addr;
3089         struct hinic_nic_dev *nic_dev;
3090         struct hinic_filter_info *filter_info;
3091         struct hinic_tcam_info *tcam_info;
3092         u32 mac_size;
3093         int rc;
3094
3095         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3096
3097         /* EAL is SECONDARY and eth_dev is already created */
3098         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
3099                 PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
3100                             eth_dev->data->name);
3101
3102                 return 0;
3103         }
3104
3105         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
3106
3107         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
3108         memset(nic_dev, 0, sizeof(*nic_dev));
3109
3110         snprintf(nic_dev->proc_dev_name,
3111                  sizeof(nic_dev->proc_dev_name),
3112                  "hinic-%.4x:%.2x:%.2x.%x",
3113                  pci_dev->addr.domain, pci_dev->addr.bus,
3114                  pci_dev->addr.devid, pci_dev->addr.function);
3115
3116         /* alloc mac_addrs */
3117         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3118         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
3119         if (!eth_addr) {
3120                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
3121                             eth_dev->data->name);
3122                 rc = -ENOMEM;
3123                 goto eth_addr_fail;
3124         }
3125         eth_dev->data->mac_addrs = eth_addr;
3126
3127         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3128         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
3129         if (!nic_dev->mc_list) {
3130                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
3131                             eth_dev->data->name);
3132                 rc = -ENOMEM;
3133                 goto mc_addr_fail;
3134         }
3135
3136         /* create hardware nic_device */
3137         rc = hinic_nic_dev_create(eth_dev);
3138         if (rc) {
3139                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3140                             eth_dev->data->name);
3141                 goto create_nic_dev_fail;
3142         }
3143
3144         if (HINIC_IS_VF(nic_dev->hwdev))
3145                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3146         else
3147                 eth_dev->dev_ops = &hinic_pmd_ops;
3148
3149         rc = hinic_init_mac_addr(eth_dev);
3150         if (rc) {
3151                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3152                             eth_dev->data->name);
3153                 goto init_mac_fail;
3154         }
3155
3156         /* register callback func to eal lib */
3157         rc = rte_intr_callback_register(&pci_dev->intr_handle,
3158                                         hinic_dev_interrupt_handler,
3159                                         (void *)eth_dev);
3160         if (rc) {
3161                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3162                             eth_dev->data->name);
3163                 goto reg_intr_cb_fail;
3164         }
3165
3166         /* enable uio/vfio intr/eventfd mapping */
3167         rc = rte_intr_enable(&pci_dev->intr_handle);
3168         if (rc) {
3169                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3170                             eth_dev->data->name);
3171                 goto enable_intr_fail;
3172         }
3173         rte_bit_relaxed_set32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3174
3175         hinic_mutex_init(&nic_dev->rx_mode_mutex, NULL);
3176
3177         /* initialize filter info */
3178         filter_info = &nic_dev->filter;
3179         tcam_info = &nic_dev->tcam;
3180         memset(filter_info, 0, sizeof(struct hinic_filter_info));
3181         memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
3182         /* initialize 5tuple filter list */
3183         TAILQ_INIT(&filter_info->fivetuple_list);
3184         TAILQ_INIT(&tcam_info->tcam_list);
3185         TAILQ_INIT(&nic_dev->filter_ntuple_list);
3186         TAILQ_INIT(&nic_dev->filter_ethertype_list);
3187         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3188         TAILQ_INIT(&nic_dev->hinic_flow_list);
3189
3190         rte_bit_relaxed_set32(HINIC_DEV_INIT, &nic_dev->dev_status);
3191         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3192                     eth_dev->data->name);
3193
3194         return 0;
3195
3196 enable_intr_fail:
3197         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3198                                            hinic_dev_interrupt_handler,
3199                                            (void *)eth_dev);
3200
3201 reg_intr_cb_fail:
3202         hinic_deinit_mac_addr(eth_dev);
3203
3204 init_mac_fail:
3205         eth_dev->dev_ops = NULL;
3206         hinic_nic_dev_destroy(eth_dev);
3207
3208 create_nic_dev_fail:
3209         rte_free(nic_dev->mc_list);
3210         nic_dev->mc_list = NULL;
3211
3212 mc_addr_fail:
3213         rte_free(eth_addr);
3214         eth_dev->data->mac_addrs = NULL;
3215
3216 eth_addr_fail:
3217         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3218                     eth_dev->data->name);
3219         return rc;
3220 }
3221
3222 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3223 {
3224         struct rte_pci_device *pci_dev;
3225
3226         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3227
3228         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3229                     pci_dev->addr.domain, pci_dev->addr.bus,
3230                     pci_dev->addr.devid, pci_dev->addr.function,
3231                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3232                     "primary" : "secondary");
3233
3234         /* rte_eth_dev rx_burst and tx_burst */
3235         eth_dev->rx_pkt_burst = hinic_recv_pkts;
3236         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3237
3238         return hinic_func_init(eth_dev);
3239 }
3240
3241 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3242 {
3243         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3244                 return 0;
3245
3246         hinic_dev_close(dev);
3247
3248         return HINIC_OK;
3249 }
3250
3251 static struct rte_pci_id pci_id_hinic_map[] = {
3252         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3253         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3254         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3255         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3256         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3257         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3258         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3259         {.vendor_id = 0},
3260 };
3261
3262 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3263                            struct rte_pci_device *pci_dev)
3264 {
3265         return rte_eth_dev_pci_generic_probe(pci_dev,
3266                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3267 }
3268
3269 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3270 {
3271         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3272 }
3273
3274 static struct rte_pci_driver rte_hinic_pmd = {
3275         .id_table = pci_id_hinic_map,
3276         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3277         .probe = hinic_pci_probe,
3278         .remove = hinic_pci_remove,
3279 };
3280
3281 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3282 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3283 RTE_LOG_REGISTER(hinic_logtype, pmd.net.hinic, INFO);