1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
6 #include <rte_bus_pci.h>
7 #include <ethdev_pci.h>
9 #include <rte_malloc.h>
10 #include <rte_memcpy.h>
11 #include <rte_mempool.h>
12 #include <rte_errno.h>
13 #include <rte_ether.h>
15 #include "base/hinic_compat.h"
16 #include "base/hinic_pmd_hwdev.h"
17 #include "base/hinic_pmd_hwif.h"
18 #include "base/hinic_pmd_wq.h"
19 #include "base/hinic_pmd_cfg.h"
20 #include "base/hinic_pmd_mgmt.h"
21 #include "base/hinic_pmd_cmdq.h"
22 #include "base/hinic_pmd_niccfg.h"
23 #include "base/hinic_pmd_nicio.h"
24 #include "base/hinic_pmd_mbox.h"
25 #include "hinic_pmd_ethdev.h"
26 #include "hinic_pmd_tx.h"
27 #include "hinic_pmd_rx.h"
29 /* Vendor ID used by Huawei devices */
30 #define HINIC_HUAWEI_VENDOR_ID 0x19E5
33 #define HINIC_DEV_ID_PRD 0x1822
34 #define HINIC_DEV_ID_VF 0x375E
35 #define HINIC_DEV_ID_VF_HV 0x379E
37 /* Mezz card for Blade Server */
38 #define HINIC_DEV_ID_MEZZ_25GE 0x0210
39 #define HINIC_DEV_ID_MEZZ_100GE 0x0205
41 /* 2*25G and 2*100G card */
42 #define HINIC_DEV_ID_1822_DUAL_25GE 0x0206
43 #define HINIC_DEV_ID_1822_100GE 0x0200
45 #define HINIC_SERVICE_MODE_NIC 2
47 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
49 #define DEFAULT_BASE_COS 4
52 #define HINIC_MIN_RX_BUF_SIZE 1024
53 #define HINIC_MAX_UC_MAC_ADDRS 128
54 #define HINIC_MAX_MC_MAC_ADDRS 2048
56 #define HINIC_DEFAULT_BURST_SIZE 32
57 #define HINIC_DEFAULT_NB_QUEUES 1
58 #define HINIC_DEFAULT_RING_SIZE 1024
59 #define HINIC_MAX_LRO_SIZE 65536
62 * vlan_id is a 12 bit number.
63 * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
64 * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
65 * The higher 7 bit val specifies VFTA array index.
67 #define HINIC_VFTA_BIT(vlan_id) (1 << ((vlan_id) & 0x1F))
68 #define HINIC_VFTA_IDX(vlan_id) ((vlan_id) >> 5)
70 #define HINIC_VLAN_FILTER_EN (1U << 0)
72 /* lro numer limit for one packet */
73 #define HINIC_LRO_WQE_NUM_DEFAULT 8
75 struct hinic_xstats_name_off {
76 char name[RTE_ETH_XSTATS_NAME_SIZE];
80 #define HINIC_FUNC_STAT(_stat_item) { \
81 .name = #_stat_item, \
82 .offset = offsetof(struct hinic_vport_stats, _stat_item) \
85 #define HINIC_PORT_STAT(_stat_item) { \
86 .name = #_stat_item, \
87 .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
90 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
91 HINIC_FUNC_STAT(tx_unicast_pkts_vport),
92 HINIC_FUNC_STAT(tx_unicast_bytes_vport),
93 HINIC_FUNC_STAT(tx_multicast_pkts_vport),
94 HINIC_FUNC_STAT(tx_multicast_bytes_vport),
95 HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
96 HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
98 HINIC_FUNC_STAT(rx_unicast_pkts_vport),
99 HINIC_FUNC_STAT(rx_unicast_bytes_vport),
100 HINIC_FUNC_STAT(rx_multicast_pkts_vport),
101 HINIC_FUNC_STAT(rx_multicast_bytes_vport),
102 HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
103 HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
105 HINIC_FUNC_STAT(tx_discard_vport),
106 HINIC_FUNC_STAT(rx_discard_vport),
107 HINIC_FUNC_STAT(tx_err_vport),
108 HINIC_FUNC_STAT(rx_err_vport),
111 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
112 sizeof(hinic_vport_stats_strings[0]))
114 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
115 HINIC_PORT_STAT(mac_rx_total_pkt_num),
116 HINIC_PORT_STAT(mac_rx_total_oct_num),
117 HINIC_PORT_STAT(mac_rx_bad_pkt_num),
118 HINIC_PORT_STAT(mac_rx_bad_oct_num),
119 HINIC_PORT_STAT(mac_rx_good_pkt_num),
120 HINIC_PORT_STAT(mac_rx_good_oct_num),
121 HINIC_PORT_STAT(mac_rx_uni_pkt_num),
122 HINIC_PORT_STAT(mac_rx_multi_pkt_num),
123 HINIC_PORT_STAT(mac_rx_broad_pkt_num),
124 HINIC_PORT_STAT(mac_tx_total_pkt_num),
125 HINIC_PORT_STAT(mac_tx_total_oct_num),
126 HINIC_PORT_STAT(mac_tx_bad_pkt_num),
127 HINIC_PORT_STAT(mac_tx_bad_oct_num),
128 HINIC_PORT_STAT(mac_tx_good_pkt_num),
129 HINIC_PORT_STAT(mac_tx_good_oct_num),
130 HINIC_PORT_STAT(mac_tx_uni_pkt_num),
131 HINIC_PORT_STAT(mac_tx_multi_pkt_num),
132 HINIC_PORT_STAT(mac_tx_broad_pkt_num),
133 HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
134 HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
135 HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
136 HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
137 HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
138 HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
139 HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
140 HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
141 HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
142 HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
143 HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
144 HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
145 HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
146 HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
147 HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
148 HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
149 HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
150 HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
151 HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
152 HINIC_PORT_STAT(mac_rx_mac_pause_num),
153 HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
154 HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
155 HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
156 HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
157 HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
158 HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
159 HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
160 HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
161 HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
162 HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
163 HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
164 HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
165 HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
166 HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
167 HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
168 HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
169 HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
170 HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
171 HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
172 HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
173 HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
174 HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
175 HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
176 HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
177 HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
178 HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
179 HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
180 HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
181 HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
182 HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
183 HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
184 HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
185 HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
186 HINIC_PORT_STAT(mac_tx_mac_pause_num),
187 HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
188 HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
189 HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
190 HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
191 HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
192 HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
193 HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
194 HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
195 HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
196 HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
197 HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
198 HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
199 HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
202 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
203 sizeof(hinic_phyport_stats_strings[0]))
205 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
206 {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
207 {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
210 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
211 sizeof(hinic_rxq_stats_strings[0]))
213 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
214 {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
215 {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
216 {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
217 {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
218 {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
219 {"sge_len0", offsetof(struct hinic_txq_stats, sge_len0)},
220 {"mbuf_null", offsetof(struct hinic_txq_stats, mbuf_null)},
223 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
224 sizeof(hinic_txq_stats_strings[0]))
226 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
228 if (HINIC_IS_VF(nic_dev->hwdev)) {
229 return (HINIC_VPORT_XSTATS_NUM +
230 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
231 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
233 return (HINIC_VPORT_XSTATS_NUM +
234 HINIC_PHYPORT_XSTATS_NUM +
235 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
236 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
240 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
241 .nb_max = HINIC_MAX_QUEUE_DEPTH,
242 .nb_min = HINIC_MIN_QUEUE_DEPTH,
243 .nb_align = HINIC_RXD_ALIGN,
246 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
247 .nb_max = HINIC_MAX_QUEUE_DEPTH,
248 .nb_min = HINIC_MIN_QUEUE_DEPTH,
249 .nb_align = HINIC_TXD_ALIGN,
252 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
255 * Interrupt handler triggered by NIC for handling
258 * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
260 static void hinic_dev_interrupt_handler(void *param)
262 struct rte_eth_dev *dev = param;
263 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
265 if (!rte_bit_relaxed_get32(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
266 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
267 nic_dev->proc_dev_name, dev->data->port_id);
271 /* aeq0 msg handler */
272 hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
276 * Ethernet device configuration.
278 * Prepare the driver for a given number of TX and RX queues, mtu size
282 * Pointer to Ethernet device structure.
285 * 0 on success, negative error value otherwise.
287 static int hinic_dev_configure(struct rte_eth_dev *dev)
289 struct hinic_nic_dev *nic_dev;
290 struct hinic_nic_io *nic_io;
293 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
294 nic_io = nic_dev->hwdev->nic_io;
296 nic_dev->num_sq = dev->data->nb_tx_queues;
297 nic_dev->num_rq = dev->data->nb_rx_queues;
299 nic_io->num_sqs = dev->data->nb_tx_queues;
300 nic_io->num_rqs = dev->data->nb_rx_queues;
302 /* queue pair is max_num(sq, rq) */
303 nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
304 nic_dev->num_sq : nic_dev->num_rq;
305 nic_io->num_qps = nic_dev->num_qps;
307 if (nic_dev->num_qps > nic_io->max_qps) {
309 "Queue number out of range, get queue_num:%d, max_queue_num:%d",
310 nic_dev->num_qps, nic_io->max_qps);
314 if (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)
315 dev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;
317 /* mtu size is 256~9600 */
318 if (HINIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu) <
319 HINIC_MIN_FRAME_SIZE ||
320 HINIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu) >
321 HINIC_MAX_JUMBO_FRAME_SIZE) {
323 "Packet length out of range, get packet length:%d, "
324 "expect between %d and %d",
325 HINIC_MTU_TO_PKTLEN(dev->data->dev_conf.rxmode.mtu),
326 HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
330 nic_dev->mtu_size = dev->data->dev_conf.rxmode.mtu;
333 err = hinic_config_mq_mode(dev, TRUE);
335 PMD_DRV_LOG(ERR, "Config multi-queue failed");
339 /* init vlan offoad */
340 err = hinic_vlan_offload_set(dev,
341 RTE_ETH_VLAN_STRIP_MASK | RTE_ETH_VLAN_FILTER_MASK);
343 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed");
344 (void)hinic_config_mq_mode(dev, FALSE);
348 /* clear fdir filter flag in function table */
349 hinic_free_fdir_filter(nic_dev);
355 * DPDK callback to create the receive queue.
358 * Pointer to Ethernet device structure.
362 * Number of descriptors for receive queue.
364 * NUMA socket on which memory must be allocated.
366 * Thresholds parameters (unused_).
368 * Memory pool for buffer allocations.
371 * 0 on success, negative error value otherwise.
373 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
374 uint16_t nb_desc, unsigned int socket_id,
375 __rte_unused const struct rte_eth_rxconf *rx_conf,
376 struct rte_mempool *mp)
379 struct hinic_nic_dev *nic_dev;
380 struct hinic_hwdev *hwdev;
381 struct hinic_rxq *rxq;
382 u16 rq_depth, rx_free_thresh;
385 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
386 hwdev = nic_dev->hwdev;
388 /* queue depth must be power of 2, otherwise will be aligned up */
389 rq_depth = (nb_desc & (nb_desc - 1)) ?
390 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
393 * Validate number of receive descriptors.
394 * It must not exceed hardware maximum and minimum.
396 if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
397 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
398 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
399 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
400 (int)nb_desc, (int)rq_depth,
401 (int)dev->data->port_id, (int)queue_idx);
406 * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
407 * descriptors are used or if the number of descriptors required
408 * to transmit a packet is greater than the number of free RX
410 * The following constraints must be satisfied:
411 * rx_free_thresh must be greater than 0.
412 * rx_free_thresh must be less than the size of the ring minus 1.
413 * When set to zero use default values.
415 rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
416 rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
417 if (rx_free_thresh >= (rq_depth - 1)) {
418 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
419 (unsigned int)rx_free_thresh,
420 (int)dev->data->port_id,
425 rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
426 RTE_CACHE_LINE_SIZE, socket_id);
428 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
429 queue_idx, dev->data->name);
432 nic_dev->rxqs[queue_idx] = rxq;
434 /* alloc rx sq hw wqe page */
435 rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
437 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
438 queue_idx, dev->data->name, rq_depth);
442 /* mbuf pool must be assigned before setup rx resources */
446 hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
447 RTE_PKTMBUF_HEADROOM, &buf_size);
449 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
451 goto adjust_bufsize_fail;
454 /* rx queue info, rearm control */
455 rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
456 rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
457 rxq->nic_dev = nic_dev;
458 rxq->q_id = queue_idx;
459 rxq->q_depth = rq_depth;
460 rxq->buf_len = (u16)buf_size;
461 rxq->rx_free_thresh = rx_free_thresh;
462 rxq->socket_id = socket_id;
464 /* the last point cant do mbuf rearm in bulk */
465 rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
467 /* device port identifier */
468 rxq->port_id = dev->data->port_id;
470 /* alloc rx_cqe and prepare rq_wqe */
471 rc = hinic_setup_rx_resources(rxq);
473 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name: %s",
474 queue_idx, dev->data->name);
475 goto setup_rx_res_err;
478 /* record nic_dev rxq in rte_eth rx_queues */
479 dev->data->rx_queues[queue_idx] = rxq;
485 hinic_destroy_rq(hwdev, queue_idx);
493 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
495 struct hinic_rxq *rxq;
496 struct hinic_nic_dev *nic_dev;
499 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
501 for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
502 rxq = dev->data->rx_queues[q_id];
504 rxq->wq->cons_idx = 0;
505 rxq->wq->prod_idx = 0;
506 rxq->wq->delta = rxq->q_depth;
507 rxq->wq->mask = rxq->q_depth - 1;
509 /* alloc mbuf to rq */
510 hinic_rx_alloc_pkts(rxq);
515 * DPDK callback to configure the transmit queue.
518 * Pointer to Ethernet device structure.
520 * Transmit queue index.
522 * Number of descriptors for transmit queue.
524 * NUMA socket on which memory must be allocated.
526 * Tx queue configuration parameters.
529 * 0 on success, negative error value otherwise.
531 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
532 uint16_t nb_desc, unsigned int socket_id,
533 __rte_unused const struct rte_eth_txconf *tx_conf)
536 struct hinic_nic_dev *nic_dev;
537 struct hinic_hwdev *hwdev;
538 struct hinic_txq *txq;
539 u16 sq_depth, tx_free_thresh;
541 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
542 hwdev = nic_dev->hwdev;
544 /* queue depth must be power of 2, otherwise will be aligned up */
545 sq_depth = (nb_desc & (nb_desc - 1)) ?
546 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
549 * Validate number of transmit descriptors.
550 * It must not exceed hardware maximum and minimum.
552 if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
553 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
554 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
555 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
556 (int)nb_desc, (int)sq_depth,
557 (int)dev->data->port_id, (int)queue_idx);
562 * The TX descriptor ring will be cleaned after txq->tx_free_thresh
563 * descriptors are used or if the number of descriptors required
564 * to transmit a packet is greater than the number of free TX
566 * The following constraints must be satisfied:
567 * tx_free_thresh must be greater than 0.
568 * tx_free_thresh must be less than the size of the ring minus 1.
569 * When set to zero use default values.
571 tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
572 tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
573 if (tx_free_thresh >= (sq_depth - 1)) {
574 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
575 (unsigned int)tx_free_thresh, (int)dev->data->port_id,
580 txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
581 RTE_CACHE_LINE_SIZE, socket_id);
583 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
584 queue_idx, dev->data->name);
587 nic_dev->txqs[queue_idx] = txq;
589 /* alloc tx sq hw wqepage */
590 rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
592 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
593 queue_idx, dev->data->name, sq_depth);
597 txq->q_id = queue_idx;
598 txq->q_depth = sq_depth;
599 txq->port_id = dev->data->port_id;
600 txq->tx_free_thresh = tx_free_thresh;
601 txq->nic_dev = nic_dev;
602 txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
603 txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
604 txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
605 txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
606 txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
607 sizeof(struct hinic_sq_bufdesc);
608 txq->cos = nic_dev->default_cos;
609 txq->socket_id = socket_id;
611 /* alloc software txinfo */
612 rc = hinic_setup_tx_resources(txq);
614 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
615 queue_idx, dev->data->name);
616 goto setup_tx_res_fail;
619 /* record nic_dev txq in rte_eth tx_queues */
620 dev->data->tx_queues[queue_idx] = txq;
625 hinic_destroy_sq(hwdev, queue_idx);
633 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
635 struct hinic_nic_dev *nic_dev;
636 struct hinic_txq *txq;
637 struct hinic_nic_io *nic_io;
638 struct hinic_hwdev *hwdev;
639 volatile u32 *ci_addr;
642 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
643 hwdev = nic_dev->hwdev;
644 nic_io = hwdev->nic_io;
646 for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
647 txq = dev->data->tx_queues[q_id];
649 txq->wq->cons_idx = 0;
650 txq->wq->prod_idx = 0;
651 txq->wq->delta = txq->q_depth;
652 txq->wq->mask = txq->q_depth - 1;
654 /* clear hardware ci */
655 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
662 * Get link speed from NIC.
665 * Pointer to Ethernet device structure.
667 * Pointer to link speed structure.
669 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
671 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
672 u32 supported_link, advertised_link;
675 #define HINIC_LINK_MODE_SUPPORT_1G (1U << HINIC_GE_BASE_KX)
677 #define HINIC_LINK_MODE_SUPPORT_10G (1U << HINIC_10GE_BASE_KR)
679 #define HINIC_LINK_MODE_SUPPORT_25G ((1U << HINIC_25GE_BASE_KR_S) | \
680 (1U << HINIC_25GE_BASE_CR_S) | \
681 (1U << HINIC_25GE_BASE_KR) | \
682 (1U << HINIC_25GE_BASE_CR))
684 #define HINIC_LINK_MODE_SUPPORT_40G ((1U << HINIC_40GE_BASE_KR4) | \
685 (1U << HINIC_40GE_BASE_CR4))
687 #define HINIC_LINK_MODE_SUPPORT_100G ((1U << HINIC_100GE_BASE_KR4) | \
688 (1U << HINIC_100GE_BASE_CR4))
690 err = hinic_get_link_mode(nic_dev->hwdev,
691 &supported_link, &advertised_link);
692 if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
693 advertised_link == HINIC_SUPPORTED_UNKNOWN) {
694 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
695 nic_dev->proc_dev_name, dev->data->port_id);
698 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
699 *speed_capa |= RTE_ETH_LINK_SPEED_1G;
700 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
701 *speed_capa |= RTE_ETH_LINK_SPEED_10G;
702 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
703 *speed_capa |= RTE_ETH_LINK_SPEED_25G;
704 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
705 *speed_capa |= RTE_ETH_LINK_SPEED_40G;
706 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
707 *speed_capa |= RTE_ETH_LINK_SPEED_100G;
712 * DPDK callback to get information about the device.
715 * Pointer to Ethernet device structure.
717 * Pointer to Info structure output buffer.
720 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
722 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
724 info->max_rx_queues = nic_dev->nic_cap.max_rqs;
725 info->max_tx_queues = nic_dev->nic_cap.max_sqs;
726 info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
727 info->max_rx_pktlen = HINIC_MAX_JUMBO_FRAME_SIZE;
728 info->max_mac_addrs = HINIC_MAX_UC_MAC_ADDRS;
729 info->min_mtu = HINIC_MIN_MTU_SIZE;
730 info->max_mtu = HINIC_MAX_MTU_SIZE;
731 info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
733 hinic_get_speed_capa(dev, &info->speed_capa);
734 info->rx_queue_offload_capa = 0;
735 info->rx_offload_capa = RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
736 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
737 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
738 RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
739 RTE_ETH_RX_OFFLOAD_VLAN_FILTER |
740 RTE_ETH_RX_OFFLOAD_SCATTER |
741 RTE_ETH_RX_OFFLOAD_TCP_LRO |
742 RTE_ETH_RX_OFFLOAD_RSS_HASH;
744 info->tx_queue_offload_capa = 0;
745 info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_VLAN_INSERT |
746 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
747 RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
748 RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
749 RTE_ETH_TX_OFFLOAD_SCTP_CKSUM |
750 RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
751 RTE_ETH_TX_OFFLOAD_TCP_TSO |
752 RTE_ETH_TX_OFFLOAD_MULTI_SEGS;
754 info->hash_key_size = HINIC_RSS_KEY_SIZE;
755 info->reta_size = HINIC_RSS_INDIR_SIZE;
756 info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
757 info->rx_desc_lim = hinic_rx_desc_lim;
758 info->tx_desc_lim = hinic_tx_desc_lim;
760 /* Driver-preferred Rx/Tx parameters */
761 info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
762 info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
763 info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
764 info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
765 info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
766 info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
771 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
774 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
775 char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
778 err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
780 PMD_DRV_LOG(ERR, "Failed to get fw version");
784 if (fw_size < strlen(fw_ver) + 1)
785 return (strlen(fw_ver) + 1);
787 snprintf(fw_version, fw_size, "%s", fw_ver);
792 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
796 err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
798 PMD_DRV_LOG(ERR, "Failed to set rx mode");
801 nic_dev->rx_mode_status = rx_mode_ctrl;
806 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
808 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
811 /* rx configure, if rss enable, need to init default configuration */
812 err = hinic_rx_configure(dev);
814 PMD_DRV_LOG(ERR, "Configure rss failed");
819 err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
821 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
822 HINIC_DEFAULT_RX_MODE);
823 goto set_rx_mode_fail;
829 hinic_rx_remove_configure(dev);
834 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
836 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
838 (void)hinic_config_rx_mode(nic_dev, 0);
839 hinic_rx_remove_configure(dev);
842 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
843 struct rte_eth_link *link)
846 u8 port_link_status = 0;
847 struct nic_port_info port_link_info;
848 struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
849 uint32_t port_speed[LINK_SPEED_MAX] = {RTE_ETH_SPEED_NUM_10M,
850 RTE_ETH_SPEED_NUM_100M, RTE_ETH_SPEED_NUM_1G,
851 RTE_ETH_SPEED_NUM_10G, RTE_ETH_SPEED_NUM_25G,
852 RTE_ETH_SPEED_NUM_40G, RTE_ETH_SPEED_NUM_100G};
854 rc = hinic_get_link_status(nic_hwdev, &port_link_status);
858 if (!port_link_status) {
859 link->link_status = RTE_ETH_LINK_DOWN;
860 link->link_speed = 0;
861 link->link_duplex = RTE_ETH_LINK_HALF_DUPLEX;
862 link->link_autoneg = RTE_ETH_LINK_FIXED;
866 memset(&port_link_info, 0, sizeof(port_link_info));
867 rc = hinic_get_port_info(nic_hwdev, &port_link_info);
871 link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
872 link->link_duplex = port_link_info.duplex;
873 link->link_autoneg = port_link_info.autoneg_state;
874 link->link_status = port_link_status;
880 * DPDK callback to retrieve physical link information.
883 * Pointer to Ethernet device structure.
884 * @param wait_to_complete
885 * Wait for request completion.
888 * 0 link status changed, -1 link status not changed
890 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
892 #define CHECK_INTERVAL 10 /* 10ms */
893 #define MAX_REPEAT_TIME 100 /* 1s (100 * 10ms) in total */
895 struct rte_eth_link link;
896 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
897 unsigned int rep_cnt = MAX_REPEAT_TIME;
899 memset(&link, 0, sizeof(link));
901 /* Get link status information from hardware */
902 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
903 if (rc != HINIC_OK) {
904 link.link_speed = RTE_ETH_SPEED_NUM_NONE;
905 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
906 PMD_DRV_LOG(ERR, "Get link status failed");
910 if (!wait_to_complete || link.link_status)
913 rte_delay_ms(CHECK_INTERVAL);
917 rc = rte_eth_linkstatus_set(dev, &link);
922 * DPDK callback to bring the link UP.
925 * Pointer to Ethernet device structure.
928 * 0 on success, negative errno value on failure.
930 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
932 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
935 /* link status follow phy port status, up will open pma */
936 ret = hinic_set_port_enable(nic_dev->hwdev, true);
938 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
939 nic_dev->proc_dev_name, dev->data->port_id);
945 * DPDK callback to bring the link DOWN.
948 * Pointer to Ethernet device structure.
951 * 0 on success, negative errno value on failure.
953 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
955 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
958 /* link status follow phy port status, up will close pma */
959 ret = hinic_set_port_enable(nic_dev->hwdev, false);
961 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
962 nic_dev->proc_dev_name, dev->data->port_id);
968 * DPDK callback to start the device.
971 * Pointer to Ethernet device structure.
974 * 0 on success, negative errno value on failure.
976 static int hinic_dev_start(struct rte_eth_dev *dev)
980 struct hinic_nic_dev *nic_dev;
982 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
983 name = dev->data->name;
985 /* reset rx and tx queue */
986 hinic_reset_rx_queue(dev);
987 hinic_reset_tx_queue(dev);
989 /* get func rx buf size */
990 hinic_get_func_rx_buf_size(nic_dev);
992 /* init txq and rxq context */
993 rc = hinic_init_qp_ctxts(nic_dev->hwdev);
995 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name: %s",
1001 rc = hinic_config_mq_mode(dev, TRUE);
1003 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1005 goto cfg_mq_mode_fail;
1008 /* set default mtu */
1009 rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1011 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1012 nic_dev->mtu_size, name);
1016 /* configure rss rx_mode and other rx or tx default feature */
1017 rc = hinic_rxtx_configure(dev);
1019 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1024 /* reactive pf status, so that uP report asyn event */
1025 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1027 /* open virtual port and ready to start packet receiving */
1028 rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1030 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1034 /* open physical port and start packet receiving */
1035 rc = hinic_set_port_enable(nic_dev->hwdev, true);
1037 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name: %s",
1042 /* update eth_dev link status */
1043 if (dev->data->dev_conf.intr_conf.lsc != 0)
1044 (void)hinic_link_update(dev, 0);
1046 rte_bit_relaxed_set32(HINIC_DEV_START, &nic_dev->dev_status);
1051 (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1054 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1056 /* Flush tx && rx chip resources in case of set vport fake fail */
1057 (void)hinic_flush_qp_res(nic_dev->hwdev);
1060 hinic_remove_rxtx_configure(dev);
1065 hinic_free_qp_ctxts(nic_dev->hwdev);
1068 hinic_free_all_rx_mbuf(dev);
1069 hinic_free_all_tx_mbuf(dev);
1075 * DPDK callback to release the receive queue.
1078 * Pointer to Ethernet device structure.
1080 * Receive queue index.
1082 static void hinic_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1084 struct hinic_rxq *rxq = dev->data->rx_queues[qid];
1085 struct hinic_nic_dev *nic_dev;
1088 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1091 nic_dev = rxq->nic_dev;
1093 /* free rxq_pkt mbuf */
1094 hinic_free_all_rx_mbufs(rxq);
1096 /* free rxq_cqe, rxq_info */
1097 hinic_free_rx_resources(rxq);
1099 /* free root rq wq */
1100 hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1102 nic_dev->rxqs[rxq->q_id] = NULL;
1109 * DPDK callback to release the transmit queue.
1112 * Pointer to Ethernet device structure.
1114 * Transmit queue index.
1116 static void hinic_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)
1118 struct hinic_txq *txq = dev->data->tx_queues[qid];
1119 struct hinic_nic_dev *nic_dev;
1122 PMD_DRV_LOG(WARNING, "Txq is null when release");
1125 nic_dev = txq->nic_dev;
1127 /* free txq_pkt mbuf */
1128 hinic_free_all_tx_mbufs(txq);
1131 hinic_free_tx_resources(txq);
1133 /* free root sq wq */
1134 hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1135 nic_dev->txqs[txq->q_id] = NULL;
1141 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1145 for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1146 hinic_destroy_rq(nic_dev->hwdev, q_id);
1149 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1153 for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1154 hinic_destroy_sq(nic_dev->hwdev, q_id);
1158 * DPDK callback to stop the device.
1161 * Pointer to Ethernet device structure.
1163 static int hinic_dev_stop(struct rte_eth_dev *dev)
1168 struct hinic_nic_dev *nic_dev;
1169 struct rte_eth_link link;
1171 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1172 name = dev->data->name;
1173 port_id = dev->data->port_id;
1175 dev->data->dev_started = 0;
1177 if (!rte_bit_relaxed_test_and_clear32(HINIC_DEV_START,
1178 &nic_dev->dev_status)) {
1179 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1183 /* just stop phy port and vport */
1184 rc = hinic_set_port_enable(nic_dev->hwdev, false);
1186 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name: %s, port_id: %d",
1189 rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1191 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name: %s, port_id: %d",
1194 /* Clear recorded link status */
1195 memset(&link, 0, sizeof(link));
1196 (void)rte_eth_linkstatus_set(dev, &link);
1198 /* flush pending io request */
1199 rc = hinic_rx_tx_flush(nic_dev->hwdev);
1201 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1204 /* clean rss table and rx_mode */
1205 hinic_remove_rxtx_configure(dev);
1207 /* clean root context */
1208 hinic_free_qp_ctxts(nic_dev->hwdev);
1210 hinic_destroy_fdir_filter(dev);
1213 hinic_free_all_rx_mbuf(dev);
1214 hinic_free_all_tx_mbuf(dev);
1219 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1221 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1222 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1223 int ret, retries = 0;
1225 rte_bit_relaxed_clear32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1227 /* disable msix interrupt in hardware */
1228 hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1230 /* disable rte interrupt */
1231 ret = rte_intr_disable(pci_dev->intr_handle);
1233 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1237 rte_intr_callback_unregister(pci_dev->intr_handle,
1238 hinic_dev_interrupt_handler, dev);
1241 } else if (ret == -EAGAIN) {
1245 PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1249 } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1251 if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1252 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1255 rte_bit_relaxed_clear32(HINIC_DEV_INIT, &nic_dev->dev_status);
1258 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1263 err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1267 rx_mode_ctrl = nic_dev->rx_mode_status;
1270 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1272 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1274 err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1276 (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1282 * DPDK callback to get device statistics.
1285 * Pointer to Ethernet device structure.
1287 * Stats structure output buffer.
1290 * 0 on success and stats is filled,
1291 * negative error value otherwise.
1294 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1297 u64 rx_discards_pmd = 0;
1298 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1299 struct hinic_vport_stats vport_stats;
1300 struct hinic_rxq *rxq = NULL;
1301 struct hinic_rxq_stats rxq_stats;
1302 struct hinic_txq *txq = NULL;
1303 struct hinic_txq_stats txq_stats;
1305 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1307 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1308 nic_dev->proc_dev_name);
1312 dev->data->rx_mbuf_alloc_failed = 0;
1314 /* rx queue stats */
1315 q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1316 nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1317 for (i = 0; i < q_num; i++) {
1318 rxq = nic_dev->rxqs[i];
1319 hinic_rxq_get_stats(rxq, &rxq_stats);
1320 stats->q_ipackets[i] = rxq_stats.packets;
1321 stats->q_ibytes[i] = rxq_stats.bytes;
1322 stats->q_errors[i] = rxq_stats.rx_discards;
1324 stats->ierrors += rxq_stats.errors;
1325 rx_discards_pmd += rxq_stats.rx_discards;
1326 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1329 /* tx queue stats */
1330 q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1331 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1332 for (i = 0; i < q_num; i++) {
1333 txq = nic_dev->txqs[i];
1334 hinic_txq_get_stats(txq, &txq_stats);
1335 stats->q_opackets[i] = txq_stats.packets;
1336 stats->q_obytes[i] = txq_stats.bytes;
1337 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1341 stats->oerrors += vport_stats.tx_discard_vport;
1343 stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1345 stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1346 vport_stats.rx_multicast_pkts_vport +
1347 vport_stats.rx_broadcast_pkts_vport -
1350 stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1351 vport_stats.tx_multicast_pkts_vport +
1352 vport_stats.tx_broadcast_pkts_vport);
1354 stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1355 vport_stats.rx_multicast_bytes_vport +
1356 vport_stats.rx_broadcast_bytes_vport);
1358 stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1359 vport_stats.tx_multicast_bytes_vport +
1360 vport_stats.tx_broadcast_bytes_vport);
1365 * DPDK callback to clear device statistics.
1368 * Pointer to Ethernet device structure.
1370 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1373 struct hinic_rxq *rxq = NULL;
1374 struct hinic_txq *txq = NULL;
1375 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1378 ret = hinic_clear_vport_stats(nic_dev->hwdev);
1382 for (qid = 0; qid < nic_dev->num_rq; qid++) {
1383 rxq = nic_dev->rxqs[qid];
1384 hinic_rxq_stats_reset(rxq);
1387 for (qid = 0; qid < nic_dev->num_sq; qid++) {
1388 txq = nic_dev->txqs[qid];
1389 hinic_txq_stats_reset(txq);
1396 * DPDK callback to clear device extended statistics.
1399 * Pointer to Ethernet device structure.
1401 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1403 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1406 ret = hinic_dev_stats_reset(dev);
1410 if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1411 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1419 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1421 uint64_t random_value;
1423 /* Set Organizationally Unique Identifier (OUI) prefix */
1424 mac_addr->addr_bytes[0] = 0x00;
1425 mac_addr->addr_bytes[1] = 0x09;
1426 mac_addr->addr_bytes[2] = 0xC0;
1427 /* Force indication of locally assigned MAC address. */
1428 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1429 /* Generate the last 3 bytes of the MAC address with a random number. */
1430 random_value = rte_rand();
1431 memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1435 * Init mac_vlan table in NIC.
1438 * Pointer to Ethernet device structure.
1441 * 0 on success and stats is filled,
1442 * negative error value otherwise.
1444 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1446 struct hinic_nic_dev *nic_dev =
1447 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1448 uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1452 rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1456 rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1457 ð_dev->data->mac_addrs[0]);
1458 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[0]))
1459 hinic_gen_random_mac_addr(ð_dev->data->mac_addrs[0]);
1461 func_id = hinic_global_func_id(nic_dev->hwdev);
1462 rc = hinic_set_mac(nic_dev->hwdev,
1463 eth_dev->data->mac_addrs[0].addr_bytes,
1465 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1468 rte_ether_addr_copy(ð_dev->data->mac_addrs[0],
1469 &nic_dev->default_addr);
1474 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1479 func_id = hinic_global_func_id(nic_dev->hwdev);
1481 for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1482 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1485 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1487 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1492 * Deinit mac_vlan table in NIC.
1495 * Pointer to Ethernet device structure.
1498 * 0 on success and stats is filled,
1499 * negative error value otherwise.
1501 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1503 struct hinic_nic_dev *nic_dev =
1504 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1509 func_id = hinic_global_func_id(nic_dev->hwdev);
1511 for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1512 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[i]))
1515 rc = hinic_del_mac(nic_dev->hwdev,
1516 eth_dev->data->mac_addrs[i].addr_bytes,
1518 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1519 PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1520 eth_dev->data->name);
1522 memset(ð_dev->data->mac_addrs[i], 0,
1523 sizeof(struct rte_ether_addr));
1526 /* delete multicast mac addrs */
1527 hinic_delete_mc_addr_list(nic_dev);
1529 rte_free(nic_dev->mc_list);
1533 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1535 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1538 PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1539 dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1541 ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1543 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1547 nic_dev->mtu_size = mtu;
1552 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1553 u16 vlan_id, bool on)
1555 u32 vid_idx, vid_bit;
1557 vid_idx = HINIC_VFTA_IDX(vlan_id);
1558 vid_bit = HINIC_VFTA_BIT(vlan_id);
1561 nic_dev->vfta[vid_idx] |= vid_bit;
1563 nic_dev->vfta[vid_idx] &= ~vid_bit;
1566 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1569 u32 vid_idx, vid_bit;
1571 vid_idx = HINIC_VFTA_IDX(vlan_id);
1572 vid_bit = HINIC_VFTA_BIT(vlan_id);
1574 return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1578 * DPDK callback to set vlan filter.
1581 * Pointer to Ethernet device structure.
1583 * vlan id is used to filter vlan packets
1585 * enable disable or enable vlan filter function
1587 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1588 uint16_t vlan_id, int enable)
1590 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1594 if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1600 func_id = hinic_global_func_id(nic_dev->hwdev);
1603 /* If vlanid is already set, just return */
1604 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1605 PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1606 vlan_id, nic_dev->proc_dev_name);
1610 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1613 /* If vlanid can't be found, just return */
1614 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1615 PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1616 vlan_id, nic_dev->proc_dev_name);
1620 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1625 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1626 enable ? "Add" : "Remove", func_id, vlan_id, err);
1630 hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1632 PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1633 enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1638 * DPDK callback to enable or disable vlan offload.
1641 * Pointer to Ethernet device structure.
1643 * Definitions used for VLAN setting
1645 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1647 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1648 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1652 /* Enable or disable VLAN filter */
1653 if (mask & RTE_ETH_VLAN_FILTER_MASK) {
1654 on = (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER) ?
1656 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1657 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1658 PMD_DRV_LOG(WARNING,
1659 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1660 nic_dev->proc_dev_name, dev->data->port_id);
1662 PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1663 on ? "enable" : "disable",
1664 nic_dev->proc_dev_name,
1665 dev->data->port_id, err);
1669 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1670 on ? "Enable" : "Disable",
1671 nic_dev->proc_dev_name, dev->data->port_id);
1674 /* Enable or disable VLAN stripping */
1675 if (mask & RTE_ETH_VLAN_STRIP_MASK) {
1676 on = (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) ?
1678 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1680 PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1681 on ? "enable" : "disable",
1682 nic_dev->proc_dev_name,
1683 dev->data->port_id, err);
1687 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1688 on ? "Enable" : "Disable",
1689 nic_dev->proc_dev_name, dev->data->port_id);
1695 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1697 struct hinic_nic_dev *nic_dev =
1698 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1702 func_id = hinic_global_func_id(nic_dev->hwdev);
1703 for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1704 /* If can't find it, continue */
1705 if (!hinic_find_vlan_filter(nic_dev, i))
1708 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1709 hinic_store_vlan_filter(nic_dev, i, false);
1713 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1719 err = hinic_mutex_lock(&nic_dev->rx_mode_mutex);
1723 rx_mode_ctrl = nic_dev->rx_mode_status;
1726 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1728 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1730 err = hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1732 (void)hinic_mutex_unlock(&nic_dev->rx_mode_mutex);
1738 * DPDK callback to enable allmulticast mode.
1741 * Pointer to Ethernet device structure.
1745 * negative error value otherwise.
1747 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1750 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1752 ret = hinic_set_dev_allmulticast(nic_dev, true);
1754 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1758 PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1759 nic_dev->proc_dev_name, dev->data->port_id);
1764 * DPDK callback to disable allmulticast mode.
1767 * Pointer to Ethernet device structure.
1771 * negative error value otherwise.
1773 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1776 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1778 ret = hinic_set_dev_allmulticast(nic_dev, false);
1780 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1784 PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1785 nic_dev->proc_dev_name, dev->data->port_id);
1790 * DPDK callback to enable promiscuous mode.
1793 * Pointer to Ethernet device structure.
1797 * negative error value otherwise.
1799 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1802 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1804 PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1805 nic_dev->proc_dev_name, dev->data->port_id,
1806 dev->data->promiscuous);
1808 rc = hinic_set_dev_promiscuous(nic_dev, true);
1810 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1816 * DPDK callback to disable promiscuous mode.
1819 * Pointer to Ethernet device structure.
1823 * negative error value otherwise.
1825 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1828 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1830 PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1831 nic_dev->proc_dev_name, dev->data->port_id,
1832 dev->data->promiscuous);
1834 rc = hinic_set_dev_promiscuous(nic_dev, false);
1836 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1841 static int hinic_flow_ctrl_get(struct rte_eth_dev *dev,
1842 struct rte_eth_fc_conf *fc_conf)
1844 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1845 struct nic_pause_config nic_pause;
1848 memset(&nic_pause, 0, sizeof(nic_pause));
1850 err = hinic_get_pause_info(nic_dev->hwdev, &nic_pause);
1854 if (nic_dev->pause_set || !nic_pause.auto_neg) {
1855 nic_pause.rx_pause = nic_dev->nic_pause.rx_pause;
1856 nic_pause.tx_pause = nic_dev->nic_pause.tx_pause;
1859 fc_conf->autoneg = nic_pause.auto_neg;
1861 if (nic_pause.tx_pause && nic_pause.rx_pause)
1862 fc_conf->mode = RTE_ETH_FC_FULL;
1863 else if (nic_pause.tx_pause)
1864 fc_conf->mode = RTE_ETH_FC_TX_PAUSE;
1865 else if (nic_pause.rx_pause)
1866 fc_conf->mode = RTE_ETH_FC_RX_PAUSE;
1868 fc_conf->mode = RTE_ETH_FC_NONE;
1873 static int hinic_flow_ctrl_set(struct rte_eth_dev *dev,
1874 struct rte_eth_fc_conf *fc_conf)
1876 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1877 struct nic_pause_config nic_pause;
1880 nic_pause.auto_neg = fc_conf->autoneg;
1882 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) ||
1883 (fc_conf->mode & RTE_ETH_FC_TX_PAUSE))
1884 nic_pause.tx_pause = true;
1886 nic_pause.tx_pause = false;
1888 if (((fc_conf->mode & RTE_ETH_FC_FULL) == RTE_ETH_FC_FULL) ||
1889 (fc_conf->mode & RTE_ETH_FC_RX_PAUSE))
1890 nic_pause.rx_pause = true;
1892 nic_pause.rx_pause = false;
1894 err = hinic_set_pause_config(nic_dev->hwdev, nic_pause);
1898 nic_dev->pause_set = true;
1899 nic_dev->nic_pause.auto_neg = nic_pause.auto_neg;
1900 nic_dev->nic_pause.rx_pause = nic_pause.rx_pause;
1901 nic_dev->nic_pause.tx_pause = nic_pause.tx_pause;
1903 PMD_DRV_LOG(INFO, "Set pause options, tx: %s, rx: %s, auto: %s\n",
1904 nic_pause.tx_pause ? "on" : "off",
1905 nic_pause.rx_pause ? "on" : "off",
1906 nic_pause.auto_neg ? "on" : "off");
1912 * DPDK callback to update the RSS hash key and RSS hash type.
1915 * Pointer to Ethernet device structure.
1917 * RSS configuration data.
1920 * 0 on success, negative error value otherwise.
1922 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1923 struct rte_eth_rss_conf *rss_conf)
1925 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1926 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1927 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1928 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1929 u64 rss_hf = rss_conf->rss_hf;
1930 struct nic_rss_type rss_type = {0};
1933 if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG)) {
1934 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1938 if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1939 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len: %d",
1940 rss_conf->rss_key_len);
1944 if (rss_conf->rss_key) {
1945 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1946 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1949 PMD_DRV_LOG(ERR, "Set rss template table failed");
1954 rss_type.ipv4 = (rss_hf & (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1955 rss_type.tcp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1956 rss_type.ipv6 = (rss_hf & (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1957 rss_type.ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_EX) ? 1 : 0;
1958 rss_type.tcp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1959 rss_type.tcp_ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1960 rss_type.udp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1961 rss_type.udp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1963 err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1965 PMD_DRV_LOG(ERR, "Set rss type table failed");
1972 memset(prio_tc, 0, sizeof(prio_tc));
1973 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1978 * DPDK callback to get the RSS hash configuration.
1981 * Pointer to Ethernet device structure.
1983 * RSS configuration data.
1986 * 0 on success, negative error value otherwise.
1988 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1989 struct rte_eth_rss_conf *rss_conf)
1991 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1992 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1993 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1994 struct nic_rss_type rss_type = {0};
1997 if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG)) {
1998 PMD_DRV_LOG(WARNING, "RSS is not enabled");
2002 err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
2006 if (rss_conf->rss_key &&
2007 rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
2008 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
2009 rss_conf->rss_key_len = sizeof(hashkey);
2012 err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
2016 rss_conf->rss_hf = 0;
2017 rss_conf->rss_hf |= rss_type.ipv4 ?
2018 (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4) : 0;
2019 rss_conf->rss_hf |= rss_type.tcp_ipv4 ? RTE_ETH_RSS_NONFRAG_IPV4_TCP : 0;
2020 rss_conf->rss_hf |= rss_type.ipv6 ?
2021 (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6) : 0;
2022 rss_conf->rss_hf |= rss_type.ipv6_ext ? RTE_ETH_RSS_IPV6_EX : 0;
2023 rss_conf->rss_hf |= rss_type.tcp_ipv6 ? RTE_ETH_RSS_NONFRAG_IPV6_TCP : 0;
2024 rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? RTE_ETH_RSS_IPV6_TCP_EX : 0;
2025 rss_conf->rss_hf |= rss_type.udp_ipv4 ? RTE_ETH_RSS_NONFRAG_IPV4_UDP : 0;
2026 rss_conf->rss_hf |= rss_type.udp_ipv6 ? RTE_ETH_RSS_NONFRAG_IPV6_UDP : 0;
2032 * DPDK callback to update the RSS redirection table.
2035 * Pointer to Ethernet device structure.
2037 * Pointer to RSS reta configuration data.
2039 * Size of the RETA table.
2042 * 0 on success, negative error value otherwise.
2044 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
2045 struct rte_eth_rss_reta_entry64 *reta_conf,
2048 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2049 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2050 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
2051 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2056 if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG))
2059 if (reta_size != NIC_RSS_INDIR_SIZE) {
2060 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2064 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2068 /* update rss indir_tbl */
2069 for (i = 0; i < reta_size; i++) {
2070 idx = i / RTE_ETH_RETA_GROUP_SIZE;
2071 shift = i % RTE_ETH_RETA_GROUP_SIZE;
2073 if (reta_conf[idx].reta[shift] >= nic_dev->num_rq) {
2074 PMD_DRV_LOG(ERR, "Invalid reta entry, indirtbl[%d]: %d "
2075 "exceeds the maximum rxq num: %d", i,
2076 reta_conf[idx].reta[shift], nic_dev->num_rq);
2080 if (reta_conf[idx].mask & (1ULL << shift))
2081 indirtbl[i] = reta_conf[idx].reta[shift];
2084 err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2088 nic_dev->rss_indir_flag = true;
2093 memset(prio_tc, 0, sizeof(prio_tc));
2094 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2100 * DPDK callback to get the RSS indirection table.
2103 * Pointer to Ethernet device structure.
2105 * Pointer to RSS reta configuration data.
2107 * Size of the RETA table.
2110 * 0 on success, negative error value otherwise.
2112 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2113 struct rte_eth_rss_reta_entry64 *reta_conf,
2116 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2117 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2119 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2123 if (reta_size != NIC_RSS_INDIR_SIZE) {
2124 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
2128 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2130 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error: %d",
2135 for (i = 0; i < reta_size; i++) {
2136 idx = i / RTE_ETH_RETA_GROUP_SIZE;
2137 shift = i % RTE_ETH_RETA_GROUP_SIZE;
2138 if (reta_conf[idx].mask & (1ULL << shift))
2139 reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2146 * DPDK callback to get extended device statistics.
2149 * Pointer to Ethernet device.
2151 * Pointer to rte extended stats table.
2153 * The size of the stats table.
2156 * Number of extended stats on success and stats is filled,
2157 * negative error value otherwise.
2159 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2160 struct rte_eth_xstat *xstats,
2166 struct hinic_nic_dev *nic_dev;
2167 struct hinic_phy_port_stats port_stats;
2168 struct hinic_vport_stats vport_stats;
2169 struct hinic_rxq *rxq = NULL;
2170 struct hinic_rxq_stats rxq_stats;
2171 struct hinic_txq *txq = NULL;
2172 struct hinic_txq_stats txq_stats;
2174 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2175 count = hinic_xstats_calc_num(nic_dev);
2181 /* Get stats from hinic_rxq_stats */
2182 for (qid = 0; qid < nic_dev->num_rq; qid++) {
2183 rxq = nic_dev->rxqs[qid];
2184 hinic_rxq_get_stats(rxq, &rxq_stats);
2186 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2187 xstats[count].value =
2188 *(uint64_t *)(((char *)&rxq_stats) +
2189 hinic_rxq_stats_strings[i].offset);
2190 xstats[count].id = count;
2195 /* Get stats from hinic_txq_stats */
2196 for (qid = 0; qid < nic_dev->num_sq; qid++) {
2197 txq = nic_dev->txqs[qid];
2198 hinic_txq_get_stats(txq, &txq_stats);
2200 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2201 xstats[count].value =
2202 *(uint64_t *)(((char *)&txq_stats) +
2203 hinic_txq_stats_strings[i].offset);
2204 xstats[count].id = count;
2209 /* Get stats from hinic_vport_stats */
2210 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2214 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2215 xstats[count].value =
2216 *(uint64_t *)(((char *)&vport_stats) +
2217 hinic_vport_stats_strings[i].offset);
2218 xstats[count].id = count;
2222 if (HINIC_IS_VF(nic_dev->hwdev))
2225 /* Get stats from hinic_phy_port_stats */
2226 err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2230 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2231 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2232 hinic_phyport_stats_strings[i].offset);
2233 xstats[count].id = count;
2240 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2241 struct rte_eth_rxq_info *qinfo)
2243 struct hinic_rxq *rxq = dev->data->rx_queues[queue_id];
2245 qinfo->mp = rxq->mb_pool;
2246 qinfo->nb_desc = rxq->q_depth;
2249 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2250 struct rte_eth_txq_info *qinfo)
2252 struct hinic_txq *txq = dev->data->tx_queues[queue_id];
2254 qinfo->nb_desc = txq->q_depth;
2258 * DPDK callback to retrieve names of extended device statistics
2261 * Pointer to Ethernet device structure.
2262 * @param xstats_names
2263 * Buffer to insert names into.
2266 * Number of xstats names.
2268 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2269 struct rte_eth_xstat_name *xstats_names,
2270 __rte_unused unsigned int limit)
2272 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2276 if (xstats_names == NULL)
2277 return hinic_xstats_calc_num(nic_dev);
2279 /* get pmd rxq stats */
2280 for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2281 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2282 snprintf(xstats_names[count].name,
2283 sizeof(xstats_names[count].name),
2285 q_num, hinic_rxq_stats_strings[i].name);
2290 /* get pmd txq stats */
2291 for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2292 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2293 snprintf(xstats_names[count].name,
2294 sizeof(xstats_names[count].name),
2296 q_num, hinic_txq_stats_strings[i].name);
2301 /* get vport stats */
2302 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2303 snprintf(xstats_names[count].name,
2304 sizeof(xstats_names[count].name),
2305 "%s", hinic_vport_stats_strings[i].name);
2309 if (HINIC_IS_VF(nic_dev->hwdev))
2312 /* get phy port stats */
2313 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2314 snprintf(xstats_names[count].name,
2315 sizeof(xstats_names[count].name),
2316 "%s", hinic_phyport_stats_strings[i].name);
2324 * DPDK callback to set mac address
2327 * Pointer to Ethernet device structure.
2329 * Pointer to mac address
2331 * 0 on success, negative error value otherwise.
2333 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2334 struct rte_ether_addr *addr)
2336 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2340 func_id = hinic_global_func_id(nic_dev->hwdev);
2341 err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2342 addr->addr_bytes, 0, func_id);
2346 rte_ether_addr_copy(addr, &nic_dev->default_addr);
2348 PMD_DRV_LOG(INFO, "Set new mac address " RTE_ETHER_ADDR_PRT_FMT,
2349 RTE_ETHER_ADDR_BYTES(addr));
2355 * DPDK callback to remove a MAC address.
2358 * Pointer to Ethernet device structure.
2360 * MAC address index, should less than 128.
2362 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2364 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2368 if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2369 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2374 func_id = hinic_global_func_id(nic_dev->hwdev);
2375 ret = hinic_del_mac(nic_dev->hwdev,
2376 dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2380 memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2384 * DPDK callback to add a MAC address.
2387 * Pointer to Ethernet device structure.
2389 * Pointer to MAC address
2391 * MAC address index, should less than 128.
2393 * VMDq pool index(not used).
2396 * 0 on success, negative error value otherwise.
2398 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2399 struct rte_ether_addr *mac_addr, uint32_t index,
2400 __rte_unused uint32_t vmdq)
2402 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2407 if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2408 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range", index);
2412 /* First, make sure this address isn't already configured. */
2413 for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2414 /* Skip this index, it's going to be reconfigured. */
2418 if (memcmp(&dev->data->mac_addrs[i],
2419 mac_addr, sizeof(*mac_addr)))
2422 PMD_DRV_LOG(INFO, "MAC address already configured");
2426 func_id = hinic_global_func_id(nic_dev->hwdev);
2427 ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2431 dev->data->mac_addrs[index] = *mac_addr;
2436 * DPDK callback to set multicast mac address
2439 * Pointer to Ethernet device structure.
2440 * @param mc_addr_set
2441 * Pointer to multicast mac address
2445 * 0 on success, negative error value otherwise.
2447 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2448 struct rte_ether_addr *mc_addr_set,
2449 uint32_t nb_mc_addr)
2451 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2456 func_id = hinic_global_func_id(nic_dev->hwdev);
2458 /* delete old multi_cast addrs firstly */
2459 hinic_delete_mc_addr_list(nic_dev);
2461 if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2464 for (i = 0; i < nb_mc_addr; i++) {
2465 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2467 /* if add mc addr failed, set all multi_cast */
2469 hinic_delete_mc_addr_list(nic_dev);
2473 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2479 hinic_dev_allmulticast_enable(dev);
2485 * DPDK callback to get flow operations
2488 * Pointer to Ethernet device structure.
2490 * Pointer to operation-specific structure.
2493 * 0 on success, negative error value otherwise.
2495 static int hinic_dev_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
2496 const struct rte_flow_ops **ops)
2498 *ops = &hinic_flow_ops;
2502 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2504 struct nic_pause_config pause_config = {0};
2507 pause_config.auto_neg = 0;
2508 pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2509 pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2511 err = hinic_set_pause_config(nic_dev->hwdev, pause_config);
2515 nic_dev->pause_set = true;
2516 nic_dev->nic_pause.auto_neg = pause_config.auto_neg;
2517 nic_dev->nic_pause.rx_pause = pause_config.rx_pause;
2518 nic_dev->nic_pause.tx_pause = pause_config.tx_pause;
2523 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2525 u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2526 u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2527 u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2528 u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2529 u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2533 for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2536 return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2537 up_pgid, up_bw, up_strict);
2540 static int hinic_pf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)
2543 u8 valid_cos_bitmap;
2546 valid_cos_bitmap = hwdev->cfg_mgmt->svc_cap.valid_cos_bitmap;
2547 if (!valid_cos_bitmap) {
2548 PMD_DRV_LOG(ERR, "PF has none cos to support\n");
2552 for (i = 0; i < NR_MAX_COS; i++) {
2553 if (valid_cos_bitmap & BIT(i))
2554 default_cos = i; /* Find max cos id as default cos */
2557 *cos_id = default_cos;
2562 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2567 if (!HINIC_IS_VF(nic_dev->hwdev)) {
2568 err = hinic_pf_get_default_cos(nic_dev->hwdev, &cos_id);
2570 PMD_DRV_LOG(ERR, "Get PF default cos failed, err: %d",
2575 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2577 PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2583 nic_dev->default_cos = cos_id;
2585 PMD_DRV_LOG(INFO, "Default cos %d", nic_dev->default_cos);
2590 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2594 err = hinic_init_default_cos(nic_dev);
2598 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2601 /* Restore DCB configure to default status */
2602 err = hinic_set_default_dcb_feature(nic_dev);
2606 /* Set pause enable, and up will disable pfc. */
2607 err = hinic_set_default_pause_feature(nic_dev);
2611 err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2615 err = hinic_set_link_status_follow(nic_dev->hwdev,
2616 HINIC_LINK_FOLLOW_PORT);
2617 if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2618 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2622 return hinic_set_anti_attack(nic_dev->hwdev, true);
2625 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2627 struct hinic_board_info info = { 0 };
2630 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2633 rc = hinic_get_board_info(nic_dev->hwdev, &info);
2637 return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2641 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2643 nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2644 if (nic_dev->cpy_mpool == NULL) {
2645 nic_dev->cpy_mpool =
2646 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2647 HINIC_COPY_MEMPOOL_DEPTH,
2649 HINIC_COPY_MBUF_SIZE,
2651 if (!nic_dev->cpy_mpool) {
2652 PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2653 rte_errno, nic_dev->proc_dev_name);
2661 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2663 if (nic_dev->cpy_mpool != NULL)
2664 rte_mempool_free(nic_dev->cpy_mpool);
2667 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2672 /* allocate software txq array */
2673 txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2674 nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2675 if (!nic_dev->txqs) {
2676 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2680 /* allocate software rxq array */
2681 rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2682 nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2683 if (!nic_dev->rxqs) {
2685 kfree(nic_dev->txqs);
2686 nic_dev->txqs = NULL;
2688 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2695 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2697 kfree(nic_dev->txqs);
2698 nic_dev->txqs = NULL;
2700 kfree(nic_dev->rxqs);
2701 nic_dev->rxqs = NULL;
2704 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2706 struct hinic_nic_dev *nic_dev =
2707 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2710 nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2711 RTE_CACHE_LINE_SIZE);
2712 if (!nic_dev->hwdev) {
2713 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2714 eth_dev->data->name);
2717 nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2720 rc = hinic_osdep_init(nic_dev->hwdev);
2722 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2723 eth_dev->data->name);
2724 goto init_osdep_fail;
2728 rc = hinic_hwif_res_init(nic_dev->hwdev);
2730 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2731 eth_dev->data->name);
2732 goto init_hwif_fail;
2736 rc = init_cfg_mgmt(nic_dev->hwdev);
2738 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2739 eth_dev->data->name);
2740 goto init_cfgmgnt_fail;
2744 rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2746 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2747 eth_dev->data->name);
2748 goto init_aeqs_fail;
2751 /* init_pf_to_mgnt */
2752 rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2754 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2755 eth_dev->data->name);
2756 goto init_pf_to_mgmt_fail;
2760 rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2762 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2763 eth_dev->data->name);
2764 goto init_func_to_func_fail;
2767 rc = hinic_card_workmode_check(nic_dev);
2769 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2770 eth_dev->data->name);
2771 goto workmode_check_fail;
2774 /* do l2nic reset to make chip clear */
2775 rc = hinic_l2nic_reset(nic_dev->hwdev);
2777 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2778 eth_dev->data->name);
2779 goto l2nic_reset_fail;
2782 /* init dma and aeq msix attribute table */
2783 (void)hinic_init_attr_table(nic_dev->hwdev);
2786 rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2788 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2789 eth_dev->data->name);
2790 goto init_cmdq_fail;
2793 /* set hardware state active */
2794 rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2796 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2797 eth_dev->data->name);
2798 goto init_resources_state_fail;
2801 /* init_capability */
2802 rc = hinic_init_capability(nic_dev->hwdev);
2804 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2805 eth_dev->data->name);
2809 /* get nic capability */
2810 if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap)) {
2811 PMD_DRV_LOG(ERR, "Hw doesn't support nic, dev_name: %s",
2812 eth_dev->data->name);
2814 goto nic_check_fail;
2817 /* init root cla and function table */
2818 rc = hinic_init_nicio(nic_dev->hwdev);
2820 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2821 eth_dev->data->name);
2822 goto init_nicio_fail;
2825 /* init_software_txrxq */
2826 rc = hinic_init_sw_rxtxqs(nic_dev);
2828 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2829 eth_dev->data->name);
2830 goto init_sw_rxtxqs_fail;
2833 rc = hinic_copy_mempool_init(nic_dev);
2835 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2836 eth_dev->data->name);
2837 goto init_mpool_fail;
2840 /* set hardware feature to default status */
2841 rc = hinic_set_default_hw_feature(nic_dev);
2843 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2844 eth_dev->data->name);
2845 goto set_default_hw_feature_fail;
2850 set_default_hw_feature_fail:
2851 hinic_copy_mempool_uninit(nic_dev);
2854 hinic_deinit_sw_rxtxqs(nic_dev);
2856 init_sw_rxtxqs_fail:
2857 hinic_deinit_nicio(nic_dev->hwdev);
2862 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2864 init_resources_state_fail:
2865 hinic_comm_cmdqs_free(nic_dev->hwdev);
2869 workmode_check_fail:
2870 hinic_comm_func_to_func_free(nic_dev->hwdev);
2872 init_func_to_func_fail:
2873 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2875 init_pf_to_mgmt_fail:
2876 hinic_comm_aeqs_free(nic_dev->hwdev);
2879 free_cfg_mgmt(nic_dev->hwdev);
2882 hinic_hwif_res_free(nic_dev->hwdev);
2885 hinic_osdep_deinit(nic_dev->hwdev);
2888 rte_free(nic_dev->hwdev);
2889 nic_dev->hwdev = NULL;
2894 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2896 struct hinic_nic_dev *nic_dev =
2897 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2899 (void)hinic_set_link_status_follow(nic_dev->hwdev,
2900 HINIC_LINK_FOLLOW_DEFAULT);
2901 hinic_copy_mempool_uninit(nic_dev);
2902 hinic_deinit_sw_rxtxqs(nic_dev);
2903 hinic_deinit_nicio(nic_dev->hwdev);
2904 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2905 hinic_comm_cmdqs_free(nic_dev->hwdev);
2906 hinic_comm_func_to_func_free(nic_dev->hwdev);
2907 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2908 hinic_comm_aeqs_free(nic_dev->hwdev);
2909 free_cfg_mgmt(nic_dev->hwdev);
2910 hinic_hwif_res_free(nic_dev->hwdev);
2911 hinic_osdep_deinit(nic_dev->hwdev);
2912 rte_free(nic_dev->hwdev);
2913 nic_dev->hwdev = NULL;
2917 * DPDK callback to close the device.
2920 * Pointer to Ethernet device structure.
2922 static int hinic_dev_close(struct rte_eth_dev *dev)
2924 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2927 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2930 if (rte_bit_relaxed_test_and_set32(HINIC_DEV_CLOSE,
2931 &nic_dev->dev_status)) {
2932 PMD_DRV_LOG(WARNING, "Device %s already closed",
2937 /* stop device first */
2938 ret = hinic_dev_stop(dev);
2940 /* rx_cqe, rx_info */
2941 hinic_free_all_rx_resources(dev);
2944 hinic_free_all_tx_resources(dev);
2946 /* free wq, pi_dma_addr */
2947 hinic_free_all_rq(nic_dev);
2949 /* free wq, db_addr */
2950 hinic_free_all_sq(nic_dev);
2952 /* deinit mac vlan tbl */
2953 hinic_deinit_mac_addr(dev);
2954 hinic_remove_all_vlanid(dev);
2956 /* disable hardware and uio interrupt */
2957 hinic_disable_interrupt(dev);
2959 /* destroy rx mode mutex */
2960 hinic_mutex_destroy(&nic_dev->rx_mode_mutex);
2962 /* deinit nic hardware device */
2963 hinic_nic_dev_destroy(dev);
2968 static const struct eth_dev_ops hinic_pmd_ops = {
2969 .dev_configure = hinic_dev_configure,
2970 .dev_infos_get = hinic_dev_infos_get,
2971 .fw_version_get = hinic_fw_version_get,
2972 .rx_queue_setup = hinic_rx_queue_setup,
2973 .tx_queue_setup = hinic_tx_queue_setup,
2974 .dev_start = hinic_dev_start,
2975 .dev_set_link_up = hinic_dev_set_link_up,
2976 .dev_set_link_down = hinic_dev_set_link_down,
2977 .link_update = hinic_link_update,
2978 .rx_queue_release = hinic_rx_queue_release,
2979 .tx_queue_release = hinic_tx_queue_release,
2980 .dev_stop = hinic_dev_stop,
2981 .dev_close = hinic_dev_close,
2982 .mtu_set = hinic_dev_set_mtu,
2983 .vlan_filter_set = hinic_vlan_filter_set,
2984 .vlan_offload_set = hinic_vlan_offload_set,
2985 .allmulticast_enable = hinic_dev_allmulticast_enable,
2986 .allmulticast_disable = hinic_dev_allmulticast_disable,
2987 .promiscuous_enable = hinic_dev_promiscuous_enable,
2988 .promiscuous_disable = hinic_dev_promiscuous_disable,
2989 .flow_ctrl_get = hinic_flow_ctrl_get,
2990 .flow_ctrl_set = hinic_flow_ctrl_set,
2991 .rss_hash_update = hinic_rss_hash_update,
2992 .rss_hash_conf_get = hinic_rss_conf_get,
2993 .reta_update = hinic_rss_indirtbl_update,
2994 .reta_query = hinic_rss_indirtbl_query,
2995 .stats_get = hinic_dev_stats_get,
2996 .stats_reset = hinic_dev_stats_reset,
2997 .xstats_get = hinic_dev_xstats_get,
2998 .xstats_reset = hinic_dev_xstats_reset,
2999 .xstats_get_names = hinic_dev_xstats_get_names,
3000 .rxq_info_get = hinic_rxq_info_get,
3001 .txq_info_get = hinic_txq_info_get,
3002 .mac_addr_set = hinic_set_mac_addr,
3003 .mac_addr_remove = hinic_mac_addr_remove,
3004 .mac_addr_add = hinic_mac_addr_add,
3005 .set_mc_addr_list = hinic_set_mc_addr_list,
3006 .flow_ops_get = hinic_dev_flow_ops_get,
3009 static const struct eth_dev_ops hinic_pmd_vf_ops = {
3010 .dev_configure = hinic_dev_configure,
3011 .dev_infos_get = hinic_dev_infos_get,
3012 .fw_version_get = hinic_fw_version_get,
3013 .rx_queue_setup = hinic_rx_queue_setup,
3014 .tx_queue_setup = hinic_tx_queue_setup,
3015 .dev_start = hinic_dev_start,
3016 .link_update = hinic_link_update,
3017 .rx_queue_release = hinic_rx_queue_release,
3018 .tx_queue_release = hinic_tx_queue_release,
3019 .dev_stop = hinic_dev_stop,
3020 .dev_close = hinic_dev_close,
3021 .mtu_set = hinic_dev_set_mtu,
3022 .vlan_filter_set = hinic_vlan_filter_set,
3023 .vlan_offload_set = hinic_vlan_offload_set,
3024 .allmulticast_enable = hinic_dev_allmulticast_enable,
3025 .allmulticast_disable = hinic_dev_allmulticast_disable,
3026 .rss_hash_update = hinic_rss_hash_update,
3027 .rss_hash_conf_get = hinic_rss_conf_get,
3028 .reta_update = hinic_rss_indirtbl_update,
3029 .reta_query = hinic_rss_indirtbl_query,
3030 .stats_get = hinic_dev_stats_get,
3031 .stats_reset = hinic_dev_stats_reset,
3032 .xstats_get = hinic_dev_xstats_get,
3033 .xstats_reset = hinic_dev_xstats_reset,
3034 .xstats_get_names = hinic_dev_xstats_get_names,
3035 .rxq_info_get = hinic_rxq_info_get,
3036 .txq_info_get = hinic_txq_info_get,
3037 .mac_addr_set = hinic_set_mac_addr,
3038 .mac_addr_remove = hinic_mac_addr_remove,
3039 .mac_addr_add = hinic_mac_addr_add,
3040 .set_mc_addr_list = hinic_set_mc_addr_list,
3041 .flow_ops_get = hinic_dev_flow_ops_get,
3044 static const struct eth_dev_ops hinic_dev_sec_ops = {
3045 .dev_infos_get = hinic_dev_infos_get,
3048 static int hinic_func_init(struct rte_eth_dev *eth_dev)
3050 struct rte_pci_device *pci_dev;
3051 struct rte_ether_addr *eth_addr;
3052 struct hinic_nic_dev *nic_dev;
3053 struct hinic_filter_info *filter_info;
3054 struct hinic_tcam_info *tcam_info;
3058 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3060 /* EAL is SECONDARY and eth_dev is already created */
3061 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
3062 eth_dev->dev_ops = &hinic_dev_sec_ops;
3063 PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
3064 eth_dev->data->name);
3069 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
3071 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
3072 memset(nic_dev, 0, sizeof(*nic_dev));
3074 snprintf(nic_dev->proc_dev_name,
3075 sizeof(nic_dev->proc_dev_name),
3076 "hinic-%.4x:%.2x:%.2x.%x",
3077 pci_dev->addr.domain, pci_dev->addr.bus,
3078 pci_dev->addr.devid, pci_dev->addr.function);
3080 /* alloc mac_addrs */
3081 mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3082 eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
3084 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
3085 eth_dev->data->name);
3089 eth_dev->data->mac_addrs = eth_addr;
3091 mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
3092 nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
3093 if (!nic_dev->mc_list) {
3094 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
3095 eth_dev->data->name);
3100 /* create hardware nic_device */
3101 rc = hinic_nic_dev_create(eth_dev);
3103 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3104 eth_dev->data->name);
3105 goto create_nic_dev_fail;
3108 if (HINIC_IS_VF(nic_dev->hwdev))
3109 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3111 eth_dev->dev_ops = &hinic_pmd_ops;
3113 rc = hinic_init_mac_addr(eth_dev);
3115 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3116 eth_dev->data->name);
3120 /* register callback func to eal lib */
3121 rc = rte_intr_callback_register(pci_dev->intr_handle,
3122 hinic_dev_interrupt_handler,
3125 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3126 eth_dev->data->name);
3127 goto reg_intr_cb_fail;
3130 /* enable uio/vfio intr/eventfd mapping */
3131 rc = rte_intr_enable(pci_dev->intr_handle);
3133 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3134 eth_dev->data->name);
3135 goto enable_intr_fail;
3137 rte_bit_relaxed_set32(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3139 hinic_mutex_init(&nic_dev->rx_mode_mutex, NULL);
3141 /* initialize filter info */
3142 filter_info = &nic_dev->filter;
3143 tcam_info = &nic_dev->tcam;
3144 memset(filter_info, 0, sizeof(struct hinic_filter_info));
3145 memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
3146 /* initialize 5tuple filter list */
3147 TAILQ_INIT(&filter_info->fivetuple_list);
3148 TAILQ_INIT(&tcam_info->tcam_list);
3149 TAILQ_INIT(&nic_dev->filter_ntuple_list);
3150 TAILQ_INIT(&nic_dev->filter_ethertype_list);
3151 TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3152 TAILQ_INIT(&nic_dev->hinic_flow_list);
3154 rte_bit_relaxed_set32(HINIC_DEV_INIT, &nic_dev->dev_status);
3155 PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3156 eth_dev->data->name);
3161 (void)rte_intr_callback_unregister(pci_dev->intr_handle,
3162 hinic_dev_interrupt_handler,
3166 hinic_deinit_mac_addr(eth_dev);
3169 eth_dev->dev_ops = NULL;
3170 hinic_nic_dev_destroy(eth_dev);
3172 create_nic_dev_fail:
3173 rte_free(nic_dev->mc_list);
3174 nic_dev->mc_list = NULL;
3178 eth_dev->data->mac_addrs = NULL;
3181 PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3182 eth_dev->data->name);
3186 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3188 struct rte_pci_device *pci_dev;
3190 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3192 PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3193 pci_dev->addr.domain, pci_dev->addr.bus,
3194 pci_dev->addr.devid, pci_dev->addr.function,
3195 (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3196 "primary" : "secondary");
3198 /* rte_eth_dev rx_burst and tx_burst */
3199 eth_dev->rx_pkt_burst = hinic_recv_pkts;
3200 eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3202 return hinic_func_init(eth_dev);
3205 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3207 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3210 hinic_dev_close(dev);
3215 static struct rte_pci_id pci_id_hinic_map[] = {
3216 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3217 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3218 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3219 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3220 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3221 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3222 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3226 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3227 struct rte_pci_device *pci_dev)
3229 return rte_eth_dev_pci_generic_probe(pci_dev,
3230 sizeof(struct hinic_nic_dev), hinic_dev_init);
3233 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3235 return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3238 static struct rte_pci_driver rte_hinic_pmd = {
3239 .id_table = pci_id_hinic_map,
3240 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3241 .probe = hinic_pci_probe,
3242 .remove = hinic_pci_remove,
3245 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3246 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3247 RTE_LOG_REGISTER_DEFAULT(hinic_logtype, INFO);