1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
6 #include <rte_bus_pci.h>
7 #include <rte_ethdev_pci.h>
9 #include <rte_malloc.h>
10 #include <rte_memcpy.h>
11 #include <rte_mempool.h>
12 #include <rte_errno.h>
13 #include <rte_ether.h>
15 #include "base/hinic_compat.h"
16 #include "base/hinic_pmd_hwdev.h"
17 #include "base/hinic_pmd_hwif.h"
18 #include "base/hinic_pmd_wq.h"
19 #include "base/hinic_pmd_cfg.h"
20 #include "base/hinic_pmd_mgmt.h"
21 #include "base/hinic_pmd_cmdq.h"
22 #include "base/hinic_pmd_niccfg.h"
23 #include "base/hinic_pmd_nicio.h"
24 #include "base/hinic_pmd_mbox.h"
25 #include "hinic_pmd_ethdev.h"
26 #include "hinic_pmd_tx.h"
27 #include "hinic_pmd_rx.h"
29 /* Vendor ID used by Huawei devices */
30 #define HINIC_HUAWEI_VENDOR_ID 0x19E5
33 #define HINIC_DEV_ID_PRD 0x1822
34 #define HINIC_DEV_ID_VF 0x375E
35 #define HINIC_DEV_ID_VF_HV 0x379E
37 /* Mezz card for Blade Server */
38 #define HINIC_DEV_ID_MEZZ_25GE 0x0210
39 #define HINIC_DEV_ID_MEZZ_100GE 0x0205
41 /* 2*25G and 2*100G card */
42 #define HINIC_DEV_ID_1822_DUAL_25GE 0x0206
43 #define HINIC_DEV_ID_1822_100GE 0x0200
45 #define HINIC_SERVICE_MODE_NIC 2
47 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
49 #define DEFAULT_BASE_COS 4
52 #define HINIC_MIN_RX_BUF_SIZE 1024
53 #define HINIC_MAX_UC_MAC_ADDRS 128
54 #define HINIC_MAX_MC_MAC_ADDRS 2048
56 #define HINIC_DEFAULT_BURST_SIZE 32
57 #define HINIC_DEFAULT_NB_QUEUES 1
58 #define HINIC_DEFAULT_RING_SIZE 1024
59 #define HINIC_MAX_LRO_SIZE 65536
62 * vlan_id is a 12 bit number.
63 * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
64 * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
65 * The higher 7 bit val specifies VFTA array index.
67 #define HINIC_VFTA_BIT(vlan_id) (1 << ((vlan_id) & 0x1F))
68 #define HINIC_VFTA_IDX(vlan_id) ((vlan_id) >> 5)
70 #define HINIC_VLAN_FILTER_EN (1U << 0)
72 #define HINIC_MTU_TO_PKTLEN(mtu) \
73 ((mtu) + ETH_HLEN + ETH_CRC_LEN)
75 #define HINIC_PKTLEN_TO_MTU(pktlen) \
76 ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
78 /* lro numer limit for one packet */
79 #define HINIC_LRO_WQE_NUM_DEFAULT 8
81 /* Driver-specific log messages type */
84 struct hinic_xstats_name_off {
85 char name[RTE_ETH_XSTATS_NAME_SIZE];
89 #define HINIC_FUNC_STAT(_stat_item) { \
90 .name = #_stat_item, \
91 .offset = offsetof(struct hinic_vport_stats, _stat_item) \
94 #define HINIC_PORT_STAT(_stat_item) { \
95 .name = #_stat_item, \
96 .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
99 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
100 HINIC_FUNC_STAT(tx_unicast_pkts_vport),
101 HINIC_FUNC_STAT(tx_unicast_bytes_vport),
102 HINIC_FUNC_STAT(tx_multicast_pkts_vport),
103 HINIC_FUNC_STAT(tx_multicast_bytes_vport),
104 HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
105 HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
107 HINIC_FUNC_STAT(rx_unicast_pkts_vport),
108 HINIC_FUNC_STAT(rx_unicast_bytes_vport),
109 HINIC_FUNC_STAT(rx_multicast_pkts_vport),
110 HINIC_FUNC_STAT(rx_multicast_bytes_vport),
111 HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
112 HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
114 HINIC_FUNC_STAT(tx_discard_vport),
115 HINIC_FUNC_STAT(rx_discard_vport),
116 HINIC_FUNC_STAT(tx_err_vport),
117 HINIC_FUNC_STAT(rx_err_vport),
120 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
121 sizeof(hinic_vport_stats_strings[0]))
123 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
124 HINIC_PORT_STAT(mac_rx_total_pkt_num),
125 HINIC_PORT_STAT(mac_rx_total_oct_num),
126 HINIC_PORT_STAT(mac_rx_bad_pkt_num),
127 HINIC_PORT_STAT(mac_rx_bad_oct_num),
128 HINIC_PORT_STAT(mac_rx_good_pkt_num),
129 HINIC_PORT_STAT(mac_rx_good_oct_num),
130 HINIC_PORT_STAT(mac_rx_uni_pkt_num),
131 HINIC_PORT_STAT(mac_rx_multi_pkt_num),
132 HINIC_PORT_STAT(mac_rx_broad_pkt_num),
133 HINIC_PORT_STAT(mac_tx_total_pkt_num),
134 HINIC_PORT_STAT(mac_tx_total_oct_num),
135 HINIC_PORT_STAT(mac_tx_bad_pkt_num),
136 HINIC_PORT_STAT(mac_tx_bad_oct_num),
137 HINIC_PORT_STAT(mac_tx_good_pkt_num),
138 HINIC_PORT_STAT(mac_tx_good_oct_num),
139 HINIC_PORT_STAT(mac_tx_uni_pkt_num),
140 HINIC_PORT_STAT(mac_tx_multi_pkt_num),
141 HINIC_PORT_STAT(mac_tx_broad_pkt_num),
142 HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
143 HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
144 HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
145 HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
146 HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
147 HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
148 HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
149 HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
150 HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
151 HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
152 HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
153 HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
154 HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
155 HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
156 HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
157 HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
158 HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
159 HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
160 HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
161 HINIC_PORT_STAT(mac_rx_mac_pause_num),
162 HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
163 HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
164 HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
165 HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
166 HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
167 HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
168 HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
169 HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
170 HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
171 HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
172 HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
173 HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
174 HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
175 HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
176 HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
177 HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
178 HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
179 HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
180 HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
181 HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
182 HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
183 HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
184 HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
185 HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
186 HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
187 HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
188 HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
189 HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
190 HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
191 HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
192 HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
193 HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
194 HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
195 HINIC_PORT_STAT(mac_tx_mac_pause_num),
196 HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
197 HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
198 HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
199 HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
200 HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
201 HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
202 HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
203 HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
204 HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
205 HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
206 HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
207 HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
208 HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
211 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
212 sizeof(hinic_phyport_stats_strings[0]))
214 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
215 {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
216 {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
219 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
220 sizeof(hinic_rxq_stats_strings[0]))
222 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
223 {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
224 {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
225 {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
226 {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
227 {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
230 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
231 sizeof(hinic_txq_stats_strings[0]))
233 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
235 if (HINIC_IS_VF(nic_dev->hwdev)) {
236 return (HINIC_VPORT_XSTATS_NUM +
237 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
238 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
240 return (HINIC_VPORT_XSTATS_NUM +
241 HINIC_PHYPORT_XSTATS_NUM +
242 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
243 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
247 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
248 .nb_max = HINIC_MAX_QUEUE_DEPTH,
249 .nb_min = HINIC_MIN_QUEUE_DEPTH,
250 .nb_align = HINIC_RXD_ALIGN,
253 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
254 .nb_max = HINIC_MAX_QUEUE_DEPTH,
255 .nb_min = HINIC_MIN_QUEUE_DEPTH,
256 .nb_align = HINIC_TXD_ALIGN,
259 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
262 * Interrupt handler triggered by NIC for handling
265 * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
267 static void hinic_dev_interrupt_handler(void *param)
269 struct rte_eth_dev *dev = param;
270 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
272 if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
273 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
274 nic_dev->proc_dev_name, dev->data->port_id);
278 /* aeq0 msg handler */
279 hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
283 * Ethernet device configuration.
285 * Prepare the driver for a given number of TX and RX queues, mtu size
289 * Pointer to Ethernet device structure.
292 * 0 on success, negative error value otherwise.
294 static int hinic_dev_configure(struct rte_eth_dev *dev)
296 struct hinic_nic_dev *nic_dev;
297 struct hinic_nic_io *nic_io;
300 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
301 nic_io = nic_dev->hwdev->nic_io;
303 nic_dev->num_sq = dev->data->nb_tx_queues;
304 nic_dev->num_rq = dev->data->nb_rx_queues;
306 nic_io->num_sqs = dev->data->nb_tx_queues;
307 nic_io->num_rqs = dev->data->nb_rx_queues;
309 /* queue pair is max_num(sq, rq) */
310 nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
311 nic_dev->num_sq : nic_dev->num_rq;
312 nic_io->num_qps = nic_dev->num_qps;
314 if (nic_dev->num_qps > nic_io->max_qps) {
316 "Queue number out of range, get queue_num:%d, max_queue_num:%d",
317 nic_dev->num_qps, nic_io->max_qps);
321 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
322 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
324 /* mtu size is 256~9600 */
325 if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
326 dev->data->dev_conf.rxmode.max_rx_pkt_len >
327 HINIC_MAX_JUMBO_FRAME_SIZE) {
329 "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
330 "expect between %d and %d",
331 dev->data->dev_conf.rxmode.max_rx_pkt_len,
332 HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
337 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
340 err = hinic_config_mq_mode(dev, TRUE);
342 PMD_DRV_LOG(ERR, "Config multi-queue failed");
346 /* init vlan offoad */
347 err = hinic_vlan_offload_set(dev,
348 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
350 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
351 (void)hinic_config_mq_mode(dev, FALSE);
355 /*clear fdir filter flag in function table*/
356 hinic_free_fdir_filter(nic_dev);
362 * DPDK callback to create the receive queue.
365 * Pointer to Ethernet device structure.
369 * Number of descriptors for receive queue.
371 * NUMA socket on which memory must be allocated.
373 * Thresholds parameters (unused_).
375 * Memory pool for buffer allocations.
378 * 0 on success, negative error value otherwise.
380 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
381 uint16_t nb_desc, unsigned int socket_id,
382 __rte_unused const struct rte_eth_rxconf *rx_conf,
383 struct rte_mempool *mp)
386 struct hinic_nic_dev *nic_dev;
387 struct hinic_hwdev *hwdev;
388 struct hinic_rxq *rxq;
389 u16 rq_depth, rx_free_thresh;
392 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
393 hwdev = nic_dev->hwdev;
395 /* queue depth must be power of 2, otherwise will be aligned up */
396 rq_depth = (nb_desc & (nb_desc - 1)) ?
397 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
400 * Validate number of receive descriptors.
401 * It must not exceed hardware maximum and minimum.
403 if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
404 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
405 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
406 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
407 (int)nb_desc, (int)rq_depth,
408 (int)dev->data->port_id, (int)queue_idx);
413 * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
414 * descriptors are used or if the number of descriptors required
415 * to transmit a packet is greater than the number of free RX
417 * The following constraints must be satisfied:
418 * rx_free_thresh must be greater than 0.
419 * rx_free_thresh must be less than the size of the ring minus 1.
420 * When set to zero use default values.
422 rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
423 rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
424 if (rx_free_thresh >= (rq_depth - 1)) {
425 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
426 (unsigned int)rx_free_thresh,
427 (int)dev->data->port_id,
432 rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
433 RTE_CACHE_LINE_SIZE, socket_id);
435 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
436 queue_idx, dev->data->name);
439 nic_dev->rxqs[queue_idx] = rxq;
441 /* alloc rx sq hw wqepage*/
442 rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
444 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
445 queue_idx, dev->data->name, rq_depth);
449 /* mbuf pool must be assigned before setup rx resources */
453 hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
454 RTE_PKTMBUF_HEADROOM, &buf_size);
456 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
458 goto adjust_bufsize_fail;
461 /* rx queue info, rearm control */
462 rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
463 rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
464 rxq->nic_dev = nic_dev;
465 rxq->q_id = queue_idx;
466 rxq->q_depth = rq_depth;
467 rxq->buf_len = (u16)buf_size;
468 rxq->rx_free_thresh = rx_free_thresh;
469 rxq->socket_id = socket_id;
471 /* the last point cant do mbuf rearm in bulk */
472 rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
474 /* device port identifier */
475 rxq->port_id = dev->data->port_id;
477 /* alloc rx_cqe and prepare rq_wqe */
478 rc = hinic_setup_rx_resources(rxq);
480 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
481 queue_idx, dev->data->name);
482 goto setup_rx_res_err;
485 /* record nic_dev rxq in rte_eth rx_queues */
486 dev->data->rx_queues[queue_idx] = rxq;
492 hinic_destroy_rq(hwdev, queue_idx);
500 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
502 struct hinic_rxq *rxq;
503 struct hinic_nic_dev *nic_dev;
506 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
508 for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
509 rxq = dev->data->rx_queues[q_id];
511 rxq->wq->cons_idx = 0;
512 rxq->wq->prod_idx = 0;
513 rxq->wq->delta = rxq->q_depth;
514 rxq->wq->mask = rxq->q_depth - 1;
516 /* alloc mbuf to rq */
517 hinic_rx_alloc_pkts(rxq);
522 * DPDK callback to configure the transmit queue.
525 * Pointer to Ethernet device structure.
527 * Transmit queue index.
529 * Number of descriptors for transmit queue.
531 * NUMA socket on which memory must be allocated.
533 * Tx queue configuration parameters.
536 * 0 on success, negative error value otherwise.
538 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
539 uint16_t nb_desc, unsigned int socket_id,
540 __rte_unused const struct rte_eth_txconf *tx_conf)
543 struct hinic_nic_dev *nic_dev;
544 struct hinic_hwdev *hwdev;
545 struct hinic_txq *txq;
546 u16 sq_depth, tx_free_thresh;
548 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
549 hwdev = nic_dev->hwdev;
551 /* queue depth must be power of 2, otherwise will be aligned up */
552 sq_depth = (nb_desc & (nb_desc - 1)) ?
553 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
556 * Validate number of transmit descriptors.
557 * It must not exceed hardware maximum and minimum.
559 if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
560 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
561 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
562 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
563 (int)nb_desc, (int)sq_depth,
564 (int)dev->data->port_id, (int)queue_idx);
569 * The TX descriptor ring will be cleaned after txq->tx_free_thresh
570 * descriptors are used or if the number of descriptors required
571 * to transmit a packet is greater than the number of free TX
573 * The following constraints must be satisfied:
574 * tx_free_thresh must be greater than 0.
575 * tx_free_thresh must be less than the size of the ring minus 1.
576 * When set to zero use default values.
578 tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
579 tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
580 if (tx_free_thresh >= (sq_depth - 1)) {
581 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
582 (unsigned int)tx_free_thresh, (int)dev->data->port_id,
587 txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
588 RTE_CACHE_LINE_SIZE, socket_id);
590 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
591 queue_idx, dev->data->name);
594 nic_dev->txqs[queue_idx] = txq;
596 /* alloc tx sq hw wqepage */
597 rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
599 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
600 queue_idx, dev->data->name, sq_depth);
604 txq->q_id = queue_idx;
605 txq->q_depth = sq_depth;
606 txq->port_id = dev->data->port_id;
607 txq->tx_free_thresh = tx_free_thresh;
608 txq->nic_dev = nic_dev;
609 txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
610 txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
611 txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
612 txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
613 txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
614 sizeof(struct hinic_sq_bufdesc);
615 txq->cos = nic_dev->default_cos;
616 txq->socket_id = socket_id;
618 /* alloc software txinfo */
619 rc = hinic_setup_tx_resources(txq);
621 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
622 queue_idx, dev->data->name);
623 goto setup_tx_res_fail;
626 /* record nic_dev txq in rte_eth tx_queues */
627 dev->data->tx_queues[queue_idx] = txq;
632 hinic_destroy_sq(hwdev, queue_idx);
640 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
642 struct hinic_nic_dev *nic_dev;
643 struct hinic_txq *txq;
644 struct hinic_nic_io *nic_io;
645 struct hinic_hwdev *hwdev;
646 volatile u32 *ci_addr;
649 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
650 hwdev = nic_dev->hwdev;
651 nic_io = hwdev->nic_io;
653 for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
654 txq = dev->data->tx_queues[q_id];
656 txq->wq->cons_idx = 0;
657 txq->wq->prod_idx = 0;
658 txq->wq->delta = txq->q_depth;
659 txq->wq->mask = txq->q_depth - 1;
661 /* clear hardware ci */
662 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
669 * Get link speed from NIC.
672 * Pointer to Ethernet device structure.
674 * Pointer to link speed structure.
676 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
678 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
679 u32 supported_link, advertised_link;
682 #define HINIC_LINK_MODE_SUPPORT_1G (1U << HINIC_GE_BASE_KX)
684 #define HINIC_LINK_MODE_SUPPORT_10G (1U << HINIC_10GE_BASE_KR)
686 #define HINIC_LINK_MODE_SUPPORT_25G ((1U << HINIC_25GE_BASE_KR_S) | \
687 (1U << HINIC_25GE_BASE_CR_S) | \
688 (1U << HINIC_25GE_BASE_KR) | \
689 (1U << HINIC_25GE_BASE_CR))
691 #define HINIC_LINK_MODE_SUPPORT_40G ((1U << HINIC_40GE_BASE_KR4) | \
692 (1U << HINIC_40GE_BASE_CR4))
694 #define HINIC_LINK_MODE_SUPPORT_100G ((1U << HINIC_100GE_BASE_KR4) | \
695 (1U << HINIC_100GE_BASE_CR4))
697 err = hinic_get_link_mode(nic_dev->hwdev,
698 &supported_link, &advertised_link);
699 if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
700 advertised_link == HINIC_SUPPORTED_UNKNOWN) {
701 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
702 nic_dev->proc_dev_name, dev->data->port_id);
705 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
706 *speed_capa |= ETH_LINK_SPEED_1G;
707 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
708 *speed_capa |= ETH_LINK_SPEED_10G;
709 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
710 *speed_capa |= ETH_LINK_SPEED_25G;
711 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
712 *speed_capa |= ETH_LINK_SPEED_40G;
713 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
714 *speed_capa |= ETH_LINK_SPEED_100G;
719 * DPDK callback to get information about the device.
722 * Pointer to Ethernet device structure.
724 * Pointer to Info structure output buffer.
727 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
729 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
731 info->max_rx_queues = nic_dev->nic_cap.max_rqs;
732 info->max_tx_queues = nic_dev->nic_cap.max_sqs;
733 info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
734 info->max_rx_pktlen = HINIC_MAX_JUMBO_FRAME_SIZE;
735 info->max_mac_addrs = HINIC_MAX_UC_MAC_ADDRS;
736 info->min_mtu = HINIC_MIN_MTU_SIZE;
737 info->max_mtu = HINIC_MAX_MTU_SIZE;
738 info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
740 hinic_get_speed_capa(dev, &info->speed_capa);
741 info->rx_queue_offload_capa = 0;
742 info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
743 DEV_RX_OFFLOAD_IPV4_CKSUM |
744 DEV_RX_OFFLOAD_UDP_CKSUM |
745 DEV_RX_OFFLOAD_TCP_CKSUM |
746 DEV_RX_OFFLOAD_VLAN_FILTER |
747 DEV_RX_OFFLOAD_SCATTER |
748 DEV_RX_OFFLOAD_JUMBO_FRAME |
749 DEV_RX_OFFLOAD_TCP_LRO |
750 DEV_RX_OFFLOAD_RSS_HASH;
752 info->tx_queue_offload_capa = 0;
753 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
754 DEV_TX_OFFLOAD_IPV4_CKSUM |
755 DEV_TX_OFFLOAD_UDP_CKSUM |
756 DEV_TX_OFFLOAD_TCP_CKSUM |
757 DEV_TX_OFFLOAD_SCTP_CKSUM |
758 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
759 DEV_TX_OFFLOAD_TCP_TSO |
760 DEV_TX_OFFLOAD_MULTI_SEGS;
762 info->hash_key_size = HINIC_RSS_KEY_SIZE;
763 info->reta_size = HINIC_RSS_INDIR_SIZE;
764 info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
765 info->rx_desc_lim = hinic_rx_desc_lim;
766 info->tx_desc_lim = hinic_tx_desc_lim;
768 /* Driver-preferred Rx/Tx parameters */
769 info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
770 info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
771 info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
772 info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
773 info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
774 info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
779 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
782 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
783 char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
786 err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
788 PMD_DRV_LOG(ERR, "Failed to get fw version\n");
792 if (fw_size < strlen(fw_ver) + 1)
793 return (strlen(fw_ver) + 1);
795 snprintf(fw_version, fw_size, "%s", fw_ver);
800 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
804 err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
806 PMD_DRV_LOG(ERR, "Failed to set rx mode");
809 nic_dev->rx_mode_status = rx_mode_ctrl;
814 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
816 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
819 /* rx configure, if rss enable, need to init default configuration */
820 err = hinic_rx_configure(dev);
822 PMD_DRV_LOG(ERR, "Configure rss failed");
827 err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
829 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
830 HINIC_DEFAULT_RX_MODE);
831 goto set_rx_mode_fail;
837 hinic_rx_remove_configure(dev);
842 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
844 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
846 (void)hinic_config_rx_mode(nic_dev, 0);
847 hinic_rx_remove_configure(dev);
850 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
851 struct rte_eth_link *link)
854 u8 port_link_status = 0;
855 struct nic_port_info port_link_info;
856 struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
857 uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
858 ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
859 ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
860 ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
862 rc = hinic_get_link_status(nic_hwdev, &port_link_status);
866 if (!port_link_status) {
867 link->link_status = ETH_LINK_DOWN;
868 link->link_speed = 0;
869 link->link_duplex = ETH_LINK_HALF_DUPLEX;
870 link->link_autoneg = ETH_LINK_FIXED;
874 memset(&port_link_info, 0, sizeof(port_link_info));
875 rc = hinic_get_port_info(nic_hwdev, &port_link_info);
879 link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
880 link->link_duplex = port_link_info.duplex;
881 link->link_autoneg = port_link_info.autoneg_state;
882 link->link_status = port_link_status;
888 * DPDK callback to retrieve physical link information.
891 * Pointer to Ethernet device structure.
892 * @param wait_to_complete
893 * Wait for request completion.
896 * 0 link status changed, -1 link status not changed
898 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
900 #define CHECK_INTERVAL 10 /* 10ms */
901 #define MAX_REPEAT_TIME 100 /* 1s (100 * 10ms) in total */
903 struct rte_eth_link link;
904 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
905 unsigned int rep_cnt = MAX_REPEAT_TIME;
907 memset(&link, 0, sizeof(link));
909 /* Get link status information from hardware */
910 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
911 if (rc != HINIC_OK) {
912 link.link_speed = ETH_SPEED_NUM_NONE;
913 link.link_duplex = ETH_LINK_FULL_DUPLEX;
914 PMD_DRV_LOG(ERR, "Get link status failed");
918 if (!wait_to_complete || link.link_status)
921 rte_delay_ms(CHECK_INTERVAL);
925 rc = rte_eth_linkstatus_set(dev, &link);
930 * DPDK callback to bring the link UP.
933 * Pointer to Ethernet device structure.
936 * 0 on success, negative errno value on failure.
938 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
940 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
943 ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
945 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
946 nic_dev->proc_dev_name, dev->data->port_id);
950 /* link status follow phy port status, up will open pma */
951 ret = hinic_set_port_enable(nic_dev->hwdev, true);
953 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
954 nic_dev->proc_dev_name, dev->data->port_id);
960 * DPDK callback to bring the link DOWN.
963 * Pointer to Ethernet device structure.
966 * 0 on success, negative errno value on failure.
968 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
970 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
973 ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
975 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
976 nic_dev->proc_dev_name, dev->data->port_id);
980 /* link status follow phy port status, up will close pma */
981 ret = hinic_set_port_enable(nic_dev->hwdev, false);
983 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
984 nic_dev->proc_dev_name, dev->data->port_id);
990 * DPDK callback to start the device.
993 * Pointer to Ethernet device structure.
996 * 0 on success, negative errno value on failure.
998 static int hinic_dev_start(struct rte_eth_dev *dev)
1002 struct hinic_nic_dev *nic_dev;
1004 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1005 name = dev->data->name;
1007 /* reset rx and tx queue */
1008 hinic_reset_rx_queue(dev);
1009 hinic_reset_tx_queue(dev);
1011 /* get func rx buf size */
1012 hinic_get_func_rx_buf_size(nic_dev);
1014 /* init txq and rxq context */
1015 rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1017 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
1023 rc = hinic_config_mq_mode(dev, TRUE);
1025 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1027 goto cfg_mq_mode_fail;
1030 /* set default mtu */
1031 rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1033 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1034 nic_dev->mtu_size, name);
1038 /* configure rss rx_mode and other rx or tx default feature */
1039 rc = hinic_rxtx_configure(dev);
1041 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1046 /* reactive pf status, so that uP report asyn event */
1047 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1049 /* open virtual port and ready to start packet receiving */
1050 rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1052 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1056 /* open physical port and start packet receiving */
1057 rc = hinic_set_port_enable(nic_dev->hwdev, true);
1059 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
1064 /* update eth_dev link status */
1065 if (dev->data->dev_conf.intr_conf.lsc != 0)
1066 (void)hinic_link_update(dev, 0);
1068 hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
1073 (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1076 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1078 /* Flush tx && rx chip resources in case of set vport fake fail */
1079 (void)hinic_flush_qp_res(nic_dev->hwdev);
1082 hinic_remove_rxtx_configure(dev);
1087 hinic_free_qp_ctxts(nic_dev->hwdev);
1090 hinic_free_all_rx_mbuf(dev);
1091 hinic_free_all_tx_mbuf(dev);
1097 * DPDK callback to release the receive queue.
1100 * Generic receive queue pointer.
1102 static void hinic_rx_queue_release(void *queue)
1104 struct hinic_rxq *rxq = queue;
1105 struct hinic_nic_dev *nic_dev;
1108 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1111 nic_dev = rxq->nic_dev;
1113 /* free rxq_pkt mbuf */
1114 hinic_free_all_rx_mbufs(rxq);
1116 /* free rxq_cqe, rxq_info */
1117 hinic_free_rx_resources(rxq);
1119 /* free root rq wq */
1120 hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1122 nic_dev->rxqs[rxq->q_id] = NULL;
1129 * DPDK callback to release the transmit queue.
1132 * Generic transmit queue pointer.
1134 static void hinic_tx_queue_release(void *queue)
1136 struct hinic_txq *txq = queue;
1137 struct hinic_nic_dev *nic_dev;
1140 PMD_DRV_LOG(WARNING, "Txq is null when release");
1143 nic_dev = txq->nic_dev;
1145 /* free txq_pkt mbuf */
1146 hinic_free_all_tx_mbufs(txq);
1149 hinic_free_tx_resources(txq);
1151 /* free root sq wq */
1152 hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1153 nic_dev->txqs[txq->q_id] = NULL;
1159 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1163 for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1164 hinic_destroy_rq(nic_dev->hwdev, q_id);
1167 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1171 for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1172 hinic_destroy_sq(nic_dev->hwdev, q_id);
1176 * DPDK callback to stop the device.
1179 * Pointer to Ethernet device structure.
1181 static void hinic_dev_stop(struct rte_eth_dev *dev)
1186 struct hinic_nic_dev *nic_dev;
1187 struct rte_eth_link link;
1189 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1190 name = dev->data->name;
1191 port_id = dev->data->port_id;
1193 if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1194 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1198 /* just stop phy port and vport */
1199 rc = hinic_set_port_enable(nic_dev->hwdev, false);
1201 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1204 rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1206 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1209 /* Clear recorded link status */
1210 memset(&link, 0, sizeof(link));
1211 (void)rte_eth_linkstatus_set(dev, &link);
1213 /* flush pending io request */
1214 rc = hinic_rx_tx_flush(nic_dev->hwdev);
1216 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1219 /* clean rss table and rx_mode */
1220 hinic_remove_rxtx_configure(dev);
1222 /* clean root context */
1223 hinic_free_qp_ctxts(nic_dev->hwdev);
1225 hinic_destroy_fdir_filter(dev);
1228 hinic_free_all_rx_mbuf(dev);
1229 hinic_free_all_tx_mbuf(dev);
1232 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1234 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1235 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1236 int ret, retries = 0;
1238 hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1240 /* disable msix interrupt in hardware */
1241 hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1243 /* disable rte interrupt */
1244 ret = rte_intr_disable(&pci_dev->intr_handle);
1246 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1250 rte_intr_callback_unregister(&pci_dev->intr_handle,
1251 hinic_dev_interrupt_handler, dev);
1254 } else if (ret == -EAGAIN) {
1258 PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1262 } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1264 if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1265 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1269 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1271 u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1274 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1276 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1278 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1282 * DPDK callback to get device statistics.
1285 * Pointer to Ethernet device structure.
1287 * Stats structure output buffer.
1290 * 0 on success and stats is filled,
1291 * negative error value otherwise.
1294 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1297 u64 rx_discards_pmd = 0;
1298 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1299 struct hinic_vport_stats vport_stats;
1300 struct hinic_rxq *rxq = NULL;
1301 struct hinic_rxq_stats rxq_stats;
1302 struct hinic_txq *txq = NULL;
1303 struct hinic_txq_stats txq_stats;
1305 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1307 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1308 nic_dev->proc_dev_name);
1312 /* rx queue stats */
1313 q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1314 nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1315 for (i = 0; i < q_num; i++) {
1316 rxq = nic_dev->rxqs[i];
1317 hinic_rxq_get_stats(rxq, &rxq_stats);
1318 stats->q_ipackets[i] = rxq_stats.packets;
1319 stats->q_ibytes[i] = rxq_stats.bytes;
1320 stats->q_errors[i] = rxq_stats.rx_discards;
1322 stats->ierrors += rxq_stats.errors;
1323 rx_discards_pmd += rxq_stats.rx_discards;
1324 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1327 /* tx queue stats */
1328 q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1329 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1330 for (i = 0; i < q_num; i++) {
1331 txq = nic_dev->txqs[i];
1332 hinic_txq_get_stats(txq, &txq_stats);
1333 stats->q_opackets[i] = txq_stats.packets;
1334 stats->q_obytes[i] = txq_stats.bytes;
1335 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1339 stats->oerrors += vport_stats.tx_discard_vport;
1341 stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1343 stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1344 vport_stats.rx_multicast_pkts_vport +
1345 vport_stats.rx_broadcast_pkts_vport -
1348 stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1349 vport_stats.tx_multicast_pkts_vport +
1350 vport_stats.tx_broadcast_pkts_vport);
1352 stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1353 vport_stats.rx_multicast_bytes_vport +
1354 vport_stats.rx_broadcast_bytes_vport);
1356 stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1357 vport_stats.tx_multicast_bytes_vport +
1358 vport_stats.tx_broadcast_bytes_vport);
1363 * DPDK callback to clear device statistics.
1366 * Pointer to Ethernet device structure.
1368 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1371 struct hinic_rxq *rxq = NULL;
1372 struct hinic_txq *txq = NULL;
1373 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1376 ret = hinic_clear_vport_stats(nic_dev->hwdev);
1380 for (qid = 0; qid < nic_dev->num_rq; qid++) {
1381 rxq = nic_dev->rxqs[qid];
1382 hinic_rxq_stats_reset(rxq);
1385 for (qid = 0; qid < nic_dev->num_sq; qid++) {
1386 txq = nic_dev->txqs[qid];
1387 hinic_txq_stats_reset(txq);
1394 * DPDK callback to clear device extended statistics.
1397 * Pointer to Ethernet device structure.
1399 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1401 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1404 ret = hinic_dev_stats_reset(dev);
1408 if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1409 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1417 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1419 uint64_t random_value;
1421 /* Set Organizationally Unique Identifier (OUI) prefix */
1422 mac_addr->addr_bytes[0] = 0x00;
1423 mac_addr->addr_bytes[1] = 0x09;
1424 mac_addr->addr_bytes[2] = 0xC0;
1425 /* Force indication of locally assigned MAC address. */
1426 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1427 /* Generate the last 3 bytes of the MAC address with a random number. */
1428 random_value = rte_rand();
1429 memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1433 * Init mac_vlan table in NIC.
1436 * Pointer to Ethernet device structure.
1439 * 0 on success and stats is filled,
1440 * negative error value otherwise.
1442 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1444 struct hinic_nic_dev *nic_dev =
1445 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1446 uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1450 rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1454 rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1455 ð_dev->data->mac_addrs[0]);
1456 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[0]))
1457 hinic_gen_random_mac_addr(ð_dev->data->mac_addrs[0]);
1459 func_id = hinic_global_func_id(nic_dev->hwdev);
1460 rc = hinic_set_mac(nic_dev->hwdev,
1461 eth_dev->data->mac_addrs[0].addr_bytes,
1463 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1466 rte_ether_addr_copy(ð_dev->data->mac_addrs[0],
1467 &nic_dev->default_addr);
1472 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1477 func_id = hinic_global_func_id(nic_dev->hwdev);
1479 for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1480 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1483 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1485 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1490 * Deinit mac_vlan table in NIC.
1493 * Pointer to Ethernet device structure.
1496 * 0 on success and stats is filled,
1497 * negative error value otherwise.
1499 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1501 struct hinic_nic_dev *nic_dev =
1502 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1507 func_id = hinic_global_func_id(nic_dev->hwdev);
1509 for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1510 if (rte_is_zero_ether_addr(ð_dev->data->mac_addrs[i]))
1513 rc = hinic_del_mac(nic_dev->hwdev,
1514 eth_dev->data->mac_addrs[i].addr_bytes,
1516 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1517 PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1518 eth_dev->data->name);
1520 memset(ð_dev->data->mac_addrs[i], 0,
1521 sizeof(struct rte_ether_addr));
1524 /* delete multicast mac addrs */
1525 hinic_delete_mc_addr_list(nic_dev);
1528 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1531 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1533 PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1534 dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1536 if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1537 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1538 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1542 ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1544 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1548 /* update max frame size */
1549 dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1550 nic_dev->mtu_size = mtu;
1555 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1556 u16 vlan_id, bool on)
1558 u32 vid_idx, vid_bit;
1560 vid_idx = HINIC_VFTA_IDX(vlan_id);
1561 vid_bit = HINIC_VFTA_BIT(vlan_id);
1564 nic_dev->vfta[vid_idx] |= vid_bit;
1566 nic_dev->vfta[vid_idx] &= ~vid_bit;
1569 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1572 u32 vid_idx, vid_bit;
1574 vid_idx = HINIC_VFTA_IDX(vlan_id);
1575 vid_bit = HINIC_VFTA_BIT(vlan_id);
1577 return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1581 * DPDK callback to set vlan filter.
1584 * Pointer to Ethernet device structure.
1586 * vlan id is used to filter vlan packets
1588 * enable disable or enable vlan filter function
1590 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1591 uint16_t vlan_id, int enable)
1593 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1597 if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1600 func_id = hinic_global_func_id(nic_dev->hwdev);
1603 /* If vlanid is already set, just return */
1604 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1605 PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1606 vlan_id, nic_dev->proc_dev_name);
1610 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1613 /* If vlanid can't be found, just return */
1614 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1615 PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1616 vlan_id, nic_dev->proc_dev_name);
1620 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1625 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1626 enable ? "Add" : "Remove", func_id, vlan_id, err);
1630 hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1632 PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1633 enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1638 * DPDK callback to enable or disable vlan offload.
1641 * Pointer to Ethernet device structure.
1643 * Definitions used for VLAN setting
1645 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1647 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1648 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1652 /* Enable or disable VLAN filter */
1653 if (mask & ETH_VLAN_FILTER_MASK) {
1654 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1656 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1657 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1658 PMD_DRV_LOG(WARNING,
1659 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1660 nic_dev->proc_dev_name, dev->data->port_id);
1662 PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1663 on ? "enable" : "disable",
1664 nic_dev->proc_dev_name,
1665 dev->data->port_id, err);
1669 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1670 on ? "Enable" : "Disable",
1671 nic_dev->proc_dev_name, dev->data->port_id);
1674 /* Enable or disable VLAN stripping */
1675 if (mask & ETH_VLAN_STRIP_MASK) {
1676 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1678 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1680 PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1681 on ? "enable" : "disable",
1682 nic_dev->proc_dev_name,
1683 dev->data->port_id, err);
1687 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1688 on ? "Enable" : "Disable",
1689 nic_dev->proc_dev_name, dev->data->port_id);
1692 if (mask & ETH_VLAN_EXTEND_MASK) {
1693 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1694 nic_dev->proc_dev_name, dev->data->port_id);
1701 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1703 struct hinic_nic_dev *nic_dev =
1704 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1708 func_id = hinic_global_func_id(nic_dev->hwdev);
1709 for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1710 /* If can't find it, continue */
1711 if (!hinic_find_vlan_filter(nic_dev, i))
1714 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1715 hinic_store_vlan_filter(nic_dev, i, false);
1719 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1722 u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1725 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1727 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1729 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1733 * DPDK callback to enable allmulticast mode.
1736 * Pointer to Ethernet device structure.
1740 * negative error value otherwise.
1742 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1745 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1747 ret = hinic_set_dev_allmulticast(nic_dev, true);
1749 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1753 PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1754 nic_dev->proc_dev_name, dev->data->port_id);
1759 * DPDK callback to disable allmulticast mode.
1762 * Pointer to Ethernet device structure.
1766 * negative error value otherwise.
1768 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1771 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1773 ret = hinic_set_dev_allmulticast(nic_dev, false);
1775 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1779 PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1780 nic_dev->proc_dev_name, dev->data->port_id);
1785 * DPDK callback to enable promiscuous mode.
1788 * Pointer to Ethernet device structure.
1792 * negative error value otherwise.
1794 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1797 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1799 PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1800 nic_dev->proc_dev_name, dev->data->port_id,
1801 dev->data->promiscuous);
1803 rc = hinic_set_dev_promiscuous(nic_dev, true);
1805 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1811 * DPDK callback to disable promiscuous mode.
1814 * Pointer to Ethernet device structure.
1818 * negative error value otherwise.
1820 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1823 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1825 PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1826 nic_dev->proc_dev_name, dev->data->port_id,
1827 dev->data->promiscuous);
1829 rc = hinic_set_dev_promiscuous(nic_dev, false);
1831 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1837 * DPDK callback to update the RSS hash key and RSS hash type.
1840 * Pointer to Ethernet device structure.
1842 * RSS configuration data.
1845 * 0 on success, negative error value otherwise.
1847 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1848 struct rte_eth_rss_conf *rss_conf)
1850 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1851 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1852 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1853 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1854 u64 rss_hf = rss_conf->rss_hf;
1855 struct nic_rss_type rss_type = {0};
1858 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1859 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1863 if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1864 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1865 rss_conf->rss_key_len);
1869 if (rss_conf->rss_key) {
1870 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1871 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1874 PMD_DRV_LOG(ERR, "Set rss template table failed");
1879 rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1880 rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1881 rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1882 rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1883 rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1884 rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1885 rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1886 rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1888 err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1890 PMD_DRV_LOG(ERR, "Set rss type table failed");
1897 memset(prio_tc, 0, sizeof(prio_tc));
1898 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1903 * DPDK callback to get the RSS hash configuration.
1906 * Pointer to Ethernet device structure.
1908 * RSS configuration data.
1911 * 0 on success, negative error value otherwise.
1913 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1914 struct rte_eth_rss_conf *rss_conf)
1916 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1917 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1918 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1919 struct nic_rss_type rss_type = {0};
1922 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1923 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1927 err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1931 if (rss_conf->rss_key &&
1932 rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1933 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1934 rss_conf->rss_key_len = sizeof(hashkey);
1937 err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1941 rss_conf->rss_hf = 0;
1942 rss_conf->rss_hf |= rss_type.ipv4 ?
1943 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1944 rss_conf->rss_hf |= rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1945 rss_conf->rss_hf |= rss_type.ipv6 ?
1946 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1947 rss_conf->rss_hf |= rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1948 rss_conf->rss_hf |= rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1949 rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1950 rss_conf->rss_hf |= rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1951 rss_conf->rss_hf |= rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1957 * DPDK callback to update the RETA indirection table.
1960 * Pointer to Ethernet device structure.
1962 * Pointer to RETA configuration structure array.
1964 * Size of the RETA table.
1967 * 0 on success, negative error value otherwise.
1969 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1970 struct rte_eth_rss_reta_entry64 *reta_conf,
1973 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1974 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1975 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1976 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1981 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1984 if (reta_size != NIC_RSS_INDIR_SIZE) {
1985 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1989 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1993 /* update rss indir_tbl */
1994 for (i = 0; i < reta_size; i++) {
1995 idx = i / RTE_RETA_GROUP_SIZE;
1996 shift = i % RTE_RETA_GROUP_SIZE;
1997 if (reta_conf[idx].mask & (1ULL << shift))
1998 indirtbl[i] = reta_conf[idx].reta[shift];
2001 for (i = 0 ; i < reta_size; i++) {
2002 if (indirtbl[i] >= nic_dev->num_rq) {
2003 PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
2004 i, nic_dev->num_rq);
2009 err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2013 nic_dev->rss_indir_flag = true;
2018 memset(prio_tc, 0, sizeof(prio_tc));
2019 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2026 * DPDK callback to get the RETA indirection table.
2029 * Pointer to Ethernet device structure.
2031 * Pointer to RETA configuration structure array.
2033 * Size of the RETA table.
2036 * 0 on success, negative error value otherwise.
2038 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2039 struct rte_eth_rss_reta_entry64 *reta_conf,
2042 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2043 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2045 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2049 if (reta_size != NIC_RSS_INDIR_SIZE) {
2050 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
2054 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2056 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
2061 for (i = 0; i < reta_size; i++) {
2062 idx = i / RTE_RETA_GROUP_SIZE;
2063 shift = i % RTE_RETA_GROUP_SIZE;
2064 if (reta_conf[idx].mask & (1ULL << shift))
2065 reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2072 * DPDK callback to get extended device statistics.
2075 * Pointer to Ethernet device.
2077 * Pointer to rte extended stats table.
2079 * The size of the stats table.
2082 * Number of extended stats on success and stats is filled,
2083 * negative error value otherwise.
2085 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2086 struct rte_eth_xstat *xstats,
2092 struct hinic_nic_dev *nic_dev;
2093 struct hinic_phy_port_stats port_stats;
2094 struct hinic_vport_stats vport_stats;
2095 struct hinic_rxq *rxq = NULL;
2096 struct hinic_rxq_stats rxq_stats;
2097 struct hinic_txq *txq = NULL;
2098 struct hinic_txq_stats txq_stats;
2100 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2101 count = hinic_xstats_calc_num(nic_dev);
2107 /* Get stats from hinic_rxq_stats */
2108 for (qid = 0; qid < nic_dev->num_rq; qid++) {
2109 rxq = nic_dev->rxqs[qid];
2110 hinic_rxq_get_stats(rxq, &rxq_stats);
2112 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2113 xstats[count].value =
2114 *(uint64_t *)(((char *)&rxq_stats) +
2115 hinic_rxq_stats_strings[i].offset);
2116 xstats[count].id = count;
2121 /* Get stats from hinic_txq_stats */
2122 for (qid = 0; qid < nic_dev->num_sq; qid++) {
2123 txq = nic_dev->txqs[qid];
2124 hinic_txq_get_stats(txq, &txq_stats);
2126 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2127 xstats[count].value =
2128 *(uint64_t *)(((char *)&txq_stats) +
2129 hinic_txq_stats_strings[i].offset);
2130 xstats[count].id = count;
2135 /* Get stats from hinic_vport_stats */
2136 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2140 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2141 xstats[count].value =
2142 *(uint64_t *)(((char *)&vport_stats) +
2143 hinic_vport_stats_strings[i].offset);
2144 xstats[count].id = count;
2148 if (HINIC_IS_VF(nic_dev->hwdev))
2151 /* Get stats from hinic_phy_port_stats */
2152 err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2156 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2157 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2158 hinic_phyport_stats_strings[i].offset);
2159 xstats[count].id = count;
2166 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2167 struct rte_eth_rxq_info *qinfo)
2169 struct hinic_rxq *rxq = dev->data->rx_queues[queue_id];
2171 qinfo->mp = rxq->mb_pool;
2172 qinfo->nb_desc = rxq->q_depth;
2175 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2176 struct rte_eth_txq_info *qinfo)
2178 struct hinic_txq *txq = dev->data->tx_queues[queue_id];
2180 qinfo->nb_desc = txq->q_depth;
2184 * DPDK callback to retrieve names of extended device statistics
2187 * Pointer to Ethernet device structure.
2188 * @param xstats_names
2189 * Buffer to insert names into.
2192 * Number of xstats names.
2194 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2195 struct rte_eth_xstat_name *xstats_names,
2196 __rte_unused unsigned int limit)
2198 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2202 if (xstats_names == NULL)
2203 return hinic_xstats_calc_num(nic_dev);
2205 /* get pmd rxq stats */
2206 for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2207 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2208 snprintf(xstats_names[count].name,
2209 sizeof(xstats_names[count].name),
2211 q_num, hinic_rxq_stats_strings[i].name);
2216 /* get pmd txq stats */
2217 for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2218 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2219 snprintf(xstats_names[count].name,
2220 sizeof(xstats_names[count].name),
2222 q_num, hinic_txq_stats_strings[i].name);
2227 /* get vport stats */
2228 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2229 snprintf(xstats_names[count].name,
2230 sizeof(xstats_names[count].name),
2232 hinic_vport_stats_strings[i].name);
2236 if (HINIC_IS_VF(nic_dev->hwdev))
2239 /* get phy port stats */
2240 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2241 snprintf(xstats_names[count].name,
2242 sizeof(xstats_names[count].name),
2244 hinic_phyport_stats_strings[i].name);
2251 * DPDK callback to set mac address
2254 * Pointer to Ethernet device structure.
2256 * Pointer to mac address
2258 * 0 on success, negative error value otherwise.
2260 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2261 struct rte_ether_addr *addr)
2263 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2267 func_id = hinic_global_func_id(nic_dev->hwdev);
2268 err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2269 addr->addr_bytes, 0, func_id);
2273 rte_ether_addr_copy(addr, &nic_dev->default_addr);
2275 PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
2276 addr->addr_bytes[0], addr->addr_bytes[1],
2277 addr->addr_bytes[2], addr->addr_bytes[3],
2278 addr->addr_bytes[4], addr->addr_bytes[5]);
2284 * DPDK callback to remove a MAC address.
2287 * Pointer to Ethernet device structure.
2289 * MAC address index.
2291 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2293 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2297 if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2298 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2303 func_id = hinic_global_func_id(nic_dev->hwdev);
2304 ret = hinic_del_mac(nic_dev->hwdev,
2305 dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2309 memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2313 * DPDK callback to add a MAC address.
2316 * Pointer to Ethernet device structure.
2318 * MAC address to register.
2320 * MAC address index.
2322 * VMDq pool index to associate address with (ignored).
2325 * 0 on success, a negative errno value otherwise and rte_errno is set.
2328 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2329 struct rte_ether_addr *mac_addr, uint32_t index,
2330 __rte_unused uint32_t vmdq)
2332 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2337 if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2338 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
2342 /* First, make sure this address isn't already configured. */
2343 for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2344 /* Skip this index, it's going to be reconfigured. */
2348 if (memcmp(&dev->data->mac_addrs[i],
2349 mac_addr, sizeof(*mac_addr)))
2352 PMD_DRV_LOG(INFO, "MAC address already configured");
2356 func_id = hinic_global_func_id(nic_dev->hwdev);
2357 ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2361 dev->data->mac_addrs[index] = *mac_addr;
2366 * DPDK callback to set multicast mac address
2369 * Pointer to Ethernet device structure.
2370 * @param mc_addr_set
2371 * Pointer to multicast mac address
2375 * 0 on success, negative error value otherwise.
2377 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2378 struct rte_ether_addr *mc_addr_set,
2379 uint32_t nb_mc_addr)
2381 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2386 func_id = hinic_global_func_id(nic_dev->hwdev);
2388 /* delete old multi_cast addrs firstly */
2389 hinic_delete_mc_addr_list(nic_dev);
2391 if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2394 for (i = 0; i < nb_mc_addr; i++) {
2395 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2397 /* if add mc addr failed, set all multi_cast */
2399 hinic_delete_mc_addr_list(nic_dev);
2403 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2409 hinic_dev_allmulticast_enable(dev);
2415 * DPDK callback to manage filter operations
2418 * Pointer to Ethernet device structure.
2419 * @param filter_type
2422 * Operation to perform.
2424 * Pointer to operation-specific structure.
2427 * 0 on success, negative errno value on failure.
2429 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2430 enum rte_filter_type filter_type,
2431 enum rte_filter_op filter_op,
2434 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2435 int func_id = hinic_global_func_id(nic_dev->hwdev);
2437 switch (filter_type) {
2438 case RTE_ETH_FILTER_GENERIC:
2439 if (filter_op != RTE_ETH_FILTER_GET)
2441 *(const void **)arg = &hinic_flow_ops;
2444 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2449 PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2450 "filter_op: 0x%x.", func_id, filter_type, filter_op);
2454 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2456 struct nic_pause_config pause_config = {0};
2458 pause_config.auto_neg = 0;
2459 pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2460 pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2462 return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2465 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2467 u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2468 u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2469 u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2470 u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2471 u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2475 for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2478 return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2479 up_pgid, up_bw, up_strict);
2482 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2487 if (!HINIC_IS_VF(nic_dev->hwdev)) {
2488 nic_dev->default_cos =
2489 (hinic_global_func_id(nic_dev->hwdev) +
2490 DEFAULT_BASE_COS) % NR_MAX_COS;
2492 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2494 PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2499 nic_dev->default_cos = cos_id;
2505 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2509 err = hinic_init_default_cos(nic_dev);
2513 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2516 /* Restore DCB configure to default status */
2517 err = hinic_set_default_dcb_feature(nic_dev);
2521 /* Set pause enable, and up will disable pfc. */
2522 err = hinic_set_default_pause_feature(nic_dev);
2526 err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2530 err = hinic_set_link_status_follow(nic_dev->hwdev,
2531 HINIC_LINK_FOLLOW_PORT);
2532 if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2533 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2537 return hinic_set_anti_attack(nic_dev->hwdev, true);
2540 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2542 struct hinic_board_info info = { 0 };
2545 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2548 rc = hinic_get_board_info(nic_dev->hwdev, &info);
2552 return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2556 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2558 nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2559 if (nic_dev->cpy_mpool == NULL) {
2560 nic_dev->cpy_mpool =
2561 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2562 HINIC_COPY_MEMPOOL_DEPTH,
2564 HINIC_COPY_MBUF_SIZE,
2566 if (!nic_dev->cpy_mpool) {
2567 PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2568 rte_errno, nic_dev->proc_dev_name);
2576 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2578 if (nic_dev->cpy_mpool != NULL)
2579 rte_mempool_free(nic_dev->cpy_mpool);
2582 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2587 /* allocate software txq array */
2588 txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2589 nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2590 if (!nic_dev->txqs) {
2591 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2595 /* allocate software rxq array */
2596 rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2597 nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2598 if (!nic_dev->rxqs) {
2600 kfree(nic_dev->txqs);
2601 nic_dev->txqs = NULL;
2603 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2610 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2612 kfree(nic_dev->txqs);
2613 nic_dev->txqs = NULL;
2615 kfree(nic_dev->rxqs);
2616 nic_dev->rxqs = NULL;
2619 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2621 struct hinic_nic_dev *nic_dev =
2622 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2625 nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2626 RTE_CACHE_LINE_SIZE);
2627 if (!nic_dev->hwdev) {
2628 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2629 eth_dev->data->name);
2632 nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2635 rc = hinic_osdep_init(nic_dev->hwdev);
2637 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2638 eth_dev->data->name);
2639 goto init_osdep_fail;
2643 rc = hinic_hwif_res_init(nic_dev->hwdev);
2645 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2646 eth_dev->data->name);
2647 goto init_hwif_fail;
2651 rc = init_cfg_mgmt(nic_dev->hwdev);
2653 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2654 eth_dev->data->name);
2655 goto init_cfgmgnt_fail;
2659 rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2661 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2662 eth_dev->data->name);
2663 goto init_aeqs_fail;
2666 /* init_pf_to_mgnt */
2667 rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2669 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2670 eth_dev->data->name);
2671 goto init_pf_to_mgmt_fail;
2675 rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2677 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2678 eth_dev->data->name);
2679 goto init_func_to_func_fail;
2682 rc = hinic_card_workmode_check(nic_dev);
2684 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2685 eth_dev->data->name);
2686 goto workmode_check_fail;
2689 /* do l2nic reset to make chip clear */
2690 rc = hinic_l2nic_reset(nic_dev->hwdev);
2692 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2693 eth_dev->data->name);
2694 goto l2nic_reset_fail;
2697 /* init dma and aeq msix attribute table */
2698 (void)hinic_init_attr_table(nic_dev->hwdev);
2701 rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2703 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2704 eth_dev->data->name);
2705 goto init_cmdq_fail;
2708 /* set hardware state active */
2709 rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2711 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2712 eth_dev->data->name);
2713 goto init_resources_state_fail;
2716 /* init_capability */
2717 rc = hinic_init_capability(nic_dev->hwdev);
2719 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2720 eth_dev->data->name);
2724 /* get nic capability */
2725 if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2726 goto nic_check_fail;
2728 /* init root cla and function table */
2729 rc = hinic_init_nicio(nic_dev->hwdev);
2731 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2732 eth_dev->data->name);
2733 goto init_nicio_fail;
2736 /* init_software_txrxq */
2737 rc = hinic_init_sw_rxtxqs(nic_dev);
2739 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2740 eth_dev->data->name);
2741 goto init_sw_rxtxqs_fail;
2744 rc = hinic_copy_mempool_init(nic_dev);
2746 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2747 eth_dev->data->name);
2748 goto init_mpool_fail;
2751 /* set hardware feature to default status */
2752 rc = hinic_set_default_hw_feature(nic_dev);
2754 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2755 eth_dev->data->name);
2756 goto set_default_hw_feature_fail;
2761 set_default_hw_feature_fail:
2762 hinic_copy_mempool_uninit(nic_dev);
2765 hinic_deinit_sw_rxtxqs(nic_dev);
2767 init_sw_rxtxqs_fail:
2768 hinic_deinit_nicio(nic_dev->hwdev);
2773 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2775 init_resources_state_fail:
2776 hinic_comm_cmdqs_free(nic_dev->hwdev);
2780 workmode_check_fail:
2781 hinic_comm_func_to_func_free(nic_dev->hwdev);
2783 init_func_to_func_fail:
2784 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2786 init_pf_to_mgmt_fail:
2787 hinic_comm_aeqs_free(nic_dev->hwdev);
2790 free_cfg_mgmt(nic_dev->hwdev);
2793 hinic_hwif_res_free(nic_dev->hwdev);
2796 hinic_osdep_deinit(nic_dev->hwdev);
2799 rte_free(nic_dev->hwdev);
2800 nic_dev->hwdev = NULL;
2805 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2807 struct hinic_nic_dev *nic_dev =
2808 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2810 (void)hinic_set_link_status_follow(nic_dev->hwdev,
2811 HINIC_LINK_FOLLOW_DEFAULT);
2812 hinic_copy_mempool_uninit(nic_dev);
2813 hinic_deinit_sw_rxtxqs(nic_dev);
2814 hinic_deinit_nicio(nic_dev->hwdev);
2815 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2816 hinic_comm_cmdqs_free(nic_dev->hwdev);
2817 hinic_comm_func_to_func_free(nic_dev->hwdev);
2818 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2819 hinic_comm_aeqs_free(nic_dev->hwdev);
2820 free_cfg_mgmt(nic_dev->hwdev);
2821 hinic_hwif_res_free(nic_dev->hwdev);
2822 hinic_osdep_deinit(nic_dev->hwdev);
2823 rte_free(nic_dev->hwdev);
2824 nic_dev->hwdev = NULL;
2828 * DPDK callback to close the device.
2831 * Pointer to Ethernet device structure.
2833 static void hinic_dev_close(struct rte_eth_dev *dev)
2835 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2837 if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2838 PMD_DRV_LOG(WARNING, "Device %s already closed",
2843 /* stop device first */
2844 hinic_dev_stop(dev);
2846 /* rx_cqe, rx_info */
2847 hinic_free_all_rx_resources(dev);
2850 hinic_free_all_tx_resources(dev);
2852 /* free wq, pi_dma_addr */
2853 hinic_free_all_rq(nic_dev);
2855 /* free wq, db_addr */
2856 hinic_free_all_sq(nic_dev);
2858 /* deinit mac vlan tbl */
2859 hinic_deinit_mac_addr(dev);
2860 hinic_remove_all_vlanid(dev);
2862 /* disable hardware and uio interrupt */
2863 hinic_disable_interrupt(dev);
2865 /* deinit nic hardware device */
2866 hinic_nic_dev_destroy(dev);
2869 static const struct eth_dev_ops hinic_pmd_ops = {
2870 .dev_configure = hinic_dev_configure,
2871 .dev_infos_get = hinic_dev_infos_get,
2872 .fw_version_get = hinic_fw_version_get,
2873 .rx_queue_setup = hinic_rx_queue_setup,
2874 .tx_queue_setup = hinic_tx_queue_setup,
2875 .dev_start = hinic_dev_start,
2876 .dev_set_link_up = hinic_dev_set_link_up,
2877 .dev_set_link_down = hinic_dev_set_link_down,
2878 .link_update = hinic_link_update,
2879 .rx_queue_release = hinic_rx_queue_release,
2880 .tx_queue_release = hinic_tx_queue_release,
2881 .dev_stop = hinic_dev_stop,
2882 .dev_close = hinic_dev_close,
2883 .mtu_set = hinic_dev_set_mtu,
2884 .vlan_filter_set = hinic_vlan_filter_set,
2885 .vlan_offload_set = hinic_vlan_offload_set,
2886 .allmulticast_enable = hinic_dev_allmulticast_enable,
2887 .allmulticast_disable = hinic_dev_allmulticast_disable,
2888 .promiscuous_enable = hinic_dev_promiscuous_enable,
2889 .promiscuous_disable = hinic_dev_promiscuous_disable,
2890 .rss_hash_update = hinic_rss_hash_update,
2891 .rss_hash_conf_get = hinic_rss_conf_get,
2892 .reta_update = hinic_rss_indirtbl_update,
2893 .reta_query = hinic_rss_indirtbl_query,
2894 .stats_get = hinic_dev_stats_get,
2895 .stats_reset = hinic_dev_stats_reset,
2896 .xstats_get = hinic_dev_xstats_get,
2897 .xstats_reset = hinic_dev_xstats_reset,
2898 .xstats_get_names = hinic_dev_xstats_get_names,
2899 .rxq_info_get = hinic_rxq_info_get,
2900 .txq_info_get = hinic_txq_info_get,
2901 .mac_addr_set = hinic_set_mac_addr,
2902 .mac_addr_remove = hinic_mac_addr_remove,
2903 .mac_addr_add = hinic_mac_addr_add,
2904 .set_mc_addr_list = hinic_set_mc_addr_list,
2905 .filter_ctrl = hinic_dev_filter_ctrl,
2908 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2909 .dev_configure = hinic_dev_configure,
2910 .dev_infos_get = hinic_dev_infos_get,
2911 .fw_version_get = hinic_fw_version_get,
2912 .rx_queue_setup = hinic_rx_queue_setup,
2913 .tx_queue_setup = hinic_tx_queue_setup,
2914 .dev_start = hinic_dev_start,
2915 .link_update = hinic_link_update,
2916 .rx_queue_release = hinic_rx_queue_release,
2917 .tx_queue_release = hinic_tx_queue_release,
2918 .dev_stop = hinic_dev_stop,
2919 .dev_close = hinic_dev_close,
2920 .mtu_set = hinic_dev_set_mtu,
2921 .vlan_filter_set = hinic_vlan_filter_set,
2922 .vlan_offload_set = hinic_vlan_offload_set,
2923 .allmulticast_enable = hinic_dev_allmulticast_enable,
2924 .allmulticast_disable = hinic_dev_allmulticast_disable,
2925 .rss_hash_update = hinic_rss_hash_update,
2926 .rss_hash_conf_get = hinic_rss_conf_get,
2927 .reta_update = hinic_rss_indirtbl_update,
2928 .reta_query = hinic_rss_indirtbl_query,
2929 .stats_get = hinic_dev_stats_get,
2930 .stats_reset = hinic_dev_stats_reset,
2931 .xstats_get = hinic_dev_xstats_get,
2932 .xstats_reset = hinic_dev_xstats_reset,
2933 .xstats_get_names = hinic_dev_xstats_get_names,
2934 .rxq_info_get = hinic_rxq_info_get,
2935 .txq_info_get = hinic_txq_info_get,
2936 .mac_addr_set = hinic_set_mac_addr,
2937 .mac_addr_remove = hinic_mac_addr_remove,
2938 .mac_addr_add = hinic_mac_addr_add,
2939 .set_mc_addr_list = hinic_set_mc_addr_list,
2940 .filter_ctrl = hinic_dev_filter_ctrl,
2943 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2945 struct rte_pci_device *pci_dev;
2946 struct rte_ether_addr *eth_addr;
2947 struct hinic_nic_dev *nic_dev;
2948 struct hinic_filter_info *filter_info;
2949 struct hinic_tcam_info *tcam_info;
2953 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2955 /* EAL is SECONDARY and eth_dev is already created */
2956 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2957 PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
2958 eth_dev->data->name);
2963 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2964 memset(nic_dev, 0, sizeof(*nic_dev));
2966 snprintf(nic_dev->proc_dev_name,
2967 sizeof(nic_dev->proc_dev_name),
2968 "hinic-%.4x:%.2x:%.2x.%x",
2969 pci_dev->addr.domain, pci_dev->addr.bus,
2970 pci_dev->addr.devid, pci_dev->addr.function);
2972 /* alloc mac_addrs */
2973 mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2974 eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
2976 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2977 eth_dev->data->name);
2981 eth_dev->data->mac_addrs = eth_addr;
2983 mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2984 nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
2985 if (!nic_dev->mc_list) {
2986 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
2987 eth_dev->data->name);
2993 * Pass the information to the rte_eth_dev_close() that it should also
2994 * release the private port resources.
2996 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2998 /* create hardware nic_device */
2999 rc = hinic_nic_dev_create(eth_dev);
3001 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3002 eth_dev->data->name);
3003 goto create_nic_dev_fail;
3006 if (HINIC_IS_VF(nic_dev->hwdev))
3007 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3009 eth_dev->dev_ops = &hinic_pmd_ops;
3011 rc = hinic_init_mac_addr(eth_dev);
3013 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3014 eth_dev->data->name);
3018 /* register callback func to eal lib */
3019 rc = rte_intr_callback_register(&pci_dev->intr_handle,
3020 hinic_dev_interrupt_handler,
3023 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3024 eth_dev->data->name);
3025 goto reg_intr_cb_fail;
3028 /* enable uio/vfio intr/eventfd mapping */
3029 rc = rte_intr_enable(&pci_dev->intr_handle);
3031 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3032 eth_dev->data->name);
3033 goto enable_intr_fail;
3035 hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3037 /* initialize filter info */
3038 filter_info = &nic_dev->filter;
3039 tcam_info = &nic_dev->tcam;
3040 memset(filter_info, 0, sizeof(struct hinic_filter_info));
3041 memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
3042 /* initialize 5tuple filter list */
3043 TAILQ_INIT(&filter_info->fivetuple_list);
3044 TAILQ_INIT(&tcam_info->tcam_list);
3045 TAILQ_INIT(&nic_dev->filter_ntuple_list);
3046 TAILQ_INIT(&nic_dev->filter_ethertype_list);
3047 TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3048 TAILQ_INIT(&nic_dev->hinic_flow_list);
3050 hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3051 PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3052 eth_dev->data->name);
3057 (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3058 hinic_dev_interrupt_handler,
3062 hinic_deinit_mac_addr(eth_dev);
3065 eth_dev->dev_ops = NULL;
3066 hinic_nic_dev_destroy(eth_dev);
3068 create_nic_dev_fail:
3069 rte_free(nic_dev->mc_list);
3070 nic_dev->mc_list = NULL;
3074 eth_dev->data->mac_addrs = NULL;
3077 PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3078 eth_dev->data->name);
3082 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3084 struct rte_pci_device *pci_dev;
3086 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3088 PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3089 pci_dev->addr.domain, pci_dev->addr.bus,
3090 pci_dev->addr.devid, pci_dev->addr.function,
3091 (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3092 "primary" : "secondary");
3094 /* rte_eth_dev rx_burst and tx_burst */
3095 eth_dev->rx_pkt_burst = hinic_recv_pkts;
3096 eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3098 return hinic_func_init(eth_dev);
3101 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3103 struct hinic_nic_dev *nic_dev;
3105 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3106 hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3108 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3111 hinic_dev_close(dev);
3113 dev->dev_ops = NULL;
3114 dev->rx_pkt_burst = NULL;
3115 dev->tx_pkt_burst = NULL;
3117 rte_free(nic_dev->mc_list);
3119 rte_free(dev->data->mac_addrs);
3120 dev->data->mac_addrs = NULL;
3125 static struct rte_pci_id pci_id_hinic_map[] = {
3126 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3127 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3128 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3129 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3130 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3131 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3132 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3136 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3137 struct rte_pci_device *pci_dev)
3139 return rte_eth_dev_pci_generic_probe(pci_dev,
3140 sizeof(struct hinic_nic_dev), hinic_dev_init);
3143 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3145 return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3148 static struct rte_pci_driver rte_hinic_pmd = {
3149 .id_table = pci_id_hinic_map,
3150 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3151 .probe = hinic_pci_probe,
3152 .remove = hinic_pci_remove,
3155 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3156 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3158 RTE_INIT(hinic_init_log)
3160 hinic_logtype = rte_log_register("pmd.net.hinic");
3161 if (hinic_logtype >= 0)
3162 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);