1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
6 #include <rte_bus_pci.h>
7 #include <rte_ethdev_pci.h>
9 #include <rte_malloc.h>
10 #include <rte_memcpy.h>
11 #include <rte_mempool.h>
12 #include <rte_errno.h>
13 #include <rte_ether.h>
15 #include "base/hinic_compat.h"
16 #include "base/hinic_pmd_hwdev.h"
17 #include "base/hinic_pmd_hwif.h"
18 #include "base/hinic_pmd_wq.h"
19 #include "base/hinic_pmd_cfg.h"
20 #include "base/hinic_pmd_mgmt.h"
21 #include "base/hinic_pmd_cmdq.h"
22 #include "base/hinic_pmd_niccfg.h"
23 #include "base/hinic_pmd_nicio.h"
24 #include "base/hinic_pmd_mbox.h"
25 #include "hinic_pmd_ethdev.h"
26 #include "hinic_pmd_tx.h"
27 #include "hinic_pmd_rx.h"
29 /* Vendor ID used by Huawei devices */
30 #define HINIC_HUAWEI_VENDOR_ID 0x19E5
33 #define HINIC_DEV_ID_PRD 0x1822
34 #define HINIC_DEV_ID_VF 0x375E
35 #define HINIC_DEV_ID_VF_HV 0x379E
37 /* Mezz card for Blade Server */
38 #define HINIC_DEV_ID_MEZZ_25GE 0x0210
39 #define HINIC_DEV_ID_MEZZ_40GE 0x020D
40 #define HINIC_DEV_ID_MEZZ_100GE 0x0205
42 /* 2*25G and 2*100G card */
43 #define HINIC_DEV_ID_1822_DUAL_25GE 0x0206
44 #define HINIC_DEV_ID_1822_100GE 0x0200
46 #define HINIC_SERVICE_MODE_NIC 2
48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
50 #define DEFAULT_BASE_COS 4
53 #define HINIC_MIN_RX_BUF_SIZE 1024
54 #define HINIC_MAX_MAC_ADDRS 1
57 * vlan_id is a 12 bit number.
58 * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
59 * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
60 * The higher 7 bit val specifies VFTA array index.
62 #define HINIC_VFTA_BIT(vlan_id) (1 << ((vlan_id) & 0x1F))
63 #define HINIC_VFTA_IDX(vlan_id) ((vlan_id) >> 5)
65 #define HINIC_VLAN_FILTER_EN (1U << 0)
67 #define HINIC_MTU_TO_PKTLEN(mtu) \
68 ((mtu) + ETH_HLEN + ETH_CRC_LEN)
70 #define HINIC_PKTLEN_TO_MTU(pktlen) \
71 ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
73 /* Driver-specific log messages type */
76 struct hinic_xstats_name_off {
77 char name[RTE_ETH_XSTATS_NAME_SIZE];
81 #define HINIC_FUNC_STAT(_stat_item) { \
82 .name = #_stat_item, \
83 .offset = offsetof(struct hinic_vport_stats, _stat_item) \
86 #define HINIC_PORT_STAT(_stat_item) { \
87 .name = #_stat_item, \
88 .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
91 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
92 HINIC_FUNC_STAT(tx_unicast_pkts_vport),
93 HINIC_FUNC_STAT(tx_unicast_bytes_vport),
94 HINIC_FUNC_STAT(tx_multicast_pkts_vport),
95 HINIC_FUNC_STAT(tx_multicast_bytes_vport),
96 HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
97 HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
99 HINIC_FUNC_STAT(rx_unicast_pkts_vport),
100 HINIC_FUNC_STAT(rx_unicast_bytes_vport),
101 HINIC_FUNC_STAT(rx_multicast_pkts_vport),
102 HINIC_FUNC_STAT(rx_multicast_bytes_vport),
103 HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
104 HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
106 HINIC_FUNC_STAT(tx_discard_vport),
107 HINIC_FUNC_STAT(rx_discard_vport),
108 HINIC_FUNC_STAT(tx_err_vport),
109 HINIC_FUNC_STAT(rx_err_vport),
112 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
113 sizeof(hinic_vport_stats_strings[0]))
115 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
116 HINIC_PORT_STAT(mac_rx_total_pkt_num),
117 HINIC_PORT_STAT(mac_rx_total_oct_num),
118 HINIC_PORT_STAT(mac_rx_bad_pkt_num),
119 HINIC_PORT_STAT(mac_rx_bad_oct_num),
120 HINIC_PORT_STAT(mac_rx_good_pkt_num),
121 HINIC_PORT_STAT(mac_rx_good_oct_num),
122 HINIC_PORT_STAT(mac_rx_uni_pkt_num),
123 HINIC_PORT_STAT(mac_rx_multi_pkt_num),
124 HINIC_PORT_STAT(mac_rx_broad_pkt_num),
125 HINIC_PORT_STAT(mac_tx_total_pkt_num),
126 HINIC_PORT_STAT(mac_tx_total_oct_num),
127 HINIC_PORT_STAT(mac_tx_bad_pkt_num),
128 HINIC_PORT_STAT(mac_tx_bad_oct_num),
129 HINIC_PORT_STAT(mac_tx_good_pkt_num),
130 HINIC_PORT_STAT(mac_tx_good_oct_num),
131 HINIC_PORT_STAT(mac_tx_uni_pkt_num),
132 HINIC_PORT_STAT(mac_tx_multi_pkt_num),
133 HINIC_PORT_STAT(mac_tx_broad_pkt_num),
134 HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
135 HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
136 HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
137 HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
138 HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
139 HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
140 HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
141 HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
142 HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
143 HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
144 HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
145 HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
146 HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
147 HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
148 HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
149 HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
150 HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
151 HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
152 HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
153 HINIC_PORT_STAT(mac_rx_mac_pause_num),
154 HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
155 HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
156 HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
157 HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
158 HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
159 HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
160 HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
161 HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
162 HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
163 HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
164 HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
165 HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
166 HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
167 HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
168 HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
169 HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
170 HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
171 HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
172 HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
173 HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
174 HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
175 HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
176 HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
177 HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
178 HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
179 HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
180 HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
181 HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
182 HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
183 HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
184 HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
185 HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
186 HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
187 HINIC_PORT_STAT(mac_tx_mac_pause_num),
188 HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
189 HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
190 HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
191 HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
192 HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
193 HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
194 HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
195 HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
196 HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
197 HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
198 HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
199 HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
200 HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
203 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
204 sizeof(hinic_phyport_stats_strings[0]))
206 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
207 {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
208 {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
211 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
212 sizeof(hinic_rxq_stats_strings[0]))
214 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
215 {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
216 {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
217 {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
218 {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
219 {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
222 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
223 sizeof(hinic_txq_stats_strings[0]))
225 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
227 if (HINIC_IS_VF(nic_dev->hwdev)) {
228 return (HINIC_VPORT_XSTATS_NUM +
229 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
230 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
232 return (HINIC_VPORT_XSTATS_NUM +
233 HINIC_PHYPORT_XSTATS_NUM +
234 HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
235 HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
239 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
240 .nb_max = HINIC_MAX_QUEUE_DEPTH,
241 .nb_min = HINIC_MIN_QUEUE_DEPTH,
242 .nb_align = HINIC_RXD_ALIGN,
245 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
246 .nb_max = HINIC_MAX_QUEUE_DEPTH,
247 .nb_min = HINIC_MIN_QUEUE_DEPTH,
248 .nb_align = HINIC_TXD_ALIGN,
251 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
254 * Interrupt handler triggered by NIC for handling
257 * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
259 static void hinic_dev_interrupt_handler(void *param)
261 struct rte_eth_dev *dev = param;
262 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
264 if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
265 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
266 nic_dev->proc_dev_name, dev->data->port_id);
270 /* aeq0 msg handler */
271 hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
275 * Ethernet device configuration.
277 * Prepare the driver for a given number of TX and RX queues, mtu size
281 * Pointer to Ethernet device structure.
284 * 0 on success, negative error value otherwise.
286 static int hinic_dev_configure(struct rte_eth_dev *dev)
288 struct hinic_nic_dev *nic_dev;
289 struct hinic_nic_io *nic_io;
292 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
293 nic_io = nic_dev->hwdev->nic_io;
295 nic_dev->num_sq = dev->data->nb_tx_queues;
296 nic_dev->num_rq = dev->data->nb_rx_queues;
298 nic_io->num_sqs = dev->data->nb_tx_queues;
299 nic_io->num_rqs = dev->data->nb_rx_queues;
301 /* queue pair is max_num(sq, rq) */
302 nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
303 nic_dev->num_sq : nic_dev->num_rq;
304 nic_io->num_qps = nic_dev->num_qps;
306 if (nic_dev->num_qps > nic_io->max_qps) {
308 "Queue number out of range, get queue_num:%d, max_queue_num:%d",
309 nic_dev->num_qps, nic_io->max_qps);
313 /* mtu size is 256~9600 */
314 if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
315 dev->data->dev_conf.rxmode.max_rx_pkt_len >
316 HINIC_MAX_JUMBO_FRAME_SIZE) {
318 "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
319 "expect between %d and %d",
320 dev->data->dev_conf.rxmode.max_rx_pkt_len,
321 HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
326 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
329 err = hinic_config_mq_mode(dev, TRUE);
331 PMD_DRV_LOG(ERR, "Config multi-queue failed");
335 /* init vlan offoad */
336 err = hinic_vlan_offload_set(dev,
337 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
339 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
340 (void)hinic_config_mq_mode(dev, FALSE);
348 * DPDK callback to create the receive queue.
351 * Pointer to Ethernet device structure.
355 * Number of descriptors for receive queue.
357 * NUMA socket on which memory must be allocated.
359 * Thresholds parameters (unused_).
361 * Memory pool for buffer allocations.
364 * 0 on success, negative error value otherwise.
366 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
367 uint16_t nb_desc, unsigned int socket_id,
368 __rte_unused const struct rte_eth_rxconf *rx_conf,
369 struct rte_mempool *mp)
372 struct hinic_nic_dev *nic_dev;
373 struct hinic_hwdev *hwdev;
374 struct hinic_rxq *rxq;
375 u16 rq_depth, rx_free_thresh;
378 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
379 hwdev = nic_dev->hwdev;
381 /* queue depth must be power of 2, otherwise will be aligned up */
382 rq_depth = (nb_desc & (nb_desc - 1)) ?
383 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
386 * Validate number of receive descriptors.
387 * It must not exceed hardware maximum and minimum.
389 if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
390 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
391 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
392 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
393 (int)nb_desc, (int)rq_depth,
394 (int)dev->data->port_id, (int)queue_idx);
399 * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
400 * descriptors are used or if the number of descriptors required
401 * to transmit a packet is greater than the number of free RX
403 * The following constraints must be satisfied:
404 * rx_free_thresh must be greater than 0.
405 * rx_free_thresh must be less than the size of the ring minus 1.
406 * When set to zero use default values.
408 rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
409 rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
410 if (rx_free_thresh >= (rq_depth - 1)) {
411 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
412 (unsigned int)rx_free_thresh,
413 (int)dev->data->port_id,
418 rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
419 RTE_CACHE_LINE_SIZE, socket_id);
421 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
422 queue_idx, dev->data->name);
425 nic_dev->rxqs[queue_idx] = rxq;
427 /* alloc rx sq hw wqepage*/
428 rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
430 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
431 queue_idx, dev->data->name, rq_depth);
435 /* mbuf pool must be assigned before setup rx resources */
439 hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
440 RTE_PKTMBUF_HEADROOM, &buf_size);
442 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
444 goto adjust_bufsize_fail;
447 /* rx queue info, rearm control */
448 rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
449 rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
450 rxq->nic_dev = nic_dev;
451 rxq->q_id = queue_idx;
452 rxq->q_depth = rq_depth;
453 rxq->buf_len = (u16)buf_size;
454 rxq->rx_free_thresh = rx_free_thresh;
456 /* the last point cant do mbuf rearm in bulk */
457 rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
459 /* device port identifier */
460 rxq->port_id = dev->data->port_id;
462 /* alloc rx_cqe and prepare rq_wqe */
463 rc = hinic_setup_rx_resources(rxq);
465 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
466 queue_idx, dev->data->name);
467 goto setup_rx_res_err;
470 /* record nic_dev rxq in rte_eth rx_queues */
471 dev->data->rx_queues[queue_idx] = rxq;
477 hinic_destroy_rq(hwdev, queue_idx);
485 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
487 struct hinic_rxq *rxq;
488 struct hinic_nic_dev *nic_dev;
491 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
493 for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
494 rxq = dev->data->rx_queues[q_id];
496 rxq->wq->cons_idx = 0;
497 rxq->wq->prod_idx = 0;
498 rxq->wq->delta = rxq->q_depth;
499 rxq->wq->mask = rxq->q_depth - 1;
501 /* alloc mbuf to rq */
502 hinic_rx_alloc_pkts(rxq);
507 * DPDK callback to configure the transmit queue.
510 * Pointer to Ethernet device structure.
512 * Transmit queue index.
514 * Number of descriptors for transmit queue.
516 * NUMA socket on which memory must be allocated.
518 * Tx queue configuration parameters.
521 * 0 on success, negative error value otherwise.
523 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
524 uint16_t nb_desc, unsigned int socket_id,
525 __rte_unused const struct rte_eth_txconf *tx_conf)
528 struct hinic_nic_dev *nic_dev;
529 struct hinic_hwdev *hwdev;
530 struct hinic_txq *txq;
531 u16 sq_depth, tx_free_thresh;
533 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
534 hwdev = nic_dev->hwdev;
536 /* queue depth must be power of 2, otherwise will be aligned up */
537 sq_depth = (nb_desc & (nb_desc - 1)) ?
538 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
541 * Validate number of transmit descriptors.
542 * It must not exceed hardware maximum and minimum.
544 if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
545 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
546 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
547 HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
548 (int)nb_desc, (int)sq_depth,
549 (int)dev->data->port_id, (int)queue_idx);
554 * The TX descriptor ring will be cleaned after txq->tx_free_thresh
555 * descriptors are used or if the number of descriptors required
556 * to transmit a packet is greater than the number of free TX
558 * The following constraints must be satisfied:
559 * tx_free_thresh must be greater than 0.
560 * tx_free_thresh must be less than the size of the ring minus 1.
561 * When set to zero use default values.
563 tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
564 tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
565 if (tx_free_thresh >= (sq_depth - 1)) {
566 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
567 (unsigned int)tx_free_thresh, (int)dev->data->port_id,
572 txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
573 RTE_CACHE_LINE_SIZE, socket_id);
575 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
576 queue_idx, dev->data->name);
579 nic_dev->txqs[queue_idx] = txq;
581 /* alloc tx sq hw wqepage */
582 rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
584 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
585 queue_idx, dev->data->name, sq_depth);
589 txq->q_id = queue_idx;
590 txq->q_depth = sq_depth;
591 txq->port_id = dev->data->port_id;
592 txq->tx_free_thresh = tx_free_thresh;
593 txq->nic_dev = nic_dev;
594 txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
595 txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
596 txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
597 txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
598 txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
599 sizeof(struct hinic_sq_bufdesc);
600 txq->cos = nic_dev->default_cos;
602 /* alloc software txinfo */
603 rc = hinic_setup_tx_resources(txq);
605 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
606 queue_idx, dev->data->name);
607 goto setup_tx_res_fail;
610 /* record nic_dev txq in rte_eth tx_queues */
611 dev->data->tx_queues[queue_idx] = txq;
616 hinic_destroy_sq(hwdev, queue_idx);
624 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
626 struct hinic_nic_dev *nic_dev;
627 struct hinic_txq *txq;
628 struct hinic_nic_io *nic_io;
629 struct hinic_hwdev *hwdev;
630 volatile u32 *ci_addr;
633 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
634 hwdev = nic_dev->hwdev;
635 nic_io = hwdev->nic_io;
637 for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
638 txq = dev->data->tx_queues[q_id];
640 txq->wq->cons_idx = 0;
641 txq->wq->prod_idx = 0;
642 txq->wq->delta = txq->q_depth;
643 txq->wq->mask = txq->q_depth - 1;
645 /* clear hardware ci */
646 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
653 * Get link speed from NIC.
656 * Pointer to Ethernet device structure.
658 * Pointer to link speed structure.
660 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
662 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
663 u32 supported_link, advertised_link;
666 #define HINIC_LINK_MODE_SUPPORT_1G (1U << HINIC_GE_BASE_KX)
668 #define HINIC_LINK_MODE_SUPPORT_10G (1U << HINIC_10GE_BASE_KR)
670 #define HINIC_LINK_MODE_SUPPORT_25G ((1U << HINIC_25GE_BASE_KR_S) | \
671 (1U << HINIC_25GE_BASE_CR_S) | \
672 (1U << HINIC_25GE_BASE_KR) | \
673 (1U << HINIC_25GE_BASE_CR))
675 #define HINIC_LINK_MODE_SUPPORT_40G ((1U << HINIC_40GE_BASE_KR4) | \
676 (1U << HINIC_40GE_BASE_CR4))
678 #define HINIC_LINK_MODE_SUPPORT_100G ((1U << HINIC_100GE_BASE_KR4) | \
679 (1U << HINIC_100GE_BASE_CR4))
681 err = hinic_get_link_mode(nic_dev->hwdev,
682 &supported_link, &advertised_link);
683 if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
684 advertised_link == HINIC_SUPPORTED_UNKNOWN) {
685 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
686 nic_dev->proc_dev_name, dev->data->port_id);
689 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
690 *speed_capa |= ETH_LINK_SPEED_1G;
691 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
692 *speed_capa |= ETH_LINK_SPEED_10G;
693 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
694 *speed_capa |= ETH_LINK_SPEED_25G;
695 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
696 *speed_capa |= ETH_LINK_SPEED_40G;
697 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
698 *speed_capa |= ETH_LINK_SPEED_100G;
703 * DPDK callback to get information about the device.
706 * Pointer to Ethernet device structure.
708 * Pointer to Info structure output buffer.
711 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
713 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
715 info->max_rx_queues = nic_dev->nic_cap.max_rqs;
716 info->max_tx_queues = nic_dev->nic_cap.max_sqs;
717 info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
718 info->max_rx_pktlen = HINIC_MAX_JUMBO_FRAME_SIZE;
719 info->max_mac_addrs = HINIC_MAX_MAC_ADDRS;
720 info->min_mtu = HINIC_MIN_MTU_SIZE;
721 info->max_mtu = HINIC_MAX_MTU_SIZE;
723 hinic_get_speed_capa(dev, &info->speed_capa);
724 info->rx_queue_offload_capa = 0;
725 info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
726 DEV_RX_OFFLOAD_IPV4_CKSUM |
727 DEV_RX_OFFLOAD_UDP_CKSUM |
728 DEV_RX_OFFLOAD_TCP_CKSUM |
729 DEV_RX_OFFLOAD_VLAN_FILTER |
730 DEV_RX_OFFLOAD_SCATTER |
731 DEV_RX_OFFLOAD_JUMBO_FRAME;
733 info->tx_queue_offload_capa = 0;
734 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
735 DEV_TX_OFFLOAD_IPV4_CKSUM |
736 DEV_TX_OFFLOAD_UDP_CKSUM |
737 DEV_TX_OFFLOAD_TCP_CKSUM |
738 DEV_TX_OFFLOAD_SCTP_CKSUM |
739 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
740 DEV_TX_OFFLOAD_TCP_TSO |
741 DEV_TX_OFFLOAD_MULTI_SEGS;
743 info->hash_key_size = HINIC_RSS_KEY_SIZE;
744 info->reta_size = HINIC_RSS_INDIR_SIZE;
745 info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
746 info->rx_desc_lim = hinic_rx_desc_lim;
747 info->tx_desc_lim = hinic_tx_desc_lim;
752 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
756 err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
758 PMD_DRV_LOG(ERR, "Failed to set rx mode");
761 nic_dev->rx_mode_status = rx_mode_ctrl;
767 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
770 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
772 /* rx configure, if rss enable, need to init default configuration */
773 err = hinic_rx_configure(dev);
775 PMD_DRV_LOG(ERR, "Configure rss failed");
780 err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
782 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
783 HINIC_DEFAULT_RX_MODE);
784 goto set_rx_mode_fail;
790 hinic_rx_remove_configure(dev);
795 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
797 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
799 (void)hinic_config_rx_mode(nic_dev, 0);
800 hinic_rx_remove_configure(dev);
803 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
804 struct rte_eth_link *link)
807 u8 port_link_status = 0;
808 struct nic_port_info port_link_info;
809 struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
810 uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
811 ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
812 ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
813 ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
815 rc = hinic_get_link_status(nic_hwdev, &port_link_status);
819 if (!port_link_status) {
820 link->link_status = ETH_LINK_DOWN;
821 link->link_speed = 0;
822 link->link_duplex = ETH_LINK_HALF_DUPLEX;
823 link->link_autoneg = ETH_LINK_FIXED;
827 memset(&port_link_info, 0, sizeof(port_link_info));
828 rc = hinic_get_port_info(nic_hwdev, &port_link_info);
832 link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
833 link->link_duplex = port_link_info.duplex;
834 link->link_autoneg = port_link_info.autoneg_state;
835 link->link_status = port_link_status;
841 * DPDK callback to retrieve physical link information.
844 * Pointer to Ethernet device structure.
845 * @param wait_to_complete
846 * Wait for request completion.
849 * 0 link status changed, -1 link status not changed
851 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
853 #define CHECK_INTERVAL 10 /* 10ms */
854 #define MAX_REPEAT_TIME 100 /* 1s (100 * 10ms) in total */
856 struct rte_eth_link link;
857 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
858 unsigned int rep_cnt = MAX_REPEAT_TIME;
860 memset(&link, 0, sizeof(link));
862 /* Get link status information from hardware */
863 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
864 if (rc != HINIC_OK) {
865 link.link_speed = ETH_SPEED_NUM_NONE;
866 link.link_duplex = ETH_LINK_FULL_DUPLEX;
867 PMD_DRV_LOG(ERR, "Get link status failed");
871 if (!wait_to_complete || link.link_status)
874 rte_delay_ms(CHECK_INTERVAL);
878 rc = rte_eth_linkstatus_set(dev, &link);
883 * DPDK callback to start the device.
886 * Pointer to Ethernet device structure.
889 * 0 on success, negative errno value on failure.
891 static int hinic_dev_start(struct rte_eth_dev *dev)
895 struct hinic_nic_dev *nic_dev;
897 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
898 name = dev->data->name;
900 /* reset rx and tx queue */
901 hinic_reset_rx_queue(dev);
902 hinic_reset_tx_queue(dev);
904 /* get func rx buf size */
905 hinic_get_func_rx_buf_size(nic_dev);
907 /* init txq and rxq context */
908 rc = hinic_init_qp_ctxts(nic_dev->hwdev);
910 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
916 rc = hinic_config_mq_mode(dev, TRUE);
918 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
920 goto cfg_mq_mode_fail;
923 /* set default mtu */
924 rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
926 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
927 nic_dev->mtu_size, name);
931 /* configure rss rx_mode and other rx or tx default feature */
932 rc = hinic_rxtx_configure(dev);
934 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
939 /* reactive pf status, so that uP report asyn event */
940 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
942 /* open virtual port and ready to start packet receiving */
943 rc = hinic_set_vport_enable(nic_dev->hwdev, true);
945 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
949 /* open physical port and start packet receiving */
950 rc = hinic_set_port_enable(nic_dev->hwdev, true);
952 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
957 /* update eth_dev link status */
958 if (dev->data->dev_conf.intr_conf.lsc != 0)
959 (void)hinic_link_update(dev, 0);
961 hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
966 (void)hinic_set_vport_enable(nic_dev->hwdev, false);
969 hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
971 /* Flush tx && rx chip resources in case of set vport fake fail */
972 (void)hinic_flush_qp_res(nic_dev->hwdev);
975 hinic_remove_rxtx_configure(dev);
980 hinic_free_qp_ctxts(nic_dev->hwdev);
983 hinic_free_all_rx_mbuf(dev);
984 hinic_free_all_tx_mbuf(dev);
990 * DPDK callback to release the receive queue.
993 * Generic receive queue pointer.
995 static void hinic_rx_queue_release(void *queue)
997 struct hinic_rxq *rxq = queue;
998 struct hinic_nic_dev *nic_dev;
1001 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1004 nic_dev = rxq->nic_dev;
1006 /* free rxq_pkt mbuf */
1007 hinic_free_all_rx_skbs(rxq);
1009 /* free rxq_cqe, rxq_info */
1010 hinic_free_rx_resources(rxq);
1012 /* free root rq wq */
1013 hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1015 nic_dev->rxqs[rxq->q_id] = NULL;
1022 * DPDK callback to release the transmit queue.
1025 * Generic transmit queue pointer.
1027 static void hinic_tx_queue_release(void *queue)
1029 struct hinic_txq *txq = queue;
1030 struct hinic_nic_dev *nic_dev;
1033 PMD_DRV_LOG(WARNING, "Txq is null when release");
1036 nic_dev = txq->nic_dev;
1038 /* free txq_pkt mbuf */
1039 hinic_free_all_tx_skbs(txq);
1042 hinic_free_tx_resources(txq);
1044 /* free root sq wq */
1045 hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1046 nic_dev->txqs[txq->q_id] = NULL;
1052 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1056 for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1057 hinic_destroy_rq(nic_dev->hwdev, q_id);
1060 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1064 for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1065 hinic_destroy_sq(nic_dev->hwdev, q_id);
1069 * DPDK callback to stop the device.
1072 * Pointer to Ethernet device structure.
1074 static void hinic_dev_stop(struct rte_eth_dev *dev)
1079 struct hinic_nic_dev *nic_dev;
1080 struct rte_eth_link link;
1082 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1083 name = dev->data->name;
1084 port_id = dev->data->port_id;
1086 if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1087 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1091 /* just stop phy port and vport */
1092 rc = hinic_set_port_enable(nic_dev->hwdev, false);
1094 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1097 rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1099 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1102 /* Clear recorded link status */
1103 memset(&link, 0, sizeof(link));
1104 (void)rte_eth_linkstatus_set(dev, &link);
1106 /* flush pending io request */
1107 rc = hinic_rx_tx_flush(nic_dev->hwdev);
1109 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1112 /* clean rss table and rx_mode */
1113 hinic_remove_rxtx_configure(dev);
1115 /* clean root context */
1116 hinic_free_qp_ctxts(nic_dev->hwdev);
1119 hinic_free_all_rx_mbuf(dev);
1120 hinic_free_all_tx_mbuf(dev);
1123 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1125 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1126 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1127 int ret, retries = 0;
1129 hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1131 /* disable msix interrupt in hardware */
1132 hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1134 /* disable rte interrupt */
1135 ret = rte_intr_disable(&pci_dev->intr_handle);
1137 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1141 rte_intr_callback_unregister(&pci_dev->intr_handle,
1142 hinic_dev_interrupt_handler, dev);
1145 } else if (ret == -EAGAIN) {
1149 PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1153 } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1155 if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1156 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1160 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1162 u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1165 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1167 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1169 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1173 * DPDK callback to get device statistics.
1176 * Pointer to Ethernet device structure.
1178 * Stats structure output buffer.
1181 * 0 on success and stats is filled,
1182 * negative error value otherwise.
1185 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1188 u64 rx_discards_pmd = 0;
1189 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1190 struct hinic_vport_stats vport_stats;
1191 struct hinic_rxq *rxq = NULL;
1192 struct hinic_rxq_stats rxq_stats;
1193 struct hinic_txq *txq = NULL;
1194 struct hinic_txq_stats txq_stats;
1196 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1198 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1199 nic_dev->proc_dev_name);
1203 /* rx queue stats */
1204 q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1205 nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1206 for (i = 0; i < q_num; i++) {
1207 rxq = nic_dev->rxqs[i];
1208 hinic_rxq_get_stats(rxq, &rxq_stats);
1209 stats->q_ipackets[i] = rxq_stats.packets;
1210 stats->q_ibytes[i] = rxq_stats.bytes;
1211 stats->q_errors[i] = rxq_stats.rx_discards;
1213 stats->ierrors += rxq_stats.errors;
1214 rx_discards_pmd += rxq_stats.rx_discards;
1215 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1218 /* tx queue stats */
1219 q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1220 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1221 for (i = 0; i < q_num; i++) {
1222 txq = nic_dev->txqs[i];
1223 hinic_txq_get_stats(txq, &txq_stats);
1224 stats->q_opackets[i] = txq_stats.packets;
1225 stats->q_obytes[i] = txq_stats.bytes;
1226 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1230 stats->oerrors += vport_stats.tx_discard_vport;
1232 stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1234 stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1235 vport_stats.rx_multicast_pkts_vport +
1236 vport_stats.rx_broadcast_pkts_vport -
1239 stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1240 vport_stats.tx_multicast_pkts_vport +
1241 vport_stats.tx_broadcast_pkts_vport);
1243 stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1244 vport_stats.rx_multicast_bytes_vport +
1245 vport_stats.rx_broadcast_bytes_vport);
1247 stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1248 vport_stats.tx_multicast_bytes_vport +
1249 vport_stats.tx_broadcast_bytes_vport);
1254 * DPDK callback to clear device statistics.
1257 * Pointer to Ethernet device structure.
1259 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1262 struct hinic_rxq *rxq = NULL;
1263 struct hinic_txq *txq = NULL;
1264 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1267 ret = hinic_clear_vport_stats(nic_dev->hwdev);
1271 for (qid = 0; qid < nic_dev->num_rq; qid++) {
1272 rxq = nic_dev->rxqs[qid];
1273 hinic_rxq_stats_reset(rxq);
1276 for (qid = 0; qid < nic_dev->num_sq; qid++) {
1277 txq = nic_dev->txqs[qid];
1278 hinic_txq_stats_reset(txq);
1285 * DPDK callback to clear device extended statistics.
1288 * Pointer to Ethernet device structure.
1290 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1292 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1295 ret = hinic_dev_stats_reset(dev);
1299 if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1300 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1308 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1310 uint64_t random_value;
1312 /* Set Organizationally Unique Identifier (OUI) prefix */
1313 mac_addr->addr_bytes[0] = 0x00;
1314 mac_addr->addr_bytes[1] = 0x09;
1315 mac_addr->addr_bytes[2] = 0xC0;
1316 /* Force indication of locally assigned MAC address. */
1317 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1318 /* Generate the last 3 bytes of the MAC address with a random number. */
1319 random_value = rte_rand();
1320 memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1324 * Init mac_vlan table in NIC.
1327 * Pointer to Ethernet device structure.
1330 * 0 on success and stats is filled,
1331 * negative error value otherwise.
1333 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1335 struct hinic_nic_dev *nic_dev =
1336 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1337 uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1341 rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1345 memmove(eth_dev->data->mac_addrs->addr_bytes,
1346 addr_bytes, RTE_ETHER_ADDR_LEN);
1348 if (rte_is_zero_ether_addr(eth_dev->data->mac_addrs))
1349 hinic_gen_random_mac_addr(eth_dev->data->mac_addrs);
1351 func_id = hinic_global_func_id(nic_dev->hwdev);
1352 rc = hinic_set_mac(nic_dev->hwdev, eth_dev->data->mac_addrs->addr_bytes,
1354 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1361 * Deinit mac_vlan table in NIC.
1364 * Pointer to Ethernet device structure.
1367 * 0 on success and stats is filled,
1368 * negative error value otherwise.
1370 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1372 struct hinic_nic_dev *nic_dev =
1373 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1377 if (rte_is_zero_ether_addr(eth_dev->data->mac_addrs))
1380 func_id = hinic_global_func_id(nic_dev->hwdev);
1381 rc = hinic_del_mac(nic_dev->hwdev,
1382 eth_dev->data->mac_addrs->addr_bytes,
1384 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1385 PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1386 eth_dev->data->name);
1389 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1392 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1394 PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1395 dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1397 if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1398 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1399 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1403 ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1405 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1409 /* update max frame size */
1410 dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1411 nic_dev->mtu_size = mtu;
1416 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1417 u16 vlan_id, bool on)
1419 u32 vid_idx, vid_bit;
1421 vid_idx = HINIC_VFTA_IDX(vlan_id);
1422 vid_bit = HINIC_VFTA_BIT(vlan_id);
1425 nic_dev->vfta[vid_idx] |= vid_bit;
1427 nic_dev->vfta[vid_idx] &= ~vid_bit;
1430 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1433 u32 vid_idx, vid_bit;
1435 vid_idx = HINIC_VFTA_IDX(vlan_id);
1436 vid_bit = HINIC_VFTA_BIT(vlan_id);
1438 return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1442 * DPDK callback to set vlan filter.
1445 * Pointer to Ethernet device structure.
1447 * vlan id is used to filter vlan packets
1449 * enable disable or enable vlan filter function
1451 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1452 uint16_t vlan_id, int enable)
1454 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1458 if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1461 func_id = hinic_global_func_id(nic_dev->hwdev);
1464 /* If vlanid is already set, just return */
1465 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1466 PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1467 vlan_id, nic_dev->proc_dev_name);
1471 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1474 /* If vlanid can't be found, just return */
1475 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1476 PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1477 vlan_id, nic_dev->proc_dev_name);
1481 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1486 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1487 enable ? "Add" : "Remove", func_id, vlan_id, err);
1491 hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1493 PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1494 enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1499 * DPDK callback to enable or disable vlan offload.
1502 * Pointer to Ethernet device structure.
1504 * Definitions used for VLAN setting
1506 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1508 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1509 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1513 /* Enable or disable VLAN filter */
1514 if (mask & ETH_VLAN_FILTER_MASK) {
1515 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1517 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1518 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1519 PMD_DRV_LOG(WARNING,
1520 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1521 nic_dev->proc_dev_name, dev->data->port_id);
1523 PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1524 on ? "enable" : "disable",
1525 nic_dev->proc_dev_name,
1526 dev->data->port_id, err);
1530 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1531 on ? "Enable" : "Disable",
1532 nic_dev->proc_dev_name, dev->data->port_id);
1535 /* Enable or disable VLAN stripping */
1536 if (mask & ETH_VLAN_STRIP_MASK) {
1537 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1539 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1541 PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1542 on ? "enable" : "disable",
1543 nic_dev->proc_dev_name,
1544 dev->data->port_id, err);
1548 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1549 on ? "Enable" : "Disable",
1550 nic_dev->proc_dev_name, dev->data->port_id);
1553 if (mask & ETH_VLAN_EXTEND_MASK) {
1554 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1555 nic_dev->proc_dev_name, dev->data->port_id);
1562 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1564 struct hinic_nic_dev *nic_dev =
1565 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1569 func_id = hinic_global_func_id(nic_dev->hwdev);
1570 for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1571 /* If can't find it, continue */
1572 if (!hinic_find_vlan_filter(nic_dev, i))
1575 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1576 hinic_store_vlan_filter(nic_dev, i, false);
1580 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1583 u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1586 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1588 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1590 return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1594 * DPDK callback to enable allmulticast mode.
1597 * Pointer to Ethernet device structure.
1601 * negative error value otherwise.
1603 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1606 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1608 ret = hinic_set_dev_allmulticast(nic_dev, true);
1610 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1614 PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1615 nic_dev->proc_dev_name, dev->data->port_id);
1620 * DPDK callback to disable allmulticast mode.
1623 * Pointer to Ethernet device structure.
1627 * negative error value otherwise.
1629 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1632 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1634 ret = hinic_set_dev_allmulticast(nic_dev, false);
1636 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1640 PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1641 nic_dev->proc_dev_name, dev->data->port_id);
1646 * DPDK callback to enable promiscuous mode.
1649 * Pointer to Ethernet device structure.
1653 * negative error value otherwise.
1655 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1658 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1660 PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1661 nic_dev->proc_dev_name, dev->data->port_id,
1662 dev->data->promiscuous);
1664 rc = hinic_set_dev_promiscuous(nic_dev, true);
1666 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1672 * DPDK callback to disable promiscuous mode.
1675 * Pointer to Ethernet device structure.
1679 * negative error value otherwise.
1681 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1684 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1686 PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1687 nic_dev->proc_dev_name, dev->data->port_id,
1688 dev->data->promiscuous);
1690 rc = hinic_set_dev_promiscuous(nic_dev, false);
1692 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1698 * DPDK callback to update the RSS hash key and RSS hash type.
1701 * Pointer to Ethernet device structure.
1703 * RSS configuration data.
1706 * 0 on success, negative error value otherwise.
1708 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1709 struct rte_eth_rss_conf *rss_conf)
1711 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1712 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1713 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1714 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1715 u64 rss_hf = rss_conf->rss_hf;
1716 struct nic_rss_type rss_type = {0};
1719 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1720 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1724 if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1725 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1726 rss_conf->rss_key_len);
1730 if (rss_conf->rss_key) {
1731 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1732 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1735 PMD_DRV_LOG(ERR, "Set rss template table failed");
1740 rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1741 rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1742 rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1743 rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1744 rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1745 rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1746 rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1747 rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1749 err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1751 PMD_DRV_LOG(ERR, "Set rss type table failed");
1758 memset(prio_tc, 0, sizeof(prio_tc));
1759 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1764 * DPDK callback to get the RSS hash configuration.
1767 * Pointer to Ethernet device structure.
1769 * RSS configuration data.
1772 * 0 on success, negative error value otherwise.
1774 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1775 struct rte_eth_rss_conf *rss_conf)
1777 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1778 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1779 u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1780 struct nic_rss_type rss_type = {0};
1783 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1784 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1788 err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1792 if (rss_conf->rss_key &&
1793 rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1794 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1795 rss_conf->rss_key_len = sizeof(hashkey);
1798 err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1802 rss_conf->rss_hf = 0;
1803 rss_conf->rss_hf |= rss_type.ipv4 ?
1804 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1805 rss_conf->rss_hf |= rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1806 rss_conf->rss_hf |= rss_type.ipv6 ?
1807 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1808 rss_conf->rss_hf |= rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1809 rss_conf->rss_hf |= rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1810 rss_conf->rss_hf |= rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1811 rss_conf->rss_hf |= rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1812 rss_conf->rss_hf |= rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1818 * DPDK callback to update the RETA indirection table.
1821 * Pointer to Ethernet device structure.
1823 * Pointer to RETA configuration structure array.
1825 * Size of the RETA table.
1828 * 0 on success, negative error value otherwise.
1830 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1831 struct rte_eth_rss_reta_entry64 *reta_conf,
1834 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1835 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1836 u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1837 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1842 if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1845 if (reta_size != NIC_RSS_INDIR_SIZE) {
1846 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1850 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1854 /* update rss indir_tbl */
1855 for (i = 0; i < reta_size; i++) {
1856 idx = i / RTE_RETA_GROUP_SIZE;
1857 shift = i % RTE_RETA_GROUP_SIZE;
1858 if (reta_conf[idx].mask & (1ULL << shift))
1859 indirtbl[i] = reta_conf[idx].reta[shift];
1862 for (i = 0 ; i < reta_size; i++) {
1863 if (indirtbl[i] >= nic_dev->num_rq) {
1864 PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
1865 i, nic_dev->num_rq);
1870 err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1874 nic_dev->rss_indir_flag = true;
1879 memset(prio_tc, 0, sizeof(prio_tc));
1880 (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1887 * DPDK callback to get the RETA indirection table.
1890 * Pointer to Ethernet device structure.
1892 * Pointer to RETA configuration structure array.
1894 * Size of the RETA table.
1897 * 0 on success, negative error value otherwise.
1899 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
1900 struct rte_eth_rss_reta_entry64 *reta_conf,
1903 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1904 u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1906 u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1910 if (reta_size != NIC_RSS_INDIR_SIZE) {
1911 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1915 err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1917 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
1922 for (i = 0; i < reta_size; i++) {
1923 idx = i / RTE_RETA_GROUP_SIZE;
1924 shift = i % RTE_RETA_GROUP_SIZE;
1925 if (reta_conf[idx].mask & (1ULL << shift))
1926 reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
1933 * DPDK callback to get extended device statistics.
1936 * Pointer to Ethernet device.
1938 * Pointer to rte extended stats table.
1940 * The size of the stats table.
1943 * Number of extended stats on success and stats is filled,
1944 * negative error value otherwise.
1946 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
1947 struct rte_eth_xstat *xstats,
1953 struct hinic_nic_dev *nic_dev;
1954 struct hinic_phy_port_stats port_stats;
1955 struct hinic_vport_stats vport_stats;
1956 struct hinic_rxq *rxq = NULL;
1957 struct hinic_rxq_stats rxq_stats;
1958 struct hinic_txq *txq = NULL;
1959 struct hinic_txq_stats txq_stats;
1961 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1962 count = hinic_xstats_calc_num(nic_dev);
1968 /* Get stats from hinic_rxq_stats */
1969 for (qid = 0; qid < nic_dev->num_rq; qid++) {
1970 rxq = nic_dev->rxqs[qid];
1971 hinic_rxq_get_stats(rxq, &rxq_stats);
1973 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
1974 xstats[count].value =
1975 *(uint64_t *)(((char *)&rxq_stats) +
1976 hinic_rxq_stats_strings[i].offset);
1977 xstats[count].id = count;
1982 /* Get stats from hinic_txq_stats */
1983 for (qid = 0; qid < nic_dev->num_sq; qid++) {
1984 txq = nic_dev->txqs[qid];
1985 hinic_txq_get_stats(txq, &txq_stats);
1987 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
1988 xstats[count].value =
1989 *(uint64_t *)(((char *)&txq_stats) +
1990 hinic_txq_stats_strings[i].offset);
1991 xstats[count].id = count;
1996 /* Get stats from hinic_vport_stats */
1997 err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2001 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2002 xstats[count].value =
2003 *(uint64_t *)(((char *)&vport_stats) +
2004 hinic_vport_stats_strings[i].offset);
2005 xstats[count].id = count;
2009 if (HINIC_IS_VF(nic_dev->hwdev))
2012 /* Get stats from hinic_phy_port_stats */
2013 err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2017 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2018 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2019 hinic_phyport_stats_strings[i].offset);
2020 xstats[count].id = count;
2028 * DPDK callback to retrieve names of extended device statistics
2031 * Pointer to Ethernet device structure.
2032 * @param xstats_names
2033 * Buffer to insert names into.
2036 * Number of xstats names.
2038 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2039 struct rte_eth_xstat_name *xstats_names,
2040 __rte_unused unsigned int limit)
2042 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2046 if (xstats_names == NULL)
2047 return hinic_xstats_calc_num(nic_dev);
2049 /* get pmd rxq stats */
2050 for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2051 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2052 snprintf(xstats_names[count].name,
2053 sizeof(xstats_names[count].name),
2055 q_num, hinic_rxq_stats_strings[i].name);
2060 /* get pmd txq stats */
2061 for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2062 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2063 snprintf(xstats_names[count].name,
2064 sizeof(xstats_names[count].name),
2066 q_num, hinic_txq_stats_strings[i].name);
2071 /* get vport stats */
2072 for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2073 snprintf(xstats_names[count].name,
2074 sizeof(xstats_names[count].name),
2076 hinic_vport_stats_strings[i].name);
2080 if (HINIC_IS_VF(nic_dev->hwdev))
2083 /* get phy port stats */
2084 for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2085 snprintf(xstats_names[count].name,
2086 sizeof(xstats_names[count].name),
2088 hinic_phyport_stats_strings[i].name);
2095 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2097 struct nic_pause_config pause_config = {0};
2099 pause_config.auto_neg = 0;
2100 pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2101 pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2103 return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2106 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2108 u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2109 u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2110 u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2111 u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2112 u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2116 for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2119 return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2120 up_pgid, up_bw, up_strict);
2123 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2128 if (!HINIC_IS_VF(nic_dev->hwdev)) {
2129 nic_dev->default_cos =
2130 (hinic_global_func_id(nic_dev->hwdev) +
2131 DEFAULT_BASE_COS) % NR_MAX_COS;
2133 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2135 PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2140 nic_dev->default_cos = cos_id;
2146 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2150 err = hinic_init_default_cos(nic_dev);
2154 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2157 /* Restore DCB configure to default status */
2158 err = hinic_set_default_dcb_feature(nic_dev);
2163 err = hinic_set_rx_lro(nic_dev->hwdev, 0, 0, (u8)0);
2167 /* Set pause enable, and up will disable pfc. */
2168 err = hinic_set_default_pause_feature(nic_dev);
2172 err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2176 err = hinic_set_link_status_follow(nic_dev->hwdev,
2177 HINIC_LINK_FOLLOW_PORT);
2178 if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2179 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2183 return hinic_set_anti_attack(nic_dev->hwdev, true);
2186 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2188 struct hinic_board_info info = { 0 };
2191 if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2194 rc = hinic_get_board_info(nic_dev->hwdev, &info);
2198 return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2202 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2204 nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2205 if (nic_dev->cpy_mpool == NULL) {
2206 nic_dev->cpy_mpool =
2207 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2208 HINIC_COPY_MEMPOOL_DEPTH,
2210 HINIC_COPY_MBUF_SIZE,
2212 if (!nic_dev->cpy_mpool) {
2213 PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2214 rte_errno, nic_dev->proc_dev_name);
2222 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2224 if (nic_dev->cpy_mpool != NULL)
2225 rte_mempool_free(nic_dev->cpy_mpool);
2228 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2233 /* allocate software txq array */
2234 txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2235 nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2236 if (!nic_dev->txqs) {
2237 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2241 /* allocate software rxq array */
2242 rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2243 nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2244 if (!nic_dev->rxqs) {
2246 kfree(nic_dev->txqs);
2247 nic_dev->txqs = NULL;
2249 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2256 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2258 kfree(nic_dev->txqs);
2259 nic_dev->txqs = NULL;
2261 kfree(nic_dev->rxqs);
2262 nic_dev->rxqs = NULL;
2265 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2267 struct hinic_nic_dev *nic_dev =
2268 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2271 nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2272 RTE_CACHE_LINE_SIZE);
2273 if (!nic_dev->hwdev) {
2274 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2275 eth_dev->data->name);
2278 nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2281 rc = hinic_osdep_init(nic_dev->hwdev);
2283 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2284 eth_dev->data->name);
2285 goto init_osdep_fail;
2289 rc = hinic_hwif_res_init(nic_dev->hwdev);
2291 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2292 eth_dev->data->name);
2293 goto init_hwif_fail;
2297 rc = init_cfg_mgmt(nic_dev->hwdev);
2299 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2300 eth_dev->data->name);
2301 goto init_cfgmgnt_fail;
2305 rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2307 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2308 eth_dev->data->name);
2309 goto init_aeqs_fail;
2312 /* init_pf_to_mgnt */
2313 rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2315 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2316 eth_dev->data->name);
2317 goto init_pf_to_mgmt_fail;
2321 rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2323 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2324 eth_dev->data->name);
2325 goto init_func_to_func_fail;
2328 rc = hinic_card_workmode_check(nic_dev);
2330 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2331 eth_dev->data->name);
2332 goto workmode_check_fail;
2335 /* do l2nic reset to make chip clear */
2336 rc = hinic_l2nic_reset(nic_dev->hwdev);
2338 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2339 eth_dev->data->name);
2340 goto l2nic_reset_fail;
2343 /* init dma and aeq msix attribute table */
2344 (void)hinic_init_attr_table(nic_dev->hwdev);
2347 rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2349 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2350 eth_dev->data->name);
2351 goto init_cmdq_fail;
2354 /* set hardware state active */
2355 rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2357 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2358 eth_dev->data->name);
2359 goto init_resources_state_fail;
2362 /* init_capability */
2363 rc = hinic_init_capability(nic_dev->hwdev);
2365 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2366 eth_dev->data->name);
2370 /* get nic capability */
2371 if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2372 goto nic_check_fail;
2374 /* init root cla and function table */
2375 rc = hinic_init_nicio(nic_dev->hwdev);
2377 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2378 eth_dev->data->name);
2379 goto init_nicio_fail;
2382 /* init_software_txrxq */
2383 rc = hinic_init_sw_rxtxqs(nic_dev);
2385 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2386 eth_dev->data->name);
2387 goto init_sw_rxtxqs_fail;
2390 rc = hinic_copy_mempool_init(nic_dev);
2392 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2393 eth_dev->data->name);
2394 goto init_mpool_fail;
2397 /* set hardware feature to default status */
2398 rc = hinic_set_default_hw_feature(nic_dev);
2400 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2401 eth_dev->data->name);
2402 goto set_default_hw_feature_fail;
2407 set_default_hw_feature_fail:
2408 hinic_copy_mempool_uninit(nic_dev);
2411 hinic_deinit_sw_rxtxqs(nic_dev);
2413 init_sw_rxtxqs_fail:
2414 hinic_deinit_nicio(nic_dev->hwdev);
2419 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2421 init_resources_state_fail:
2422 hinic_comm_cmdqs_free(nic_dev->hwdev);
2426 workmode_check_fail:
2427 hinic_comm_func_to_func_free(nic_dev->hwdev);
2429 init_func_to_func_fail:
2430 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2432 init_pf_to_mgmt_fail:
2433 hinic_comm_aeqs_free(nic_dev->hwdev);
2436 free_cfg_mgmt(nic_dev->hwdev);
2439 hinic_hwif_res_free(nic_dev->hwdev);
2442 hinic_osdep_deinit(nic_dev->hwdev);
2445 rte_free(nic_dev->hwdev);
2446 nic_dev->hwdev = NULL;
2451 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2453 struct hinic_nic_dev *nic_dev =
2454 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2456 (void)hinic_set_link_status_follow(nic_dev->hwdev,
2457 HINIC_LINK_FOLLOW_DEFAULT);
2458 hinic_copy_mempool_uninit(nic_dev);
2459 hinic_deinit_sw_rxtxqs(nic_dev);
2460 hinic_deinit_nicio(nic_dev->hwdev);
2461 hinic_deactivate_hwdev_state(nic_dev->hwdev);
2462 hinic_comm_cmdqs_free(nic_dev->hwdev);
2463 hinic_comm_func_to_func_free(nic_dev->hwdev);
2464 hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2465 hinic_comm_aeqs_free(nic_dev->hwdev);
2466 free_cfg_mgmt(nic_dev->hwdev);
2467 hinic_hwif_res_free(nic_dev->hwdev);
2468 hinic_osdep_deinit(nic_dev->hwdev);
2469 rte_free(nic_dev->hwdev);
2470 nic_dev->hwdev = NULL;
2474 * DPDK callback to close the device.
2477 * Pointer to Ethernet device structure.
2479 static void hinic_dev_close(struct rte_eth_dev *dev)
2481 struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2483 if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2484 PMD_DRV_LOG(WARNING, "Device %s already closed",
2489 /* stop device first */
2490 hinic_dev_stop(dev);
2492 /* rx_cqe, rx_info */
2493 hinic_free_all_rx_resources(dev);
2496 hinic_free_all_tx_resources(dev);
2498 /* free wq, pi_dma_addr */
2499 hinic_free_all_rq(nic_dev);
2501 /* free wq, db_addr */
2502 hinic_free_all_sq(nic_dev);
2504 /* deinit mac vlan tbl */
2505 hinic_deinit_mac_addr(dev);
2506 hinic_remove_all_vlanid(dev);
2508 /* disable hardware and uio interrupt */
2509 hinic_disable_interrupt(dev);
2511 /* deinit nic hardware device */
2512 hinic_nic_dev_destroy(dev);
2515 static const struct eth_dev_ops hinic_pmd_ops = {
2516 .dev_configure = hinic_dev_configure,
2517 .dev_infos_get = hinic_dev_infos_get,
2518 .rx_queue_setup = hinic_rx_queue_setup,
2519 .tx_queue_setup = hinic_tx_queue_setup,
2520 .dev_start = hinic_dev_start,
2521 .link_update = hinic_link_update,
2522 .rx_queue_release = hinic_rx_queue_release,
2523 .tx_queue_release = hinic_tx_queue_release,
2524 .dev_stop = hinic_dev_stop,
2525 .dev_close = hinic_dev_close,
2526 .mtu_set = hinic_dev_set_mtu,
2527 .vlan_filter_set = hinic_vlan_filter_set,
2528 .vlan_offload_set = hinic_vlan_offload_set,
2529 .allmulticast_enable = hinic_dev_allmulticast_enable,
2530 .allmulticast_disable = hinic_dev_allmulticast_disable,
2531 .promiscuous_enable = hinic_dev_promiscuous_enable,
2532 .promiscuous_disable = hinic_dev_promiscuous_disable,
2533 .rss_hash_update = hinic_rss_hash_update,
2534 .rss_hash_conf_get = hinic_rss_conf_get,
2535 .reta_update = hinic_rss_indirtbl_update,
2536 .reta_query = hinic_rss_indirtbl_query,
2537 .stats_get = hinic_dev_stats_get,
2538 .stats_reset = hinic_dev_stats_reset,
2539 .xstats_get = hinic_dev_xstats_get,
2540 .xstats_reset = hinic_dev_xstats_reset,
2541 .xstats_get_names = hinic_dev_xstats_get_names,
2544 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2545 .dev_configure = hinic_dev_configure,
2546 .dev_infos_get = hinic_dev_infos_get,
2547 .rx_queue_setup = hinic_rx_queue_setup,
2548 .tx_queue_setup = hinic_tx_queue_setup,
2549 .dev_start = hinic_dev_start,
2550 .link_update = hinic_link_update,
2551 .rx_queue_release = hinic_rx_queue_release,
2552 .tx_queue_release = hinic_tx_queue_release,
2553 .dev_stop = hinic_dev_stop,
2554 .dev_close = hinic_dev_close,
2555 .mtu_set = hinic_dev_set_mtu,
2556 .vlan_filter_set = hinic_vlan_filter_set,
2557 .vlan_offload_set = hinic_vlan_offload_set,
2558 .allmulticast_enable = hinic_dev_allmulticast_enable,
2559 .allmulticast_disable = hinic_dev_allmulticast_disable,
2560 .rss_hash_update = hinic_rss_hash_update,
2561 .rss_hash_conf_get = hinic_rss_conf_get,
2562 .reta_update = hinic_rss_indirtbl_update,
2563 .reta_query = hinic_rss_indirtbl_query,
2564 .stats_get = hinic_dev_stats_get,
2565 .stats_reset = hinic_dev_stats_reset,
2566 .xstats_get = hinic_dev_xstats_get,
2567 .xstats_reset = hinic_dev_xstats_reset,
2568 .xstats_get_names = hinic_dev_xstats_get_names,
2571 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2573 struct rte_pci_device *pci_dev;
2574 struct rte_ether_addr *eth_addr;
2575 struct hinic_nic_dev *nic_dev;
2578 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2580 /* EAL is SECONDARY and eth_dev is already created */
2581 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2582 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2583 hinic_dev_interrupt_handler,
2586 PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2587 eth_dev->data->name);
2592 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2593 memset(nic_dev, 0, sizeof(*nic_dev));
2595 snprintf(nic_dev->proc_dev_name,
2596 sizeof(nic_dev->proc_dev_name),
2597 "hinic-%.4x:%.2x:%.2x.%x",
2598 pci_dev->addr.domain, pci_dev->addr.bus,
2599 pci_dev->addr.devid, pci_dev->addr.function);
2601 /* alloc mac_addrs */
2602 eth_addr = rte_zmalloc("hinic_mac", sizeof(*eth_addr), 0);
2604 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2605 eth_dev->data->name);
2609 eth_dev->data->mac_addrs = eth_addr;
2612 * Pass the information to the rte_eth_dev_close() that it should also
2613 * release the private port resources.
2615 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2617 /* create hardware nic_device */
2618 rc = hinic_nic_dev_create(eth_dev);
2620 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
2621 eth_dev->data->name);
2622 goto create_nic_dev_fail;
2625 if (HINIC_IS_VF(nic_dev->hwdev))
2626 eth_dev->dev_ops = &hinic_pmd_vf_ops;
2628 eth_dev->dev_ops = &hinic_pmd_ops;
2630 rc = hinic_init_mac_addr(eth_dev);
2632 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
2633 eth_dev->data->name);
2637 /* register callback func to eal lib */
2638 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2639 hinic_dev_interrupt_handler,
2642 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
2643 eth_dev->data->name);
2644 goto reg_intr_cb_fail;
2647 /* enable uio/vfio intr/eventfd mapping */
2648 rc = rte_intr_enable(&pci_dev->intr_handle);
2650 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
2651 eth_dev->data->name);
2652 goto enable_intr_fail;
2654 hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
2656 hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2657 PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
2658 eth_dev->data->name);
2663 (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
2664 hinic_dev_interrupt_handler,
2668 hinic_deinit_mac_addr(eth_dev);
2671 eth_dev->dev_ops = NULL;
2672 hinic_nic_dev_destroy(eth_dev);
2674 create_nic_dev_fail:
2676 eth_dev->data->mac_addrs = NULL;
2679 PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
2680 eth_dev->data->name);
2684 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
2686 struct rte_pci_device *pci_dev;
2688 pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2690 PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
2691 pci_dev->addr.domain, pci_dev->addr.bus,
2692 pci_dev->addr.devid, pci_dev->addr.function,
2693 (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
2694 "primary" : "secondary");
2696 /* rte_eth_dev rx_burst and tx_burst */
2697 eth_dev->rx_pkt_burst = hinic_recv_pkts;
2698 eth_dev->tx_pkt_burst = hinic_xmit_pkts;
2700 return hinic_func_init(eth_dev);
2703 static int hinic_dev_uninit(struct rte_eth_dev *dev)
2705 struct hinic_nic_dev *nic_dev;
2707 nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2708 hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
2710 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2713 hinic_dev_close(dev);
2715 dev->dev_ops = NULL;
2716 dev->rx_pkt_burst = NULL;
2717 dev->tx_pkt_burst = NULL;
2719 rte_free(dev->data->mac_addrs);
2720 dev->data->mac_addrs = NULL;
2725 static struct rte_pci_id pci_id_hinic_map[] = {
2726 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
2727 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
2728 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
2729 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
2730 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
2731 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
2732 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
2733 { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
2737 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2738 struct rte_pci_device *pci_dev)
2740 return rte_eth_dev_pci_generic_probe(pci_dev,
2741 sizeof(struct hinic_nic_dev), hinic_dev_init);
2744 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
2746 return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
2749 static struct rte_pci_driver rte_hinic_pmd = {
2750 .id_table = pci_id_hinic_map,
2751 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
2752 .probe = hinic_pci_probe,
2753 .remove = hinic_pci_remove,
2756 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
2757 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
2759 RTE_INIT(hinic_init_log)
2761 hinic_logtype = rte_log_register("pmd.net.hinic");
2762 if (hinic_logtype >= 0)
2763 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);