drivers/net/hinic/hinic_pmd_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev_pci.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memcpy.h>
  11 #include <rte_mempool.h>
  12 #include <rte_errno.h>
  13 #include <rte_ether.h>
  14
  15 #include "base/hinic_compat.h"
  16 #include "base/hinic_pmd_hwdev.h"
  17 #include "base/hinic_pmd_hwif.h"
  18 #include "base/hinic_pmd_wq.h"
  19 #include "base/hinic_pmd_cfg.h"
  20 #include "base/hinic_pmd_mgmt.h"
  21 #include "base/hinic_pmd_cmdq.h"
  22 #include "base/hinic_pmd_niccfg.h"
  23 #include "base/hinic_pmd_nicio.h"
  24 #include "base/hinic_pmd_mbox.h"
  25 #include "hinic_pmd_ethdev.h"
  26 #include "hinic_pmd_tx.h"
  27 #include "hinic_pmd_rx.h"
  28
  29 /* Vendor ID used by Huawei devices */
  30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
  31
  32 /* Hinic devices */
  33 #define HINIC_DEV_ID_PRD                0x1822
  34 #define HINIC_DEV_ID_VF                 0x375E
  35 #define HINIC_DEV_ID_VF_HV              0x379E
  36
  37 /* Mezz card for Blade Server */
  38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
  39 #define HINIC_DEV_ID_MEZZ_40GE          0x020D
  40 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
  41
  42 /* 2*25G and 2*100G card */
  43 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
  44 #define HINIC_DEV_ID_1822_100GE         0x0200
  45
  46 #define HINIC_SERVICE_MODE_NIC          2
  47
  48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
  49
  50 #define DEFAULT_BASE_COS                4
  51 #define NR_MAX_COS                      8
  52
  53 #define HINIC_MIN_RX_BUF_SIZE           1024
  54 #define HINIC_MAX_UC_MAC_ADDRS          128
  55 #define HINIC_MAX_MC_MAC_ADDRS          2048
  56 /*
  57  * vlan_id is a 12 bit number.
  58  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
  59  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
  60  * The higher 7 bit val specifies VFTA array index.
  61  */
  62 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
  63 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
  64
  65 #define HINIC_VLAN_FILTER_EN            (1U << 0)
  66
  67 #define HINIC_MTU_TO_PKTLEN(mtu)        \
  68         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
  69
  70 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
  71         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
  72
  73 /* lro numer limit for one packet */
  74 #define HINIC_LRO_WQE_NUM_DEFAULT       8
  75
  76 /* Driver-specific log messages type */
  77 int hinic_logtype;
  78
  79 struct hinic_xstats_name_off {
  80         char name[RTE_ETH_XSTATS_NAME_SIZE];
  81         u32  offset;
  82 };
  83
  84 #define HINIC_FUNC_STAT(_stat_item) {   \
  85         .name = #_stat_item, \
  86         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
  87 }
  88
  89 #define HINIC_PORT_STAT(_stat_item) { \
  90         .name = #_stat_item, \
  91         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
  92 }
  93
  94 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
  95         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
  96         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
  97         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
  98         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
  99         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
 100         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
 101
 102         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
 103         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
 104         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
 105         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
 106         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
 107         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
 108
 109         HINIC_FUNC_STAT(tx_discard_vport),
 110         HINIC_FUNC_STAT(rx_discard_vport),
 111         HINIC_FUNC_STAT(tx_err_vport),
 112         HINIC_FUNC_STAT(rx_err_vport),
 113 };
 114
 115 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
 116                 sizeof(hinic_vport_stats_strings[0]))
 117
 118 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
 119         HINIC_PORT_STAT(mac_rx_total_pkt_num),
 120         HINIC_PORT_STAT(mac_rx_total_oct_num),
 121         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
 122         HINIC_PORT_STAT(mac_rx_bad_oct_num),
 123         HINIC_PORT_STAT(mac_rx_good_pkt_num),
 124         HINIC_PORT_STAT(mac_rx_good_oct_num),
 125         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
 126         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
 127         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
 128         HINIC_PORT_STAT(mac_tx_total_pkt_num),
 129         HINIC_PORT_STAT(mac_tx_total_oct_num),
 130         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
 131         HINIC_PORT_STAT(mac_tx_bad_oct_num),
 132         HINIC_PORT_STAT(mac_tx_good_pkt_num),
 133         HINIC_PORT_STAT(mac_tx_good_oct_num),
 134         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
 135         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
 136         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
 137         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
 138         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
 139         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
 140         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
 141         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
 142         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
 143         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
 144         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
 145         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
 146         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
 147         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
 148         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
 149         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
 150         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
 151         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
 152         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
 153         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
 154         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
 155         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
 156         HINIC_PORT_STAT(mac_rx_mac_pause_num),
 157         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
 158         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
 159         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
 160         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
 161         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
 162         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
 163         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
 164         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
 165         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
 166         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
 167         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
 168         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
 169         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
 170         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
 171         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
 172         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
 173         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
 174         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
 175         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
 176         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
 177         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
 178         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
 179         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
 180         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
 181         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
 182         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
 183         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
 184         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
 185         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
 186         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
 187         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
 188         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
 189         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
 190         HINIC_PORT_STAT(mac_tx_mac_pause_num),
 191         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
 192         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
 193         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
 194         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
 195         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
 196         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
 197         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
 198         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
 199         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
 200         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
 201         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
 202         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
 203         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
 204 };
 205
 206 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
 207                 sizeof(hinic_phyport_stats_strings[0]))
 208
 209 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
 210         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
 211         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
 212 };
 213
 214 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
 215                 sizeof(hinic_rxq_stats_strings[0]))
 216
 217 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
 218         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
 219         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
 220         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
 221         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
 222         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
 223 };
 224
 225 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
 226                 sizeof(hinic_txq_stats_strings[0]))
 227
 228 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
 229 {
 230         if (HINIC_IS_VF(nic_dev->hwdev)) {
 231                 return (HINIC_VPORT_XSTATS_NUM +
 232                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 233                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 234         } else {
 235                 return (HINIC_VPORT_XSTATS_NUM +
 236                         HINIC_PHYPORT_XSTATS_NUM +
 237                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 238                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 239         }
 240 }
 241
 242 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
 243         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 244         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 245         .nb_align = HINIC_RXD_ALIGN,
 246 };
 247
 248 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
 249         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 250         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 251         .nb_align = HINIC_TXD_ALIGN,
 252 };
 253
 254 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 255
 256 /**
 257  * Interrupt handler triggered by NIC  for handling
 258  * specific event.
 259  *
 260  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
 261  */
 262 static void hinic_dev_interrupt_handler(void *param)
 263 {
 264         struct rte_eth_dev *dev = param;
 265         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 266
 267         if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
 268                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
 269                             nic_dev->proc_dev_name, dev->data->port_id);
 270                 return;
 271         }
 272
 273         /* aeq0 msg handler */
 274         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
 275 }
 276
 277 /**
 278  * Ethernet device configuration.
 279  *
 280  * Prepare the driver for a given number of TX and RX queues, mtu size
 281  * and configure RSS.
 282  *
 283  * @param dev
 284  *   Pointer to Ethernet device structure.
 285  *
 286  * @return
 287  *   0 on success, negative error value otherwise.
 288  */
 289 static int hinic_dev_configure(struct rte_eth_dev *dev)
 290 {
 291         struct hinic_nic_dev *nic_dev;
 292         struct hinic_nic_io *nic_io;
 293         int err;
 294
 295         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 296         nic_io = nic_dev->hwdev->nic_io;
 297
 298         nic_dev->num_sq =  dev->data->nb_tx_queues;
 299         nic_dev->num_rq = dev->data->nb_rx_queues;
 300
 301         nic_io->num_sqs =  dev->data->nb_tx_queues;
 302         nic_io->num_rqs = dev->data->nb_rx_queues;
 303
 304         /* queue pair is max_num(sq, rq) */
 305         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
 306                         nic_dev->num_sq : nic_dev->num_rq;
 307         nic_io->num_qps = nic_dev->num_qps;
 308
 309         if (nic_dev->num_qps > nic_io->max_qps) {
 310                 PMD_DRV_LOG(ERR,
 311                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
 312                         nic_dev->num_qps, nic_io->max_qps);
 313                 return -EINVAL;
 314         }
 315
 316         /* mtu size is 256~9600 */
 317         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
 318             dev->data->dev_conf.rxmode.max_rx_pkt_len >
 319             HINIC_MAX_JUMBO_FRAME_SIZE) {
 320                 PMD_DRV_LOG(ERR,
 321                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
 322                         "expect between %d and %d",
 323                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
 324                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
 325                 return -EINVAL;
 326         }
 327
 328         nic_dev->mtu_size =
 329                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
 330
 331         /* rss template */
 332         err = hinic_config_mq_mode(dev, TRUE);
 333         if (err) {
 334                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
 335                 return err;
 336         }
 337
 338         /* init vlan offoad */
 339         err = hinic_vlan_offload_set(dev,
 340                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 341         if (err) {
 342                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
 343                 (void)hinic_config_mq_mode(dev, FALSE);
 344                 return err;
 345         }
 346
 347         /*clear fdir filter flag in function table*/
 348         hinic_free_fdir_filter(nic_dev);
 349
 350         return HINIC_OK;
 351 }
 352
 353 /**
 354  * DPDK callback to create the receive queue.
 355  *
 356  * @param dev
 357  *   Pointer to Ethernet device structure.
 358  * @param queue_idx
 359  *   RX queue index.
 360  * @param nb_desc
 361  *   Number of descriptors for receive queue.
 362  * @param socket_id
 363  *   NUMA socket on which memory must be allocated.
 364  * @param rx_conf
 365  *   Thresholds parameters (unused_).
 366  * @param mp
 367  *   Memory pool for buffer allocations.
 368  *
 369  * @return
 370  *   0 on success, negative error value otherwise.
 371  */
 372 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 373                          uint16_t nb_desc, unsigned int socket_id,
 374                          __rte_unused const struct rte_eth_rxconf *rx_conf,
 375                          struct rte_mempool *mp)
 376 {
 377         int rc;
 378         struct hinic_nic_dev *nic_dev;
 379         struct hinic_hwdev *hwdev;
 380         struct hinic_rxq *rxq;
 381         u16 rq_depth, rx_free_thresh;
 382         u32 buf_size;
 383
 384         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 385         hwdev = nic_dev->hwdev;
 386
 387         /* queue depth must be power of 2, otherwise will be aligned up */
 388         rq_depth = (nb_desc & (nb_desc - 1)) ?
 389                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 390
 391         /*
 392          * Validate number of receive descriptors.
 393          * It must not exceed hardware maximum and minimum.
 394          */
 395         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
 396                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
 397                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 398                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 399                             (int)nb_desc, (int)rq_depth,
 400                             (int)dev->data->port_id, (int)queue_idx);
 401                 return -EINVAL;
 402         }
 403
 404         /*
 405          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
 406          * descriptors are used or if the number of descriptors required
 407          * to transmit a packet is greater than the number of free RX
 408          * descriptors.
 409          * The following constraints must be satisfied:
 410          *  rx_free_thresh must be greater than 0.
 411          *  rx_free_thresh must be less than the size of the ring minus 1.
 412          * When set to zero use default values.
 413          */
 414         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
 415                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
 416         if (rx_free_thresh >= (rq_depth - 1)) {
 417                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
 418                             (unsigned int)rx_free_thresh,
 419                             (int)dev->data->port_id,
 420                             (int)queue_idx);
 421                 return -EINVAL;
 422         }
 423
 424         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
 425                                  RTE_CACHE_LINE_SIZE, socket_id);
 426         if (!rxq) {
 427                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
 428                             queue_idx, dev->data->name);
 429                 return -ENOMEM;
 430         }
 431         nic_dev->rxqs[queue_idx] = rxq;
 432
 433         /* alloc rx sq hw wqepage*/
 434         rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
 435         if (rc) {
 436                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
 437                             queue_idx, dev->data->name, rq_depth);
 438                 goto ceate_rq_fail;
 439         }
 440
 441         /* mbuf pool must be assigned before setup rx resources */
 442         rxq->mb_pool = mp;
 443
 444         rc =
 445         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 446                                   RTE_PKTMBUF_HEADROOM, &buf_size);
 447         if (rc) {
 448                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
 449                             dev->data->name);
 450                 goto adjust_bufsize_fail;
 451         }
 452
 453         /* rx queue info, rearm control */
 454         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
 455         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
 456         rxq->nic_dev = nic_dev;
 457         rxq->q_id = queue_idx;
 458         rxq->q_depth = rq_depth;
 459         rxq->buf_len = (u16)buf_size;
 460         rxq->rx_free_thresh = rx_free_thresh;
 461
 462         /* the last point cant do mbuf rearm in bulk */
 463         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
 464
 465         /* device port identifier */
 466         rxq->port_id = dev->data->port_id;
 467
 468         /* alloc rx_cqe and prepare rq_wqe */
 469         rc = hinic_setup_rx_resources(rxq);
 470         if (rc) {
 471                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
 472                             queue_idx, dev->data->name);
 473                 goto setup_rx_res_err;
 474         }
 475
 476         /* record nic_dev rxq in rte_eth rx_queues */
 477         dev->data->rx_queues[queue_idx] = rxq;
 478
 479         return 0;
 480
 481 setup_rx_res_err:
 482 adjust_bufsize_fail:
 483         hinic_destroy_rq(hwdev, queue_idx);
 484
 485 ceate_rq_fail:
 486         rte_free(rxq);
 487
 488         return rc;
 489 }
 490
 491 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
 492 {
 493         struct hinic_rxq *rxq;
 494         struct hinic_nic_dev *nic_dev;
 495         int q_id = 0;
 496
 497         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 498
 499         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
 500                 rxq = dev->data->rx_queues[q_id];
 501
 502                 rxq->wq->cons_idx = 0;
 503                 rxq->wq->prod_idx = 0;
 504                 rxq->wq->delta = rxq->q_depth;
 505                 rxq->wq->mask = rxq->q_depth - 1;
 506
 507                 /* alloc mbuf to rq */
 508                 hinic_rx_alloc_pkts(rxq);
 509         }
 510 }
 511
 512 /**
 513  * DPDK callback to configure the transmit queue.
 514  *
 515  * @param dev
 516  *   Pointer to Ethernet device structure.
 517  * @param queue_idx
 518  *   Transmit queue index.
 519  * @param nb_desc
 520  *   Number of descriptors for transmit queue.
 521  * @param socket_id
 522  *   NUMA socket on which memory must be allocated.
 523  * @param tx_conf
 524  *   Tx queue configuration parameters.
 525  *
 526  * @return
 527  *   0 on success, negative error value otherwise.
 528  */
 529 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 530                          uint16_t nb_desc, unsigned int socket_id,
 531                          __rte_unused const struct rte_eth_txconf *tx_conf)
 532 {
 533         int rc;
 534         struct hinic_nic_dev *nic_dev;
 535         struct hinic_hwdev *hwdev;
 536         struct hinic_txq *txq;
 537         u16 sq_depth, tx_free_thresh;
 538
 539         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 540         hwdev = nic_dev->hwdev;
 541
 542         /* queue depth must be power of 2, otherwise will be aligned up */
 543         sq_depth = (nb_desc & (nb_desc - 1)) ?
 544                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 545
 546         /*
 547          * Validate number of transmit descriptors.
 548          * It must not exceed hardware maximum and minimum.
 549          */
 550         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
 551                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
 552                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 553                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 554                           (int)nb_desc, (int)sq_depth,
 555                           (int)dev->data->port_id, (int)queue_idx);
 556                 return -EINVAL;
 557         }
 558
 559         /*
 560          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
 561          * descriptors are used or if the number of descriptors required
 562          * to transmit a packet is greater than the number of free TX
 563          * descriptors.
 564          * The following constraints must be satisfied:
 565          *  tx_free_thresh must be greater than 0.
 566          *  tx_free_thresh must be less than the size of the ring minus 1.
 567          * When set to zero use default values.
 568          */
 569         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
 570                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
 571         if (tx_free_thresh >= (sq_depth - 1)) {
 572                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
 573                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
 574                         (int)queue_idx);
 575                 return -EINVAL;
 576         }
 577
 578         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
 579                                  RTE_CACHE_LINE_SIZE, socket_id);
 580         if (!txq) {
 581                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
 582                             queue_idx, dev->data->name);
 583                 return -ENOMEM;
 584         }
 585         nic_dev->txqs[queue_idx] = txq;
 586
 587         /* alloc tx sq hw wqepage */
 588         rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
 589         if (rc) {
 590                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
 591                             queue_idx, dev->data->name, sq_depth);
 592                 goto create_sq_fail;
 593         }
 594
 595         txq->q_id = queue_idx;
 596         txq->q_depth = sq_depth;
 597         txq->port_id = dev->data->port_id;
 598         txq->tx_free_thresh = tx_free_thresh;
 599         txq->nic_dev = nic_dev;
 600         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
 601         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
 602         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
 603         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
 604         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
 605                                         sizeof(struct hinic_sq_bufdesc);
 606         txq->cos = nic_dev->default_cos;
 607
 608         /* alloc software txinfo */
 609         rc = hinic_setup_tx_resources(txq);
 610         if (rc) {
 611                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
 612                             queue_idx, dev->data->name);
 613                 goto setup_tx_res_fail;
 614         }
 615
 616         /* record nic_dev txq in rte_eth tx_queues */
 617         dev->data->tx_queues[queue_idx] = txq;
 618
 619         return HINIC_OK;
 620
 621 setup_tx_res_fail:
 622         hinic_destroy_sq(hwdev, queue_idx);
 623
 624 create_sq_fail:
 625         rte_free(txq);
 626
 627         return rc;
 628 }
 629
 630 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
 631 {
 632         struct hinic_nic_dev *nic_dev;
 633         struct hinic_txq *txq;
 634         struct hinic_nic_io *nic_io;
 635         struct hinic_hwdev *hwdev;
 636         volatile u32 *ci_addr;
 637         int q_id = 0;
 638
 639         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 640         hwdev = nic_dev->hwdev;
 641         nic_io = hwdev->nic_io;
 642
 643         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
 644                 txq = dev->data->tx_queues[q_id];
 645
 646                 txq->wq->cons_idx = 0;
 647                 txq->wq->prod_idx = 0;
 648                 txq->wq->delta = txq->q_depth;
 649                 txq->wq->mask  = txq->q_depth - 1;
 650
 651                 /* clear hardware ci */
 652                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
 653                                                         q_id);
 654                 *ci_addr = 0;
 655         }
 656 }
 657
 658 /**
 659  * Get link speed from NIC.
 660  *
 661  * @param dev
 662  *   Pointer to Ethernet device structure.
 663  * @param speed_capa
 664  *   Pointer to link speed structure.
 665  */
 666 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
 667 {
 668         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 669         u32 supported_link, advertised_link;
 670         int err;
 671
 672 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
 673
 674 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
 675
 676 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
 677                                         (1U << HINIC_25GE_BASE_CR_S) | \
 678                                         (1U << HINIC_25GE_BASE_KR) | \
 679                                         (1U << HINIC_25GE_BASE_CR))
 680
 681 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
 682                                         (1U << HINIC_40GE_BASE_CR4))
 683
 684 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
 685                                         (1U << HINIC_100GE_BASE_CR4))
 686
 687         err = hinic_get_link_mode(nic_dev->hwdev,
 688                                   &supported_link, &advertised_link);
 689         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
 690             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
 691                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
 692                           nic_dev->proc_dev_name, dev->data->port_id);
 693         } else {
 694                 *speed_capa = 0;
 695                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
 696                         *speed_capa |= ETH_LINK_SPEED_1G;
 697                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
 698                         *speed_capa |= ETH_LINK_SPEED_10G;
 699                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
 700                         *speed_capa |= ETH_LINK_SPEED_25G;
 701                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
 702                         *speed_capa |= ETH_LINK_SPEED_40G;
 703                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
 704                         *speed_capa |= ETH_LINK_SPEED_100G;
 705         }
 706 }
 707
 708 /**
 709  * DPDK callback to get information about the device.
 710  *
 711  * @param dev
 712  *   Pointer to Ethernet device structure.
 713  * @param info
 714  *   Pointer to Info structure output buffer.
 715  */
 716 static int
 717 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 718 {
 719         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 720
 721         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
 722         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
 723         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
 724         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
 725         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
 726         info->min_mtu = HINIC_MIN_MTU_SIZE;
 727         info->max_mtu = HINIC_MAX_MTU_SIZE;
 728
 729         hinic_get_speed_capa(dev, &info->speed_capa);
 730         info->rx_queue_offload_capa = 0;
 731         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 732                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 733                                 DEV_RX_OFFLOAD_UDP_CKSUM |
 734                                 DEV_RX_OFFLOAD_TCP_CKSUM |
 735                                 DEV_RX_OFFLOAD_VLAN_FILTER |
 736                                 DEV_RX_OFFLOAD_SCATTER |
 737                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 738                                 DEV_RX_OFFLOAD_TCP_LRO;
 739
 740         info->tx_queue_offload_capa = 0;
 741         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 742                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 743                                 DEV_TX_OFFLOAD_UDP_CKSUM |
 744                                 DEV_TX_OFFLOAD_TCP_CKSUM |
 745                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 746                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 747                                 DEV_TX_OFFLOAD_TCP_TSO |
 748                                 DEV_TX_OFFLOAD_MULTI_SEGS;
 749
 750         info->hash_key_size = HINIC_RSS_KEY_SIZE;
 751         info->reta_size = HINIC_RSS_INDIR_SIZE;
 752         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
 753         info->rx_desc_lim = hinic_rx_desc_lim;
 754         info->tx_desc_lim = hinic_tx_desc_lim;
 755
 756         return 0;
 757 }
 758
 759 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
 760                                 size_t fw_size)
 761 {
 762         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 763         char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
 764         int err;
 765
 766         err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
 767         if (err) {
 768                 PMD_DRV_LOG(ERR, "Failed to get fw version\n");
 769                 return -EINVAL;
 770         }
 771
 772         if (fw_size < strlen(fw_ver) + 1)
 773                 return (strlen(fw_ver) + 1);
 774
 775         snprintf(fw_version, fw_size, "%s", fw_ver);
 776
 777         return 0;
 778 }
 779
 780 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
 781 {
 782         int err;
 783
 784         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
 785         if (err) {
 786                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
 787                 return -EINVAL;
 788         }
 789         nic_dev->rx_mode_status = rx_mode_ctrl;
 790
 791         return 0;
 792 }
 793
 794
 795 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 796 {
 797         int err;
 798         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 799         bool lro_en;
 800
 801         /* rx configure, if rss enable, need to init default configuration */
 802         err = hinic_rx_configure(dev);
 803         if (err) {
 804                 PMD_DRV_LOG(ERR, "Configure rss failed");
 805                 return err;
 806         }
 807
 808         /* rx mode init */
 809         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
 810         if (err) {
 811                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
 812                         HINIC_DEFAULT_RX_MODE);
 813                 goto set_rx_mode_fail;
 814         }
 815
 816         /* config lro */
 817         lro_en = dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO ?
 818                         true : false;
 819
 820         err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en,
 821                                 HINIC_LRO_WQE_NUM_DEFAULT);
 822         if (err) {
 823                 PMD_DRV_LOG(ERR, "%s lro failed, err: %d",
 824                         lro_en ? "Enable" : "Disable", err);
 825                 goto set_rx_mode_fail;
 826         }
 827
 828         return HINIC_OK;
 829
 830 set_rx_mode_fail:
 831         hinic_rx_remove_configure(dev);
 832
 833         return err;
 834 }
 835
 836 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
 837 {
 838         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 839
 840         (void)hinic_config_rx_mode(nic_dev, 0);
 841         hinic_rx_remove_configure(dev);
 842 }
 843
 844 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
 845                                           struct rte_eth_link *link)
 846 {
 847         int rc;
 848         u8 port_link_status = 0;
 849         struct nic_port_info port_link_info;
 850         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
 851         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
 852                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
 853                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
 854                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
 855
 856         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
 857         if (rc)
 858                 return rc;
 859
 860         if (!port_link_status) {
 861                 link->link_status = ETH_LINK_DOWN;
 862                 link->link_speed = 0;
 863                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
 864                 link->link_autoneg = ETH_LINK_FIXED;
 865                 return HINIC_OK;
 866         }
 867
 868         memset(&port_link_info, 0, sizeof(port_link_info));
 869         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
 870         if (rc)
 871                 return rc;
 872
 873         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
 874         link->link_duplex = port_link_info.duplex;
 875         link->link_autoneg = port_link_info.autoneg_state;
 876         link->link_status = port_link_status;
 877
 878         return HINIC_OK;
 879 }
 880
 881 /**
 882  * DPDK callback to retrieve physical link information.
 883  *
 884  * @param dev
 885  *   Pointer to Ethernet device structure.
 886  * @param wait_to_complete
 887  *   Wait for request completion.
 888  *
 889  * @return
 890  *   0 link status changed, -1 link status not changed
 891  */
 892 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 893 {
 894 #define CHECK_INTERVAL 10  /* 10ms */
 895 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
 896         int rc = HINIC_OK;
 897         struct rte_eth_link link;
 898         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 899         unsigned int rep_cnt = MAX_REPEAT_TIME;
 900
 901         memset(&link, 0, sizeof(link));
 902         do {
 903                 /* Get link status information from hardware */
 904                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
 905                 if (rc != HINIC_OK) {
 906                         link.link_speed = ETH_SPEED_NUM_NONE;
 907                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 908                         PMD_DRV_LOG(ERR, "Get link status failed");
 909                         goto out;
 910                 }
 911
 912                 if (!wait_to_complete || link.link_status)
 913                         break;
 914
 915                 rte_delay_ms(CHECK_INTERVAL);
 916         } while (rep_cnt--);
 917
 918 out:
 919         rc = rte_eth_linkstatus_set(dev, &link);
 920         return rc;
 921 }
 922
 923 /**
 924  * DPDK callback to bring the link UP.
 925  *
 926  * @param dev
 927  *   Pointer to Ethernet device structure.
 928  *
 929  * @return
 930  *   0 on success, negative errno value on failure.
 931  */
 932 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
 933 {
 934         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 935         int ret;
 936
 937         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
 938         if (ret) {
 939                 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
 940                             nic_dev->proc_dev_name, dev->data->port_id);
 941                 return ret;
 942         }
 943
 944         /* link status follow phy port status, up will open pma */
 945         ret = hinic_set_port_enable(nic_dev->hwdev, true);
 946         if (ret)
 947                 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
 948                             nic_dev->proc_dev_name, dev->data->port_id);
 949
 950         return ret;
 951 }
 952
 953 /**
 954  * DPDK callback to bring the link DOWN.
 955  *
 956  * @param dev
 957  *   Pointer to Ethernet device structure.
 958  *
 959  * @return
 960  *   0 on success, negative errno value on failure.
 961  */
 962 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
 963 {
 964         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 965         int ret;
 966
 967         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
 968         if (ret) {
 969                 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
 970                             nic_dev->proc_dev_name, dev->data->port_id);
 971                 return ret;
 972         }
 973
 974         /* link status follow phy port status, up will close pma */
 975         ret = hinic_set_port_enable(nic_dev->hwdev, false);
 976         if (ret)
 977                 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
 978                             nic_dev->proc_dev_name, dev->data->port_id);
 979
 980         return ret;
 981 }
 982
 983 /**
 984  * DPDK callback to start the device.
 985  *
 986  * @param dev
 987  *   Pointer to Ethernet device structure.
 988  *
 989  * @return
 990  *   0 on success, negative errno value on failure.
 991  */
 992 static int hinic_dev_start(struct rte_eth_dev *dev)
 993 {
 994         int rc;
 995         char *name;
 996         struct hinic_nic_dev *nic_dev;
 997
 998         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 999         name = dev->data->name;
1000
1001         /* reset rx and tx queue */
1002         hinic_reset_rx_queue(dev);
1003         hinic_reset_tx_queue(dev);
1004
1005         /* get func rx buf size */
1006         hinic_get_func_rx_buf_size(nic_dev);
1007
1008         /* init txq and rxq context */
1009         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1010         if (rc) {
1011                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
1012                             name);
1013                 goto init_qp_fail;
1014         }
1015
1016         /* rss template */
1017         rc = hinic_config_mq_mode(dev, TRUE);
1018         if (rc) {
1019                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1020                             name);
1021                 goto cfg_mq_mode_fail;
1022         }
1023
1024         /* set default mtu */
1025         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1026         if (rc) {
1027                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1028                             nic_dev->mtu_size, name);
1029                 goto set_mtu_fail;
1030         }
1031
1032         /* configure rss rx_mode and other rx or tx default feature */
1033         rc = hinic_rxtx_configure(dev);
1034         if (rc) {
1035                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1036                             name);
1037                 goto cfg_rxtx_fail;
1038         }
1039
1040         /* reactive pf status, so that uP report asyn event */
1041         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1042
1043         /* open virtual port and ready to start packet receiving */
1044         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1045         if (rc) {
1046                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1047                 goto en_vport_fail;
1048         }
1049
1050         /* open physical port and start packet receiving */
1051         rc = hinic_set_port_enable(nic_dev->hwdev, true);
1052         if (rc) {
1053                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
1054                             name);
1055                 goto en_port_fail;
1056         }
1057
1058         /* update eth_dev link status */
1059         if (dev->data->dev_conf.intr_conf.lsc != 0)
1060                 (void)hinic_link_update(dev, 0);
1061
1062         hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
1063
1064         return 0;
1065
1066 en_port_fail:
1067         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1068
1069 en_vport_fail:
1070         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1071
1072         /* Flush tx && rx chip resources in case of set vport fake fail */
1073         (void)hinic_flush_qp_res(nic_dev->hwdev);
1074         rte_delay_ms(100);
1075
1076         hinic_remove_rxtx_configure(dev);
1077
1078 cfg_rxtx_fail:
1079 set_mtu_fail:
1080 cfg_mq_mode_fail:
1081         hinic_free_qp_ctxts(nic_dev->hwdev);
1082
1083 init_qp_fail:
1084         hinic_free_all_rx_mbuf(dev);
1085         hinic_free_all_tx_mbuf(dev);
1086
1087         return rc;
1088 }
1089
1090 /**
1091  * DPDK callback to release the receive queue.
1092  *
1093  * @param queue
1094  *   Generic receive queue pointer.
1095  */
1096 static void hinic_rx_queue_release(void *queue)
1097 {
1098         struct hinic_rxq *rxq = queue;
1099         struct hinic_nic_dev *nic_dev;
1100
1101         if (!rxq) {
1102                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1103                 return;
1104         }
1105         nic_dev = rxq->nic_dev;
1106
1107         /* free rxq_pkt mbuf */
1108         hinic_free_all_rx_mbufs(rxq);
1109
1110         /* free rxq_cqe, rxq_info */
1111         hinic_free_rx_resources(rxq);
1112
1113         /* free root rq wq */
1114         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1115
1116         nic_dev->rxqs[rxq->q_id] = NULL;
1117
1118         /* free rxq */
1119         rte_free(rxq);
1120 }
1121
1122 /**
1123  * DPDK callback to release the transmit queue.
1124  *
1125  * @param queue
1126  *   Generic transmit queue pointer.
1127  */
1128 static void hinic_tx_queue_release(void *queue)
1129 {
1130         struct hinic_txq *txq = queue;
1131         struct hinic_nic_dev *nic_dev;
1132
1133         if (!txq) {
1134                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1135                 return;
1136         }
1137         nic_dev = txq->nic_dev;
1138
1139         /* free txq_pkt mbuf */
1140         hinic_free_all_tx_mbufs(txq);
1141
1142         /* free txq_info */
1143         hinic_free_tx_resources(txq);
1144
1145         /* free root sq wq */
1146         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1147         nic_dev->txqs[txq->q_id] = NULL;
1148
1149         /* free txq */
1150         rte_free(txq);
1151 }
1152
1153 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1154 {
1155         u16 q_id;
1156
1157         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1158                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1159 }
1160
1161 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1162 {
1163         u16 q_id;
1164
1165         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1166                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1167 }
1168
1169 /**
1170  * DPDK callback to stop the device.
1171  *
1172  * @param dev
1173  *   Pointer to Ethernet device structure.
1174  */
1175 static void hinic_dev_stop(struct rte_eth_dev *dev)
1176 {
1177         int rc;
1178         char *name;
1179         uint16_t port_id;
1180         struct hinic_nic_dev *nic_dev;
1181         struct rte_eth_link link;
1182
1183         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1184         name = dev->data->name;
1185         port_id = dev->data->port_id;
1186
1187         if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1188                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1189                 return;
1190         }
1191
1192         /* just stop phy port and vport */
1193         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1194         if (rc)
1195                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1196                           rc, name, port_id);
1197
1198         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1199         if (rc)
1200                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1201                           rc, name, port_id);
1202
1203         /* Clear recorded link status */
1204         memset(&link, 0, sizeof(link));
1205         (void)rte_eth_linkstatus_set(dev, &link);
1206
1207         /* flush pending io request */
1208         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1209         if (rc)
1210                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1211                             rc, name, port_id);
1212
1213         /* clean rss table and rx_mode */
1214         hinic_remove_rxtx_configure(dev);
1215
1216         /* clean root context */
1217         hinic_free_qp_ctxts(nic_dev->hwdev);
1218
1219         hinic_free_fdir_filter(nic_dev);
1220
1221         /* free mbuf */
1222         hinic_free_all_rx_mbuf(dev);
1223         hinic_free_all_tx_mbuf(dev);
1224 }
1225
1226 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1227 {
1228         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1229         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1230         int ret, retries = 0;
1231
1232         hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1233
1234         /* disable msix interrupt in hardware */
1235         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1236
1237         /* disable rte interrupt */
1238         ret = rte_intr_disable(&pci_dev->intr_handle);
1239         if (ret)
1240                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1241
1242         do {
1243                 ret =
1244                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1245                                              hinic_dev_interrupt_handler, dev);
1246                 if (ret >= 0) {
1247                         break;
1248                 } else if (ret == -EAGAIN) {
1249                         rte_delay_ms(100);
1250                         retries++;
1251                 } else {
1252                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1253                                     ret);
1254                         break;
1255                 }
1256         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1257
1258         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1259                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1260                             retries);
1261 }
1262
1263 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1264 {
1265         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1266
1267         if (enable)
1268                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1269         else
1270                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1271
1272         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1273 }
1274
1275 /**
1276  * DPDK callback to get device statistics.
1277  *
1278  * @param dev
1279  *   Pointer to Ethernet device structure.
1280  * @param stats
1281  *   Stats structure output buffer.
1282  *
1283  * @return
1284  *   0 on success and stats is filled,
1285  *   negative error value otherwise.
1286  */
1287 static int
1288 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1289 {
1290         int i, err, q_num;
1291         u64 rx_discards_pmd = 0;
1292         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1293         struct hinic_vport_stats vport_stats;
1294         struct hinic_rxq        *rxq = NULL;
1295         struct hinic_rxq_stats rxq_stats;
1296         struct hinic_txq        *txq = NULL;
1297         struct hinic_txq_stats txq_stats;
1298
1299         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1300         if (err) {
1301                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1302                         nic_dev->proc_dev_name);
1303                 return err;
1304         }
1305
1306         /* rx queue stats */
1307         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1308                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1309         for (i = 0; i < q_num; i++) {
1310                 rxq = nic_dev->rxqs[i];
1311                 hinic_rxq_get_stats(rxq, &rxq_stats);
1312                 stats->q_ipackets[i] = rxq_stats.packets;
1313                 stats->q_ibytes[i] = rxq_stats.bytes;
1314                 stats->q_errors[i] = rxq_stats.rx_discards;
1315
1316                 stats->ierrors += rxq_stats.errors;
1317                 rx_discards_pmd += rxq_stats.rx_discards;
1318                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1319         }
1320
1321         /* tx queue stats */
1322         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1323                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1324         for (i = 0; i < q_num; i++) {
1325                 txq = nic_dev->txqs[i];
1326                 hinic_txq_get_stats(txq, &txq_stats);
1327                 stats->q_opackets[i] = txq_stats.packets;
1328                 stats->q_obytes[i] = txq_stats.bytes;
1329                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1330         }
1331
1332         /* vport stats */
1333         stats->oerrors += vport_stats.tx_discard_vport;
1334
1335         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1336
1337         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1338                         vport_stats.rx_multicast_pkts_vport +
1339                         vport_stats.rx_broadcast_pkts_vport -
1340                         rx_discards_pmd);
1341
1342         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1343                         vport_stats.tx_multicast_pkts_vport +
1344                         vport_stats.tx_broadcast_pkts_vport);
1345
1346         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1347                         vport_stats.rx_multicast_bytes_vport +
1348                         vport_stats.rx_broadcast_bytes_vport);
1349
1350         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1351                         vport_stats.tx_multicast_bytes_vport +
1352                         vport_stats.tx_broadcast_bytes_vport);
1353         return 0;
1354 }
1355
1356 /**
1357  * DPDK callback to clear device statistics.
1358  *
1359  * @param dev
1360  *   Pointer to Ethernet device structure.
1361  */
1362 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1363 {
1364         int qid;
1365         struct hinic_rxq        *rxq = NULL;
1366         struct hinic_txq        *txq = NULL;
1367         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1368         int ret;
1369
1370         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1371         if (ret != 0)
1372                 return ret;
1373
1374         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1375                 rxq = nic_dev->rxqs[qid];
1376                 hinic_rxq_stats_reset(rxq);
1377         }
1378
1379         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1380                 txq = nic_dev->txqs[qid];
1381                 hinic_txq_stats_reset(txq);
1382         }
1383
1384         return 0;
1385 }
1386
1387 /**
1388  * DPDK callback to clear device extended statistics.
1389  *
1390  * @param dev
1391  *   Pointer to Ethernet device structure.
1392  */
1393 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1394 {
1395         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1396         int ret;
1397
1398         ret = hinic_dev_stats_reset(dev);
1399         if (ret != 0)
1400                 return ret;
1401
1402         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1403                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1404                 if (ret != 0)
1405                         return ret;
1406         }
1407
1408         return 0;
1409 }
1410
1411 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1412 {
1413         uint64_t random_value;
1414
1415         /* Set Organizationally Unique Identifier (OUI) prefix */
1416         mac_addr->addr_bytes[0] = 0x00;
1417         mac_addr->addr_bytes[1] = 0x09;
1418         mac_addr->addr_bytes[2] = 0xC0;
1419         /* Force indication of locally assigned MAC address. */
1420         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1421         /* Generate the last 3 bytes of the MAC address with a random number. */
1422         random_value = rte_rand();
1423         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1424 }
1425
1426 /**
1427  * Init mac_vlan table in NIC.
1428  *
1429  * @param dev
1430  *   Pointer to Ethernet device structure.
1431  *
1432  * @return
1433  *   0 on success and stats is filled,
1434  *   negative error value otherwise.
1435  */
1436 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1437 {
1438         struct hinic_nic_dev *nic_dev =
1439                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1440         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1441         u16 func_id = 0;
1442         int rc = 0;
1443
1444         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1445         if (rc)
1446                 return rc;
1447
1448         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1449                 &eth_dev->data->mac_addrs[0]);
1450         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1451                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1452
1453         func_id = hinic_global_func_id(nic_dev->hwdev);
1454         rc = hinic_set_mac(nic_dev->hwdev,
1455                         eth_dev->data->mac_addrs[0].addr_bytes,
1456                         0, func_id);
1457         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1458                 return rc;
1459
1460         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1461                         &nic_dev->default_addr);
1462
1463         return 0;
1464 }
1465
1466 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1467 {
1468         u16 func_id;
1469         u32 i;
1470
1471         func_id = hinic_global_func_id(nic_dev->hwdev);
1472
1473         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1474                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1475                         break;
1476
1477                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1478                               0, func_id);
1479                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1480         }
1481 }
1482
1483 /**
1484  * Deinit mac_vlan table in NIC.
1485  *
1486  * @param dev
1487  *   Pointer to Ethernet device structure.
1488  *
1489  * @return
1490  *   0 on success and stats is filled,
1491  *   negative error value otherwise.
1492  */
1493 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1494 {
1495         struct hinic_nic_dev *nic_dev =
1496                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1497         u16 func_id = 0;
1498         int rc;
1499         int i;
1500
1501         func_id = hinic_global_func_id(nic_dev->hwdev);
1502
1503         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1504                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1505                         continue;
1506
1507                 rc = hinic_del_mac(nic_dev->hwdev,
1508                                    eth_dev->data->mac_addrs[i].addr_bytes,
1509                                    0, func_id);
1510                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1511                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1512                                     eth_dev->data->name);
1513
1514                 memset(&eth_dev->data->mac_addrs[i], 0,
1515                        sizeof(struct rte_ether_addr));
1516         }
1517
1518         /* delete multicast mac addrs */
1519         hinic_delete_mc_addr_list(nic_dev);
1520 }
1521
1522 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1523 {
1524         int ret = 0;
1525         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1526
1527         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1528                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1529
1530         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1531                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1532                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1533                 return -EINVAL;
1534         }
1535
1536         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1537         if (ret) {
1538                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1539                 return ret;
1540         }
1541
1542         /* update max frame size */
1543         dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1544         nic_dev->mtu_size = mtu;
1545
1546         return ret;
1547 }
1548
1549 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1550                                         u16 vlan_id, bool on)
1551 {
1552         u32 vid_idx, vid_bit;
1553
1554         vid_idx = HINIC_VFTA_IDX(vlan_id);
1555         vid_bit = HINIC_VFTA_BIT(vlan_id);
1556
1557         if (on)
1558                 nic_dev->vfta[vid_idx] |= vid_bit;
1559         else
1560                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1561 }
1562
1563 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1564                                 uint16_t vlan_id)
1565 {
1566         u32 vid_idx, vid_bit;
1567
1568         vid_idx = HINIC_VFTA_IDX(vlan_id);
1569         vid_bit = HINIC_VFTA_BIT(vlan_id);
1570
1571         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1572 }
1573
1574 /**
1575  * DPDK callback to set vlan filter.
1576  *
1577  * @param dev
1578  *   Pointer to Ethernet device structure.
1579  * @param vlan_id
1580  *   vlan id is used to filter vlan packets
1581  * @param enable
1582  *   enable disable or enable vlan filter function
1583  */
1584 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1585                                 uint16_t vlan_id, int enable)
1586 {
1587         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1588         int err = 0;
1589         u16 func_id;
1590
1591         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1592                 return -EINVAL;
1593
1594         func_id = hinic_global_func_id(nic_dev->hwdev);
1595
1596         if (enable) {
1597                 /* If vlanid is already set, just return */
1598                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1599                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1600                                   vlan_id, nic_dev->proc_dev_name);
1601                         return 0;
1602                 }
1603
1604                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1605                                             func_id, TRUE);
1606         } else {
1607                 /* If vlanid can't be found, just return */
1608                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1609                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1610                                   vlan_id, nic_dev->proc_dev_name);
1611                         return 0;
1612                 }
1613
1614                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1615                                             func_id, FALSE);
1616         }
1617
1618         if (err) {
1619                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1620                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1621                 return err;
1622         }
1623
1624         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1625
1626         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1627                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1628         return 0;
1629 }
1630
1631 /**
1632  * DPDK callback to enable or disable vlan offload.
1633  *
1634  * @param dev
1635  *   Pointer to Ethernet device structure.
1636  * @param mask
1637  *   Definitions used for VLAN setting
1638  */
1639 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1640 {
1641         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1642         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1643         bool on;
1644         int err;
1645
1646         /* Enable or disable VLAN filter */
1647         if (mask & ETH_VLAN_FILTER_MASK) {
1648                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1649                         TRUE : FALSE;
1650                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1651                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1652                         PMD_DRV_LOG(WARNING,
1653                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1654                                   nic_dev->proc_dev_name, dev->data->port_id);
1655                 } else if (err) {
1656                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1657                                   on ? "enable" : "disable",
1658                                   nic_dev->proc_dev_name,
1659                                   dev->data->port_id, err);
1660                         return err;
1661                 }
1662
1663                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1664                           on ? "Enable" : "Disable",
1665                           nic_dev->proc_dev_name, dev->data->port_id);
1666         }
1667
1668         /* Enable or disable VLAN stripping */
1669         if (mask & ETH_VLAN_STRIP_MASK) {
1670                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1671                         TRUE : FALSE;
1672                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1673                 if (err) {
1674                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1675                                   on ? "enable" : "disable",
1676                                   nic_dev->proc_dev_name,
1677                                   dev->data->port_id, err);
1678                         return err;
1679                 }
1680
1681                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1682                           on ? "Enable" : "Disable",
1683                           nic_dev->proc_dev_name, dev->data->port_id);
1684         }
1685
1686         if (mask & ETH_VLAN_EXTEND_MASK) {
1687                 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1688                           nic_dev->proc_dev_name, dev->data->port_id);
1689                 return -ENOTSUP;
1690         }
1691
1692         return 0;
1693 }
1694
1695 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1696 {
1697         struct hinic_nic_dev *nic_dev =
1698                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1699         u16 func_id;
1700         int i;
1701
1702         func_id = hinic_global_func_id(nic_dev->hwdev);
1703         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1704                 /* If can't find it, continue */
1705                 if (!hinic_find_vlan_filter(nic_dev, i))
1706                         continue;
1707
1708                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1709                 hinic_store_vlan_filter(nic_dev, i, false);
1710         }
1711 }
1712
1713 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1714                                 bool enable)
1715 {
1716         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1717
1718         if (enable)
1719                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1720         else
1721                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1722
1723         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1724 }
1725
1726 /**
1727  * DPDK callback to enable allmulticast mode.
1728  *
1729  * @param dev
1730  *   Pointer to Ethernet device structure.
1731  *
1732  * @return
1733  *   0 on success,
1734  *   negative error value otherwise.
1735  */
1736 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1737 {
1738         int ret = HINIC_OK;
1739         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1740
1741         ret = hinic_set_dev_allmulticast(nic_dev, true);
1742         if (ret) {
1743                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1744                 return ret;
1745         }
1746
1747         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1748                 nic_dev->proc_dev_name, dev->data->port_id);
1749         return 0;
1750 }
1751
1752 /**
1753  * DPDK callback to disable allmulticast mode.
1754  *
1755  * @param dev
1756  *   Pointer to Ethernet device structure.
1757  *
1758  * @return
1759  *   0 on success,
1760  *   negative error value otherwise.
1761  */
1762 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1763 {
1764         int ret = HINIC_OK;
1765         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1766
1767         ret = hinic_set_dev_allmulticast(nic_dev, false);
1768         if (ret) {
1769                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1770                 return ret;
1771         }
1772
1773         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1774                 nic_dev->proc_dev_name, dev->data->port_id);
1775         return 0;
1776 }
1777
1778 /**
1779  * DPDK callback to enable promiscuous mode.
1780  *
1781  * @param dev
1782  *   Pointer to Ethernet device structure.
1783  *
1784  * @return
1785  *   0 on success,
1786  *   negative error value otherwise.
1787  */
1788 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1789 {
1790         int rc = HINIC_OK;
1791         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1792
1793         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1794                     nic_dev->proc_dev_name, dev->data->port_id,
1795                     dev->data->promiscuous);
1796
1797         rc = hinic_set_dev_promiscuous(nic_dev, true);
1798         if (rc)
1799                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1800
1801         return rc;
1802 }
1803
1804 /**
1805  * DPDK callback to disable promiscuous mode.
1806  *
1807  * @param dev
1808  *   Pointer to Ethernet device structure.
1809  *
1810  * @return
1811  *   0 on success,
1812  *   negative error value otherwise.
1813  */
1814 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1815 {
1816         int rc = HINIC_OK;
1817         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1818
1819         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1820                     nic_dev->proc_dev_name, dev->data->port_id,
1821                     dev->data->promiscuous);
1822
1823         rc = hinic_set_dev_promiscuous(nic_dev, false);
1824         if (rc)
1825                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1826
1827         return rc;
1828 }
1829
1830 /**
1831  * DPDK callback to update the RSS hash key and RSS hash type.
1832  *
1833  * @param dev
1834  *   Pointer to Ethernet device structure.
1835  * @param rss_conf
1836  *   RSS configuration data.
1837  *
1838  * @return
1839  *   0 on success, negative error value otherwise.
1840  */
1841 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1842                           struct rte_eth_rss_conf *rss_conf)
1843 {
1844         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1845         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1846         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1847         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1848         u64 rss_hf = rss_conf->rss_hf;
1849         struct nic_rss_type rss_type = {0};
1850         int err = 0;
1851
1852         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1853                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1854                 return HINIC_OK;
1855         }
1856
1857         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1858                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1859                             rss_conf->rss_key_len);
1860                 return HINIC_ERROR;
1861         }
1862
1863         if (rss_conf->rss_key) {
1864                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1865                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1866                                                  hashkey);
1867                 if (err) {
1868                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1869                         goto disable_rss;
1870                 }
1871         }
1872
1873         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1874         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1875         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1876         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1877         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1878         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1879         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1880         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1881
1882         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1883         if (err) {
1884                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1885                 goto disable_rss;
1886         }
1887
1888         return 0;
1889
1890 disable_rss:
1891         memset(prio_tc, 0, sizeof(prio_tc));
1892         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1893         return err;
1894 }
1895
1896 /**
1897  * DPDK callback to get the RSS hash configuration.
1898  *
1899  * @param dev
1900  *   Pointer to Ethernet device structure.
1901  * @param rss_conf
1902  *   RSS configuration data.
1903  *
1904  * @return
1905  *   0 on success, negative error value otherwise.
1906  */
1907 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1908                        struct rte_eth_rss_conf *rss_conf)
1909 {
1910         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1911         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1912         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1913         struct nic_rss_type rss_type = {0};
1914         int err;
1915
1916         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1917                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1918                 return HINIC_ERROR;
1919         }
1920
1921         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1922         if (err)
1923                 return err;
1924
1925         if (rss_conf->rss_key &&
1926             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1927                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1928                 rss_conf->rss_key_len = sizeof(hashkey);
1929         }
1930
1931         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1932         if (err)
1933                 return err;
1934
1935         rss_conf->rss_hf = 0;
1936         rss_conf->rss_hf |=  rss_type.ipv4 ?
1937                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1938         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1939         rss_conf->rss_hf |=  rss_type.ipv6 ?
1940                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1941         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1942         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1943         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1944         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1945         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1946
1947         return HINIC_OK;
1948 }
1949
1950 /**
1951  * DPDK callback to update the RETA indirection table.
1952  *
1953  * @param dev
1954  *   Pointer to Ethernet device structure.
1955  * @param reta_conf
1956  *   Pointer to RETA configuration structure array.
1957  * @param reta_size
1958  *   Size of the RETA table.
1959  *
1960  * @return
1961  *   0 on success, negative error value otherwise.
1962  */
1963 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1964                               struct rte_eth_rss_reta_entry64 *reta_conf,
1965                               uint16_t reta_size)
1966 {
1967         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1968         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1969         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1970         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1971         int err = 0;
1972         u16 i = 0;
1973         u16 idx, shift;
1974
1975         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1976                 return HINIC_OK;
1977
1978         if (reta_size != NIC_RSS_INDIR_SIZE) {
1979                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1980                 return HINIC_ERROR;
1981         }
1982
1983         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1984         if (err)
1985                 return err;
1986
1987         /* update rss indir_tbl */
1988         for (i = 0; i < reta_size; i++) {
1989                 idx = i / RTE_RETA_GROUP_SIZE;
1990                 shift = i % RTE_RETA_GROUP_SIZE;
1991                 if (reta_conf[idx].mask & (1ULL << shift))
1992                         indirtbl[i] = reta_conf[idx].reta[shift];
1993         }
1994
1995         for (i = 0 ; i < reta_size; i++) {
1996                 if (indirtbl[i] >= nic_dev->num_rq) {
1997                         PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
1998                                     i, nic_dev->num_rq);
1999                         goto disable_rss;
2000                 }
2001         }
2002
2003         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2004         if (err)
2005                 goto disable_rss;
2006
2007         nic_dev->rss_indir_flag = true;
2008
2009         return 0;
2010
2011 disable_rss:
2012         memset(prio_tc, 0, sizeof(prio_tc));
2013         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2014
2015         return HINIC_ERROR;
2016 }
2017
2018
2019 /**
2020  * DPDK callback to get the RETA indirection table.
2021  *
2022  * @param dev
2023  *   Pointer to Ethernet device structure.
2024  * @param reta_conf
2025  *   Pointer to RETA configuration structure array.
2026  * @param reta_size
2027  *   Size of the RETA table.
2028  *
2029  * @return
2030  *   0 on success, negative error value otherwise.
2031  */
2032 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2033                              struct rte_eth_rss_reta_entry64 *reta_conf,
2034                              uint16_t reta_size)
2035 {
2036         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2037         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2038         int err = 0;
2039         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2040         u16 idx, shift;
2041         u16 i = 0;
2042
2043         if (reta_size != NIC_RSS_INDIR_SIZE) {
2044                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
2045                 return HINIC_ERROR;
2046         }
2047
2048         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2049         if (err) {
2050                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
2051                             err);
2052                 return err;
2053         }
2054
2055         for (i = 0; i < reta_size; i++) {
2056                 idx = i / RTE_RETA_GROUP_SIZE;
2057                 shift = i % RTE_RETA_GROUP_SIZE;
2058                 if (reta_conf[idx].mask & (1ULL << shift))
2059                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2060         }
2061
2062         return HINIC_OK;
2063 }
2064
2065 /**
2066  * DPDK callback to get extended device statistics.
2067  *
2068  * @param dev
2069  *   Pointer to Ethernet device.
2070  * @param xstats
2071  *   Pointer to rte extended stats table.
2072  * @param n
2073  *   The size of the stats table.
2074  *
2075  * @return
2076  *   Number of extended stats on success and stats is filled,
2077  *   negative error value otherwise.
2078  */
2079 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2080                          struct rte_eth_xstat *xstats,
2081                          unsigned int n)
2082 {
2083         u16 qid = 0;
2084         u32 i;
2085         int err, count;
2086         struct hinic_nic_dev *nic_dev;
2087         struct hinic_phy_port_stats port_stats;
2088         struct hinic_vport_stats vport_stats;
2089         struct hinic_rxq        *rxq = NULL;
2090         struct hinic_rxq_stats rxq_stats;
2091         struct hinic_txq        *txq = NULL;
2092         struct hinic_txq_stats txq_stats;
2093
2094         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2095         count = hinic_xstats_calc_num(nic_dev);
2096         if ((int)n < count)
2097                 return count;
2098
2099         count = 0;
2100
2101         /* Get stats from hinic_rxq_stats */
2102         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2103                 rxq = nic_dev->rxqs[qid];
2104                 hinic_rxq_get_stats(rxq, &rxq_stats);
2105
2106                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2107                         xstats[count].value =
2108                                 *(uint64_t *)(((char *)&rxq_stats) +
2109                                 hinic_rxq_stats_strings[i].offset);
2110                         xstats[count].id = count;
2111                         count++;
2112                 }
2113         }
2114
2115         /* Get stats from hinic_txq_stats */
2116         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2117                 txq = nic_dev->txqs[qid];
2118                 hinic_txq_get_stats(txq, &txq_stats);
2119
2120                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2121                         xstats[count].value =
2122                                 *(uint64_t *)(((char *)&txq_stats) +
2123                                 hinic_txq_stats_strings[i].offset);
2124                         xstats[count].id = count;
2125                         count++;
2126                 }
2127         }
2128
2129         /* Get stats from hinic_vport_stats */
2130         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2131         if (err)
2132                 return err;
2133
2134         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2135                 xstats[count].value =
2136                         *(uint64_t *)(((char *)&vport_stats) +
2137                         hinic_vport_stats_strings[i].offset);
2138                 xstats[count].id = count;
2139                 count++;
2140         }
2141
2142         if (HINIC_IS_VF(nic_dev->hwdev))
2143                 return count;
2144
2145         /* Get stats from hinic_phy_port_stats */
2146         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2147         if (err)
2148                 return err;
2149
2150         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2151                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2152                                 hinic_phyport_stats_strings[i].offset);
2153                 xstats[count].id = count;
2154                 count++;
2155         }
2156
2157         return count;
2158 }
2159
2160 /**
2161  * DPDK callback to retrieve names of extended device statistics
2162  *
2163  * @param dev
2164  *   Pointer to Ethernet device structure.
2165  * @param xstats_names
2166  *   Buffer to insert names into.
2167  *
2168  * @return
2169  *   Number of xstats names.
2170  */
2171 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2172                                struct rte_eth_xstat_name *xstats_names,
2173                                __rte_unused unsigned int limit)
2174 {
2175         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2176         int count = 0;
2177         u16 i = 0, q_num;
2178
2179         if (xstats_names == NULL)
2180                 return hinic_xstats_calc_num(nic_dev);
2181
2182         /* get pmd rxq stats */
2183         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2184                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2185                         snprintf(xstats_names[count].name,
2186                                  sizeof(xstats_names[count].name),
2187                                  "rxq%d_%s_pmd",
2188                                  q_num, hinic_rxq_stats_strings[i].name);
2189                         count++;
2190                 }
2191         }
2192
2193         /* get pmd txq stats */
2194         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2195                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2196                         snprintf(xstats_names[count].name,
2197                                  sizeof(xstats_names[count].name),
2198                                  "txq%d_%s_pmd",
2199                                  q_num, hinic_txq_stats_strings[i].name);
2200                         count++;
2201                 }
2202         }
2203
2204         /* get vport stats */
2205         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2206                 snprintf(xstats_names[count].name,
2207                          sizeof(xstats_names[count].name),
2208                          "%s",
2209                          hinic_vport_stats_strings[i].name);
2210                 count++;
2211         }
2212
2213         if (HINIC_IS_VF(nic_dev->hwdev))
2214                 return count;
2215
2216         /* get phy port stats */
2217         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2218                 snprintf(xstats_names[count].name,
2219                          sizeof(xstats_names[count].name),
2220                          "%s",
2221                          hinic_phyport_stats_strings[i].name);
2222                 count++;
2223         }
2224
2225         return count;
2226 }
2227 /**
2228  *  DPDK callback to set mac address
2229  *
2230  * @param dev
2231  *   Pointer to Ethernet device structure.
2232  * @param addr
2233  *   Pointer to mac address
2234  * @return
2235  *   0 on success, negative error value otherwise.
2236  */
2237 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2238                               struct rte_ether_addr *addr)
2239 {
2240         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2241         u16 func_id;
2242         int err;
2243
2244         func_id = hinic_global_func_id(nic_dev->hwdev);
2245         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2246                                addr->addr_bytes, 0, func_id);
2247         if (err)
2248                 return err;
2249
2250         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2251
2252         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
2253                     addr->addr_bytes[0], addr->addr_bytes[1],
2254                     addr->addr_bytes[2], addr->addr_bytes[3],
2255                     addr->addr_bytes[4], addr->addr_bytes[5]);
2256
2257         return 0;
2258 }
2259
2260 /**
2261  * DPDK callback to remove a MAC address.
2262  *
2263  * @param dev
2264  *   Pointer to Ethernet device structure.
2265  * @param index
2266  *   MAC address index.
2267  */
2268 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2269 {
2270         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2271         u16 func_id;
2272         int ret;
2273
2274         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2275                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2276                             index);
2277                 return;
2278         }
2279
2280         func_id = hinic_global_func_id(nic_dev->hwdev);
2281         ret = hinic_del_mac(nic_dev->hwdev,
2282                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2283         if (ret)
2284                 return;
2285
2286         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2287 }
2288
2289 /**
2290  * DPDK callback to add a MAC address.
2291  *
2292  * @param dev
2293  *   Pointer to Ethernet device structure.
2294  * @param mac_addr
2295  *   MAC address to register.
2296  * @param index
2297  *   MAC address index.
2298  * @param vmdq
2299  *   VMDq pool index to associate address with (ignored).
2300  *
2301  * @return
2302  *   0 on success, a negative errno value otherwise and rte_errno is set.
2303  */
2304
2305 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2306                               struct rte_ether_addr *mac_addr, uint32_t index,
2307                               __rte_unused uint32_t vmdq)
2308 {
2309         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2310         unsigned int i;
2311         u16 func_id;
2312         int ret;
2313
2314         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2315                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
2316                 return -EINVAL;
2317         }
2318
2319         /* First, make sure this address isn't already configured. */
2320         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2321                 /* Skip this index, it's going to be reconfigured. */
2322                 if (i == index)
2323                         continue;
2324
2325                 if (memcmp(&dev->data->mac_addrs[i],
2326                         mac_addr, sizeof(*mac_addr)))
2327                         continue;
2328
2329                 PMD_DRV_LOG(INFO, "MAC address already configured");
2330                 return -EADDRINUSE;
2331         }
2332
2333         func_id = hinic_global_func_id(nic_dev->hwdev);
2334         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2335         if (ret)
2336                 return ret;
2337
2338         dev->data->mac_addrs[index] = *mac_addr;
2339         return 0;
2340 }
2341
2342 /**
2343  *  DPDK callback to set multicast mac address
2344  *
2345  * @param dev
2346  *   Pointer to Ethernet device structure.
2347  * @param mc_addr_set
2348  *   Pointer to multicast mac address
2349  * @param nb_mc_addr
2350  *   mc addr count
2351  * @return
2352  *   0 on success, negative error value otherwise.
2353  */
2354 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2355                                   struct rte_ether_addr *mc_addr_set,
2356                                   uint32_t nb_mc_addr)
2357 {
2358         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2359         u16 func_id;
2360         int ret;
2361         u32 i;
2362
2363         func_id = hinic_global_func_id(nic_dev->hwdev);
2364
2365         /* delete old multi_cast addrs firstly */
2366         hinic_delete_mc_addr_list(nic_dev);
2367
2368         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2369                 goto allmulti;
2370
2371         for (i = 0; i < nb_mc_addr; i++) {
2372                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2373                                     0, func_id);
2374                 /* if add mc addr failed, set all multi_cast */
2375                 if (ret) {
2376                         hinic_delete_mc_addr_list(nic_dev);
2377                         goto allmulti;
2378                 }
2379
2380                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2381         }
2382
2383         return 0;
2384
2385 allmulti:
2386         hinic_dev_allmulticast_enable(dev);
2387
2388         return 0;
2389 }
2390
2391 /**
2392  * DPDK callback to manage filter operations
2393  *
2394  * @param dev
2395  *   Pointer to Ethernet device structure.
2396  * @param filter_type
2397  *   Filter type.
2398  * @param filter_op
2399  *   Operation to perform.
2400  * @param arg
2401  *   Pointer to operation-specific structure.
2402  *
2403  * @return
2404  *   0 on success, negative errno value on failure.
2405  */
2406 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2407                      enum rte_filter_type filter_type,
2408                      enum rte_filter_op filter_op,
2409                      void *arg)
2410 {
2411         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2412         int func_id = hinic_global_func_id(nic_dev->hwdev);
2413
2414         switch (filter_type) {
2415         case RTE_ETH_FILTER_GENERIC:
2416                 if (filter_op != RTE_ETH_FILTER_GET)
2417                         return -EINVAL;
2418                 *(const void **)arg = &hinic_flow_ops;
2419                 break;
2420         default:
2421                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2422                         filter_type);
2423                 return -EINVAL;
2424         }
2425
2426         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2427                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2428         return 0;
2429 }
2430
2431 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2432 {
2433         struct nic_pause_config pause_config = {0};
2434
2435         pause_config.auto_neg = 0;
2436         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2437         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2438
2439         return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2440 }
2441
2442 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2443 {
2444         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2445         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2446         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2447         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2448         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2449         int i = 0;
2450
2451         pg_bw[0] = 100;
2452         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2453                 up_bw[i] = 100;
2454
2455         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2456                                         up_pgid, up_bw, up_strict);
2457 }
2458
2459 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2460 {
2461         u8 cos_id = 0;
2462         int err;
2463
2464         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2465                 nic_dev->default_cos =
2466                                 (hinic_global_func_id(nic_dev->hwdev) +
2467                                                 DEFAULT_BASE_COS) % NR_MAX_COS;
2468         } else {
2469                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2470                 if (err) {
2471                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2472                                         err);
2473                         return HINIC_ERROR;
2474                 }
2475
2476                 nic_dev->default_cos = cos_id;
2477         }
2478
2479         return 0;
2480 }
2481
2482 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2483 {
2484         int err;
2485
2486         err = hinic_init_default_cos(nic_dev);
2487         if (err)
2488                 return err;
2489
2490         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2491                 return 0;
2492
2493         /* Restore DCB configure to default status */
2494         err = hinic_set_default_dcb_feature(nic_dev);
2495         if (err)
2496                 return err;
2497
2498         /* Set pause enable, and up will disable pfc. */
2499         err = hinic_set_default_pause_feature(nic_dev);
2500         if (err)
2501                 return err;
2502
2503         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2504         if (err)
2505                 return err;
2506
2507         err = hinic_set_link_status_follow(nic_dev->hwdev,
2508                                            HINIC_LINK_FOLLOW_PORT);
2509         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2510                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2511         else if (err)
2512                 return err;
2513
2514         return hinic_set_anti_attack(nic_dev->hwdev, true);
2515 }
2516
2517 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2518 {
2519         struct hinic_board_info info = { 0 };
2520         int rc;
2521
2522         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2523                 return 0;
2524
2525         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2526         if (rc)
2527                 return rc;
2528
2529         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2530                                                 HINIC_ERROR);
2531 }
2532
2533 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2534 {
2535         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2536         if (nic_dev->cpy_mpool == NULL) {
2537                 nic_dev->cpy_mpool =
2538                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2539                                         HINIC_COPY_MEMPOOL_DEPTH,
2540                                         0, 0,
2541                                         HINIC_COPY_MBUF_SIZE,
2542                                         rte_socket_id());
2543                 if (!nic_dev->cpy_mpool) {
2544                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2545                                     rte_errno, nic_dev->proc_dev_name);
2546                         return -ENOMEM;
2547                 }
2548         }
2549
2550         return 0;
2551 }
2552
2553 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2554 {
2555         if (nic_dev->cpy_mpool != NULL)
2556                 rte_mempool_free(nic_dev->cpy_mpool);
2557 }
2558
2559 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2560 {
2561         u32 txq_size;
2562         u32 rxq_size;
2563
2564         /* allocate software txq array */
2565         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2566         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2567         if (!nic_dev->txqs) {
2568                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2569                 return -ENOMEM;
2570         }
2571
2572         /* allocate software rxq array */
2573         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2574         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2575         if (!nic_dev->rxqs) {
2576                 /* free txqs */
2577                 kfree(nic_dev->txqs);
2578                 nic_dev->txqs = NULL;
2579
2580                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2581                 return -ENOMEM;
2582         }
2583
2584         return HINIC_OK;
2585 }
2586
2587 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2588 {
2589         kfree(nic_dev->txqs);
2590         nic_dev->txqs = NULL;
2591
2592         kfree(nic_dev->rxqs);
2593         nic_dev->rxqs = NULL;
2594 }
2595
2596 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2597 {
2598         struct hinic_nic_dev *nic_dev =
2599                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2600         int rc;
2601
2602         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2603                                      RTE_CACHE_LINE_SIZE);
2604         if (!nic_dev->hwdev) {
2605                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2606                             eth_dev->data->name);
2607                 return -ENOMEM;
2608         }
2609         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2610
2611         /* init osdep*/
2612         rc = hinic_osdep_init(nic_dev->hwdev);
2613         if (rc) {
2614                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2615                             eth_dev->data->name);
2616                 goto init_osdep_fail;
2617         }
2618
2619         /* init_hwif */
2620         rc = hinic_hwif_res_init(nic_dev->hwdev);
2621         if (rc) {
2622                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2623                             eth_dev->data->name);
2624                 goto init_hwif_fail;
2625         }
2626
2627         /* init_cfg_mgmt */
2628         rc = init_cfg_mgmt(nic_dev->hwdev);
2629         if (rc) {
2630                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2631                             eth_dev->data->name);
2632                 goto init_cfgmgnt_fail;
2633         }
2634
2635         /* init_aeqs */
2636         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2637         if (rc) {
2638                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2639                             eth_dev->data->name);
2640                 goto init_aeqs_fail;
2641         }
2642
2643         /* init_pf_to_mgnt */
2644         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2645         if (rc) {
2646                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2647                             eth_dev->data->name);
2648                 goto init_pf_to_mgmt_fail;
2649         }
2650
2651         /* init mailbox */
2652         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2653         if (rc) {
2654                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2655                             eth_dev->data->name);
2656                 goto init_func_to_func_fail;
2657         }
2658
2659         rc = hinic_card_workmode_check(nic_dev);
2660         if (rc) {
2661                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2662                             eth_dev->data->name);
2663                 goto workmode_check_fail;
2664         }
2665
2666         /* do l2nic reset to make chip clear */
2667         rc = hinic_l2nic_reset(nic_dev->hwdev);
2668         if (rc) {
2669                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2670                             eth_dev->data->name);
2671                 goto l2nic_reset_fail;
2672         }
2673
2674         /* init dma and aeq msix attribute table */
2675         (void)hinic_init_attr_table(nic_dev->hwdev);
2676
2677         /* init_cmdqs */
2678         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2679         if (rc) {
2680                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2681                             eth_dev->data->name);
2682                 goto init_cmdq_fail;
2683         }
2684
2685         /* set hardware state active */
2686         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2687         if (rc) {
2688                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2689                             eth_dev->data->name);
2690                 goto init_resources_state_fail;
2691         }
2692
2693         /* init_capability */
2694         rc = hinic_init_capability(nic_dev->hwdev);
2695         if (rc) {
2696                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2697                             eth_dev->data->name);
2698                 goto init_cap_fail;
2699         }
2700
2701         /* get nic capability */
2702         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2703                 goto nic_check_fail;
2704
2705         /* init root cla and function table */
2706         rc = hinic_init_nicio(nic_dev->hwdev);
2707         if (rc) {
2708                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2709                             eth_dev->data->name);
2710                 goto init_nicio_fail;
2711         }
2712
2713         /* init_software_txrxq */
2714         rc = hinic_init_sw_rxtxqs(nic_dev);
2715         if (rc) {
2716                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2717                             eth_dev->data->name);
2718                 goto init_sw_rxtxqs_fail;
2719         }
2720
2721         rc = hinic_copy_mempool_init(nic_dev);
2722         if (rc) {
2723                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2724                          eth_dev->data->name);
2725                 goto init_mpool_fail;
2726         }
2727
2728         /* set hardware feature to default status */
2729         rc = hinic_set_default_hw_feature(nic_dev);
2730         if (rc) {
2731                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2732                             eth_dev->data->name);
2733                 goto set_default_hw_feature_fail;
2734         }
2735
2736         return 0;
2737
2738 set_default_hw_feature_fail:
2739         hinic_copy_mempool_uninit(nic_dev);
2740
2741 init_mpool_fail:
2742         hinic_deinit_sw_rxtxqs(nic_dev);
2743
2744 init_sw_rxtxqs_fail:
2745         hinic_deinit_nicio(nic_dev->hwdev);
2746
2747 nic_check_fail:
2748 init_nicio_fail:
2749 init_cap_fail:
2750         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2751
2752 init_resources_state_fail:
2753         hinic_comm_cmdqs_free(nic_dev->hwdev);
2754
2755 init_cmdq_fail:
2756 l2nic_reset_fail:
2757 workmode_check_fail:
2758         hinic_comm_func_to_func_free(nic_dev->hwdev);
2759
2760 init_func_to_func_fail:
2761         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2762
2763 init_pf_to_mgmt_fail:
2764         hinic_comm_aeqs_free(nic_dev->hwdev);
2765
2766 init_aeqs_fail:
2767         free_cfg_mgmt(nic_dev->hwdev);
2768
2769 init_cfgmgnt_fail:
2770         hinic_hwif_res_free(nic_dev->hwdev);
2771
2772 init_hwif_fail:
2773         hinic_osdep_deinit(nic_dev->hwdev);
2774
2775 init_osdep_fail:
2776         rte_free(nic_dev->hwdev);
2777         nic_dev->hwdev = NULL;
2778
2779         return rc;
2780 }
2781
2782 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2783 {
2784         struct hinic_nic_dev *nic_dev =
2785                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2786
2787         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2788                                            HINIC_LINK_FOLLOW_DEFAULT);
2789         hinic_copy_mempool_uninit(nic_dev);
2790         hinic_deinit_sw_rxtxqs(nic_dev);
2791         hinic_deinit_nicio(nic_dev->hwdev);
2792         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2793         hinic_comm_cmdqs_free(nic_dev->hwdev);
2794         hinic_comm_func_to_func_free(nic_dev->hwdev);
2795         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2796         hinic_comm_aeqs_free(nic_dev->hwdev);
2797         free_cfg_mgmt(nic_dev->hwdev);
2798         hinic_hwif_res_free(nic_dev->hwdev);
2799         hinic_osdep_deinit(nic_dev->hwdev);
2800         rte_free(nic_dev->hwdev);
2801         nic_dev->hwdev = NULL;
2802 }
2803
2804 /**
2805  * DPDK callback to close the device.
2806  *
2807  * @param dev
2808  *   Pointer to Ethernet device structure.
2809  */
2810 static void hinic_dev_close(struct rte_eth_dev *dev)
2811 {
2812         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2813
2814         if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2815                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2816                             dev->data->name);
2817                 return;
2818         }
2819
2820         /* stop device first */
2821         hinic_dev_stop(dev);
2822
2823         /* rx_cqe, rx_info */
2824         hinic_free_all_rx_resources(dev);
2825
2826         /* tx_info */
2827         hinic_free_all_tx_resources(dev);
2828
2829         /* free wq, pi_dma_addr */
2830         hinic_free_all_rq(nic_dev);
2831
2832         /* free wq, db_addr */
2833         hinic_free_all_sq(nic_dev);
2834
2835         /* deinit mac vlan tbl */
2836         hinic_deinit_mac_addr(dev);
2837         hinic_remove_all_vlanid(dev);
2838
2839         /* disable hardware and uio interrupt */
2840         hinic_disable_interrupt(dev);
2841
2842         /* deinit nic hardware device */
2843         hinic_nic_dev_destroy(dev);
2844 }
2845
2846 static const struct eth_dev_ops hinic_pmd_ops = {
2847         .dev_configure                 = hinic_dev_configure,
2848         .dev_infos_get                 = hinic_dev_infos_get,
2849         .fw_version_get                = hinic_fw_version_get,
2850         .rx_queue_setup                = hinic_rx_queue_setup,
2851         .tx_queue_setup                = hinic_tx_queue_setup,
2852         .dev_start                     = hinic_dev_start,
2853         .dev_set_link_up               = hinic_dev_set_link_up,
2854         .dev_set_link_down             = hinic_dev_set_link_down,
2855         .link_update                   = hinic_link_update,
2856         .rx_queue_release              = hinic_rx_queue_release,
2857         .tx_queue_release              = hinic_tx_queue_release,
2858         .dev_stop                      = hinic_dev_stop,
2859         .dev_close                     = hinic_dev_close,
2860         .mtu_set                       = hinic_dev_set_mtu,
2861         .vlan_filter_set               = hinic_vlan_filter_set,
2862         .vlan_offload_set              = hinic_vlan_offload_set,
2863         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2864         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2865         .promiscuous_enable            = hinic_dev_promiscuous_enable,
2866         .promiscuous_disable           = hinic_dev_promiscuous_disable,
2867         .rss_hash_update               = hinic_rss_hash_update,
2868         .rss_hash_conf_get             = hinic_rss_conf_get,
2869         .reta_update                   = hinic_rss_indirtbl_update,
2870         .reta_query                    = hinic_rss_indirtbl_query,
2871         .stats_get                     = hinic_dev_stats_get,
2872         .stats_reset                   = hinic_dev_stats_reset,
2873         .xstats_get                    = hinic_dev_xstats_get,
2874         .xstats_reset                  = hinic_dev_xstats_reset,
2875         .xstats_get_names              = hinic_dev_xstats_get_names,
2876         .mac_addr_set                  = hinic_set_mac_addr,
2877         .mac_addr_remove               = hinic_mac_addr_remove,
2878         .mac_addr_add                  = hinic_mac_addr_add,
2879         .set_mc_addr_list              = hinic_set_mc_addr_list,
2880         .filter_ctrl                   = hinic_dev_filter_ctrl,
2881 };
2882
2883 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2884         .dev_configure                 = hinic_dev_configure,
2885         .dev_infos_get                 = hinic_dev_infos_get,
2886         .fw_version_get                = hinic_fw_version_get,
2887         .rx_queue_setup                = hinic_rx_queue_setup,
2888         .tx_queue_setup                = hinic_tx_queue_setup,
2889         .dev_start                     = hinic_dev_start,
2890         .link_update                   = hinic_link_update,
2891         .rx_queue_release              = hinic_rx_queue_release,
2892         .tx_queue_release              = hinic_tx_queue_release,
2893         .dev_stop                      = hinic_dev_stop,
2894         .dev_close                     = hinic_dev_close,
2895         .mtu_set                       = hinic_dev_set_mtu,
2896         .vlan_filter_set               = hinic_vlan_filter_set,
2897         .vlan_offload_set              = hinic_vlan_offload_set,
2898         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2899         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2900         .rss_hash_update               = hinic_rss_hash_update,
2901         .rss_hash_conf_get             = hinic_rss_conf_get,
2902         .reta_update                   = hinic_rss_indirtbl_update,
2903         .reta_query                    = hinic_rss_indirtbl_query,
2904         .stats_get                     = hinic_dev_stats_get,
2905         .stats_reset                   = hinic_dev_stats_reset,
2906         .xstats_get                    = hinic_dev_xstats_get,
2907         .xstats_reset                  = hinic_dev_xstats_reset,
2908         .xstats_get_names              = hinic_dev_xstats_get_names,
2909         .mac_addr_set                  = hinic_set_mac_addr,
2910         .mac_addr_remove               = hinic_mac_addr_remove,
2911         .mac_addr_add                  = hinic_mac_addr_add,
2912         .set_mc_addr_list              = hinic_set_mc_addr_list,
2913         .filter_ctrl                   = hinic_dev_filter_ctrl,
2914 };
2915
2916 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2917 {
2918         struct rte_pci_device *pci_dev;
2919         struct rte_ether_addr *eth_addr;
2920         struct hinic_nic_dev *nic_dev;
2921         struct hinic_filter_info *filter_info;
2922         u32 mac_size;
2923         int rc;
2924
2925         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2926
2927         /* EAL is SECONDARY and eth_dev is already created */
2928         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2929                 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2930                                                 hinic_dev_interrupt_handler,
2931                                                 (void *)eth_dev);
2932                 if (rc)
2933                         PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2934                                     eth_dev->data->name);
2935
2936                 return rc;
2937         }
2938
2939         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2940         memset(nic_dev, 0, sizeof(*nic_dev));
2941
2942         snprintf(nic_dev->proc_dev_name,
2943                  sizeof(nic_dev->proc_dev_name),
2944                  "hinic-%.4x:%.2x:%.2x.%x",
2945                  pci_dev->addr.domain, pci_dev->addr.bus,
2946                  pci_dev->addr.devid, pci_dev->addr.function);
2947
2948         /* alloc mac_addrs */
2949         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2950         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
2951         if (!eth_addr) {
2952                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2953                             eth_dev->data->name);
2954                 rc = -ENOMEM;
2955                 goto eth_addr_fail;
2956         }
2957         eth_dev->data->mac_addrs = eth_addr;
2958
2959         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2960         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
2961         if (!nic_dev->mc_list) {
2962                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
2963                             eth_dev->data->name);
2964                 rc = -ENOMEM;
2965                 goto mc_addr_fail;
2966         }
2967
2968         /*
2969          * Pass the information to the rte_eth_dev_close() that it should also
2970          * release the private port resources.
2971          */
2972         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2973
2974         /* create hardware nic_device */
2975         rc = hinic_nic_dev_create(eth_dev);
2976         if (rc) {
2977                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
2978                             eth_dev->data->name);
2979                 goto create_nic_dev_fail;
2980         }
2981
2982         if (HINIC_IS_VF(nic_dev->hwdev))
2983                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
2984         else
2985                 eth_dev->dev_ops = &hinic_pmd_ops;
2986
2987         rc = hinic_init_mac_addr(eth_dev);
2988         if (rc) {
2989                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
2990                             eth_dev->data->name);
2991                 goto init_mac_fail;
2992         }
2993
2994         /* register callback func to eal lib */
2995         rc = rte_intr_callback_register(&pci_dev->intr_handle,
2996                                         hinic_dev_interrupt_handler,
2997                                         (void *)eth_dev);
2998         if (rc) {
2999                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3000                             eth_dev->data->name);
3001                 goto reg_intr_cb_fail;
3002         }
3003
3004         /* enable uio/vfio intr/eventfd mapping */
3005         rc = rte_intr_enable(&pci_dev->intr_handle);
3006         if (rc) {
3007                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3008                             eth_dev->data->name);
3009                 goto enable_intr_fail;
3010         }
3011         hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3012
3013         /* initialize filter info */
3014         filter_info = &nic_dev->filter;
3015         memset(filter_info, 0, sizeof(struct hinic_filter_info));
3016         /* initialize 5tuple filter list */
3017         TAILQ_INIT(&filter_info->fivetuple_list);
3018         TAILQ_INIT(&nic_dev->filter_ntuple_list);
3019         TAILQ_INIT(&nic_dev->filter_ethertype_list);
3020         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3021         TAILQ_INIT(&nic_dev->hinic_flow_list);
3022
3023         hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3024         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3025                     eth_dev->data->name);
3026
3027         return 0;
3028
3029 enable_intr_fail:
3030         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3031                                            hinic_dev_interrupt_handler,
3032                                            (void *)eth_dev);
3033
3034 reg_intr_cb_fail:
3035         hinic_deinit_mac_addr(eth_dev);
3036
3037 init_mac_fail:
3038         eth_dev->dev_ops = NULL;
3039         hinic_nic_dev_destroy(eth_dev);
3040
3041 create_nic_dev_fail:
3042         rte_free(nic_dev->mc_list);
3043         nic_dev->mc_list = NULL;
3044
3045 mc_addr_fail:
3046         rte_free(eth_addr);
3047         eth_dev->data->mac_addrs = NULL;
3048
3049 eth_addr_fail:
3050         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3051                     eth_dev->data->name);
3052         return rc;
3053 }
3054
3055 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3056 {
3057         struct rte_pci_device *pci_dev;
3058
3059         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3060
3061         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3062                     pci_dev->addr.domain, pci_dev->addr.bus,
3063                     pci_dev->addr.devid, pci_dev->addr.function,
3064                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3065                     "primary" : "secondary");
3066
3067         /* rte_eth_dev rx_burst and tx_burst */
3068         eth_dev->rx_pkt_burst = hinic_recv_pkts;
3069         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3070
3071         return hinic_func_init(eth_dev);
3072 }
3073
3074 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3075 {
3076         struct hinic_nic_dev *nic_dev;
3077
3078         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3079         hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3080
3081         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3082                 return 0;
3083
3084         hinic_dev_close(dev);
3085
3086         dev->dev_ops = NULL;
3087         dev->rx_pkt_burst = NULL;
3088         dev->tx_pkt_burst = NULL;
3089
3090         rte_free(nic_dev->mc_list);
3091
3092         rte_free(dev->data->mac_addrs);
3093         dev->data->mac_addrs = NULL;
3094
3095         return HINIC_OK;
3096 }
3097
3098 static struct rte_pci_id pci_id_hinic_map[] = {
3099         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3100         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3101         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
3102         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3103         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3104         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3105         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3106         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3107         {.vendor_id = 0},
3108 };
3109
3110 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3111                            struct rte_pci_device *pci_dev)
3112 {
3113         return rte_eth_dev_pci_generic_probe(pci_dev,
3114                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3115 }
3116
3117 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3118 {
3119         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3120 }
3121
3122 static struct rte_pci_driver rte_hinic_pmd = {
3123         .id_table = pci_id_hinic_map,
3124         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3125         .probe = hinic_pci_probe,
3126         .remove = hinic_pci_remove,
3127 };
3128
3129 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3130 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3131
3132 RTE_INIT(hinic_init_log)
3133 {
3134         hinic_logtype = rte_log_register("pmd.net.hinic");
3135         if (hinic_logtype >= 0)
3136                 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
3137 }