1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2019 Hisilicon Limited.
11 #include <arpa/inet.h>
12 #include <rte_alarm.h>
13 #include <rte_atomic.h>
14 #include <rte_bus_pci.h>
15 #include <rte_byteorder.h>
16 #include <rte_common.h>
17 #include <rte_cycles.h>
20 #include <rte_ether.h>
21 #include <rte_ethdev_driver.h>
22 #include <rte_ethdev_pci.h>
23 #include <rte_interrupts.h>
28 #include "hns3_ethdev.h"
29 #include "hns3_logs.h"
30 #include "hns3_regs.h"
33 #define HNS3VF_KEEP_ALIVE_INTERVAL 2000000 /* us */
34 #define HNS3VF_SERVICE_INTERVAL 1000000 /* us */
36 #define HNS3VF_RESET_WAIT_MS 20
37 #define HNS3VF_RESET_WAIT_CNT 2000
39 enum hns3vf_evt_cause {
40 HNS3VF_VECTOR0_EVENT_RST,
41 HNS3VF_VECTOR0_EVENT_MBX,
42 HNS3VF_VECTOR0_EVENT_OTHER,
45 static int hns3vf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
46 static int hns3vf_dev_configure_vlan(struct rte_eth_dev *dev);
49 hns3vf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
50 __attribute__ ((unused)) uint32_t idx,
51 __attribute__ ((unused)) uint32_t pool)
53 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
54 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
57 rte_spinlock_lock(&hw->lock);
58 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
59 HNS3_MBX_MAC_VLAN_UC_ADD, mac_addr->addr_bytes,
60 RTE_ETHER_ADDR_LEN, false, NULL, 0);
61 rte_spinlock_unlock(&hw->lock);
63 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
65 hns3_err(hw, "Failed to add mac addr(%s) for vf: %d", mac_str,
73 hns3vf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t idx)
75 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
76 /* index will be checked by upper level rte interface */
77 struct rte_ether_addr *mac_addr = &dev->data->mac_addrs[idx];
78 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
81 rte_spinlock_lock(&hw->lock);
82 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
83 HNS3_MBX_MAC_VLAN_UC_REMOVE,
84 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
86 rte_spinlock_unlock(&hw->lock);
88 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
90 hns3_err(hw, "Failed to remove mac addr(%s) for vf: %d",
96 hns3vf_set_default_mac_addr(struct rte_eth_dev *dev,
97 struct rte_ether_addr *mac_addr)
99 #define HNS3_TWO_ETHER_ADDR_LEN (RTE_ETHER_ADDR_LEN * 2)
100 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
101 struct rte_ether_addr *old_addr;
102 uint8_t addr_bytes[HNS3_TWO_ETHER_ADDR_LEN]; /* for 2 MAC addresses */
103 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
106 if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
107 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
109 hns3_err(hw, "Failed to set mac addr, addr(%s) invalid.",
114 old_addr = (struct rte_ether_addr *)hw->mac.mac_addr;
115 rte_spinlock_lock(&hw->lock);
116 memcpy(addr_bytes, mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN);
117 memcpy(&addr_bytes[RTE_ETHER_ADDR_LEN], old_addr->addr_bytes,
120 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
121 HNS3_MBX_MAC_VLAN_UC_MODIFY, addr_bytes,
122 HNS3_TWO_ETHER_ADDR_LEN, false, NULL, 0);
124 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
126 hns3_err(hw, "Failed to set mac addr(%s) for vf: %d", mac_str,
130 rte_ether_addr_copy(mac_addr,
131 (struct rte_ether_addr *)hw->mac.mac_addr);
132 rte_spinlock_unlock(&hw->lock);
138 hns3vf_configure_mac_addr(struct hns3_adapter *hns, bool del)
140 struct hns3_hw *hw = &hns->hw;
141 struct rte_ether_addr *addr;
142 enum hns3_mbx_mac_vlan_subcode opcode;
143 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
148 opcode = HNS3_MBX_MAC_VLAN_UC_REMOVE;
150 opcode = HNS3_MBX_MAC_VLAN_UC_ADD;
151 for (i = 0; i < HNS3_VF_UC_MACADDR_NUM; i++) {
152 addr = &hw->data->mac_addrs[i];
153 if (!rte_is_valid_assigned_ether_addr(addr))
155 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, addr);
156 hns3_dbg(hw, "rm mac addr: %s", mac_str);
157 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST, opcode,
158 addr->addr_bytes, RTE_ETHER_ADDR_LEN,
161 hns3_err(hw, "Failed to remove mac addr for vf: %d",
170 hns3vf_add_mc_mac_addr(struct hns3_adapter *hns,
171 struct rte_ether_addr *mac_addr)
173 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
174 struct hns3_hw *hw = &hns->hw;
177 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MULTICAST,
178 HNS3_MBX_MAC_VLAN_MC_ADD,
179 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
182 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
184 hns3_err(hw, "Failed to add mc mac addr(%s) for vf: %d",
193 hns3vf_remove_mc_mac_addr(struct hns3_adapter *hns,
194 struct rte_ether_addr *mac_addr)
196 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
197 struct hns3_hw *hw = &hns->hw;
200 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MULTICAST,
201 HNS3_MBX_MAC_VLAN_MC_REMOVE,
202 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
205 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
207 hns3_err(hw, "Failed to remove mc mac addr(%s) for vf: %d",
216 hns3vf_set_mc_mac_addr_list(struct rte_eth_dev *dev,
217 struct rte_ether_addr *mc_addr_set,
220 struct hns3_adapter *hns = dev->data->dev_private;
221 struct hns3_hw *hw = &hns->hw;
222 struct rte_ether_addr *addr;
223 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
230 if (nb_mc_addr > HNS3_MC_MACADDR_NUM) {
231 hns3_err(hw, "Failed to set mc mac addr, nb_mc_addr(%d) "
232 "invalid. valid range: 0~%d",
233 nb_mc_addr, HNS3_MC_MACADDR_NUM);
237 set_addr_num = (int)nb_mc_addr;
238 for (i = 0; i < set_addr_num; i++) {
239 addr = &mc_addr_set[i];
240 if (!rte_is_multicast_ether_addr(addr)) {
241 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
244 "Failed to set mc mac addr, addr(%s) invalid.",
249 rte_spinlock_lock(&hw->lock);
250 cur_addr_num = hw->mc_addrs_num;
251 for (i = 0; i < cur_addr_num; i++) {
252 num = cur_addr_num - i - 1;
253 addr = &hw->mc_addrs[num];
254 ret = hns3vf_remove_mc_mac_addr(hns, addr);
256 rte_spinlock_unlock(&hw->lock);
263 for (i = 0; i < set_addr_num; i++) {
264 addr = &mc_addr_set[i];
265 ret = hns3vf_add_mc_mac_addr(hns, addr);
267 rte_spinlock_unlock(&hw->lock);
271 rte_ether_addr_copy(addr, &hw->mc_addrs[hw->mc_addrs_num]);
274 rte_spinlock_unlock(&hw->lock);
280 hns3vf_configure_all_mc_mac_addr(struct hns3_adapter *hns, bool del)
282 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
283 struct hns3_hw *hw = &hns->hw;
284 struct rte_ether_addr *addr;
289 for (i = 0; i < hw->mc_addrs_num; i++) {
290 addr = &hw->mc_addrs[i];
291 if (!rte_is_multicast_ether_addr(addr))
294 ret = hns3vf_remove_mc_mac_addr(hns, addr);
296 ret = hns3vf_add_mc_mac_addr(hns, addr);
299 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
301 hns3_err(hw, "Failed to %s mc mac addr: %s for vf: %d",
302 del ? "Remove" : "Restore", mac_str, ret);
309 hns3vf_set_promisc_mode(struct hns3_hw *hw, bool en_bc_pmc)
311 struct hns3_mbx_vf_to_pf_cmd *req;
312 struct hns3_cmd_desc desc;
315 req = (struct hns3_mbx_vf_to_pf_cmd *)desc.data;
317 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MBX_VF_TO_PF, false);
318 req->msg[0] = HNS3_MBX_SET_PROMISC_MODE;
319 req->msg[1] = en_bc_pmc ? 1 : 0;
321 ret = hns3_cmd_send(hw, &desc, 1);
323 hns3_err(hw, "Set promisc mode fail, status is %d", ret);
329 hns3vf_dev_configure(struct rte_eth_dev *dev)
331 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
332 struct hns3_rss_conf *rss_cfg = &hw->rss_info;
333 struct rte_eth_conf *conf = &dev->data->dev_conf;
334 enum rte_eth_rx_mq_mode mq_mode = conf->rxmode.mq_mode;
335 uint16_t nb_rx_q = dev->data->nb_rx_queues;
336 uint16_t nb_tx_q = dev->data->nb_tx_queues;
337 struct rte_eth_rss_conf rss_conf;
342 * Hardware does not support where the number of rx and tx queues is
343 * not equal in hip08.
345 if (nb_rx_q != nb_tx_q) {
347 "nb_rx_queues(%u) not equal with nb_tx_queues(%u)! "
348 "Hardware does not support this configuration!",
353 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
354 hns3_err(hw, "setting link speed/duplex not supported");
358 hw->adapter_state = HNS3_NIC_CONFIGURING;
360 /* When RSS is not configured, redirect the packet queue 0 */
361 if ((uint32_t)mq_mode & ETH_MQ_RX_RSS_FLAG) {
362 rss_conf = conf->rx_adv_conf.rss_conf;
363 if (rss_conf.rss_key == NULL) {
364 rss_conf.rss_key = rss_cfg->key;
365 rss_conf.rss_key_len = HNS3_RSS_KEY_SIZE;
368 ret = hns3_dev_rss_hash_update(dev, &rss_conf);
374 * If jumbo frames are enabled, MTU needs to be refreshed
375 * according to the maximum RX packet length.
377 if (conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
379 * Security of max_rx_pkt_len is guaranteed in dpdk frame.
380 * Maximum value of max_rx_pkt_len is HNS3_MAX_FRAME_LEN, so it
381 * can safely assign to "uint16_t" type variable.
383 mtu = (uint16_t)HNS3_PKTLEN_TO_MTU(conf->rxmode.max_rx_pkt_len);
384 ret = hns3vf_dev_mtu_set(dev, mtu);
387 dev->data->mtu = mtu;
390 ret = hns3vf_dev_configure_vlan(dev);
394 hw->adapter_state = HNS3_NIC_CONFIGURED;
398 hw->adapter_state = HNS3_NIC_INITIALIZED;
403 hns3vf_config_mtu(struct hns3_hw *hw, uint16_t mtu)
407 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MTU, 0, (const uint8_t *)&mtu,
408 sizeof(mtu), true, NULL, 0);
410 hns3_err(hw, "Failed to set mtu (%u) for vf: %d", mtu, ret);
416 hns3vf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
418 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
419 uint32_t frame_size = mtu + HNS3_ETH_OVERHEAD;
422 if (dev->data->dev_started) {
423 hns3_err(hw, "Failed to set mtu, port %u must be stopped "
424 "before configuration", dev->data->port_id);
428 rte_spinlock_lock(&hw->lock);
429 ret = hns3vf_config_mtu(hw, mtu);
431 rte_spinlock_unlock(&hw->lock);
434 if (frame_size > RTE_ETHER_MAX_LEN)
435 dev->data->dev_conf.rxmode.offloads |=
436 DEV_RX_OFFLOAD_JUMBO_FRAME;
438 dev->data->dev_conf.rxmode.offloads &=
439 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
440 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
441 rte_spinlock_unlock(&hw->lock);
447 hns3vf_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
449 struct hns3_adapter *hns = eth_dev->data->dev_private;
450 struct hns3_hw *hw = &hns->hw;
452 info->max_rx_queues = hw->tqps_num;
453 info->max_tx_queues = hw->tqps_num;
454 info->max_rx_pktlen = HNS3_MAX_FRAME_LEN; /* CRC included */
455 info->min_rx_bufsize = hw->rx_buf_len;
456 info->max_mac_addrs = HNS3_VF_UC_MACADDR_NUM;
457 info->max_mtu = info->max_rx_pktlen - HNS3_ETH_OVERHEAD;
459 info->rx_offload_capa = (DEV_RX_OFFLOAD_IPV4_CKSUM |
460 DEV_RX_OFFLOAD_UDP_CKSUM |
461 DEV_RX_OFFLOAD_TCP_CKSUM |
462 DEV_RX_OFFLOAD_SCTP_CKSUM |
463 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
464 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
465 DEV_RX_OFFLOAD_KEEP_CRC |
466 DEV_RX_OFFLOAD_SCATTER |
467 DEV_RX_OFFLOAD_VLAN_STRIP |
468 DEV_RX_OFFLOAD_QINQ_STRIP |
469 DEV_RX_OFFLOAD_VLAN_FILTER |
470 DEV_RX_OFFLOAD_JUMBO_FRAME);
471 info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
472 info->tx_offload_capa = (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
473 DEV_TX_OFFLOAD_IPV4_CKSUM |
474 DEV_TX_OFFLOAD_TCP_CKSUM |
475 DEV_TX_OFFLOAD_UDP_CKSUM |
476 DEV_TX_OFFLOAD_SCTP_CKSUM |
477 DEV_TX_OFFLOAD_VLAN_INSERT |
478 DEV_TX_OFFLOAD_QINQ_INSERT |
479 DEV_TX_OFFLOAD_MULTI_SEGS |
480 info->tx_queue_offload_capa);
482 info->vmdq_queue_num = 0;
484 info->reta_size = HNS3_RSS_IND_TBL_SIZE;
485 info->hash_key_size = HNS3_RSS_KEY_SIZE;
486 info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;
492 hns3vf_clear_event_cause(struct hns3_hw *hw, uint32_t regclr)
494 hns3_write_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG, regclr);
498 hns3vf_disable_irq0(struct hns3_hw *hw)
500 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 0);
504 hns3vf_enable_irq0(struct hns3_hw *hw)
506 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 1);
509 static enum hns3vf_evt_cause
510 hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval)
512 struct hns3_hw *hw = &hns->hw;
513 enum hns3vf_evt_cause ret;
514 uint32_t cmdq_stat_reg;
517 /* Fetch the events from their corresponding regs */
518 cmdq_stat_reg = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_STAT_REG);
520 /* Check for vector0 mailbox(=CMDQ RX) event source */
521 if (BIT(HNS3_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) {
522 val = cmdq_stat_reg & ~BIT(HNS3_VECTOR0_RX_CMDQ_INT_B);
523 ret = HNS3VF_VECTOR0_EVENT_MBX;
528 ret = HNS3VF_VECTOR0_EVENT_OTHER;
536 hns3vf_interrupt_handler(void *param)
538 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
539 struct hns3_adapter *hns = dev->data->dev_private;
540 struct hns3_hw *hw = &hns->hw;
541 enum hns3vf_evt_cause event_cause;
544 /* Disable interrupt */
545 hns3vf_disable_irq0(hw);
547 /* Read out interrupt causes */
548 event_cause = hns3vf_check_event_cause(hns, &clearval);
550 switch (event_cause) {
551 case HNS3VF_VECTOR0_EVENT_MBX:
552 hns3_dev_handle_mbx_msg(hw);
558 /* Clear interrupt causes */
559 hns3vf_clear_event_cause(hw, clearval);
561 /* Enable interrupt */
562 hns3vf_enable_irq0(hw);
566 hns3vf_check_tqp_info(struct hns3_hw *hw)
570 tqps_num = hw->tqps_num;
571 if (tqps_num > HNS3_MAX_TQP_NUM_PER_FUNC || tqps_num == 0) {
572 PMD_INIT_LOG(ERR, "Get invalid tqps_num(%u) from PF. valid "
574 tqps_num, HNS3_MAX_TQP_NUM_PER_FUNC);
578 if (hw->rx_buf_len == 0)
579 hw->rx_buf_len = HNS3_DEFAULT_RX_BUF_LEN;
580 hw->alloc_rss_size = RTE_MIN(hw->rss_size_max, hw->tqps_num);
586 hns3vf_get_queue_info(struct hns3_hw *hw)
588 #define HNS3VF_TQPS_RSS_INFO_LEN 6
589 uint8_t resp_msg[HNS3VF_TQPS_RSS_INFO_LEN];
592 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_QINFO, 0, NULL, 0, true,
593 resp_msg, HNS3VF_TQPS_RSS_INFO_LEN);
595 PMD_INIT_LOG(ERR, "Failed to get tqp info from PF: %d", ret);
599 memcpy(&hw->tqps_num, &resp_msg[0], sizeof(uint16_t));
600 memcpy(&hw->rss_size_max, &resp_msg[2], sizeof(uint16_t));
601 memcpy(&hw->rx_buf_len, &resp_msg[4], sizeof(uint16_t));
603 return hns3vf_check_tqp_info(hw);
607 hns3vf_get_queue_depth(struct hns3_hw *hw)
609 #define HNS3VF_TQPS_DEPTH_INFO_LEN 4
610 uint8_t resp_msg[HNS3VF_TQPS_DEPTH_INFO_LEN];
613 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_QDEPTH, 0, NULL, 0, true,
614 resp_msg, HNS3VF_TQPS_DEPTH_INFO_LEN);
616 PMD_INIT_LOG(ERR, "Failed to get tqp depth info from PF: %d",
621 memcpy(&hw->num_tx_desc, &resp_msg[0], sizeof(uint16_t));
622 memcpy(&hw->num_rx_desc, &resp_msg[2], sizeof(uint16_t));
628 hns3vf_get_tc_info(struct hns3_hw *hw)
633 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_TCINFO, 0, NULL, 0,
634 true, &resp_msg, sizeof(resp_msg));
636 hns3_err(hw, "VF request to get TC info from PF failed %d",
641 hw->hw_tc_map = resp_msg;
647 hns3vf_get_configuration(struct hns3_hw *hw)
651 hw->mac.media_type = HNS3_MEDIA_TYPE_NONE;
653 /* Get queue configuration from PF */
654 ret = hns3vf_get_queue_info(hw);
658 /* Get queue depth info from PF */
659 ret = hns3vf_get_queue_depth(hw);
663 /* Get tc configuration from PF */
664 return hns3vf_get_tc_info(hw);
668 hns3vf_set_tc_info(struct hns3_adapter *hns)
670 struct hns3_hw *hw = &hns->hw;
671 uint16_t nb_rx_q = hw->data->nb_rx_queues;
676 for (i = 0; i < HNS3_MAX_TC_NUM; i++)
677 if (hw->hw_tc_map & BIT(i))
680 new_tqps = RTE_MIN(hw->tqps_num, nb_rx_q);
681 hw->alloc_rss_size = RTE_MIN(hw->rss_size_max, new_tqps / hw->num_tc);
682 hw->alloc_tqps = hw->alloc_rss_size * hw->num_tc;
684 hns3_tc_queue_mapping_cfg(hw);
688 hns3vf_request_link_info(struct hns3_hw *hw)
693 if (rte_atomic16_read(&hw->reset.resetting))
695 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_LINK_STATUS, 0, NULL, 0, false,
696 &resp_msg, sizeof(resp_msg));
698 hns3_err(hw, "Failed to fetch link status from PF: %d", ret);
702 hns3vf_vlan_filter_configure(struct hns3_adapter *hns, uint16_t vlan_id, int on)
704 #define HNS3VF_VLAN_MBX_MSG_LEN 5
705 struct hns3_hw *hw = &hns->hw;
706 uint8_t msg_data[HNS3VF_VLAN_MBX_MSG_LEN];
707 uint16_t proto = htons(RTE_ETHER_TYPE_VLAN);
708 uint8_t is_kill = on ? 0 : 1;
710 msg_data[0] = is_kill;
711 memcpy(&msg_data[1], &vlan_id, sizeof(vlan_id));
712 memcpy(&msg_data[3], &proto, sizeof(proto));
714 return hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, HNS3_MBX_VLAN_FILTER,
715 msg_data, HNS3VF_VLAN_MBX_MSG_LEN, true, NULL,
720 hns3vf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
722 struct hns3_adapter *hns = dev->data->dev_private;
723 struct hns3_hw *hw = &hns->hw;
726 rte_spinlock_lock(&hw->lock);
727 ret = hns3vf_vlan_filter_configure(hns, vlan_id, on);
728 rte_spinlock_unlock(&hw->lock);
730 hns3_err(hw, "vf set vlan id failed, vlan_id =%u, ret =%d",
737 hns3vf_en_hw_strip_rxvtag(struct hns3_hw *hw, bool enable)
742 msg_data = enable ? 1 : 0;
743 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, HNS3_MBX_VLAN_RX_OFF_CFG,
744 &msg_data, sizeof(msg_data), false, NULL, 0);
746 hns3_err(hw, "vf enable strip failed, ret =%d", ret);
752 hns3vf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
754 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
755 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
756 unsigned int tmp_mask;
758 tmp_mask = (unsigned int)mask;
759 /* Vlan stripping setting */
760 if (tmp_mask & ETH_VLAN_STRIP_MASK) {
761 rte_spinlock_lock(&hw->lock);
762 /* Enable or disable VLAN stripping */
763 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
764 hns3vf_en_hw_strip_rxvtag(hw, true);
766 hns3vf_en_hw_strip_rxvtag(hw, false);
767 rte_spinlock_unlock(&hw->lock);
774 hns3vf_dev_configure_vlan(struct rte_eth_dev *dev)
776 struct hns3_adapter *hns = dev->data->dev_private;
777 struct rte_eth_dev_data *data = dev->data;
778 struct hns3_hw *hw = &hns->hw;
781 if (data->dev_conf.txmode.hw_vlan_reject_tagged ||
782 data->dev_conf.txmode.hw_vlan_reject_untagged ||
783 data->dev_conf.txmode.hw_vlan_insert_pvid) {
784 hns3_warn(hw, "hw_vlan_reject_tagged, hw_vlan_reject_untagged "
785 "or hw_vlan_insert_pvid is not support!");
788 /* Apply vlan offload setting */
789 ret = hns3vf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
791 hns3_err(hw, "dev config vlan offload failed, ret =%d", ret);
797 hns3vf_set_alive(struct hns3_hw *hw, bool alive)
801 msg_data = alive ? 1 : 0;
802 return hns3_send_mbx_msg(hw, HNS3_MBX_SET_ALIVE, 0, &msg_data,
803 sizeof(msg_data), false, NULL, 0);
807 hns3vf_keep_alive_handler(void *param)
809 struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
810 struct hns3_adapter *hns = eth_dev->data->dev_private;
811 struct hns3_hw *hw = &hns->hw;
815 ret = hns3_send_mbx_msg(hw, HNS3_MBX_KEEP_ALIVE, 0, NULL, 0,
816 false, &respmsg, sizeof(uint8_t));
818 hns3_err(hw, "VF sends keeping alive cmd failed(=%d)",
821 rte_eal_alarm_set(HNS3VF_KEEP_ALIVE_INTERVAL, hns3vf_keep_alive_handler,
826 hns3vf_service_handler(void *param)
828 struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
829 struct hns3_adapter *hns = eth_dev->data->dev_private;
830 struct hns3_hw *hw = &hns->hw;
832 hns3vf_request_link_info(hw);
834 rte_eal_alarm_set(HNS3VF_SERVICE_INTERVAL, hns3vf_service_handler,
839 hns3vf_init_hardware(struct hns3_adapter *hns)
841 struct hns3_hw *hw = &hns->hw;
842 uint16_t mtu = hw->data->mtu;
845 ret = hns3vf_set_promisc_mode(hw, true);
849 ret = hns3vf_config_mtu(hw, mtu);
851 goto err_init_hardware;
853 ret = hns3vf_vlan_filter_configure(hns, 0, 1);
855 PMD_INIT_LOG(ERR, "Failed to initialize VLAN config: %d", ret);
856 goto err_init_hardware;
859 ret = hns3_config_gro(hw, false);
861 PMD_INIT_LOG(ERR, "Failed to config gro: %d", ret);
862 goto err_init_hardware;
865 ret = hns3vf_set_alive(hw, true);
867 PMD_INIT_LOG(ERR, "Failed to VF send alive to PF: %d", ret);
868 goto err_init_hardware;
871 hns3vf_request_link_info(hw);
875 (void)hns3vf_set_promisc_mode(hw, false);
880 hns3vf_init_vf(struct rte_eth_dev *eth_dev)
882 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
883 struct hns3_adapter *hns = eth_dev->data->dev_private;
884 struct hns3_hw *hw = &hns->hw;
887 PMD_INIT_FUNC_TRACE();
889 /* Get hardware io base address from pcie BAR2 IO space */
890 hw->io_base = pci_dev->mem_resource[2].addr;
892 /* Firmware command queue initialize */
893 ret = hns3_cmd_init_queue(hw);
895 PMD_INIT_LOG(ERR, "Failed to init cmd queue: %d", ret);
896 goto err_cmd_init_queue;
899 /* Firmware command initialize */
900 ret = hns3_cmd_init(hw);
902 PMD_INIT_LOG(ERR, "Failed to init cmd: %d", ret);
906 rte_spinlock_init(&hw->mbx_resp.lock);
908 hns3vf_clear_event_cause(hw, 0);
910 ret = rte_intr_callback_register(&pci_dev->intr_handle,
911 hns3vf_interrupt_handler, eth_dev);
913 PMD_INIT_LOG(ERR, "Failed to register intr: %d", ret);
914 goto err_intr_callback_register;
917 /* Enable interrupt */
918 rte_intr_enable(&pci_dev->intr_handle);
919 hns3vf_enable_irq0(hw);
921 /* Get configuration from PF */
922 ret = hns3vf_get_configuration(hw);
924 PMD_INIT_LOG(ERR, "Failed to fetch configuration: %d", ret);
928 rte_eth_random_addr(hw->mac.mac_addr); /* Generate a random mac addr */
930 ret = hns3vf_init_hardware(hns);
934 hns3_set_default_rss_args(hw);
939 hns3vf_disable_irq0(hw);
940 rte_intr_disable(&pci_dev->intr_handle);
942 err_intr_callback_register:
946 hns3_cmd_destroy_queue(hw);
955 hns3vf_uninit_vf(struct rte_eth_dev *eth_dev)
957 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
958 struct hns3_adapter *hns = eth_dev->data->dev_private;
959 struct hns3_hw *hw = &hns->hw;
961 PMD_INIT_FUNC_TRACE();
963 hns3_rss_uninit(hns);
964 (void)hns3vf_set_alive(hw, false);
965 (void)hns3vf_set_promisc_mode(hw, false);
966 hns3vf_disable_irq0(hw);
967 rte_intr_disable(&pci_dev->intr_handle);
969 hns3_cmd_destroy_queue(hw);
974 hns3vf_do_stop(struct hns3_adapter *hns)
976 struct hns3_hw *hw = &hns->hw;
978 hw->mac.link_status = ETH_LINK_DOWN;
980 hns3vf_configure_mac_addr(hns, true);
986 hns3vf_dev_stop(struct rte_eth_dev *eth_dev)
988 struct hns3_adapter *hns = eth_dev->data->dev_private;
989 struct hns3_hw *hw = &hns->hw;
991 PMD_INIT_FUNC_TRACE();
993 hw->adapter_state = HNS3_NIC_STOPPING;
995 rte_spinlock_lock(&hw->lock);
997 hw->adapter_state = HNS3_NIC_CONFIGURED;
998 rte_spinlock_unlock(&hw->lock);
1002 hns3vf_dev_close(struct rte_eth_dev *eth_dev)
1004 struct hns3_adapter *hns = eth_dev->data->dev_private;
1005 struct hns3_hw *hw = &hns->hw;
1007 if (hw->adapter_state == HNS3_NIC_STARTED)
1008 hns3vf_dev_stop(eth_dev);
1010 hw->adapter_state = HNS3_NIC_CLOSING;
1011 rte_eal_alarm_cancel(hns3vf_keep_alive_handler, eth_dev);
1012 rte_eal_alarm_cancel(hns3vf_service_handler, eth_dev);
1013 hns3vf_configure_all_mc_mac_addr(hns, true);
1014 hns3vf_uninit_vf(eth_dev);
1015 rte_free(eth_dev->process_private);
1016 eth_dev->process_private = NULL;
1017 hw->adapter_state = HNS3_NIC_CLOSED;
1018 hns3_warn(hw, "Close port %d finished", hw->data->port_id);
1022 hns3vf_dev_link_update(struct rte_eth_dev *eth_dev,
1023 __rte_unused int wait_to_complete)
1025 struct hns3_adapter *hns = eth_dev->data->dev_private;
1026 struct hns3_hw *hw = &hns->hw;
1027 struct hns3_mac *mac = &hw->mac;
1028 struct rte_eth_link new_link;
1030 hns3vf_request_link_info(hw);
1032 memset(&new_link, 0, sizeof(new_link));
1033 switch (mac->link_speed) {
1034 case ETH_SPEED_NUM_10M:
1035 case ETH_SPEED_NUM_100M:
1036 case ETH_SPEED_NUM_1G:
1037 case ETH_SPEED_NUM_10G:
1038 case ETH_SPEED_NUM_25G:
1039 case ETH_SPEED_NUM_40G:
1040 case ETH_SPEED_NUM_50G:
1041 case ETH_SPEED_NUM_100G:
1042 new_link.link_speed = mac->link_speed;
1045 new_link.link_speed = ETH_SPEED_NUM_100M;
1049 new_link.link_duplex = mac->link_duplex;
1050 new_link.link_status = mac->link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
1051 new_link.link_autoneg =
1052 !(eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
1054 return rte_eth_linkstatus_set(eth_dev, &new_link);
1058 hns3vf_do_start(struct hns3_adapter *hns, __rte_unused bool reset_queue)
1060 hns3vf_set_tc_info(hns);
1066 hns3vf_dev_start(struct rte_eth_dev *eth_dev)
1068 struct hns3_adapter *hns = eth_dev->data->dev_private;
1069 struct hns3_hw *hw = &hns->hw;
1072 PMD_INIT_FUNC_TRACE();
1073 rte_spinlock_lock(&hw->lock);
1074 hw->adapter_state = HNS3_NIC_STARTING;
1075 ret = hns3vf_do_start(hns, true);
1077 hw->adapter_state = HNS3_NIC_CONFIGURED;
1078 rte_spinlock_unlock(&hw->lock);
1081 hw->adapter_state = HNS3_NIC_STARTED;
1082 rte_spinlock_unlock(&hw->lock);
1086 static const struct eth_dev_ops hns3vf_eth_dev_ops = {
1087 .dev_start = hns3vf_dev_start,
1088 .dev_stop = hns3vf_dev_stop,
1089 .dev_close = hns3vf_dev_close,
1090 .mtu_set = hns3vf_dev_mtu_set,
1091 .dev_infos_get = hns3vf_dev_infos_get,
1092 .dev_configure = hns3vf_dev_configure,
1093 .mac_addr_add = hns3vf_add_mac_addr,
1094 .mac_addr_remove = hns3vf_remove_mac_addr,
1095 .mac_addr_set = hns3vf_set_default_mac_addr,
1096 .set_mc_addr_list = hns3vf_set_mc_mac_addr_list,
1097 .link_update = hns3vf_dev_link_update,
1098 .rss_hash_update = hns3_dev_rss_hash_update,
1099 .rss_hash_conf_get = hns3_dev_rss_hash_conf_get,
1100 .reta_update = hns3_dev_rss_reta_update,
1101 .reta_query = hns3_dev_rss_reta_query,
1102 .filter_ctrl = hns3_dev_filter_ctrl,
1103 .vlan_filter_set = hns3vf_vlan_filter_set,
1104 .vlan_offload_set = hns3vf_vlan_offload_set,
1108 hns3vf_dev_init(struct rte_eth_dev *eth_dev)
1110 struct hns3_adapter *hns = eth_dev->data->dev_private;
1111 struct hns3_hw *hw = &hns->hw;
1114 PMD_INIT_FUNC_TRACE();
1116 eth_dev->process_private = (struct hns3_process_private *)
1117 rte_zmalloc_socket("hns3_filter_list",
1118 sizeof(struct hns3_process_private),
1119 RTE_CACHE_LINE_SIZE, eth_dev->device->numa_node);
1120 if (eth_dev->process_private == NULL) {
1121 PMD_INIT_LOG(ERR, "Failed to alloc memory for process private");
1125 /* initialize flow filter lists */
1126 hns3_filterlist_init(eth_dev);
1128 eth_dev->dev_ops = &hns3vf_eth_dev_ops;
1129 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1132 hw->adapter_state = HNS3_NIC_UNINITIALIZED;
1134 hw->data = eth_dev->data;
1136 ret = hns3vf_init_vf(eth_dev);
1138 PMD_INIT_LOG(ERR, "Failed to init vf: %d", ret);
1142 /* Allocate memory for storing MAC addresses */
1143 eth_dev->data->mac_addrs = rte_zmalloc("hns3vf-mac",
1144 sizeof(struct rte_ether_addr) *
1145 HNS3_VF_UC_MACADDR_NUM, 0);
1146 if (eth_dev->data->mac_addrs == NULL) {
1147 PMD_INIT_LOG(ERR, "Failed to allocate %zx bytes needed "
1148 "to store MAC addresses",
1149 sizeof(struct rte_ether_addr) *
1150 HNS3_VF_UC_MACADDR_NUM);
1152 goto err_rte_zmalloc;
1155 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.mac_addr,
1156 ð_dev->data->mac_addrs[0]);
1157 hw->adapter_state = HNS3_NIC_INITIALIZED;
1159 * Pass the information to the rte_eth_dev_close() that it should also
1160 * release the private port resources.
1162 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1164 rte_eal_alarm_set(HNS3VF_KEEP_ALIVE_INTERVAL, hns3vf_keep_alive_handler,
1166 rte_eal_alarm_set(HNS3VF_SERVICE_INTERVAL, hns3vf_service_handler,
1171 hns3vf_uninit_vf(eth_dev);
1174 eth_dev->dev_ops = NULL;
1175 eth_dev->rx_pkt_burst = NULL;
1176 eth_dev->tx_pkt_burst = NULL;
1177 eth_dev->tx_pkt_prepare = NULL;
1178 rte_free(eth_dev->process_private);
1179 eth_dev->process_private = NULL;
1185 hns3vf_dev_uninit(struct rte_eth_dev *eth_dev)
1187 struct hns3_adapter *hns = eth_dev->data->dev_private;
1188 struct hns3_hw *hw = &hns->hw;
1190 PMD_INIT_FUNC_TRACE();
1192 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1195 eth_dev->dev_ops = NULL;
1196 eth_dev->rx_pkt_burst = NULL;
1197 eth_dev->tx_pkt_burst = NULL;
1198 eth_dev->tx_pkt_prepare = NULL;
1200 if (hw->adapter_state < HNS3_NIC_CLOSING)
1201 hns3vf_dev_close(eth_dev);
1203 hw->adapter_state = HNS3_NIC_REMOVED;
1208 eth_hns3vf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1209 struct rte_pci_device *pci_dev)
1211 return rte_eth_dev_pci_generic_probe(pci_dev,
1212 sizeof(struct hns3_adapter),
1217 eth_hns3vf_pci_remove(struct rte_pci_device *pci_dev)
1219 return rte_eth_dev_pci_generic_remove(pci_dev, hns3vf_dev_uninit);
1222 static const struct rte_pci_id pci_id_hns3vf_map[] = {
1223 { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_VF) },
1224 { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_PFC_VF) },
1225 { .vendor_id = 0, /* sentinel */ },
1228 static struct rte_pci_driver rte_hns3vf_pmd = {
1229 .id_table = pci_id_hns3vf_map,
1230 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1231 .probe = eth_hns3vf_pci_probe,
1232 .remove = eth_hns3vf_pci_remove,
1235 RTE_PMD_REGISTER_PCI(net_hns3_vf, rte_hns3vf_pmd);
1236 RTE_PMD_REGISTER_PCI_TABLE(net_hns3_vf, pci_id_hns3vf_map);
1237 RTE_PMD_REGISTER_KMOD_DEP(net_hns3_vf, "* igb_uio | vfio-pci");