drivers/net/hns3/hns3_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018-2019 Hisilicon Limited.
   3  */
   4
   5 #include <errno.h>
   6 #include <stdio.h>
   7 #include <stdbool.h>
   8 #include <string.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <arpa/inet.h>
  12 #include <linux/pci_regs.h>
  13
  14 #include <rte_alarm.h>
  15 #include <rte_atomic.h>
  16 #include <rte_bus_pci.h>
  17 #include <rte_byteorder.h>
  18 #include <rte_common.h>
  19 #include <rte_cycles.h>
  20 #include <rte_dev.h>
  21 #include <rte_eal.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_ethdev_pci.h>
  25 #include <rte_interrupts.h>
  26 #include <rte_io.h>
  27 #include <rte_log.h>
  28 #include <rte_pci.h>
  29 #include <rte_vfio.h>
  30
  31 #include "hns3_ethdev.h"
  32 #include "hns3_logs.h"
  33 #include "hns3_rxtx.h"
  34 #include "hns3_regs.h"
  35 #include "hns3_intr.h"
  36 #include "hns3_dcb.h"
  37 #include "hns3_mp.h"
  38
  39 #define HNS3VF_KEEP_ALIVE_INTERVAL      2000000 /* us */
  40 #define HNS3VF_SERVICE_INTERVAL         1000000 /* us */
  41
  42 #define HNS3VF_RESET_WAIT_MS    20
  43 #define HNS3VF_RESET_WAIT_CNT   2000
  44
  45 /* Reset related Registers */
  46 #define HNS3_GLOBAL_RESET_BIT           0
  47 #define HNS3_CORE_RESET_BIT             1
  48 #define HNS3_IMP_RESET_BIT              2
  49 #define HNS3_FUN_RST_ING_B              0
  50
  51 enum hns3vf_evt_cause {
  52         HNS3VF_VECTOR0_EVENT_RST,
  53         HNS3VF_VECTOR0_EVENT_MBX,
  54         HNS3VF_VECTOR0_EVENT_OTHER,
  55 };
  56
  57 static enum hns3_reset_level hns3vf_get_reset_level(struct hns3_hw *hw,
  58                                                     uint64_t *levels);
  59 static int hns3vf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
  60 static int hns3vf_dev_configure_vlan(struct rte_eth_dev *dev);
  61
  62 static int hns3vf_add_mc_mac_addr(struct hns3_hw *hw,
  63                                   struct rte_ether_addr *mac_addr);
  64 static int hns3vf_remove_mc_mac_addr(struct hns3_hw *hw,
  65                                      struct rte_ether_addr *mac_addr);
  66 /* set PCI bus mastering */
  67 static void
  68 hns3vf_set_bus_master(const struct rte_pci_device *device, bool op)
  69 {
  70         uint16_t reg;
  71
  72         rte_pci_read_config(device, &reg, sizeof(reg), PCI_COMMAND);
  73
  74         if (op)
  75                 /* set the master bit */
  76                 reg |= PCI_COMMAND_MASTER;
  77         else
  78                 reg &= ~(PCI_COMMAND_MASTER);
  79
  80         rte_pci_write_config(device, &reg, sizeof(reg), PCI_COMMAND);
  81 }
  82
  83 /**
  84  * hns3vf_find_pci_capability - lookup a capability in the PCI capability list
  85  * @cap: the capability
  86  *
  87  * Return the address of the given capability within the PCI capability list.
  88  */
  89 static int
  90 hns3vf_find_pci_capability(const struct rte_pci_device *device, int cap)
  91 {
  92 #define MAX_PCIE_CAPABILITY 48
  93         uint16_t status;
  94         uint8_t pos;
  95         uint8_t id;
  96         int ttl;
  97
  98         rte_pci_read_config(device, &status, sizeof(status), PCI_STATUS);
  99         if (!(status & PCI_STATUS_CAP_LIST))
 100                 return 0;
 101
 102         ttl = MAX_PCIE_CAPABILITY;
 103         rte_pci_read_config(device, &pos, sizeof(pos), PCI_CAPABILITY_LIST);
 104         while (ttl-- && pos >= PCI_STD_HEADER_SIZEOF) {
 105                 rte_pci_read_config(device, &id, sizeof(id),
 106                                     (pos + PCI_CAP_LIST_ID));
 107
 108                 if (id == 0xFF)
 109                         break;
 110
 111                 if (id == cap)
 112                         return (int)pos;
 113
 114                 rte_pci_read_config(device, &pos, sizeof(pos),
 115                                     (pos + PCI_CAP_LIST_NEXT));
 116         }
 117         return 0;
 118 }
 119
 120 static int
 121 hns3vf_enable_msix(const struct rte_pci_device *device, bool op)
 122 {
 123         uint16_t control;
 124         int pos;
 125
 126         pos = hns3vf_find_pci_capability(device, PCI_CAP_ID_MSIX);
 127         if (pos) {
 128                 rte_pci_read_config(device, &control, sizeof(control),
 129                                     (pos + PCI_MSIX_FLAGS));
 130                 if (op)
 131                         control |= PCI_MSIX_FLAGS_ENABLE;
 132                 else
 133                         control &= ~PCI_MSIX_FLAGS_ENABLE;
 134                 rte_pci_write_config(device, &control, sizeof(control),
 135                                      (pos + PCI_MSIX_FLAGS));
 136                 return 0;
 137         }
 138         return -ENXIO;
 139 }
 140
 141 static int
 142 hns3vf_add_uc_mac_addr(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
 143 {
 144         /* mac address was checked by upper level interface */
 145         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 146         int ret;
 147
 148         ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
 149                                 HNS3_MBX_MAC_VLAN_UC_ADD, mac_addr->addr_bytes,
 150                                 RTE_ETHER_ADDR_LEN, false, NULL, 0);
 151         if (ret) {
 152                 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 153                                       mac_addr);
 154                 hns3_err(hw, "failed to add uc mac addr(%s), ret = %d",
 155                          mac_str, ret);
 156         }
 157         return ret;
 158 }
 159
 160 static int
 161 hns3vf_remove_uc_mac_addr(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
 162 {
 163         /* mac address was checked by upper level interface */
 164         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 165         int ret;
 166
 167         ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
 168                                 HNS3_MBX_MAC_VLAN_UC_REMOVE,
 169                                 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN,
 170                                 false, NULL, 0);
 171         if (ret) {
 172                 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 173                                       mac_addr);
 174                 hns3_err(hw, "failed to add uc mac addr(%s), ret = %d",
 175                          mac_str, ret);
 176         }
 177         return ret;
 178 }
 179
 180 static int
 181 hns3vf_add_mc_addr_common(struct hns3_hw *hw, struct rte_ether_addr *mac_addr)
 182 {
 183         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 184         struct rte_ether_addr *addr;
 185         int ret;
 186         int i;
 187
 188         for (i = 0; i < hw->mc_addrs_num; i++) {
 189                 addr = &hw->mc_addrs[i];
 190                 /* Check if there are duplicate addresses */
 191                 if (rte_is_same_ether_addr(addr, mac_addr)) {
 192                         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 193                                               addr);
 194                         hns3_err(hw, "failed to add mc mac addr, same addrs"
 195                                  "(%s) is added by the set_mc_mac_addr_list "
 196                                  "API", mac_str);
 197                         return -EINVAL;
 198                 }
 199         }
 200
 201         ret = hns3vf_add_mc_mac_addr(hw, mac_addr);
 202         if (ret) {
 203                 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 204                                       mac_addr);
 205                 hns3_err(hw, "failed to add mc mac addr(%s), ret = %d",
 206                          mac_str, ret);
 207         }
 208         return ret;
 209 }
 210
 211 static int
 212 hns3vf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
 213                     __rte_unused uint32_t idx,
 214                     __rte_unused uint32_t pool)
 215 {
 216         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 217         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 218         int ret;
 219
 220         rte_spinlock_lock(&hw->lock);
 221
 222         /*
 223          * In hns3 network engine adding UC and MC mac address with different
 224          * commands with firmware. We need to determine whether the input
 225          * address is a UC or a MC address to call different commands.
 226          * By the way, it is recommended calling the API function named
 227          * rte_eth_dev_set_mc_addr_list to set the MC mac address, because
 228          * using the rte_eth_dev_mac_addr_add API function to set MC mac address
 229          * may affect the specifications of UC mac addresses.
 230          */
 231         if (rte_is_multicast_ether_addr(mac_addr))
 232                 ret = hns3vf_add_mc_addr_common(hw, mac_addr);
 233         else
 234                 ret = hns3vf_add_uc_mac_addr(hw, mac_addr);
 235
 236         rte_spinlock_unlock(&hw->lock);
 237         if (ret) {
 238                 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 239                                       mac_addr);
 240                 hns3_err(hw, "failed to add mac addr(%s), ret = %d", mac_str,
 241                          ret);
 242         }
 243
 244         return ret;
 245 }
 246
 247 static void
 248 hns3vf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t idx)
 249 {
 250         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 251         /* index will be checked by upper level rte interface */
 252         struct rte_ether_addr *mac_addr = &dev->data->mac_addrs[idx];
 253         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 254         int ret;
 255
 256         rte_spinlock_lock(&hw->lock);
 257
 258         if (rte_is_multicast_ether_addr(mac_addr))
 259                 ret = hns3vf_remove_mc_mac_addr(hw, mac_addr);
 260         else
 261                 ret = hns3vf_remove_uc_mac_addr(hw, mac_addr);
 262
 263         rte_spinlock_unlock(&hw->lock);
 264         if (ret) {
 265                 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 266                                       mac_addr);
 267                 hns3_err(hw, "failed to remove mac addr(%s), ret = %d",
 268                          mac_str, ret);
 269         }
 270 }
 271
 272 static int
 273 hns3vf_set_default_mac_addr(struct rte_eth_dev *dev,
 274                             struct rte_ether_addr *mac_addr)
 275 {
 276 #define HNS3_TWO_ETHER_ADDR_LEN (RTE_ETHER_ADDR_LEN * 2)
 277         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 278         struct rte_ether_addr *old_addr;
 279         uint8_t addr_bytes[HNS3_TWO_ETHER_ADDR_LEN]; /* for 2 MAC addresses */
 280         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 281         int ret;
 282
 283         /*
 284          * It has been guaranteed that input parameter named mac_addr is valid
 285          * address in the rte layer of DPDK framework.
 286          */
 287         old_addr = (struct rte_ether_addr *)hw->mac.mac_addr;
 288         rte_spinlock_lock(&hw->lock);
 289         memcpy(addr_bytes, mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN);
 290         memcpy(&addr_bytes[RTE_ETHER_ADDR_LEN], old_addr->addr_bytes,
 291                RTE_ETHER_ADDR_LEN);
 292
 293         ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
 294                                 HNS3_MBX_MAC_VLAN_UC_MODIFY, addr_bytes,
 295                                 HNS3_TWO_ETHER_ADDR_LEN, true, NULL, 0);
 296         if (ret) {
 297                 /*
 298                  * The hns3 VF PMD driver depends on the hns3 PF kernel ethdev
 299                  * driver. When user has configured a MAC address for VF device
 300                  * by "ip link set ..." command based on the PF device, the hns3
 301                  * PF kernel ethdev driver does not allow VF driver to request
 302                  * reconfiguring a different default MAC address, and return
 303                  * -EPREM to VF driver through mailbox.
 304                  */
 305                 if (ret == -EPERM) {
 306                         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 307                                               old_addr);
 308                         hns3_warn(hw, "Has permanet mac addr(%s) for vf",
 309                                   mac_str);
 310                 } else {
 311                         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 312                                               mac_addr);
 313                         hns3_err(hw, "Failed to set mac addr(%s) for vf: %d",
 314                                  mac_str, ret);
 315                 }
 316         }
 317
 318         rte_ether_addr_copy(mac_addr,
 319                             (struct rte_ether_addr *)hw->mac.mac_addr);
 320         rte_spinlock_unlock(&hw->lock);
 321
 322         return ret;
 323 }
 324
 325 static int
 326 hns3vf_configure_mac_addr(struct hns3_adapter *hns, bool del)
 327 {
 328         struct hns3_hw *hw = &hns->hw;
 329         struct rte_ether_addr *addr;
 330         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 331         int err = 0;
 332         int ret;
 333         int i;
 334
 335         for (i = 0; i < HNS3_VF_UC_MACADDR_NUM; i++) {
 336                 addr = &hw->data->mac_addrs[i];
 337                 if (rte_is_zero_ether_addr(addr))
 338                         continue;
 339                 if (rte_is_multicast_ether_addr(addr))
 340                         ret = del ? hns3vf_remove_mc_mac_addr(hw, addr) :
 341                               hns3vf_add_mc_mac_addr(hw, addr);
 342                 else
 343                         ret = del ? hns3vf_remove_uc_mac_addr(hw, addr) :
 344                               hns3vf_add_uc_mac_addr(hw, addr);
 345
 346                 if (ret) {
 347                         err = ret;
 348                         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 349                                               addr);
 350                         hns3_err(hw, "failed to %s mac addr(%s) index:%d "
 351                                  "ret = %d.", del ? "remove" : "restore",
 352                                  mac_str, i, ret);
 353                 }
 354         }
 355         return err;
 356 }
 357
 358 static int
 359 hns3vf_add_mc_mac_addr(struct hns3_hw *hw,
 360                        struct rte_ether_addr *mac_addr)
 361 {
 362         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 363         int ret;
 364
 365         ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MULTICAST,
 366                                 HNS3_MBX_MAC_VLAN_MC_ADD,
 367                                 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
 368                                 NULL, 0);
 369         if (ret) {
 370                 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 371                                       mac_addr);
 372                 hns3_err(hw, "Failed to add mc mac addr(%s) for vf: %d",
 373                          mac_str, ret);
 374         }
 375
 376         return ret;
 377 }
 378
 379 static int
 380 hns3vf_remove_mc_mac_addr(struct hns3_hw *hw,
 381                           struct rte_ether_addr *mac_addr)
 382 {
 383         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 384         int ret;
 385
 386         ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MULTICAST,
 387                                 HNS3_MBX_MAC_VLAN_MC_REMOVE,
 388                                 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
 389                                 NULL, 0);
 390         if (ret) {
 391                 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 392                                       mac_addr);
 393                 hns3_err(hw, "Failed to remove mc mac addr(%s) for vf: %d",
 394                          mac_str, ret);
 395         }
 396
 397         return ret;
 398 }
 399
 400 static int
 401 hns3vf_set_mc_addr_chk_param(struct hns3_hw *hw,
 402                              struct rte_ether_addr *mc_addr_set,
 403                              uint32_t nb_mc_addr)
 404 {
 405         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 406         struct rte_ether_addr *addr;
 407         uint32_t i;
 408         uint32_t j;
 409
 410         if (nb_mc_addr > HNS3_MC_MACADDR_NUM) {
 411                 hns3_err(hw, "failed to set mc mac addr, nb_mc_addr(%d) "
 412                          "invalid. valid range: 0~%d",
 413                          nb_mc_addr, HNS3_MC_MACADDR_NUM);
 414                 return -EINVAL;
 415         }
 416
 417         /* Check if input mac addresses are valid */
 418         for (i = 0; i < nb_mc_addr; i++) {
 419                 addr = &mc_addr_set[i];
 420                 if (!rte_is_multicast_ether_addr(addr)) {
 421                         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 422                                               addr);
 423                         hns3_err(hw,
 424                                  "failed to set mc mac addr, addr(%s) invalid.",
 425                                  mac_str);
 426                         return -EINVAL;
 427                 }
 428
 429                 /* Check if there are duplicate addresses */
 430                 for (j = i + 1; j < nb_mc_addr; j++) {
 431                         if (rte_is_same_ether_addr(addr, &mc_addr_set[j])) {
 432                                 rte_ether_format_addr(mac_str,
 433                                                       RTE_ETHER_ADDR_FMT_SIZE,
 434                                                       addr);
 435                                 hns3_err(hw, "failed to set mc mac addr, "
 436                                          "addrs invalid. two same addrs(%s).",
 437                                          mac_str);
 438                                 return -EINVAL;
 439                         }
 440                 }
 441
 442                 /*
 443                  * Check if there are duplicate addresses between mac_addrs
 444                  * and mc_addr_set
 445                  */
 446                 for (j = 0; j < HNS3_VF_UC_MACADDR_NUM; j++) {
 447                         if (rte_is_same_ether_addr(addr,
 448                                                    &hw->data->mac_addrs[j])) {
 449                                 rte_ether_format_addr(mac_str,
 450                                                       RTE_ETHER_ADDR_FMT_SIZE,
 451                                                       addr);
 452                                 hns3_err(hw, "failed to set mc mac addr, "
 453                                          "addrs invalid. addrs(%s) has already "
 454                                          "configured in mac_addr add API",
 455                                          mac_str);
 456                                 return -EINVAL;
 457                         }
 458                 }
 459         }
 460
 461         return 0;
 462 }
 463
 464 static int
 465 hns3vf_set_mc_mac_addr_list(struct rte_eth_dev *dev,
 466                             struct rte_ether_addr *mc_addr_set,
 467                             uint32_t nb_mc_addr)
 468 {
 469         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 470         struct rte_ether_addr *addr;
 471         int cur_addr_num;
 472         int set_addr_num;
 473         int num;
 474         int ret;
 475         int i;
 476
 477         ret = hns3vf_set_mc_addr_chk_param(hw, mc_addr_set, nb_mc_addr);
 478         if (ret)
 479                 return ret;
 480
 481         rte_spinlock_lock(&hw->lock);
 482         cur_addr_num = hw->mc_addrs_num;
 483         for (i = 0; i < cur_addr_num; i++) {
 484                 num = cur_addr_num - i - 1;
 485                 addr = &hw->mc_addrs[num];
 486                 ret = hns3vf_remove_mc_mac_addr(hw, addr);
 487                 if (ret) {
 488                         rte_spinlock_unlock(&hw->lock);
 489                         return ret;
 490                 }
 491
 492                 hw->mc_addrs_num--;
 493         }
 494
 495         set_addr_num = (int)nb_mc_addr;
 496         for (i = 0; i < set_addr_num; i++) {
 497                 addr = &mc_addr_set[i];
 498                 ret = hns3vf_add_mc_mac_addr(hw, addr);
 499                 if (ret) {
 500                         rte_spinlock_unlock(&hw->lock);
 501                         return ret;
 502                 }
 503
 504                 rte_ether_addr_copy(addr, &hw->mc_addrs[hw->mc_addrs_num]);
 505                 hw->mc_addrs_num++;
 506         }
 507         rte_spinlock_unlock(&hw->lock);
 508
 509         return 0;
 510 }
 511
 512 static int
 513 hns3vf_configure_all_mc_mac_addr(struct hns3_adapter *hns, bool del)
 514 {
 515         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 516         struct hns3_hw *hw = &hns->hw;
 517         struct rte_ether_addr *addr;
 518         int err = 0;
 519         int ret;
 520         int i;
 521
 522         for (i = 0; i < hw->mc_addrs_num; i++) {
 523                 addr = &hw->mc_addrs[i];
 524                 if (!rte_is_multicast_ether_addr(addr))
 525                         continue;
 526                 if (del)
 527                         ret = hns3vf_remove_mc_mac_addr(hw, addr);
 528                 else
 529                         ret = hns3vf_add_mc_mac_addr(hw, addr);
 530                 if (ret) {
 531                         err = ret;
 532                         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
 533                                               addr);
 534                         hns3_err(hw, "Failed to %s mc mac addr: %s for vf: %d",
 535                                  del ? "Remove" : "Restore", mac_str, ret);
 536                 }
 537         }
 538         return err;
 539 }
 540
 541 static int
 542 hns3vf_set_promisc_mode(struct hns3_hw *hw, bool en_bc_pmc,
 543                         bool en_uc_pmc, bool en_mc_pmc)
 544 {
 545         struct hns3_mbx_vf_to_pf_cmd *req;
 546         struct hns3_cmd_desc desc;
 547         int ret;
 548
 549         req = (struct hns3_mbx_vf_to_pf_cmd *)desc.data;
 550
 551         /*
 552          * The hns3 VF PMD driver depends on the hns3 PF kernel ethdev driver,
 553          * so there are some features for promiscuous/allmulticast mode in hns3
 554          * VF PMD driver as below:
 555          * 1. The promiscuous/allmulticast mode can be configured successfully
 556          *    only based on the trusted VF device. If based on the non trusted
 557          *    VF device, configuring promiscuous/allmulticast mode will fail.
 558          *    The hns3 VF device can be confiruged as trusted device by hns3 PF
 559          *    kernel ethdev driver on the host by the following command:
 560          *      "ip link set <eth num> vf <vf id> turst on"
 561          * 2. After the promiscuous mode is configured successfully, hns3 VF PMD
 562          *    driver can receive the ingress and outgoing traffic. In the words,
 563          *    all the ingress packets, all the packets sent from the PF and
 564          *    other VFs on the same physical port.
 565          * 3. Note: Because of the hardware constraints, By default vlan filter
 566          *    is enabled and couldn't be turned off based on VF device, so vlan
 567          *    filter is still effective even in promiscuous mode. If upper
 568          *    applications don't call rte_eth_dev_vlan_filter API function to
 569          *    set vlan based on VF device, hns3 VF PMD driver will can't receive
 570          *    the packets with vlan tag in promiscuoue mode.
 571          */
 572         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MBX_VF_TO_PF, false);
 573         req->msg[0] = HNS3_MBX_SET_PROMISC_MODE;
 574         req->msg[1] = en_bc_pmc ? 1 : 0;
 575         req->msg[2] = en_uc_pmc ? 1 : 0;
 576         req->msg[3] = en_mc_pmc ? 1 : 0;
 577
 578         ret = hns3_cmd_send(hw, &desc, 1);
 579         if (ret)
 580                 hns3_err(hw, "Set promisc mode fail, ret = %d", ret);
 581
 582         return ret;
 583 }
 584
 585 static int
 586 hns3vf_dev_promiscuous_enable(struct rte_eth_dev *dev)
 587 {
 588         struct hns3_adapter *hns = dev->data->dev_private;
 589         struct hns3_hw *hw = &hns->hw;
 590         int ret;
 591
 592         ret = hns3vf_set_promisc_mode(hw, true, true, true);
 593         if (ret)
 594                 hns3_err(hw, "Failed to enable promiscuous mode, ret = %d",
 595                         ret);
 596         return ret;
 597 }
 598
 599 static int
 600 hns3vf_dev_promiscuous_disable(struct rte_eth_dev *dev)
 601 {
 602         bool allmulti = dev->data->all_multicast ? true : false;
 603         struct hns3_adapter *hns = dev->data->dev_private;
 604         struct hns3_hw *hw = &hns->hw;
 605         int ret;
 606
 607         ret = hns3vf_set_promisc_mode(hw, true, false, allmulti);
 608         if (ret)
 609                 hns3_err(hw, "Failed to disable promiscuous mode, ret = %d",
 610                         ret);
 611         return ret;
 612 }
 613
 614 static int
 615 hns3vf_dev_allmulticast_enable(struct rte_eth_dev *dev)
 616 {
 617         struct hns3_adapter *hns = dev->data->dev_private;
 618         struct hns3_hw *hw = &hns->hw;
 619         int ret;
 620
 621         if (dev->data->promiscuous)
 622                 return 0;
 623
 624         ret = hns3vf_set_promisc_mode(hw, true, false, true);
 625         if (ret)
 626                 hns3_err(hw, "Failed to enable allmulticast mode, ret = %d",
 627                         ret);
 628         return ret;
 629 }
 630
 631 static int
 632 hns3vf_dev_allmulticast_disable(struct rte_eth_dev *dev)
 633 {
 634         struct hns3_adapter *hns = dev->data->dev_private;
 635         struct hns3_hw *hw = &hns->hw;
 636         int ret;
 637
 638         if (dev->data->promiscuous)
 639                 return 0;
 640
 641         ret = hns3vf_set_promisc_mode(hw, true, false, false);
 642         if (ret)
 643                 hns3_err(hw, "Failed to disable allmulticast mode, ret = %d",
 644                         ret);
 645         return ret;
 646 }
 647
 648 static int
 649 hns3vf_restore_promisc(struct hns3_adapter *hns)
 650 {
 651         struct hns3_hw *hw = &hns->hw;
 652         bool allmulti = hw->data->all_multicast ? true : false;
 653
 654         if (hw->data->promiscuous)
 655                 return hns3vf_set_promisc_mode(hw, true, true, true);
 656
 657         return hns3vf_set_promisc_mode(hw, true, false, allmulti);
 658 }
 659
 660 static int
 661 hns3vf_bind_ring_with_vector(struct hns3_hw *hw, uint8_t vector_id,
 662                              bool mmap, enum hns3_ring_type queue_type,
 663                              uint16_t queue_id)
 664 {
 665         struct hns3_vf_bind_vector_msg bind_msg;
 666         const char *op_str;
 667         uint16_t code;
 668         int ret;
 669
 670         memset(&bind_msg, 0, sizeof(bind_msg));
 671         code = mmap ? HNS3_MBX_MAP_RING_TO_VECTOR :
 672                 HNS3_MBX_UNMAP_RING_TO_VECTOR;
 673         bind_msg.vector_id = vector_id;
 674
 675         if (queue_type == HNS3_RING_TYPE_RX)
 676                 bind_msg.param[0].int_gl_index = HNS3_RING_GL_RX;
 677         else
 678                 bind_msg.param[0].int_gl_index = HNS3_RING_GL_TX;
 679
 680         bind_msg.param[0].ring_type = queue_type;
 681         bind_msg.ring_num = 1;
 682         bind_msg.param[0].tqp_index = queue_id;
 683         op_str = mmap ? "Map" : "Unmap";
 684         ret = hns3_send_mbx_msg(hw, code, 0, (uint8_t *)&bind_msg,
 685                                 sizeof(bind_msg), false, NULL, 0);
 686         if (ret)
 687                 hns3_err(hw, "%s TQP %d fail, vector_id is %d, ret is %d.",
 688                          op_str, queue_id, bind_msg.vector_id, ret);
 689
 690         return ret;
 691 }
 692
 693 static int
 694 hns3vf_init_ring_with_vector(struct hns3_hw *hw)
 695 {
 696         uint8_t vec;
 697         int ret;
 698         int i;
 699
 700         /*
 701          * In hns3 network engine, vector 0 is always the misc interrupt of this
 702          * function, vector 1~N can be used respectively for the queues of the
 703          * function. Tx and Rx queues with the same number share the interrupt
 704          * vector. In the initialization clearing the all hardware mapping
 705          * relationship configurations between queues and interrupt vectors is
 706          * needed, so some error caused by the residual configurations, such as
 707          * the unexpected Tx interrupt, can be avoid. Because of the hardware
 708          * constraints in hns3 hardware engine, we have to implement clearing
 709          * the mapping relationship configurations by binding all queues to the
 710          * last interrupt vector and reserving the last interrupt vector. This
 711          * method results in a decrease of the maximum queues when upper
 712          * applications call the rte_eth_dev_configure API function to enable
 713          * Rx interrupt.
 714          */
 715         vec = hw->num_msi - 1; /* vector 0 for misc interrupt, not for queue */
 716         /* vec - 1: the last interrupt is reserved */
 717         hw->intr_tqps_num = vec > hw->tqps_num ? hw->tqps_num : vec - 1;
 718         for (i = 0; i < hw->intr_tqps_num; i++) {
 719                 /*
 720                  * Set gap limiter and rate limiter configuration of queue's
 721                  * interrupt.
 722                  */
 723                 hns3_set_queue_intr_gl(hw, i, HNS3_RING_GL_RX,
 724                                        HNS3_TQP_INTR_GL_DEFAULT);
 725                 hns3_set_queue_intr_gl(hw, i, HNS3_RING_GL_TX,
 726                                        HNS3_TQP_INTR_GL_DEFAULT);
 727                 hns3_set_queue_intr_rl(hw, i, HNS3_TQP_INTR_RL_DEFAULT);
 728
 729                 ret = hns3vf_bind_ring_with_vector(hw, vec, false,
 730                                                    HNS3_RING_TYPE_TX, i);
 731                 if (ret) {
 732                         PMD_INIT_LOG(ERR, "VF fail to unbind TX ring(%d) with "
 733                                           "vector: %d, ret=%d", i, vec, ret);
 734                         return ret;
 735                 }
 736
 737                 ret = hns3vf_bind_ring_with_vector(hw, vec, false,
 738                                                    HNS3_RING_TYPE_RX, i);
 739                 if (ret) {
 740                         PMD_INIT_LOG(ERR, "VF fail to unbind RX ring(%d) with "
 741                                           "vector: %d, ret=%d", i, vec, ret);
 742                         return ret;
 743                 }
 744         }
 745
 746         return 0;
 747 }
 748
 749 static int
 750 hns3vf_dev_configure(struct rte_eth_dev *dev)
 751 {
 752         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 753         struct hns3_rss_conf *rss_cfg = &hw->rss_info;
 754         struct rte_eth_conf *conf = &dev->data->dev_conf;
 755         enum rte_eth_rx_mq_mode mq_mode = conf->rxmode.mq_mode;
 756         uint16_t nb_rx_q = dev->data->nb_rx_queues;
 757         uint16_t nb_tx_q = dev->data->nb_tx_queues;
 758         struct rte_eth_rss_conf rss_conf;
 759         uint16_t mtu;
 760         int ret;
 761
 762         /*
 763          * Hardware does not support individually enable/disable/reset the Tx or
 764          * Rx queue in hns3 network engine. Driver must enable/disable/reset Tx
 765          * and Rx queues at the same time. When the numbers of Tx queues
 766          * allocated by upper applications are not equal to the numbers of Rx
 767          * queues, driver needs to setup fake Tx or Rx queues to adjust numbers
 768          * of Tx/Rx queues. otherwise, network engine can not work as usual. But
 769          * these fake queues are imperceptible, and can not be used by upper
 770          * applications.
 771          */
 772         ret = hns3_set_fake_rx_or_tx_queues(dev, nb_rx_q, nb_tx_q);
 773         if (ret) {
 774                 hns3_err(hw, "Failed to set rx/tx fake queues: %d", ret);
 775                 return ret;
 776         }
 777
 778         hw->adapter_state = HNS3_NIC_CONFIGURING;
 779         if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
 780                 hns3_err(hw, "setting link speed/duplex not supported");
 781                 ret = -EINVAL;
 782                 goto cfg_err;
 783         }
 784
 785         /* When RSS is not configured, redirect the packet queue 0 */
 786         if ((uint32_t)mq_mode & ETH_MQ_RX_RSS_FLAG) {
 787                 conf->rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
 788                 rss_conf = conf->rx_adv_conf.rss_conf;
 789                 if (rss_conf.rss_key == NULL) {
 790                         rss_conf.rss_key = rss_cfg->key;
 791                         rss_conf.rss_key_len = HNS3_RSS_KEY_SIZE;
 792                 }
 793
 794                 ret = hns3_dev_rss_hash_update(dev, &rss_conf);
 795                 if (ret)
 796                         goto cfg_err;
 797         }
 798
 799         /*
 800          * If jumbo frames are enabled, MTU needs to be refreshed
 801          * according to the maximum RX packet length.
 802          */
 803         if (conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 804                 /*
 805                  * Security of max_rx_pkt_len is guaranteed in dpdk frame.
 806                  * Maximum value of max_rx_pkt_len is HNS3_MAX_FRAME_LEN, so it
 807                  * can safely assign to "uint16_t" type variable.
 808                  */
 809                 mtu = (uint16_t)HNS3_PKTLEN_TO_MTU(conf->rxmode.max_rx_pkt_len);
 810                 ret = hns3vf_dev_mtu_set(dev, mtu);
 811                 if (ret)
 812                         goto cfg_err;
 813                 dev->data->mtu = mtu;
 814         }
 815
 816         ret = hns3vf_dev_configure_vlan(dev);
 817         if (ret)
 818                 goto cfg_err;
 819
 820         hw->adapter_state = HNS3_NIC_CONFIGURED;
 821         return 0;
 822
 823 cfg_err:
 824         (void)hns3_set_fake_rx_or_tx_queues(dev, 0, 0);
 825         hw->adapter_state = HNS3_NIC_INITIALIZED;
 826
 827         return ret;
 828 }
 829
 830 static int
 831 hns3vf_config_mtu(struct hns3_hw *hw, uint16_t mtu)
 832 {
 833         int ret;
 834
 835         ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MTU, 0, (const uint8_t *)&mtu,
 836                                 sizeof(mtu), true, NULL, 0);
 837         if (ret)
 838                 hns3_err(hw, "Failed to set mtu (%u) for vf: %d", mtu, ret);
 839
 840         return ret;
 841 }
 842
 843 static int
 844 hns3vf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 845 {
 846         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 847         uint32_t frame_size = mtu + HNS3_ETH_OVERHEAD;
 848         int ret;
 849
 850         /*
 851          * The hns3 PF/VF devices on the same port share the hardware MTU
 852          * configuration. Currently, we send mailbox to inform hns3 PF kernel
 853          * ethdev driver to finish hardware MTU configuration in hns3 VF PMD
 854          * driver, there is no need to stop the port for hns3 VF device, and the
 855          * MTU value issued by hns3 VF PMD driver must be less than or equal to
 856          * PF's MTU.
 857          */
 858         if (rte_atomic16_read(&hw->reset.resetting)) {
 859                 hns3_err(hw, "Failed to set mtu during resetting");
 860                 return -EIO;
 861         }
 862
 863         rte_spinlock_lock(&hw->lock);
 864         ret = hns3vf_config_mtu(hw, mtu);
 865         if (ret) {
 866                 rte_spinlock_unlock(&hw->lock);
 867                 return ret;
 868         }
 869         if (frame_size > RTE_ETHER_MAX_LEN)
 870                 dev->data->dev_conf.rxmode.offloads |=
 871                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 872         else
 873                 dev->data->dev_conf.rxmode.offloads &=
 874                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 875         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 876         rte_spinlock_unlock(&hw->lock);
 877
 878         return 0;
 879 }
 880
 881 static int
 882 hns3vf_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
 883 {
 884         struct hns3_adapter *hns = eth_dev->data->dev_private;
 885         struct hns3_hw *hw = &hns->hw;
 886         uint16_t q_num = hw->tqps_num;
 887
 888         /*
 889          * In interrupt mode, 'max_rx_queues' is set based on the number of
 890          * MSI-X interrupt resources of the hardware.
 891          */
 892         if (hw->data->dev_conf.intr_conf.rxq == 1)
 893                 q_num = hw->intr_tqps_num;
 894
 895         info->max_rx_queues = q_num;
 896         info->max_tx_queues = hw->tqps_num;
 897         info->max_rx_pktlen = HNS3_MAX_FRAME_LEN; /* CRC included */
 898         info->min_rx_bufsize = hw->rx_buf_len;
 899         info->max_mac_addrs = HNS3_VF_UC_MACADDR_NUM;
 900         info->max_mtu = info->max_rx_pktlen - HNS3_ETH_OVERHEAD;
 901
 902         info->rx_offload_capa = (DEV_RX_OFFLOAD_IPV4_CKSUM |
 903                                  DEV_RX_OFFLOAD_UDP_CKSUM |
 904                                  DEV_RX_OFFLOAD_TCP_CKSUM |
 905                                  DEV_RX_OFFLOAD_SCTP_CKSUM |
 906                                  DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
 907                                  DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
 908                                  DEV_RX_OFFLOAD_KEEP_CRC |
 909                                  DEV_RX_OFFLOAD_SCATTER |
 910                                  DEV_RX_OFFLOAD_VLAN_STRIP |
 911                                  DEV_RX_OFFLOAD_VLAN_FILTER |
 912                                  DEV_RX_OFFLOAD_JUMBO_FRAME |
 913                                  DEV_RX_OFFLOAD_RSS_HASH);
 914         info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
 915         info->tx_offload_capa = (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 916                                  DEV_TX_OFFLOAD_IPV4_CKSUM |
 917                                  DEV_TX_OFFLOAD_TCP_CKSUM |
 918                                  DEV_TX_OFFLOAD_UDP_CKSUM |
 919                                  DEV_TX_OFFLOAD_SCTP_CKSUM |
 920                                  DEV_TX_OFFLOAD_VLAN_INSERT |
 921                                  DEV_TX_OFFLOAD_QINQ_INSERT |
 922                                  DEV_TX_OFFLOAD_MULTI_SEGS |
 923                                  DEV_TX_OFFLOAD_TCP_TSO |
 924                                  DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 925                                  DEV_TX_OFFLOAD_GRE_TNL_TSO |
 926                                  DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
 927                                  info->tx_queue_offload_capa);
 928
 929         info->rx_desc_lim = (struct rte_eth_desc_lim) {
 930                 .nb_max = HNS3_MAX_RING_DESC,
 931                 .nb_min = HNS3_MIN_RING_DESC,
 932                 .nb_align = HNS3_ALIGN_RING_DESC,
 933         };
 934
 935         info->tx_desc_lim = (struct rte_eth_desc_lim) {
 936                 .nb_max = HNS3_MAX_RING_DESC,
 937                 .nb_min = HNS3_MIN_RING_DESC,
 938                 .nb_align = HNS3_ALIGN_RING_DESC,
 939         };
 940
 941         info->vmdq_queue_num = 0;
 942
 943         info->reta_size = HNS3_RSS_IND_TBL_SIZE;
 944         info->hash_key_size = HNS3_RSS_KEY_SIZE;
 945         info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;
 946         info->default_rxportconf.ring_size = HNS3_DEFAULT_RING_DESC;
 947         info->default_txportconf.ring_size = HNS3_DEFAULT_RING_DESC;
 948
 949         return 0;
 950 }
 951
 952 static void
 953 hns3vf_clear_event_cause(struct hns3_hw *hw, uint32_t regclr)
 954 {
 955         hns3_write_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG, regclr);
 956 }
 957
 958 static void
 959 hns3vf_disable_irq0(struct hns3_hw *hw)
 960 {
 961         hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 0);
 962 }
 963
 964 static void
 965 hns3vf_enable_irq0(struct hns3_hw *hw)
 966 {
 967         hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 1);
 968 }
 969
 970 static enum hns3vf_evt_cause
 971 hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval)
 972 {
 973         struct hns3_hw *hw = &hns->hw;
 974         enum hns3vf_evt_cause ret;
 975         uint32_t cmdq_stat_reg;
 976         uint32_t rst_ing_reg;
 977         uint32_t val;
 978
 979         /* Fetch the events from their corresponding regs */
 980         cmdq_stat_reg = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_STAT_REG);
 981
 982         if (BIT(HNS3_VECTOR0_RST_INT_B) & cmdq_stat_reg) {
 983                 rst_ing_reg = hns3_read_dev(hw, HNS3_FUN_RST_ING);
 984                 hns3_warn(hw, "resetting reg: 0x%x", rst_ing_reg);
 985                 hns3_atomic_set_bit(HNS3_VF_RESET, &hw->reset.pending);
 986                 rte_atomic16_set(&hw->reset.disable_cmd, 1);
 987                 val = hns3_read_dev(hw, HNS3_VF_RST_ING);
 988                 hns3_write_dev(hw, HNS3_VF_RST_ING, val | HNS3_VF_RST_ING_BIT);
 989                 val = cmdq_stat_reg & ~BIT(HNS3_VECTOR0_RST_INT_B);
 990                 if (clearval) {
 991                         hw->reset.stats.global_cnt++;
 992                         hns3_warn(hw, "Global reset detected, clear reset status");
 993                 } else {
 994                         hns3_schedule_delayed_reset(hns);
 995                         hns3_warn(hw, "Global reset detected, don't clear reset status");
 996                 }
 997
 998                 ret = HNS3VF_VECTOR0_EVENT_RST;
 999                 goto out;
1000         }
1001
1002         /* Check for vector0 mailbox(=CMDQ RX) event source */
1003         if (BIT(HNS3_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) {
1004                 val = cmdq_stat_reg & ~BIT(HNS3_VECTOR0_RX_CMDQ_INT_B);
1005                 ret = HNS3VF_VECTOR0_EVENT_MBX;
1006                 goto out;
1007         }
1008
1009         val = 0;
1010         ret = HNS3VF_VECTOR0_EVENT_OTHER;
1011 out:
1012         if (clearval)
1013                 *clearval = val;
1014         return ret;
1015 }
1016
1017 static void
1018 hns3vf_interrupt_handler(void *param)
1019 {
1020         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1021         struct hns3_adapter *hns = dev->data->dev_private;
1022         struct hns3_hw *hw = &hns->hw;
1023         enum hns3vf_evt_cause event_cause;
1024         uint32_t clearval;
1025
1026         if (hw->irq_thread_id == 0)
1027                 hw->irq_thread_id = pthread_self();
1028
1029         /* Disable interrupt */
1030         hns3vf_disable_irq0(hw);
1031
1032         /* Read out interrupt causes */
1033         event_cause = hns3vf_check_event_cause(hns, &clearval);
1034
1035         switch (event_cause) {
1036         case HNS3VF_VECTOR0_EVENT_RST:
1037                 hns3_schedule_reset(hns);
1038                 break;
1039         case HNS3VF_VECTOR0_EVENT_MBX:
1040                 hns3_dev_handle_mbx_msg(hw);
1041                 break;
1042         default:
1043                 break;
1044         }
1045
1046         /* Clear interrupt causes */
1047         hns3vf_clear_event_cause(hw, clearval);
1048
1049         /* Enable interrupt */
1050         hns3vf_enable_irq0(hw);
1051 }
1052
1053 static int
1054 hns3vf_check_tqp_info(struct hns3_hw *hw)
1055 {
1056         uint16_t tqps_num;
1057
1058         tqps_num = hw->tqps_num;
1059         if (tqps_num > HNS3_MAX_TQP_NUM_PER_FUNC || tqps_num == 0) {
1060                 PMD_INIT_LOG(ERR, "Get invalid tqps_num(%u) from PF. valid "
1061                                   "range: 1~%d",
1062                              tqps_num, HNS3_MAX_TQP_NUM_PER_FUNC);
1063                 return -EINVAL;
1064         }
1065
1066         if (hw->rx_buf_len == 0)
1067                 hw->rx_buf_len = HNS3_DEFAULT_RX_BUF_LEN;
1068         hw->alloc_rss_size = RTE_MIN(hw->rss_size_max, hw->tqps_num);
1069
1070         return 0;
1071 }
1072
1073 static int
1074 hns3vf_get_queue_info(struct hns3_hw *hw)
1075 {
1076 #define HNS3VF_TQPS_RSS_INFO_LEN        6
1077         uint8_t resp_msg[HNS3VF_TQPS_RSS_INFO_LEN];
1078         int ret;
1079
1080         ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_QINFO, 0, NULL, 0, true,
1081                                 resp_msg, HNS3VF_TQPS_RSS_INFO_LEN);
1082         if (ret) {
1083                 PMD_INIT_LOG(ERR, "Failed to get tqp info from PF: %d", ret);
1084                 return ret;
1085         }
1086
1087         memcpy(&hw->tqps_num, &resp_msg[0], sizeof(uint16_t));
1088         memcpy(&hw->rss_size_max, &resp_msg[2], sizeof(uint16_t));
1089         memcpy(&hw->rx_buf_len, &resp_msg[4], sizeof(uint16_t));
1090
1091         return hns3vf_check_tqp_info(hw);
1092 }
1093
1094 static int
1095 hns3vf_get_queue_depth(struct hns3_hw *hw)
1096 {
1097 #define HNS3VF_TQPS_DEPTH_INFO_LEN      4
1098         uint8_t resp_msg[HNS3VF_TQPS_DEPTH_INFO_LEN];
1099         int ret;
1100
1101         ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_QDEPTH, 0, NULL, 0, true,
1102                                 resp_msg, HNS3VF_TQPS_DEPTH_INFO_LEN);
1103         if (ret) {
1104                 PMD_INIT_LOG(ERR, "Failed to get tqp depth info from PF: %d",
1105                              ret);
1106                 return ret;
1107         }
1108
1109         memcpy(&hw->num_tx_desc, &resp_msg[0], sizeof(uint16_t));
1110         memcpy(&hw->num_rx_desc, &resp_msg[2], sizeof(uint16_t));
1111
1112         return 0;
1113 }
1114
1115 static int
1116 hns3vf_get_tc_info(struct hns3_hw *hw)
1117 {
1118         uint8_t resp_msg;
1119         int ret;
1120
1121         ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_TCINFO, 0, NULL, 0,
1122                                 true, &resp_msg, sizeof(resp_msg));
1123         if (ret) {
1124                 hns3_err(hw, "VF request to get TC info from PF failed %d",
1125                          ret);
1126                 return ret;
1127         }
1128
1129         hw->hw_tc_map = resp_msg;
1130
1131         return 0;
1132 }
1133
1134 static int
1135 hns3vf_get_host_mac_addr(struct hns3_hw *hw)
1136 {
1137         uint8_t host_mac[RTE_ETHER_ADDR_LEN];
1138         int ret;
1139
1140         ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_MAC_ADDR, 0, NULL, 0,
1141                                 true, host_mac, RTE_ETHER_ADDR_LEN);
1142         if (ret) {
1143                 hns3_err(hw, "Failed to get mac addr from PF: %d", ret);
1144                 return ret;
1145         }
1146
1147         memcpy(hw->mac.mac_addr, host_mac, RTE_ETHER_ADDR_LEN);
1148
1149         return 0;
1150 }
1151
1152 static int
1153 hns3vf_get_configuration(struct hns3_hw *hw)
1154 {
1155         int ret;
1156
1157         hw->mac.media_type = HNS3_MEDIA_TYPE_NONE;
1158         hw->rss_dis_flag = false;
1159
1160         /* Get queue configuration from PF */
1161         ret = hns3vf_get_queue_info(hw);
1162         if (ret)
1163                 return ret;
1164
1165         /* Get queue depth info from PF */
1166         ret = hns3vf_get_queue_depth(hw);
1167         if (ret)
1168                 return ret;
1169
1170         /* Get user defined VF MAC addr from PF */
1171         ret = hns3vf_get_host_mac_addr(hw);
1172         if (ret)
1173                 return ret;
1174
1175         /* Get tc configuration from PF */
1176         return hns3vf_get_tc_info(hw);
1177 }
1178
1179 static int
1180 hns3vf_set_tc_info(struct hns3_adapter *hns)
1181 {
1182         struct hns3_hw *hw = &hns->hw;
1183         uint16_t nb_rx_q = hw->data->nb_rx_queues;
1184         uint16_t nb_tx_q = hw->data->nb_tx_queues;
1185         uint8_t i;
1186
1187         hw->num_tc = 0;
1188         for (i = 0; i < HNS3_MAX_TC_NUM; i++)
1189                 if (hw->hw_tc_map & BIT(i))
1190                         hw->num_tc++;
1191
1192         if (nb_rx_q < hw->num_tc) {
1193                 hns3_err(hw, "number of Rx queues(%d) is less than tcs(%d).",
1194                          nb_rx_q, hw->num_tc);
1195                 return -EINVAL;
1196         }
1197
1198         if (nb_tx_q < hw->num_tc) {
1199                 hns3_err(hw, "number of Tx queues(%d) is less than tcs(%d).",
1200                          nb_tx_q, hw->num_tc);
1201                 return -EINVAL;
1202         }
1203
1204         hns3_set_rss_size(hw, nb_rx_q);
1205         hns3_tc_queue_mapping_cfg(hw, nb_tx_q);
1206
1207         return 0;
1208 }
1209
1210 static void
1211 hns3vf_request_link_info(struct hns3_hw *hw)
1212 {
1213         uint8_t resp_msg;
1214         int ret;
1215
1216         if (rte_atomic16_read(&hw->reset.resetting))
1217                 return;
1218         ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_LINK_STATUS, 0, NULL, 0, false,
1219                                 &resp_msg, sizeof(resp_msg));
1220         if (ret)
1221                 hns3_err(hw, "Failed to fetch link status from PF: %d", ret);
1222 }
1223
1224 static int
1225 hns3vf_vlan_filter_configure(struct hns3_adapter *hns, uint16_t vlan_id, int on)
1226 {
1227 #define HNS3VF_VLAN_MBX_MSG_LEN 5
1228         struct hns3_hw *hw = &hns->hw;
1229         uint8_t msg_data[HNS3VF_VLAN_MBX_MSG_LEN];
1230         uint16_t proto = htons(RTE_ETHER_TYPE_VLAN);
1231         uint8_t is_kill = on ? 0 : 1;
1232
1233         msg_data[0] = is_kill;
1234         memcpy(&msg_data[1], &vlan_id, sizeof(vlan_id));
1235         memcpy(&msg_data[3], &proto, sizeof(proto));
1236
1237         return hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, HNS3_MBX_VLAN_FILTER,
1238                                  msg_data, HNS3VF_VLAN_MBX_MSG_LEN, true, NULL,
1239                                  0);
1240 }
1241
1242 static int
1243 hns3vf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1244 {
1245         struct hns3_adapter *hns = dev->data->dev_private;
1246         struct hns3_hw *hw = &hns->hw;
1247         int ret;
1248
1249         if (rte_atomic16_read(&hw->reset.resetting)) {
1250                 hns3_err(hw,
1251                          "vf set vlan id failed during resetting, vlan_id =%u",
1252                          vlan_id);
1253                 return -EIO;
1254         }
1255         rte_spinlock_lock(&hw->lock);
1256         ret = hns3vf_vlan_filter_configure(hns, vlan_id, on);
1257         rte_spinlock_unlock(&hw->lock);
1258         if (ret)
1259                 hns3_err(hw, "vf set vlan id failed, vlan_id =%u, ret =%d",
1260                          vlan_id, ret);
1261
1262         return ret;
1263 }
1264
1265 static int
1266 hns3vf_en_hw_strip_rxvtag(struct hns3_hw *hw, bool enable)
1267 {
1268         uint8_t msg_data;
1269         int ret;
1270
1271         msg_data = enable ? 1 : 0;
1272         ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, HNS3_MBX_VLAN_RX_OFF_CFG,
1273                                 &msg_data, sizeof(msg_data), false, NULL, 0);
1274         if (ret)
1275                 hns3_err(hw, "vf enable strip failed, ret =%d", ret);
1276
1277         return ret;
1278 }
1279
1280 static int
1281 hns3vf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1282 {
1283         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1284         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1285         unsigned int tmp_mask;
1286         int ret = 0;
1287
1288         if (rte_atomic16_read(&hw->reset.resetting)) {
1289                 hns3_err(hw, "vf set vlan offload failed during resetting, "
1290                              "mask = 0x%x", mask);
1291                 return -EIO;
1292         }
1293
1294         tmp_mask = (unsigned int)mask;
1295         /* Vlan stripping setting */
1296         if (tmp_mask & ETH_VLAN_STRIP_MASK) {
1297                 rte_spinlock_lock(&hw->lock);
1298                 /* Enable or disable VLAN stripping */
1299                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1300                         ret = hns3vf_en_hw_strip_rxvtag(hw, true);
1301                 else
1302                         ret = hns3vf_en_hw_strip_rxvtag(hw, false);
1303                 rte_spinlock_unlock(&hw->lock);
1304         }
1305
1306         return ret;
1307 }
1308
1309 static int
1310 hns3vf_handle_all_vlan_table(struct hns3_adapter *hns, int on)
1311 {
1312         struct rte_vlan_filter_conf *vfc;
1313         struct hns3_hw *hw = &hns->hw;
1314         uint16_t vlan_id;
1315         uint64_t vbit;
1316         uint64_t ids;
1317         int ret = 0;
1318         uint32_t i;
1319
1320         vfc = &hw->data->vlan_filter_conf;
1321         for (i = 0; i < RTE_DIM(vfc->ids); i++) {
1322                 if (vfc->ids[i] == 0)
1323                         continue;
1324                 ids = vfc->ids[i];
1325                 while (ids) {
1326                         /*
1327                          * 64 means the num bits of ids, one bit corresponds to
1328                          * one vlan id
1329                          */
1330                         vlan_id = 64 * i;
1331                         /* count trailing zeroes */
1332                         vbit = ~ids & (ids - 1);
1333                         /* clear least significant bit set */
1334                         ids ^= (ids ^ (ids - 1)) ^ vbit;
1335                         for (; vbit;) {
1336                                 vbit >>= 1;
1337                                 vlan_id++;
1338                         }
1339                         ret = hns3vf_vlan_filter_configure(hns, vlan_id, on);
1340                         if (ret) {
1341                                 hns3_err(hw,
1342                                          "VF handle vlan table failed, ret =%d, on = %d",
1343                                          ret, on);
1344                                 return ret;
1345                         }
1346                 }
1347         }
1348
1349         return ret;
1350 }
1351
1352 static int
1353 hns3vf_remove_all_vlan_table(struct hns3_adapter *hns)
1354 {
1355         return hns3vf_handle_all_vlan_table(hns, 0);
1356 }
1357
1358 static int
1359 hns3vf_restore_vlan_conf(struct hns3_adapter *hns)
1360 {
1361         struct hns3_hw *hw = &hns->hw;
1362         struct rte_eth_conf *dev_conf;
1363         bool en;
1364         int ret;
1365
1366         dev_conf = &hw->data->dev_conf;
1367         en = dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP ? true
1368                                                                    : false;
1369         ret = hns3vf_en_hw_strip_rxvtag(hw, en);
1370         if (ret)
1371                 hns3_err(hw, "VF restore vlan conf fail, en =%d, ret =%d", en,
1372                          ret);
1373         return ret;
1374 }
1375
1376 static int
1377 hns3vf_dev_configure_vlan(struct rte_eth_dev *dev)
1378 {
1379         struct hns3_adapter *hns = dev->data->dev_private;
1380         struct rte_eth_dev_data *data = dev->data;
1381         struct hns3_hw *hw = &hns->hw;
1382         int ret;
1383
1384         if (data->dev_conf.txmode.hw_vlan_reject_tagged ||
1385             data->dev_conf.txmode.hw_vlan_reject_untagged ||
1386             data->dev_conf.txmode.hw_vlan_insert_pvid) {
1387                 hns3_warn(hw, "hw_vlan_reject_tagged, hw_vlan_reject_untagged "
1388                               "or hw_vlan_insert_pvid is not support!");
1389         }
1390
1391         /* Apply vlan offload setting */
1392         ret = hns3vf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1393         if (ret)
1394                 hns3_err(hw, "dev config vlan offload failed, ret =%d", ret);
1395
1396         return ret;
1397 }
1398
1399 static int
1400 hns3vf_set_alive(struct hns3_hw *hw, bool alive)
1401 {
1402         uint8_t msg_data;
1403
1404         msg_data = alive ? 1 : 0;
1405         return hns3_send_mbx_msg(hw, HNS3_MBX_SET_ALIVE, 0, &msg_data,
1406                                  sizeof(msg_data), false, NULL, 0);
1407 }
1408
1409 static void
1410 hns3vf_keep_alive_handler(void *param)
1411 {
1412         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
1413         struct hns3_adapter *hns = eth_dev->data->dev_private;
1414         struct hns3_hw *hw = &hns->hw;
1415         uint8_t respmsg;
1416         int ret;
1417
1418         ret = hns3_send_mbx_msg(hw, HNS3_MBX_KEEP_ALIVE, 0, NULL, 0,
1419                                 false, &respmsg, sizeof(uint8_t));
1420         if (ret)
1421                 hns3_err(hw, "VF sends keeping alive cmd failed(=%d)",
1422                          ret);
1423
1424         rte_eal_alarm_set(HNS3VF_KEEP_ALIVE_INTERVAL, hns3vf_keep_alive_handler,
1425                           eth_dev);
1426 }
1427
1428 static void
1429 hns3vf_service_handler(void *param)
1430 {
1431         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
1432         struct hns3_adapter *hns = eth_dev->data->dev_private;
1433         struct hns3_hw *hw = &hns->hw;
1434
1435         /*
1436          * The query link status and reset processing are executed in the
1437          * interrupt thread.When the IMP reset occurs, IMP will not respond,
1438          * and the query operation will time out after 30ms. In the case of
1439          * multiple PF/VFs, each query failure timeout causes the IMP reset
1440          * interrupt to fail to respond within 100ms.
1441          * Before querying the link status, check whether there is a reset
1442          * pending, and if so, abandon the query.
1443          */
1444         if (!hns3vf_is_reset_pending(hns))
1445                 hns3vf_request_link_info(hw);
1446         else
1447                 hns3_warn(hw, "Cancel the query when reset is pending");
1448
1449         rte_eal_alarm_set(HNS3VF_SERVICE_INTERVAL, hns3vf_service_handler,
1450                           eth_dev);
1451 }
1452
1453 static int
1454 hns3_query_vf_resource(struct hns3_hw *hw)
1455 {
1456         struct hns3_vf_res_cmd *req;
1457         struct hns3_cmd_desc desc;
1458         uint16_t num_msi;
1459         int ret;
1460
1461         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_VF_RSRC, true);
1462         ret = hns3_cmd_send(hw, &desc, 1);
1463         if (ret) {
1464                 hns3_err(hw, "query vf resource failed, ret = %d", ret);
1465                 return ret;
1466         }
1467
1468         req = (struct hns3_vf_res_cmd *)desc.data;
1469         num_msi = hns3_get_field(rte_le_to_cpu_16(req->vf_intr_vector_number),
1470                                  HNS3_VEC_NUM_M, HNS3_VEC_NUM_S);
1471         if (num_msi < HNS3_MIN_VECTOR_NUM) {
1472                 hns3_err(hw, "Just %u msi resources, not enough for vf(min:%d)",
1473                          num_msi, HNS3_MIN_VECTOR_NUM);
1474                 return -EINVAL;
1475         }
1476
1477         hw->num_msi = num_msi;
1478
1479         return 0;
1480 }
1481
1482 static int
1483 hns3vf_init_hardware(struct hns3_adapter *hns)
1484 {
1485         struct hns3_hw *hw = &hns->hw;
1486         uint16_t mtu = hw->data->mtu;
1487         int ret;
1488
1489         ret = hns3vf_set_promisc_mode(hw, true, false, false);
1490         if (ret)
1491                 return ret;
1492
1493         ret = hns3vf_config_mtu(hw, mtu);
1494         if (ret)
1495                 goto err_init_hardware;
1496
1497         ret = hns3vf_vlan_filter_configure(hns, 0, 1);
1498         if (ret) {
1499                 PMD_INIT_LOG(ERR, "Failed to initialize VLAN config: %d", ret);
1500                 goto err_init_hardware;
1501         }
1502
1503         ret = hns3_config_gro(hw, false);
1504         if (ret) {
1505                 PMD_INIT_LOG(ERR, "Failed to config gro: %d", ret);
1506                 goto err_init_hardware;
1507         }
1508
1509         /*
1510          * In the initialization clearing the all hardware mapping relationship
1511          * configurations between queues and interrupt vectors is needed, so
1512          * some error caused by the residual configurations, such as the
1513          * unexpected interrupt, can be avoid.
1514          */
1515         ret = hns3vf_init_ring_with_vector(hw);
1516         if (ret) {
1517                 PMD_INIT_LOG(ERR, "Failed to init ring intr vector: %d", ret);
1518                 goto err_init_hardware;
1519         }
1520
1521         ret = hns3vf_set_alive(hw, true);
1522         if (ret) {
1523                 PMD_INIT_LOG(ERR, "Failed to VF send alive to PF: %d", ret);
1524                 goto err_init_hardware;
1525         }
1526
1527         hns3vf_request_link_info(hw);
1528         return 0;
1529
1530 err_init_hardware:
1531         (void)hns3vf_set_promisc_mode(hw, false, false, false);
1532         return ret;
1533 }
1534
1535 static int
1536 hns3vf_clear_vport_list(struct hns3_hw *hw)
1537 {
1538         return hns3_send_mbx_msg(hw, HNS3_MBX_HANDLE_VF_TBL,
1539                                  HNS3_MBX_VPORT_LIST_CLEAR, NULL, 0, false,
1540                                  NULL, 0);
1541 }
1542
1543 static int
1544 hns3vf_init_vf(struct rte_eth_dev *eth_dev)
1545 {
1546         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1547         struct hns3_adapter *hns = eth_dev->data->dev_private;
1548         struct hns3_hw *hw = &hns->hw;
1549         int ret;
1550
1551         PMD_INIT_FUNC_TRACE();
1552
1553         /* Get hardware io base address from pcie BAR2 IO space */
1554         hw->io_base = pci_dev->mem_resource[2].addr;
1555
1556         /* Firmware command queue initialize */
1557         ret = hns3_cmd_init_queue(hw);
1558         if (ret) {
1559                 PMD_INIT_LOG(ERR, "Failed to init cmd queue: %d", ret);
1560                 goto err_cmd_init_queue;
1561         }
1562
1563         /* Firmware command initialize */
1564         ret = hns3_cmd_init(hw);
1565         if (ret) {
1566                 PMD_INIT_LOG(ERR, "Failed to init cmd: %d", ret);
1567                 goto err_cmd_init;
1568         }
1569
1570         /* Get VF resource */
1571         ret = hns3_query_vf_resource(hw);
1572         if (ret)
1573                 goto err_cmd_init;
1574
1575         rte_spinlock_init(&hw->mbx_resp.lock);
1576
1577         hns3vf_clear_event_cause(hw, 0);
1578
1579         ret = rte_intr_callback_register(&pci_dev->intr_handle,
1580                                          hns3vf_interrupt_handler, eth_dev);
1581         if (ret) {
1582                 PMD_INIT_LOG(ERR, "Failed to register intr: %d", ret);
1583                 goto err_intr_callback_register;
1584         }
1585
1586         /* Enable interrupt */
1587         rte_intr_enable(&pci_dev->intr_handle);
1588         hns3vf_enable_irq0(hw);
1589
1590         /* Get configuration from PF */
1591         ret = hns3vf_get_configuration(hw);
1592         if (ret) {
1593                 PMD_INIT_LOG(ERR, "Failed to fetch configuration: %d", ret);
1594                 goto err_get_config;
1595         }
1596
1597         /*
1598          * The hns3 PF ethdev driver in kernel support setting VF MAC address
1599          * on the host by "ip link set ..." command. To avoid some incorrect
1600          * scenes, for example, hns3 VF PMD driver fails to receive and send
1601          * packets after user configure the MAC address by using the
1602          * "ip link set ..." command, hns3 VF PMD driver keep the same MAC
1603          * address strategy as the hns3 kernel ethdev driver in the
1604          * initialization. If user configure a MAC address by the ip command
1605          * for VF device, then hns3 VF PMD driver will start with it, otherwise
1606          * start with a random MAC address in the initialization.
1607          */
1608         ret = rte_is_zero_ether_addr((struct rte_ether_addr *)hw->mac.mac_addr);
1609         if (ret)
1610                 rte_eth_random_addr(hw->mac.mac_addr);
1611
1612         ret = hns3vf_clear_vport_list(hw);
1613         if (ret) {
1614                 PMD_INIT_LOG(ERR, "Failed to clear tbl list: %d", ret);
1615                 goto err_get_config;
1616         }
1617
1618         ret = hns3vf_init_hardware(hns);
1619         if (ret)
1620                 goto err_get_config;
1621
1622         hns3_set_default_rss_args(hw);
1623
1624         return 0;
1625
1626 err_get_config:
1627         hns3vf_disable_irq0(hw);
1628         rte_intr_disable(&pci_dev->intr_handle);
1629         hns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,
1630                              eth_dev);
1631 err_intr_callback_register:
1632 err_cmd_init:
1633         hns3_cmd_uninit(hw);
1634         hns3_cmd_destroy_queue(hw);
1635 err_cmd_init_queue:
1636         hw->io_base = NULL;
1637
1638         return ret;
1639 }
1640
1641 static void
1642 hns3vf_uninit_vf(struct rte_eth_dev *eth_dev)
1643 {
1644         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1645         struct hns3_adapter *hns = eth_dev->data->dev_private;
1646         struct hns3_hw *hw = &hns->hw;
1647
1648         PMD_INIT_FUNC_TRACE();
1649
1650         hns3_rss_uninit(hns);
1651         (void)hns3vf_set_alive(hw, false);
1652         (void)hns3vf_set_promisc_mode(hw, false, false, false);
1653         hns3vf_disable_irq0(hw);
1654         rte_intr_disable(&pci_dev->intr_handle);
1655         hns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,
1656                              eth_dev);
1657         hns3_cmd_uninit(hw);
1658         hns3_cmd_destroy_queue(hw);
1659         hw->io_base = NULL;
1660 }
1661
1662 static int
1663 hns3vf_do_stop(struct hns3_adapter *hns)
1664 {
1665         struct hns3_hw *hw = &hns->hw;
1666         bool reset_queue;
1667
1668         hw->mac.link_status = ETH_LINK_DOWN;
1669
1670         if (rte_atomic16_read(&hw->reset.disable_cmd) == 0) {
1671                 hns3vf_configure_mac_addr(hns, true);
1672                 reset_queue = true;
1673         } else
1674                 reset_queue = false;
1675         return hns3_stop_queues(hns, reset_queue);
1676 }
1677
1678 static void
1679 hns3vf_unmap_rx_interrupt(struct rte_eth_dev *dev)
1680 {
1681         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1682         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1683         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1684         uint8_t base = RTE_INTR_VEC_ZERO_OFFSET;
1685         uint8_t vec = RTE_INTR_VEC_ZERO_OFFSET;
1686         uint16_t q_id;
1687
1688         if (dev->data->dev_conf.intr_conf.rxq == 0)
1689                 return;
1690
1691         /* unmap the ring with vector */
1692         if (rte_intr_allow_others(intr_handle)) {
1693                 vec = RTE_INTR_VEC_RXTX_OFFSET;
1694                 base = RTE_INTR_VEC_RXTX_OFFSET;
1695         }
1696         if (rte_intr_dp_is_en(intr_handle)) {
1697                 for (q_id = 0; q_id < hw->used_rx_queues; q_id++) {
1698                         (void)hns3vf_bind_ring_with_vector(hw, vec, false,
1699                                                            HNS3_RING_TYPE_RX,
1700                                                            q_id);
1701                         if (vec < base + intr_handle->nb_efd - 1)
1702                                 vec++;
1703                 }
1704         }
1705         /* Clean datapath event and queue/vec mapping */
1706         rte_intr_efd_disable(intr_handle);
1707         if (intr_handle->intr_vec) {
1708                 rte_free(intr_handle->intr_vec);
1709                 intr_handle->intr_vec = NULL;
1710         }
1711 }
1712
1713 static void
1714 hns3vf_dev_stop(struct rte_eth_dev *dev)
1715 {
1716         struct hns3_adapter *hns = dev->data->dev_private;
1717         struct hns3_hw *hw = &hns->hw;
1718
1719         PMD_INIT_FUNC_TRACE();
1720
1721         hw->adapter_state = HNS3_NIC_STOPPING;
1722         hns3_set_rxtx_function(dev);
1723         rte_wmb();
1724         /* Disable datapath on secondary process. */
1725         hns3_mp_req_stop_rxtx(dev);
1726         /* Prevent crashes when queues are still in use. */
1727         rte_delay_ms(hw->tqps_num);
1728
1729         rte_spinlock_lock(&hw->lock);
1730         if (rte_atomic16_read(&hw->reset.resetting) == 0) {
1731                 hns3vf_do_stop(hns);
1732                 hns3vf_unmap_rx_interrupt(dev);
1733                 hns3_dev_release_mbufs(hns);
1734                 hw->adapter_state = HNS3_NIC_CONFIGURED;
1735         }
1736         rte_eal_alarm_cancel(hns3vf_service_handler, dev);
1737         rte_spinlock_unlock(&hw->lock);
1738 }
1739
1740 static void
1741 hns3vf_dev_close(struct rte_eth_dev *eth_dev)
1742 {
1743         struct hns3_adapter *hns = eth_dev->data->dev_private;
1744         struct hns3_hw *hw = &hns->hw;
1745
1746         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1747                 return;
1748
1749         if (hw->adapter_state == HNS3_NIC_STARTED)
1750                 hns3vf_dev_stop(eth_dev);
1751
1752         hw->adapter_state = HNS3_NIC_CLOSING;
1753         hns3_reset_abort(hns);
1754         hw->adapter_state = HNS3_NIC_CLOSED;
1755         rte_eal_alarm_cancel(hns3vf_keep_alive_handler, eth_dev);
1756         hns3vf_configure_all_mc_mac_addr(hns, true);
1757         hns3vf_remove_all_vlan_table(hns);
1758         hns3vf_uninit_vf(eth_dev);
1759         hns3_free_all_queues(eth_dev);
1760         rte_free(hw->reset.wait_data);
1761         rte_free(eth_dev->process_private);
1762         eth_dev->process_private = NULL;
1763         hns3_mp_uninit_primary();
1764         hns3_warn(hw, "Close port %d finished", hw->data->port_id);
1765 }
1766
1767 static int
1768 hns3vf_fw_version_get(struct rte_eth_dev *eth_dev, char *fw_version,
1769                       size_t fw_size)
1770 {
1771         struct hns3_adapter *hns = eth_dev->data->dev_private;
1772         struct hns3_hw *hw = &hns->hw;
1773         uint32_t version = hw->fw_version;
1774         int ret;
1775
1776         ret = snprintf(fw_version, fw_size, "%lu.%lu.%lu.%lu",
1777                        hns3_get_field(version, HNS3_FW_VERSION_BYTE3_M,
1778                                       HNS3_FW_VERSION_BYTE3_S),
1779                        hns3_get_field(version, HNS3_FW_VERSION_BYTE2_M,
1780                                       HNS3_FW_VERSION_BYTE2_S),
1781                        hns3_get_field(version, HNS3_FW_VERSION_BYTE1_M,
1782                                       HNS3_FW_VERSION_BYTE1_S),
1783                        hns3_get_field(version, HNS3_FW_VERSION_BYTE0_M,
1784                                       HNS3_FW_VERSION_BYTE0_S));
1785         ret += 1; /* add the size of '\0' */
1786         if (fw_size < (uint32_t)ret)
1787                 return ret;
1788         else
1789                 return 0;
1790 }
1791
1792 static int
1793 hns3vf_dev_link_update(struct rte_eth_dev *eth_dev,
1794                        __rte_unused int wait_to_complete)
1795 {
1796         struct hns3_adapter *hns = eth_dev->data->dev_private;
1797         struct hns3_hw *hw = &hns->hw;
1798         struct hns3_mac *mac = &hw->mac;
1799         struct rte_eth_link new_link;
1800
1801         memset(&new_link, 0, sizeof(new_link));
1802         switch (mac->link_speed) {
1803         case ETH_SPEED_NUM_10M:
1804         case ETH_SPEED_NUM_100M:
1805         case ETH_SPEED_NUM_1G:
1806         case ETH_SPEED_NUM_10G:
1807         case ETH_SPEED_NUM_25G:
1808         case ETH_SPEED_NUM_40G:
1809         case ETH_SPEED_NUM_50G:
1810         case ETH_SPEED_NUM_100G:
1811                 new_link.link_speed = mac->link_speed;
1812                 break;
1813         default:
1814                 new_link.link_speed = ETH_SPEED_NUM_100M;
1815                 break;
1816         }
1817
1818         new_link.link_duplex = mac->link_duplex;
1819         new_link.link_status = mac->link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
1820         new_link.link_autoneg =
1821             !(eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
1822
1823         return rte_eth_linkstatus_set(eth_dev, &new_link);
1824 }
1825
1826 static int
1827 hns3vf_do_start(struct hns3_adapter *hns, bool reset_queue)
1828 {
1829         struct hns3_hw *hw = &hns->hw;
1830         int ret;
1831
1832         ret = hns3vf_set_tc_info(hns);
1833         if (ret)
1834                 return ret;
1835
1836         ret = hns3_start_queues(hns, reset_queue);
1837         if (ret)
1838                 hns3_err(hw, "Failed to start queues: %d", ret);
1839
1840         return ret;
1841 }
1842
1843 static int
1844 hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)
1845 {
1846         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1847         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1848         struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1849         uint8_t base = RTE_INTR_VEC_ZERO_OFFSET;
1850         uint8_t vec = RTE_INTR_VEC_ZERO_OFFSET;
1851         uint32_t intr_vector;
1852         uint16_t q_id;
1853         int ret;
1854
1855         if (dev->data->dev_conf.intr_conf.rxq == 0)
1856                 return 0;
1857
1858         /* disable uio/vfio intr/eventfd mapping */
1859         rte_intr_disable(intr_handle);
1860
1861         /* check and configure queue intr-vector mapping */
1862         if (rte_intr_cap_multiple(intr_handle) ||
1863             !RTE_ETH_DEV_SRIOV(dev).active) {
1864                 intr_vector = hw->used_rx_queues;
1865                 /* It creates event fd for each intr vector when MSIX is used */
1866                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1867                         return -EINVAL;
1868         }
1869         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1870                 intr_handle->intr_vec =
1871                         rte_zmalloc("intr_vec",
1872                                     hw->used_rx_queues * sizeof(int), 0);
1873                 if (intr_handle->intr_vec == NULL) {
1874                         hns3_err(hw, "Failed to allocate %d rx_queues"
1875                                      " intr_vec", hw->used_rx_queues);
1876                         ret = -ENOMEM;
1877                         goto vf_alloc_intr_vec_error;
1878                 }
1879         }
1880
1881         if (rte_intr_allow_others(intr_handle)) {
1882                 vec = RTE_INTR_VEC_RXTX_OFFSET;
1883                 base = RTE_INTR_VEC_RXTX_OFFSET;
1884         }
1885         if (rte_intr_dp_is_en(intr_handle)) {
1886                 for (q_id = 0; q_id < hw->used_rx_queues; q_id++) {
1887                         ret = hns3vf_bind_ring_with_vector(hw, vec, true,
1888                                                            HNS3_RING_TYPE_RX,
1889                                                            q_id);
1890                         if (ret)
1891                                 goto vf_bind_vector_error;
1892                         intr_handle->intr_vec[q_id] = vec;
1893                         if (vec < base + intr_handle->nb_efd - 1)
1894                                 vec++;
1895                 }
1896         }
1897         rte_intr_enable(intr_handle);
1898         return 0;
1899
1900 vf_bind_vector_error:
1901         rte_intr_efd_disable(intr_handle);
1902         if (intr_handle->intr_vec) {
1903                 free(intr_handle->intr_vec);
1904                 intr_handle->intr_vec = NULL;
1905         }
1906         return ret;
1907 vf_alloc_intr_vec_error:
1908         rte_intr_efd_disable(intr_handle);
1909         return ret;
1910 }
1911
1912 static int
1913 hns3vf_restore_rx_interrupt(struct hns3_hw *hw)
1914 {
1915         struct rte_eth_dev *dev = &rte_eth_devices[hw->data->port_id];
1916         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1917         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1918         uint16_t q_id;
1919         int ret;
1920
1921         if (dev->data->dev_conf.intr_conf.rxq == 0)
1922                 return 0;
1923
1924         if (rte_intr_dp_is_en(intr_handle)) {
1925                 for (q_id = 0; q_id < hw->used_rx_queues; q_id++) {
1926                         ret = hns3vf_bind_ring_with_vector(hw,
1927                                         intr_handle->intr_vec[q_id], true,
1928                                         HNS3_RING_TYPE_RX, q_id);
1929                         if (ret)
1930                                 return ret;
1931                 }
1932         }
1933
1934         return 0;
1935 }
1936
1937 static void
1938 hns3vf_restore_filter(struct rte_eth_dev *dev)
1939 {
1940         hns3_restore_rss_filter(dev);
1941 }
1942
1943 static int
1944 hns3vf_dev_start(struct rte_eth_dev *dev)
1945 {
1946         struct hns3_adapter *hns = dev->data->dev_private;
1947         struct hns3_hw *hw = &hns->hw;
1948         int ret;
1949
1950         PMD_INIT_FUNC_TRACE();
1951         if (rte_atomic16_read(&hw->reset.resetting))
1952                 return -EBUSY;
1953
1954         rte_spinlock_lock(&hw->lock);
1955         hw->adapter_state = HNS3_NIC_STARTING;
1956         ret = hns3vf_do_start(hns, true);
1957         if (ret) {
1958                 hw->adapter_state = HNS3_NIC_CONFIGURED;
1959                 rte_spinlock_unlock(&hw->lock);
1960                 return ret;
1961         }
1962         ret = hns3vf_map_rx_interrupt(dev);
1963         if (ret) {
1964                 hw->adapter_state = HNS3_NIC_CONFIGURED;
1965                 rte_spinlock_unlock(&hw->lock);
1966                 return ret;
1967         }
1968         hw->adapter_state = HNS3_NIC_STARTED;
1969         rte_spinlock_unlock(&hw->lock);
1970
1971         hns3_set_rxtx_function(dev);
1972         hns3_mp_req_start_rxtx(dev);
1973         rte_eal_alarm_set(HNS3VF_SERVICE_INTERVAL, hns3vf_service_handler, dev);
1974
1975         hns3vf_restore_filter(dev);
1976
1977         /* Enable interrupt of all rx queues before enabling queues */
1978         hns3_dev_all_rx_queue_intr_enable(hw, true);
1979         /*
1980          * When finished the initialization, enable queues to receive/transmit
1981          * packets.
1982          */
1983         hns3_enable_all_queues(hw, true);
1984
1985         return ret;
1986 }
1987
1988 static bool
1989 is_vf_reset_done(struct hns3_hw *hw)
1990 {
1991 #define HNS3_FUN_RST_ING_BITS \
1992         (BIT(HNS3_VECTOR0_GLOBALRESET_INT_B) | \
1993          BIT(HNS3_VECTOR0_CORERESET_INT_B) | \
1994          BIT(HNS3_VECTOR0_IMPRESET_INT_B) | \
1995          BIT(HNS3_VECTOR0_FUNCRESET_INT_B))
1996
1997         uint32_t val;
1998
1999         if (hw->reset.level == HNS3_VF_RESET) {
2000                 val = hns3_read_dev(hw, HNS3_VF_RST_ING);
2001                 if (val & HNS3_VF_RST_ING_BIT)
2002                         return false;
2003         } else {
2004                 val = hns3_read_dev(hw, HNS3_FUN_RST_ING);
2005                 if (val & HNS3_FUN_RST_ING_BITS)
2006                         return false;
2007         }
2008         return true;
2009 }
2010
2011 bool
2012 hns3vf_is_reset_pending(struct hns3_adapter *hns)
2013 {
2014         struct hns3_hw *hw = &hns->hw;
2015         enum hns3_reset_level reset;
2016
2017         hns3vf_check_event_cause(hns, NULL);
2018         reset = hns3vf_get_reset_level(hw, &hw->reset.pending);
2019         if (hw->reset.level != HNS3_NONE_RESET && hw->reset.level < reset) {
2020                 hns3_warn(hw, "High level reset %d is pending", reset);
2021                 return true;
2022         }
2023         return false;
2024 }
2025
2026 static int
2027 hns3vf_wait_hardware_ready(struct hns3_adapter *hns)
2028 {
2029         struct hns3_hw *hw = &hns->hw;
2030         struct hns3_wait_data *wait_data = hw->reset.wait_data;
2031         struct timeval tv;
2032
2033         if (wait_data->result == HNS3_WAIT_SUCCESS) {
2034                 /*
2035                  * After vf reset is ready, the PF may not have completed
2036                  * the reset processing. The vf sending mbox to PF may fail
2037                  * during the pf reset, so it is better to add extra delay.
2038                  */
2039                 if (hw->reset.level == HNS3_VF_FUNC_RESET ||
2040                     hw->reset.level == HNS3_FLR_RESET)
2041                         return 0;
2042                 /* Reset retry process, no need to add extra delay. */
2043                 if (hw->reset.attempts)
2044                         return 0;
2045                 if (wait_data->check_completion == NULL)
2046                         return 0;
2047
2048                 wait_data->check_completion = NULL;
2049                 wait_data->interval = 1 * MSEC_PER_SEC * USEC_PER_MSEC;
2050                 wait_data->count = 1;
2051                 wait_data->result = HNS3_WAIT_REQUEST;
2052                 rte_eal_alarm_set(wait_data->interval, hns3_wait_callback,
2053                                   wait_data);
2054                 hns3_warn(hw, "hardware is ready, delay 1 sec for PF reset complete");
2055                 return -EAGAIN;
2056         } else if (wait_data->result == HNS3_WAIT_TIMEOUT) {
2057                 gettimeofday(&tv, NULL);
2058                 hns3_warn(hw, "Reset step4 hardware not ready after reset time=%ld.%.6ld",
2059                           tv.tv_sec, tv.tv_usec);
2060                 return -ETIME;
2061         } else if (wait_data->result == HNS3_WAIT_REQUEST)
2062                 return -EAGAIN;
2063
2064         wait_data->hns = hns;
2065         wait_data->check_completion = is_vf_reset_done;
2066         wait_data->end_ms = (uint64_t)HNS3VF_RESET_WAIT_CNT *
2067                                       HNS3VF_RESET_WAIT_MS + get_timeofday_ms();
2068         wait_data->interval = HNS3VF_RESET_WAIT_MS * USEC_PER_MSEC;
2069         wait_data->count = HNS3VF_RESET_WAIT_CNT;
2070         wait_data->result = HNS3_WAIT_REQUEST;
2071         rte_eal_alarm_set(wait_data->interval, hns3_wait_callback, wait_data);
2072         return -EAGAIN;
2073 }
2074
2075 static int
2076 hns3vf_prepare_reset(struct hns3_adapter *hns)
2077 {
2078         struct hns3_hw *hw = &hns->hw;
2079         int ret = 0;
2080
2081         if (hw->reset.level == HNS3_VF_FUNC_RESET) {
2082                 ret = hns3_send_mbx_msg(hw, HNS3_MBX_RESET, 0, NULL,
2083                                         0, true, NULL, 0);
2084         }
2085         rte_atomic16_set(&hw->reset.disable_cmd, 1);
2086
2087         return ret;
2088 }
2089
2090 static int
2091 hns3vf_stop_service(struct hns3_adapter *hns)
2092 {
2093         struct hns3_hw *hw = &hns->hw;
2094         struct rte_eth_dev *eth_dev;
2095
2096         eth_dev = &rte_eth_devices[hw->data->port_id];
2097         if (hw->adapter_state == HNS3_NIC_STARTED)
2098                 rte_eal_alarm_cancel(hns3vf_service_handler, eth_dev);
2099         hw->mac.link_status = ETH_LINK_DOWN;
2100
2101         hns3_set_rxtx_function(eth_dev);
2102         rte_wmb();
2103         /* Disable datapath on secondary process. */
2104         hns3_mp_req_stop_rxtx(eth_dev);
2105         rte_delay_ms(hw->tqps_num);
2106
2107         rte_spinlock_lock(&hw->lock);
2108         if (hw->adapter_state == HNS3_NIC_STARTED ||
2109             hw->adapter_state == HNS3_NIC_STOPPING) {
2110                 hns3vf_do_stop(hns);
2111                 hw->reset.mbuf_deferred_free = true;
2112         } else
2113                 hw->reset.mbuf_deferred_free = false;
2114
2115         /*
2116          * It is cumbersome for hardware to pick-and-choose entries for deletion
2117          * from table space. Hence, for function reset software intervention is
2118          * required to delete the entries.
2119          */
2120         if (rte_atomic16_read(&hw->reset.disable_cmd) == 0)
2121                 hns3vf_configure_all_mc_mac_addr(hns, true);
2122         rte_spinlock_unlock(&hw->lock);
2123
2124         return 0;
2125 }
2126
2127 static int
2128 hns3vf_start_service(struct hns3_adapter *hns)
2129 {
2130         struct hns3_hw *hw = &hns->hw;
2131         struct rte_eth_dev *eth_dev;
2132
2133         eth_dev = &rte_eth_devices[hw->data->port_id];
2134         hns3_set_rxtx_function(eth_dev);
2135         hns3_mp_req_start_rxtx(eth_dev);
2136         if (hw->adapter_state == HNS3_NIC_STARTED) {
2137                 hns3vf_service_handler(eth_dev);
2138
2139                 /* Enable interrupt of all rx queues before enabling queues */
2140                 hns3_dev_all_rx_queue_intr_enable(hw, true);
2141                 /*
2142                  * When finished the initialization, enable queues to receive
2143                  * and transmit packets.
2144                  */
2145                 hns3_enable_all_queues(hw, true);
2146         }
2147
2148         return 0;
2149 }
2150
2151 static int
2152 hns3vf_check_default_mac_change(struct hns3_hw *hw)
2153 {
2154         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
2155         struct rte_ether_addr *hw_mac;
2156         int ret;
2157
2158         /*
2159          * The hns3 PF ethdev driver in kernel support setting VF MAC address
2160          * on the host by "ip link set ..." command. If the hns3 PF kernel
2161          * ethdev driver sets the MAC address for VF device after the
2162          * initialization of the related VF device, the PF driver will notify
2163          * VF driver to reset VF device to make the new MAC address effective
2164          * immediately. The hns3 VF PMD driver should check whether the MAC
2165          * address has been changed by the PF kernel ethdev driver, if changed
2166          * VF driver should configure hardware using the new MAC address in the
2167          * recovering hardware configuration stage of the reset process.
2168          */
2169         ret = hns3vf_get_host_mac_addr(hw);
2170         if (ret)
2171                 return ret;
2172
2173         hw_mac = (struct rte_ether_addr *)hw->mac.mac_addr;
2174         ret = rte_is_zero_ether_addr(hw_mac);
2175         if (ret) {
2176                 rte_ether_addr_copy(&hw->data->mac_addrs[0], hw_mac);
2177         } else {
2178                 ret = rte_is_same_ether_addr(&hw->data->mac_addrs[0], hw_mac);
2179                 if (!ret) {
2180                         rte_ether_addr_copy(hw_mac, &hw->data->mac_addrs[0]);
2181                         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
2182                                               &hw->data->mac_addrs[0]);
2183                         hns3_warn(hw, "Default MAC address has been changed to:"
2184                                   " %s by the host PF kernel ethdev driver",
2185                                   mac_str);
2186                 }
2187         }
2188
2189         return 0;
2190 }
2191
2192 static int
2193 hns3vf_restore_conf(struct hns3_adapter *hns)
2194 {
2195         struct hns3_hw *hw = &hns->hw;
2196         int ret;
2197
2198         ret = hns3vf_check_default_mac_change(hw);
2199         if (ret)
2200                 return ret;
2201
2202         ret = hns3vf_configure_mac_addr(hns, false);
2203         if (ret)
2204                 return ret;
2205
2206         ret = hns3vf_configure_all_mc_mac_addr(hns, false);
2207         if (ret)
2208                 goto err_mc_mac;
2209
2210         ret = hns3vf_restore_promisc(hns);
2211         if (ret)
2212                 goto err_vlan_table;
2213
2214         ret = hns3vf_restore_vlan_conf(hns);
2215         if (ret)
2216                 goto err_vlan_table;
2217
2218         ret = hns3vf_restore_rx_interrupt(hw);
2219         if (ret)
2220                 goto err_vlan_table;
2221
2222         if (hw->adapter_state == HNS3_NIC_STARTED) {
2223                 ret = hns3vf_do_start(hns, false);
2224                 if (ret)
2225                         goto err_vlan_table;
2226                 hns3_info(hw, "hns3vf dev restart successful!");
2227         } else if (hw->adapter_state == HNS3_NIC_STOPPING)
2228                 hw->adapter_state = HNS3_NIC_CONFIGURED;
2229         return 0;
2230
2231 err_vlan_table:
2232         hns3vf_configure_all_mc_mac_addr(hns, true);
2233 err_mc_mac:
2234         hns3vf_configure_mac_addr(hns, true);
2235         return ret;
2236 }
2237
2238 static enum hns3_reset_level
2239 hns3vf_get_reset_level(struct hns3_hw *hw, uint64_t *levels)
2240 {
2241         enum hns3_reset_level reset_level;
2242
2243         /* return the highest priority reset level amongst all */
2244         if (hns3_atomic_test_bit(HNS3_VF_RESET, levels))
2245                 reset_level = HNS3_VF_RESET;
2246         else if (hns3_atomic_test_bit(HNS3_VF_FULL_RESET, levels))
2247                 reset_level = HNS3_VF_FULL_RESET;
2248         else if (hns3_atomic_test_bit(HNS3_VF_PF_FUNC_RESET, levels))
2249                 reset_level = HNS3_VF_PF_FUNC_RESET;
2250         else if (hns3_atomic_test_bit(HNS3_VF_FUNC_RESET, levels))
2251                 reset_level = HNS3_VF_FUNC_RESET;
2252         else if (hns3_atomic_test_bit(HNS3_FLR_RESET, levels))
2253                 reset_level = HNS3_FLR_RESET;
2254         else
2255                 reset_level = HNS3_NONE_RESET;
2256
2257         if (hw->reset.level != HNS3_NONE_RESET && reset_level < hw->reset.level)
2258                 return HNS3_NONE_RESET;
2259
2260         return reset_level;
2261 }
2262
2263 static void
2264 hns3vf_reset_service(void *param)
2265 {
2266         struct hns3_adapter *hns = (struct hns3_adapter *)param;
2267         struct hns3_hw *hw = &hns->hw;
2268         enum hns3_reset_level reset_level;
2269         struct timeval tv_delta;
2270         struct timeval tv_start;
2271         struct timeval tv;
2272         uint64_t msec;
2273
2274         /*
2275          * The interrupt is not triggered within the delay time.
2276          * The interrupt may have been lost. It is necessary to handle
2277          * the interrupt to recover from the error.
2278          */
2279         if (rte_atomic16_read(&hns->hw.reset.schedule) == SCHEDULE_DEFERRED) {
2280                 rte_atomic16_set(&hns->hw.reset.schedule, SCHEDULE_REQUESTED);
2281                 hns3_err(hw, "Handling interrupts in delayed tasks");
2282                 hns3vf_interrupt_handler(&rte_eth_devices[hw->data->port_id]);
2283                 reset_level = hns3vf_get_reset_level(hw, &hw->reset.pending);
2284                 if (reset_level == HNS3_NONE_RESET) {
2285                         hns3_err(hw, "No reset level is set, try global reset");
2286                         hns3_atomic_set_bit(HNS3_VF_RESET, &hw->reset.pending);
2287                 }
2288         }
2289         rte_atomic16_set(&hns->hw.reset.schedule, SCHEDULE_NONE);
2290
2291         /*
2292          * Hardware reset has been notified, we now have to poll & check if
2293          * hardware has actually completed the reset sequence.
2294          */
2295         reset_level = hns3vf_get_reset_level(hw, &hw->reset.pending);
2296         if (reset_level != HNS3_NONE_RESET) {
2297                 gettimeofday(&tv_start, NULL);
2298                 hns3_reset_process(hns, reset_level);
2299                 gettimeofday(&tv, NULL);
2300                 timersub(&tv, &tv_start, &tv_delta);
2301                 msec = tv_delta.tv_sec * MSEC_PER_SEC +
2302                        tv_delta.tv_usec / USEC_PER_MSEC;
2303                 if (msec > HNS3_RESET_PROCESS_MS)
2304                         hns3_err(hw, "%d handle long time delta %" PRIx64
2305                                  " ms time=%ld.%.6ld",
2306                                  hw->reset.level, msec, tv.tv_sec, tv.tv_usec);
2307         }
2308 }
2309
2310 static int
2311 hns3vf_reinit_dev(struct hns3_adapter *hns)
2312 {
2313         struct rte_eth_dev *eth_dev = &rte_eth_devices[hns->hw.data->port_id];
2314         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2315         struct hns3_hw *hw = &hns->hw;
2316         int ret;
2317
2318         if (hw->reset.level == HNS3_VF_FULL_RESET) {
2319                 rte_intr_disable(&pci_dev->intr_handle);
2320                 hns3vf_set_bus_master(pci_dev, true);
2321         }
2322
2323         /* Firmware command initialize */
2324         ret = hns3_cmd_init(hw);
2325         if (ret) {
2326                 hns3_err(hw, "Failed to init cmd: %d", ret);
2327                 return ret;
2328         }
2329
2330         if (hw->reset.level == HNS3_VF_FULL_RESET) {
2331                 /*
2332                  * UIO enables msix by writing the pcie configuration space
2333                  * vfio_pci enables msix in rte_intr_enable.
2334                  */
2335                 if (pci_dev->kdrv == RTE_KDRV_IGB_UIO ||
2336                     pci_dev->kdrv == RTE_KDRV_UIO_GENERIC) {
2337                         if (hns3vf_enable_msix(pci_dev, true))
2338                                 hns3_err(hw, "Failed to enable msix");
2339                 }
2340
2341                 rte_intr_enable(&pci_dev->intr_handle);
2342         }
2343
2344         ret = hns3_reset_all_queues(hns);
2345         if (ret) {
2346                 hns3_err(hw, "Failed to reset all queues: %d", ret);
2347                 return ret;
2348         }
2349
2350         ret = hns3vf_init_hardware(hns);
2351         if (ret) {
2352                 hns3_err(hw, "Failed to init hardware: %d", ret);
2353                 return ret;
2354         }
2355
2356         return 0;
2357 }
2358
2359 static const struct eth_dev_ops hns3vf_eth_dev_ops = {
2360         .dev_start          = hns3vf_dev_start,
2361         .dev_stop           = hns3vf_dev_stop,
2362         .dev_close          = hns3vf_dev_close,
2363         .mtu_set            = hns3vf_dev_mtu_set,
2364         .promiscuous_enable = hns3vf_dev_promiscuous_enable,
2365         .promiscuous_disable = hns3vf_dev_promiscuous_disable,
2366         .allmulticast_enable = hns3vf_dev_allmulticast_enable,
2367         .allmulticast_disable = hns3vf_dev_allmulticast_disable,
2368         .stats_get          = hns3_stats_get,
2369         .stats_reset        = hns3_stats_reset,
2370         .xstats_get         = hns3_dev_xstats_get,
2371         .xstats_get_names   = hns3_dev_xstats_get_names,
2372         .xstats_reset       = hns3_dev_xstats_reset,
2373         .xstats_get_by_id   = hns3_dev_xstats_get_by_id,
2374         .xstats_get_names_by_id = hns3_dev_xstats_get_names_by_id,
2375         .dev_infos_get      = hns3vf_dev_infos_get,
2376         .fw_version_get     = hns3vf_fw_version_get,
2377         .rx_queue_setup     = hns3_rx_queue_setup,
2378         .tx_queue_setup     = hns3_tx_queue_setup,
2379         .rx_queue_release   = hns3_dev_rx_queue_release,
2380         .tx_queue_release   = hns3_dev_tx_queue_release,
2381         .rx_queue_intr_enable   = hns3_dev_rx_queue_intr_enable,
2382         .rx_queue_intr_disable  = hns3_dev_rx_queue_intr_disable,
2383         .dev_configure      = hns3vf_dev_configure,
2384         .mac_addr_add       = hns3vf_add_mac_addr,
2385         .mac_addr_remove    = hns3vf_remove_mac_addr,
2386         .mac_addr_set       = hns3vf_set_default_mac_addr,
2387         .set_mc_addr_list   = hns3vf_set_mc_mac_addr_list,
2388         .link_update        = hns3vf_dev_link_update,
2389         .rss_hash_update    = hns3_dev_rss_hash_update,
2390         .rss_hash_conf_get  = hns3_dev_rss_hash_conf_get,
2391         .reta_update        = hns3_dev_rss_reta_update,
2392         .reta_query         = hns3_dev_rss_reta_query,
2393         .filter_ctrl        = hns3_dev_filter_ctrl,
2394         .vlan_filter_set    = hns3vf_vlan_filter_set,
2395         .vlan_offload_set   = hns3vf_vlan_offload_set,
2396         .get_reg            = hns3_get_regs,
2397         .dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,
2398 };
2399
2400 static const struct hns3_reset_ops hns3vf_reset_ops = {
2401         .reset_service       = hns3vf_reset_service,
2402         .stop_service        = hns3vf_stop_service,
2403         .prepare_reset       = hns3vf_prepare_reset,
2404         .wait_hardware_ready = hns3vf_wait_hardware_ready,
2405         .reinit_dev          = hns3vf_reinit_dev,
2406         .restore_conf        = hns3vf_restore_conf,
2407         .start_service       = hns3vf_start_service,
2408 };
2409
2410 static int
2411 hns3vf_dev_init(struct rte_eth_dev *eth_dev)
2412 {
2413         struct rte_device *dev = eth_dev->device;
2414         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev);
2415         struct hns3_adapter *hns = eth_dev->data->dev_private;
2416         struct hns3_hw *hw = &hns->hw;
2417         uint8_t revision;
2418         int ret;
2419
2420         PMD_INIT_FUNC_TRACE();
2421
2422         /* Get PCI revision id */
2423         ret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,
2424                                   HNS3_PCI_REVISION_ID);
2425         if (ret != HNS3_PCI_REVISION_ID_LEN) {
2426                 PMD_INIT_LOG(ERR, "Failed to read pci revision id, ret = %d",
2427                              ret);
2428                 return -EIO;
2429         }
2430         hw->revision = revision;
2431
2432         eth_dev->process_private = (struct hns3_process_private *)
2433             rte_zmalloc_socket("hns3_filter_list",
2434                                sizeof(struct hns3_process_private),
2435                                RTE_CACHE_LINE_SIZE, eth_dev->device->numa_node);
2436         if (eth_dev->process_private == NULL) {
2437                 PMD_INIT_LOG(ERR, "Failed to alloc memory for process private");
2438                 return -ENOMEM;
2439         }
2440
2441         /* initialize flow filter lists */
2442         hns3_filterlist_init(eth_dev);
2443
2444         hns3_set_rxtx_function(eth_dev);
2445         eth_dev->dev_ops = &hns3vf_eth_dev_ops;
2446         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2447                 hns3_mp_init_secondary();
2448                 hw->secondary_cnt++;
2449                 return 0;
2450         }
2451
2452         hns3_mp_init_primary();
2453
2454         hw->adapter_state = HNS3_NIC_UNINITIALIZED;
2455         hns->is_vf = true;
2456         hw->data = eth_dev->data;
2457
2458         ret = hns3_reset_init(hw);
2459         if (ret)
2460                 goto err_init_reset;
2461         hw->reset.ops = &hns3vf_reset_ops;
2462
2463         ret = hns3vf_init_vf(eth_dev);
2464         if (ret) {
2465                 PMD_INIT_LOG(ERR, "Failed to init vf: %d", ret);
2466                 goto err_init_vf;
2467         }
2468
2469         /* Allocate memory for storing MAC addresses */
2470         eth_dev->data->mac_addrs = rte_zmalloc("hns3vf-mac",
2471                                                sizeof(struct rte_ether_addr) *
2472                                                HNS3_VF_UC_MACADDR_NUM, 0);
2473         if (eth_dev->data->mac_addrs == NULL) {
2474                 PMD_INIT_LOG(ERR, "Failed to allocate %zx bytes needed "
2475                              "to store MAC addresses",
2476                              sizeof(struct rte_ether_addr) *
2477                              HNS3_VF_UC_MACADDR_NUM);
2478                 ret = -ENOMEM;
2479                 goto err_rte_zmalloc;
2480         }
2481
2482         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.mac_addr,
2483                             &eth_dev->data->mac_addrs[0]);
2484         hw->adapter_state = HNS3_NIC_INITIALIZED;
2485         /*
2486          * Pass the information to the rte_eth_dev_close() that it should also
2487          * release the private port resources.
2488          */
2489         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2490
2491         if (rte_atomic16_read(&hns->hw.reset.schedule) == SCHEDULE_PENDING) {
2492                 hns3_err(hw, "Reschedule reset service after dev_init");
2493                 hns3_schedule_reset(hns);
2494         } else {
2495                 /* IMP will wait ready flag before reset */
2496                 hns3_notify_reset_ready(hw, false);
2497         }
2498         rte_eal_alarm_set(HNS3VF_KEEP_ALIVE_INTERVAL, hns3vf_keep_alive_handler,
2499                           eth_dev);
2500         return 0;
2501
2502 err_rte_zmalloc:
2503         hns3vf_uninit_vf(eth_dev);
2504
2505 err_init_vf:
2506         rte_free(hw->reset.wait_data);
2507
2508 err_init_reset:
2509         eth_dev->dev_ops = NULL;
2510         eth_dev->rx_pkt_burst = NULL;
2511         eth_dev->tx_pkt_burst = NULL;
2512         eth_dev->tx_pkt_prepare = NULL;
2513         rte_free(eth_dev->process_private);
2514         eth_dev->process_private = NULL;
2515
2516         return ret;
2517 }
2518
2519 static int
2520 hns3vf_dev_uninit(struct rte_eth_dev *eth_dev)
2521 {
2522         struct hns3_adapter *hns = eth_dev->data->dev_private;
2523         struct hns3_hw *hw = &hns->hw;
2524
2525         PMD_INIT_FUNC_TRACE();
2526
2527         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2528                 return -EPERM;
2529
2530         eth_dev->dev_ops = NULL;
2531         eth_dev->rx_pkt_burst = NULL;
2532         eth_dev->tx_pkt_burst = NULL;
2533         eth_dev->tx_pkt_prepare = NULL;
2534
2535         if (hw->adapter_state < HNS3_NIC_CLOSING)
2536                 hns3vf_dev_close(eth_dev);
2537
2538         hw->adapter_state = HNS3_NIC_REMOVED;
2539         return 0;
2540 }
2541
2542 static int
2543 eth_hns3vf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2544                      struct rte_pci_device *pci_dev)
2545 {
2546         return rte_eth_dev_pci_generic_probe(pci_dev,
2547                                              sizeof(struct hns3_adapter),
2548                                              hns3vf_dev_init);
2549 }
2550
2551 static int
2552 eth_hns3vf_pci_remove(struct rte_pci_device *pci_dev)
2553 {
2554         return rte_eth_dev_pci_generic_remove(pci_dev, hns3vf_dev_uninit);
2555 }
2556
2557 static const struct rte_pci_id pci_id_hns3vf_map[] = {
2558         { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_VF) },
2559         { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_PFC_VF) },
2560         { .vendor_id = 0, /* sentinel */ },
2561 };
2562
2563 static struct rte_pci_driver rte_hns3vf_pmd = {
2564         .id_table = pci_id_hns3vf_map,
2565         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
2566         .probe = eth_hns3vf_pci_probe,
2567         .remove = eth_hns3vf_pci_remove,
2568 };
2569
2570 RTE_PMD_REGISTER_PCI(net_hns3_vf, rte_hns3vf_pmd);
2571 RTE_PMD_REGISTER_PCI_TABLE(net_hns3_vf, pci_id_hns3vf_map);
2572 RTE_PMD_REGISTER_KMOD_DEP(net_hns3_vf, "* igb_uio | vfio-pci");