drivers/net/hns3/hns3_mbx.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018-2019 Hisilicon Limited.
   3  */
   4
   5 #include <errno.h>
   6 #include <stdbool.h>
   7 #include <stdint.h>
   8 #include <stdio.h>
   9 #include <string.h>
  10 #include <inttypes.h>
  11 #include <unistd.h>
  12 #include <rte_byteorder.h>
  13 #include <rte_common.h>
  14 #include <rte_cycles.h>
  15 #include <rte_dev.h>
  16 #include <rte_ethdev_driver.h>
  17 #include <rte_io.h>
  18 #include <rte_spinlock.h>
  19 #include <rte_pci.h>
  20 #include <rte_bus_pci.h>
  21
  22 #include "hns3_ethdev.h"
  23 #include "hns3_regs.h"
  24 #include "hns3_logs.h"
  25 #include "hns3_intr.h"
  26
  27 #define HNS3_REG_MSG_DATA_OFFSET        4
  28 #define HNS3_CMD_CODE_OFFSET            2
  29
  30 static const struct errno_respcode_map err_code_map[] = {
  31         {0, 0},
  32         {1, -EPERM},
  33         {2, -ENOENT},
  34         {5, -EIO},
  35         {11, -EAGAIN},
  36         {12, -ENOMEM},
  37         {16, -EBUSY},
  38         {22, -EINVAL},
  39         {28, -ENOSPC},
  40         {95, -EOPNOTSUPP},
  41 };
  42
  43 static int
  44 hns3_resp_to_errno(uint16_t resp_code)
  45 {
  46         uint32_t i, num;
  47
  48         num = sizeof(err_code_map) / sizeof(struct errno_respcode_map);
  49         for (i = 0; i < num; i++) {
  50                 if (err_code_map[i].resp_code == resp_code)
  51                         return err_code_map[i].err_no;
  52         }
  53
  54         return -EIO;
  55 }
  56
  57 static void
  58 hns3_poll_all_sync_msg(void)
  59 {
  60         struct rte_eth_dev *eth_dev;
  61         struct hns3_adapter *adapter;
  62         const char *name;
  63         uint16_t port_id;
  64
  65         RTE_ETH_FOREACH_DEV(port_id) {
  66                 eth_dev = &rte_eth_devices[port_id];
  67                 name = eth_dev->device->driver->name;
  68                 if (strcmp(name, "net_hns3") && strcmp(name, "net_hns3_vf"))
  69                         continue;
  70                 adapter = eth_dev->data->dev_private;
  71                 if (!adapter || adapter->hw.adapter_state == HNS3_NIC_CLOSED)
  72                         continue;
  73                 /* Synchronous msg, the mbx_resp.req_msg_data is non-zero */
  74                 if (adapter->hw.mbx_resp.req_msg_data)
  75                         hns3_dev_handle_mbx_msg(&adapter->hw);
  76         }
  77 }
  78
  79 static int
  80 hns3_get_mbx_resp(struct hns3_hw *hw, uint16_t code0, uint16_t code1,
  81                   uint8_t *resp_data, uint16_t resp_len)
  82 {
  83 #define HNS3_MAX_RETRY_MS       500
  84         struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
  85         struct hns3_mbx_resp_status *mbx_resp;
  86         bool in_irq = false;
  87         uint64_t now;
  88         uint64_t end;
  89
  90         if (resp_len > HNS3_MBX_MAX_RESP_DATA_SIZE) {
  91                 hns3_err(hw, "VF mbx response len(=%d) exceeds maximum(=%d)",
  92                          resp_len, HNS3_MBX_MAX_RESP_DATA_SIZE);
  93                 return -EINVAL;
  94         }
  95
  96         now = get_timeofday_ms();
  97         end = now + HNS3_MAX_RETRY_MS;
  98         while ((hw->mbx_resp.head != hw->mbx_resp.tail + hw->mbx_resp.lost) &&
  99                (now < end)) {
 100                 if (rte_atomic16_read(&hw->reset.disable_cmd)) {
 101                         hns3_err(hw, "Don't wait for mbx respone because of "
 102                                  "disable_cmd");
 103                         return -EBUSY;
 104                 }
 105
 106                 if (is_reset_pending(hns)) {
 107                         hw->mbx_resp.req_msg_data = 0;
 108                         hns3_err(hw, "Don't wait for mbx respone because of "
 109                                  "reset pending");
 110                         return -EIO;
 111                 }
 112
 113                 /*
 114                  * The mbox response is running on the interrupt thread.
 115                  * Sending mbox in the interrupt thread cannot wait for the
 116                  * response, so polling the mbox response on the irq thread.
 117                  */
 118                 if (pthread_equal(hw->irq_thread_id, pthread_self())) {
 119                         in_irq = true;
 120                         hns3_poll_all_sync_msg();
 121                 } else {
 122                         rte_delay_ms(HNS3_POLL_RESPONE_MS);
 123                 }
 124                 now = get_timeofday_ms();
 125         }
 126         hw->mbx_resp.req_msg_data = 0;
 127         if (now >= end) {
 128                 hw->mbx_resp.lost++;
 129                 hns3_err(hw,
 130                          "VF could not get mbx(%d,%d) head(%d) tail(%d) lost(%d) from PF in_irq:%d",
 131                          code0, code1, hw->mbx_resp.head, hw->mbx_resp.tail,
 132                          hw->mbx_resp.lost, in_irq);
 133                 return -ETIME;
 134         }
 135         rte_io_rmb();
 136         mbx_resp = &hw->mbx_resp;
 137
 138         if (mbx_resp->resp_status)
 139                 return mbx_resp->resp_status;
 140
 141         if (resp_data)
 142                 memcpy(resp_data, &mbx_resp->additional_info[0], resp_len);
 143
 144         return 0;
 145 }
 146
 147 int
 148 hns3_send_mbx_msg(struct hns3_hw *hw, uint16_t code, uint16_t subcode,
 149                   const uint8_t *msg_data, uint8_t msg_len, bool need_resp,
 150                   uint8_t *resp_data, uint16_t resp_len)
 151 {
 152         struct hns3_mbx_vf_to_pf_cmd *req;
 153         struct hns3_cmd_desc desc;
 154         int ret;
 155
 156         req = (struct hns3_mbx_vf_to_pf_cmd *)desc.data;
 157
 158         /* first two bytes are reserved for code & subcode */
 159         if (msg_len > (HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET)) {
 160                 hns3_err(hw,
 161                          "VF send mbx msg fail, msg len %d exceeds max payload len %d",
 162                          msg_len, HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET);
 163                 return -EINVAL;
 164         }
 165
 166         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MBX_VF_TO_PF, false);
 167         req->msg[0] = code;
 168         req->msg[1] = subcode;
 169         if (msg_data)
 170                 memcpy(&req->msg[HNS3_CMD_CODE_OFFSET], msg_data, msg_len);
 171
 172         /* synchronous send */
 173         if (need_resp) {
 174                 req->mbx_need_resp |= HNS3_MBX_NEED_RESP_BIT;
 175                 rte_spinlock_lock(&hw->mbx_resp.lock);
 176                 hw->mbx_resp.req_msg_data = (uint32_t)code << 16 | subcode;
 177                 hw->mbx_resp.head++;
 178                 ret = hns3_cmd_send(hw, &desc, 1);
 179                 if (ret) {
 180                         rte_spinlock_unlock(&hw->mbx_resp.lock);
 181                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
 182                                  ret);
 183                         return ret;
 184                 }
 185
 186                 ret = hns3_get_mbx_resp(hw, code, subcode, resp_data, resp_len);
 187                 rte_spinlock_unlock(&hw->mbx_resp.lock);
 188         } else {
 189                 /* asynchronous send */
 190                 ret = hns3_cmd_send(hw, &desc, 1);
 191                 if (ret) {
 192                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
 193                                  ret);
 194                         return ret;
 195                 }
 196         }
 197
 198         return ret;
 199 }
 200
 201 static bool
 202 hns3_cmd_crq_empty(struct hns3_hw *hw)
 203 {
 204         uint32_t tail = hns3_read_dev(hw, HNS3_CMDQ_RX_TAIL_REG);
 205
 206         return tail == hw->cmq.crq.next_to_use;
 207 }
 208
 209 static void
 210 hns3_mbx_handler(struct hns3_hw *hw)
 211 {
 212         struct hns3_mac *mac = &hw->mac;
 213         enum hns3_reset_level reset_level;
 214         uint16_t *msg_q;
 215         uint32_t tail;
 216
 217         tail = hw->arq.tail;
 218
 219         /* process all the async queue messages */
 220         while (tail != hw->arq.head) {
 221                 msg_q = hw->arq.msg_q[hw->arq.head];
 222
 223                 switch (msg_q[0]) {
 224                 case HNS3_MBX_LINK_STAT_CHANGE:
 225                         memcpy(&mac->link_speed, &msg_q[2],
 226                                    sizeof(mac->link_speed));
 227                         mac->link_status = rte_le_to_cpu_16(msg_q[1]);
 228                         mac->link_duplex = (uint8_t)rte_le_to_cpu_16(msg_q[4]);
 229                         break;
 230                 case HNS3_MBX_ASSERTING_RESET:
 231                         /* PF has asserted reset hence VF should go in pending
 232                          * state and poll for the hardware reset status till it
 233                          * has been completely reset. After this stack should
 234                          * eventually be re-initialized.
 235                          */
 236                         reset_level = rte_le_to_cpu_16(msg_q[1]);
 237                         hns3_atomic_set_bit(reset_level, &hw->reset.pending);
 238
 239                         hns3_warn(hw, "PF inform reset level %d", reset_level);
 240                         hw->reset.stats.request_cnt++;
 241                         hns3_schedule_reset(HNS3_DEV_HW_TO_ADAPTER(hw));
 242                         break;
 243                 default:
 244                         hns3_err(hw, "Fetched unsupported(%d) message from arq",
 245                                  msg_q[0]);
 246                         break;
 247                 }
 248
 249                 hns3_mbx_head_ptr_move_arq(hw->arq);
 250                 msg_q = hw->arq.msg_q[hw->arq.head];
 251         }
 252 }
 253
 254 /*
 255  * Case1: receive response after timeout, req_msg_data
 256  *        is 0, not equal resp_msg, do lost--
 257  * Case2: receive last response during new send_mbx_msg,
 258  *        req_msg_data is different with resp_msg, let
 259  *        lost--, continue to wait for response.
 260  */
 261 static void
 262 hns3_update_resp_position(struct hns3_hw *hw, uint32_t resp_msg)
 263 {
 264         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
 265         uint32_t tail = resp->tail + 1;
 266
 267         if (tail > resp->head)
 268                 tail = resp->head;
 269         if (resp->req_msg_data != resp_msg) {
 270                 if (resp->lost)
 271                         resp->lost--;
 272                 hns3_warn(hw, "Received a mismatched response req_msg(%x) "
 273                           "resp_msg(%x) head(%d) tail(%d) lost(%d)",
 274                           resp->req_msg_data, resp_msg, resp->head, tail,
 275                           resp->lost);
 276         } else if (tail + resp->lost > resp->head) {
 277                 resp->lost--;
 278                 hns3_warn(hw, "Received a new response again resp_msg(%x) "
 279                           "head(%d) tail(%d) lost(%d)", resp_msg,
 280                           resp->head, tail, resp->lost);
 281         }
 282         rte_io_wmb();
 283         resp->tail = tail;
 284 }
 285
 286 void
 287 hns3_dev_handle_mbx_msg(struct hns3_hw *hw)
 288 {
 289         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
 290         struct hns3_cmq_ring *crq = &hw->cmq.crq;
 291         struct hns3_mbx_pf_to_vf_cmd *req;
 292         struct hns3_cmd_desc *desc;
 293         uint32_t msg_data;
 294         uint16_t *msg_q;
 295         uint16_t flag;
 296         uint8_t *temp;
 297         int i;
 298
 299         while (!hns3_cmd_crq_empty(hw)) {
 300                 if (rte_atomic16_read(&hw->reset.disable_cmd))
 301                         return;
 302
 303                 desc = &crq->desc[crq->next_to_use];
 304                 req = (struct hns3_mbx_pf_to_vf_cmd *)desc->data;
 305
 306                 flag = rte_le_to_cpu_16(crq->desc[crq->next_to_use].flag);
 307                 if (unlikely(!hns3_get_bit(flag, HNS3_CMDQ_RX_OUTVLD_B))) {
 308                         hns3_warn(hw,
 309                                   "dropped invalid mailbox message, code = %d",
 310                                   req->msg[0]);
 311
 312                         /* dropping/not processing this invalid message */
 313                         crq->desc[crq->next_to_use].flag = 0;
 314                         hns3_mbx_ring_ptr_move_crq(crq);
 315                         continue;
 316                 }
 317
 318                 switch (req->msg[0]) {
 319                 case HNS3_MBX_PF_VF_RESP:
 320                         resp->resp_status = hns3_resp_to_errno(req->msg[3]);
 321
 322                         temp = (uint8_t *)&req->msg[4];
 323                         for (i = 0; i < HNS3_MBX_MAX_RESP_DATA_SIZE &&
 324                              i < HNS3_REG_MSG_DATA_OFFSET; i++) {
 325                                 resp->additional_info[i] = *temp;
 326                                 temp++;
 327                         }
 328                         msg_data = (uint32_t)req->msg[1] << 16 | req->msg[2];
 329                         hns3_update_resp_position(hw, msg_data);
 330                         break;
 331                 case HNS3_MBX_LINK_STAT_CHANGE:
 332                 case HNS3_MBX_ASSERTING_RESET:
 333                         msg_q = hw->arq.msg_q[hw->arq.tail];
 334                         memcpy(&msg_q[0], req->msg,
 335                                HNS3_MBX_MAX_ARQ_MSG_SIZE * sizeof(uint16_t));
 336                         hns3_mbx_tail_ptr_move_arq(hw->arq);
 337
 338                         hns3_mbx_handler(hw);
 339                         break;
 340                 default:
 341                         hns3_err(hw,
 342                                  "VF received unsupported(%d) mbx msg from PF",
 343                                  req->msg[0]);
 344                         break;
 345                 }
 346
 347                 crq->desc[crq->next_to_use].flag = 0;
 348                 hns3_mbx_ring_ptr_move_crq(crq);
 349         }
 350
 351         /* Write back CMDQ_RQ header pointer, IMP need this pointer */
 352         hns3_write_dev(hw, HNS3_CMDQ_RX_HEAD_REG, crq->next_to_use);
 353 }