drivers/net/hns3/hns3_mbx.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018-2021 HiSilicon Limited.
   3  */
   4
   5 #include <ethdev_driver.h>
   6 #include <rte_io.h>
   7
   8 #include "hns3_ethdev.h"
   9 #include "hns3_regs.h"
  10 #include "hns3_logs.h"
  11 #include "hns3_intr.h"
  12 #include "hns3_rxtx.h"
  13
  14 #define HNS3_CMD_CODE_OFFSET            2
  15
  16 static const struct errno_respcode_map err_code_map[] = {
  17         {0, 0},
  18         {1, -EPERM},
  19         {2, -ENOENT},
  20         {5, -EIO},
  21         {11, -EAGAIN},
  22         {12, -ENOMEM},
  23         {16, -EBUSY},
  24         {22, -EINVAL},
  25         {28, -ENOSPC},
  26         {95, -EOPNOTSUPP},
  27 };
  28
  29 static int
  30 hns3_resp_to_errno(uint16_t resp_code)
  31 {
  32         uint32_t i, num;
  33
  34         num = sizeof(err_code_map) / sizeof(struct errno_respcode_map);
  35         for (i = 0; i < num; i++) {
  36                 if (err_code_map[i].resp_code == resp_code)
  37                         return err_code_map[i].err_no;
  38         }
  39
  40         return -EIO;
  41 }
  42
  43 static int
  44 hns3_get_mbx_resp(struct hns3_hw *hw, uint16_t code0, uint16_t code1,
  45                   uint8_t *resp_data, uint16_t resp_len)
  46 {
  47 #define HNS3_MAX_RETRY_MS       500
  48 #define HNS3_WAIT_RESP_US       100
  49         struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
  50         struct hns3_mbx_resp_status *mbx_resp;
  51         uint64_t now;
  52         uint64_t end;
  53
  54         if (resp_len > HNS3_MBX_MAX_RESP_DATA_SIZE) {
  55                 hns3_err(hw, "VF mbx response len(=%u) exceeds maximum(=%d)",
  56                          resp_len, HNS3_MBX_MAX_RESP_DATA_SIZE);
  57                 return -EINVAL;
  58         }
  59
  60         now = get_timeofday_ms();
  61         end = now + HNS3_MAX_RETRY_MS;
  62         while ((hw->mbx_resp.head != hw->mbx_resp.tail + hw->mbx_resp.lost) &&
  63                (now < end)) {
  64                 if (__atomic_load_n(&hw->reset.disable_cmd, __ATOMIC_RELAXED)) {
  65                         hns3_err(hw, "Don't wait for mbx respone because of "
  66                                  "disable_cmd");
  67                         return -EBUSY;
  68                 }
  69
  70                 if (is_reset_pending(hns)) {
  71                         hw->mbx_resp.req_msg_data = 0;
  72                         hns3_err(hw, "Don't wait for mbx respone because of "
  73                                  "reset pending");
  74                         return -EIO;
  75                 }
  76
  77                 hns3_dev_handle_mbx_msg(hw);
  78                 rte_delay_us(HNS3_WAIT_RESP_US);
  79
  80                 now = get_timeofday_ms();
  81         }
  82         hw->mbx_resp.req_msg_data = 0;
  83         if (now >= end) {
  84                 hw->mbx_resp.lost++;
  85                 hns3_err(hw,
  86                          "VF could not get mbx(%u,%u) head(%u) tail(%u) "
  87                          "lost(%u) from PF",
  88                          code0, code1, hw->mbx_resp.head, hw->mbx_resp.tail,
  89                          hw->mbx_resp.lost);
  90                 return -ETIME;
  91         }
  92         rte_io_rmb();
  93         mbx_resp = &hw->mbx_resp;
  94
  95         if (mbx_resp->resp_status)
  96                 return mbx_resp->resp_status;
  97
  98         if (resp_data)
  99                 memcpy(resp_data, &mbx_resp->additional_info[0], resp_len);
 100
 101         return 0;
 102 }
 103
 104 int
 105 hns3_send_mbx_msg(struct hns3_hw *hw, uint16_t code, uint16_t subcode,
 106                   const uint8_t *msg_data, uint8_t msg_len, bool need_resp,
 107                   uint8_t *resp_data, uint16_t resp_len)
 108 {
 109         struct hns3_mbx_vf_to_pf_cmd *req;
 110         struct hns3_cmd_desc desc;
 111         bool is_ring_vector_msg;
 112         int offset;
 113         int ret;
 114
 115         req = (struct hns3_mbx_vf_to_pf_cmd *)desc.data;
 116
 117         /* first two bytes are reserved for code & subcode */
 118         if (msg_len > (HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET)) {
 119                 hns3_err(hw,
 120                          "VF send mbx msg fail, msg len %u exceeds max payload len %d",
 121                          msg_len, HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET);
 122                 return -EINVAL;
 123         }
 124
 125         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MBX_VF_TO_PF, false);
 126         req->msg[0] = code;
 127         is_ring_vector_msg = (code == HNS3_MBX_MAP_RING_TO_VECTOR) ||
 128                              (code == HNS3_MBX_UNMAP_RING_TO_VECTOR) ||
 129                              (code == HNS3_MBX_GET_RING_VECTOR_MAP);
 130         if (!is_ring_vector_msg)
 131                 req->msg[1] = subcode;
 132         if (msg_data) {
 133                 offset = is_ring_vector_msg ? 1 : HNS3_CMD_CODE_OFFSET;
 134                 memcpy(&req->msg[offset], msg_data, msg_len);
 135         }
 136
 137         /* synchronous send */
 138         if (need_resp) {
 139                 req->mbx_need_resp |= HNS3_MBX_NEED_RESP_BIT;
 140                 rte_spinlock_lock(&hw->mbx_resp.lock);
 141                 hw->mbx_resp.req_msg_data = (uint32_t)code << 16 | subcode;
 142                 hw->mbx_resp.head++;
 143                 ret = hns3_cmd_send(hw, &desc, 1);
 144                 if (ret) {
 145                         hw->mbx_resp.head--;
 146                         rte_spinlock_unlock(&hw->mbx_resp.lock);
 147                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
 148                                  ret);
 149                         return ret;
 150                 }
 151
 152                 ret = hns3_get_mbx_resp(hw, code, subcode, resp_data, resp_len);
 153                 rte_spinlock_unlock(&hw->mbx_resp.lock);
 154         } else {
 155                 /* asynchronous send */
 156                 ret = hns3_cmd_send(hw, &desc, 1);
 157                 if (ret) {
 158                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
 159                                  ret);
 160                         return ret;
 161                 }
 162         }
 163
 164         return ret;
 165 }
 166
 167 static bool
 168 hns3_cmd_crq_empty(struct hns3_hw *hw)
 169 {
 170         uint32_t tail = hns3_read_dev(hw, HNS3_CMDQ_RX_TAIL_REG);
 171
 172         return tail == hw->cmq.crq.next_to_use;
 173 }
 174
 175 static void
 176 hns3_mbx_handler(struct hns3_hw *hw)
 177 {
 178         enum hns3_reset_level reset_level;
 179         uint8_t link_status, link_duplex;
 180         uint8_t support_push_lsc;
 181         uint32_t link_speed;
 182         uint16_t *msg_q;
 183         uint8_t opcode;
 184         uint32_t tail;
 185
 186         tail = hw->arq.tail;
 187
 188         /* process all the async queue messages */
 189         while (tail != hw->arq.head) {
 190                 msg_q = hw->arq.msg_q[hw->arq.head];
 191
 192                 opcode = msg_q[0] & 0xff;
 193                 switch (opcode) {
 194                 case HNS3_MBX_LINK_STAT_CHANGE:
 195                         memcpy(&link_speed, &msg_q[2], sizeof(link_speed));
 196                         link_status = rte_le_to_cpu_16(msg_q[1]);
 197                         link_duplex = (uint8_t)rte_le_to_cpu_16(msg_q[4]);
 198                         hns3vf_update_link_status(hw, link_status, link_speed,
 199                                                   link_duplex);
 200                         support_push_lsc = (*(uint8_t *)&msg_q[5]) & 1u;
 201                         hns3vf_update_push_lsc_cap(hw, support_push_lsc);
 202                         break;
 203                 case HNS3_MBX_ASSERTING_RESET:
 204                         /* PF has asserted reset hence VF should go in pending
 205                          * state and poll for the hardware reset status till it
 206                          * has been completely reset. After this stack should
 207                          * eventually be re-initialized.
 208                          */
 209                         reset_level = rte_le_to_cpu_16(msg_q[1]);
 210                         hns3_atomic_set_bit(reset_level, &hw->reset.pending);
 211
 212                         hns3_warn(hw, "PF inform reset level %d", reset_level);
 213                         hw->reset.stats.request_cnt++;
 214                         hns3_schedule_reset(HNS3_DEV_HW_TO_ADAPTER(hw));
 215                         break;
 216                 default:
 217                         hns3_err(hw, "Fetched unsupported(%u) message from arq",
 218                                  opcode);
 219                         break;
 220                 }
 221
 222                 hns3_mbx_head_ptr_move_arq(hw->arq);
 223                 msg_q = hw->arq.msg_q[hw->arq.head];
 224         }
 225 }
 226
 227 /*
 228  * Case1: receive response after timeout, req_msg_data
 229  *        is 0, not equal resp_msg, do lost--
 230  * Case2: receive last response during new send_mbx_msg,
 231  *        req_msg_data is different with resp_msg, let
 232  *        lost--, continue to wait for response.
 233  */
 234 static void
 235 hns3_update_resp_position(struct hns3_hw *hw, uint32_t resp_msg)
 236 {
 237         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
 238         uint32_t tail = resp->tail + 1;
 239
 240         if (tail > resp->head)
 241                 tail = resp->head;
 242         if (resp->req_msg_data != resp_msg) {
 243                 if (resp->lost)
 244                         resp->lost--;
 245                 hns3_warn(hw, "Received a mismatched response req_msg(%x) "
 246                           "resp_msg(%x) head(%u) tail(%u) lost(%u)",
 247                           resp->req_msg_data, resp_msg, resp->head, tail,
 248                           resp->lost);
 249         } else if (tail + resp->lost > resp->head) {
 250                 resp->lost--;
 251                 hns3_warn(hw, "Received a new response again resp_msg(%x) "
 252                           "head(%u) tail(%u) lost(%u)", resp_msg,
 253                           resp->head, tail, resp->lost);
 254         }
 255         rte_io_wmb();
 256         resp->tail = tail;
 257 }
 258
 259 static void
 260 hns3_link_fail_parse(struct hns3_hw *hw, uint8_t link_fail_code)
 261 {
 262         switch (link_fail_code) {
 263         case HNS3_MBX_LF_NORMAL:
 264                 break;
 265         case HNS3_MBX_LF_REF_CLOCK_LOST:
 266                 hns3_warn(hw, "Reference clock lost!");
 267                 break;
 268         case HNS3_MBX_LF_XSFP_TX_DISABLE:
 269                 hns3_warn(hw, "SFP tx is disabled!");
 270                 break;
 271         case HNS3_MBX_LF_XSFP_ABSENT:
 272                 hns3_warn(hw, "SFP is absent!");
 273                 break;
 274         default:
 275                 hns3_warn(hw, "Unknown fail code:%u!", link_fail_code);
 276                 break;
 277         }
 278 }
 279
 280 static void
 281 hns3_handle_link_change_event(struct hns3_hw *hw,
 282                               struct hns3_mbx_pf_to_vf_cmd *req)
 283 {
 284 #define LINK_STATUS_OFFSET     1
 285 #define LINK_FAIL_CODE_OFFSET  2
 286
 287         if (!req->msg[LINK_STATUS_OFFSET])
 288                 hns3_link_fail_parse(hw, req->msg[LINK_FAIL_CODE_OFFSET]);
 289
 290         hns3_update_linkstatus_and_event(hw, true);
 291 }
 292
 293 static void
 294 hns3_update_port_base_vlan_info(struct hns3_hw *hw,
 295                                 struct hns3_mbx_pf_to_vf_cmd *req)
 296 {
 297 #define PVID_STATE_OFFSET       1
 298         uint16_t new_pvid_state = req->msg[PVID_STATE_OFFSET] ?
 299                 HNS3_PORT_BASE_VLAN_ENABLE : HNS3_PORT_BASE_VLAN_DISABLE;
 300         /*
 301          * Currently, hardware doesn't support more than two layers VLAN offload
 302          * based on hns3 network engine, which would cause packets loss or wrong
 303          * packets for these types of packets. If the hns3 PF kernel ethdev
 304          * driver sets the PVID for VF device after initialization of the
 305          * related VF device, the PF driver will notify VF driver to update the
 306          * PVID configuration state. The VF driver will update the PVID
 307          * configuration state immediately to ensure that the VLAN process in Tx
 308          * and Rx is correct. But in the window period of this state transition,
 309          * packets loss or packets with wrong VLAN may occur.
 310          */
 311         if (hw->port_base_vlan_cfg.state != new_pvid_state) {
 312                 hw->port_base_vlan_cfg.state = new_pvid_state;
 313                 hns3_update_all_queues_pvid_proc_en(hw);
 314         }
 315 }
 316
 317 static void
 318 hns3_handle_promisc_info(struct hns3_hw *hw, uint16_t promisc_en)
 319 {
 320         if (!promisc_en) {
 321                 /*
 322                  * When promisc/allmulti mode is closed by the hns3 PF kernel
 323                  * ethdev driver for untrusted, modify VF's related status.
 324                  */
 325                 hns3_warn(hw, "Promisc mode will be closed by host for being "
 326                               "untrusted.");
 327                 hw->data->promiscuous = 0;
 328                 hw->data->all_multicast = 0;
 329         }
 330 }
 331
 332 void
 333 hns3_dev_handle_mbx_msg(struct hns3_hw *hw)
 334 {
 335         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
 336         struct hns3_cmq_ring *crq = &hw->cmq.crq;
 337         struct hns3_mbx_pf_to_vf_cmd *req;
 338         struct hns3_cmd_desc *desc;
 339         uint32_t msg_data;
 340         uint16_t *msg_q;
 341         uint8_t opcode;
 342         uint16_t flag;
 343         uint8_t *temp;
 344         int i;
 345
 346         rte_spinlock_lock(&hw->cmq.crq.lock);
 347
 348         while (!hns3_cmd_crq_empty(hw)) {
 349                 if (__atomic_load_n(&hw->reset.disable_cmd, __ATOMIC_RELAXED)) {
 350                         rte_spinlock_unlock(&hw->cmq.crq.lock);
 351                         return;
 352                 }
 353
 354                 desc = &crq->desc[crq->next_to_use];
 355                 req = (struct hns3_mbx_pf_to_vf_cmd *)desc->data;
 356                 opcode = req->msg[0] & 0xff;
 357
 358                 flag = rte_le_to_cpu_16(crq->desc[crq->next_to_use].flag);
 359                 if (unlikely(!hns3_get_bit(flag, HNS3_CMDQ_RX_OUTVLD_B))) {
 360                         hns3_warn(hw,
 361                                   "dropped invalid mailbox message, code = %u",
 362                                   opcode);
 363
 364                         /* dropping/not processing this invalid message */
 365                         crq->desc[crq->next_to_use].flag = 0;
 366                         hns3_mbx_ring_ptr_move_crq(crq);
 367                         continue;
 368                 }
 369
 370                 switch (opcode) {
 371                 case HNS3_MBX_PF_VF_RESP:
 372                         resp->resp_status = hns3_resp_to_errno(req->msg[3]);
 373
 374                         temp = (uint8_t *)&req->msg[4];
 375                         for (i = 0; i < HNS3_MBX_MAX_RESP_DATA_SIZE; i++) {
 376                                 resp->additional_info[i] = *temp;
 377                                 temp++;
 378                         }
 379                         msg_data = (uint32_t)req->msg[1] << 16 | req->msg[2];
 380                         hns3_update_resp_position(hw, msg_data);
 381                         break;
 382                 case HNS3_MBX_LINK_STAT_CHANGE:
 383                 case HNS3_MBX_ASSERTING_RESET:
 384                         msg_q = hw->arq.msg_q[hw->arq.tail];
 385                         memcpy(&msg_q[0], req->msg,
 386                                HNS3_MBX_MAX_ARQ_MSG_SIZE * sizeof(uint16_t));
 387                         hns3_mbx_tail_ptr_move_arq(hw->arq);
 388
 389                         hns3_mbx_handler(hw);
 390                         break;
 391                 case HNS3_MBX_PUSH_LINK_STATUS:
 392                         hns3_handle_link_change_event(hw, req);
 393                         break;
 394                 case HNS3_MBX_PUSH_VLAN_INFO:
 395                         /*
 396                          * When the PVID configuration status of VF device is
 397                          * changed by the hns3 PF kernel driver, VF driver will
 398                          * receive this mailbox message from PF driver.
 399                          */
 400                         hns3_update_port_base_vlan_info(hw, req);
 401                         break;
 402                 case HNS3_MBX_PUSH_PROMISC_INFO:
 403                         /*
 404                          * When the trust status of VF device changed by the
 405                          * hns3 PF kernel driver, VF driver will receive this
 406                          * mailbox message from PF driver.
 407                          */
 408                         hns3_handle_promisc_info(hw, req->msg[1]);
 409                         break;
 410                 default:
 411                         hns3_err(hw,
 412                                  "VF received unsupported(%u) mbx msg from PF",
 413                                  req->msg[0]);
 414                         break;
 415                 }
 416
 417                 crq->desc[crq->next_to_use].flag = 0;
 418                 hns3_mbx_ring_ptr_move_crq(crq);
 419         }
 420
 421         /* Write back CMDQ_RQ header pointer, IMP need this pointer */
 422         hns3_write_dev(hw, HNS3_CMDQ_RX_HEAD_REG, crq->next_to_use);
 423
 424         rte_spinlock_unlock(&hw->cmq.crq.lock);
 425 }