1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2019 Hisilicon Limited.
8 #define HNS3_MBX_VF_MSG_DATA_NUM 16
10 enum HNS3_MBX_OPCODE {
11 HNS3_MBX_RESET = 0x01, /* (VF -> PF) assert reset */
12 HNS3_MBX_ASSERTING_RESET, /* (PF -> VF) PF is asserting reset */
13 HNS3_MBX_SET_UNICAST, /* (VF -> PF) set UC addr */
14 HNS3_MBX_SET_MULTICAST, /* (VF -> PF) set MC addr */
15 HNS3_MBX_SET_VLAN, /* (VF -> PF) set VLAN */
16 HNS3_MBX_MAP_RING_TO_VECTOR, /* (VF -> PF) map ring-to-vector */
17 HNS3_MBX_UNMAP_RING_TO_VECTOR, /* (VF -> PF) unamp ring-to-vector */
18 HNS3_MBX_SET_PROMISC_MODE, /* (VF -> PF) set promiscuous mode */
19 HNS3_MBX_SET_MACVLAN, /* (VF -> PF) set unicast filter */
20 HNS3_MBX_API_NEGOTIATE, /* (VF -> PF) negotiate API version */
21 HNS3_MBX_GET_QINFO, /* (VF -> PF) get queue config */
22 HNS3_MBX_GET_QDEPTH, /* (VF -> PF) get queue depth */
23 HNS3_MBX_GET_TCINFO, /* (VF -> PF) get TC config */
24 HNS3_MBX_GET_RETA, /* (VF -> PF) get RETA */
25 HNS3_MBX_GET_RSS_KEY, /* (VF -> PF) get RSS key */
26 HNS3_MBX_GET_MAC_ADDR, /* (VF -> PF) get MAC addr */
27 HNS3_MBX_PF_VF_RESP, /* (PF -> VF) generate respone to VF */
28 HNS3_MBX_GET_BDNUM, /* (VF -> PF) get BD num */
29 HNS3_MBX_GET_BUFSIZE, /* (VF -> PF) get buffer size */
30 HNS3_MBX_GET_STREAMID, /* (VF -> PF) get stream id */
31 HNS3_MBX_SET_AESTART, /* (VF -> PF) start ae */
32 HNS3_MBX_SET_TSOSTATS, /* (VF -> PF) get tso stats */
33 HNS3_MBX_LINK_STAT_CHANGE, /* (PF -> VF) link status has changed */
34 HNS3_MBX_GET_BASE_CONFIG, /* (VF -> PF) get config */
35 HNS3_MBX_BIND_FUNC_QUEUE, /* (VF -> PF) bind function and queue */
36 HNS3_MBX_GET_LINK_STATUS, /* (VF -> PF) get link status */
37 HNS3_MBX_QUEUE_RESET, /* (VF -> PF) reset queue */
38 HNS3_MBX_KEEP_ALIVE, /* (VF -> PF) send keep alive cmd */
39 HNS3_MBX_SET_ALIVE, /* (VF -> PF) set alive state */
40 HNS3_MBX_SET_MTU, /* (VF -> PF) set mtu */
41 HNS3_MBX_GET_QID_IN_PF, /* (VF -> PF) get queue id in pf */
43 HNS3_MBX_HANDLE_VF_TBL = 38, /* (VF -> PF) store/clear hw cfg tbl */
44 HNS3_MBX_PUSH_LINK_STATUS = 201, /* (IMP -> PF) get port link status */
47 /* below are per-VF mac-vlan subcodes */
48 enum hns3_mbx_mac_vlan_subcode {
49 HNS3_MBX_MAC_VLAN_UC_MODIFY = 0, /* modify UC mac addr */
50 HNS3_MBX_MAC_VLAN_UC_ADD, /* add a new UC mac addr */
51 HNS3_MBX_MAC_VLAN_UC_REMOVE, /* remove a new UC mac addr */
52 HNS3_MBX_MAC_VLAN_MC_MODIFY, /* modify MC mac addr */
53 HNS3_MBX_MAC_VLAN_MC_ADD, /* add new MC mac addr */
54 HNS3_MBX_MAC_VLAN_MC_REMOVE, /* remove MC mac addr */
57 /* below are per-VF vlan cfg subcodes */
58 enum hns3_mbx_vlan_cfg_subcode {
59 HNS3_MBX_VLAN_FILTER = 0, /* set vlan filter */
60 HNS3_MBX_VLAN_TX_OFF_CFG, /* set tx side vlan offload */
61 HNS3_MBX_VLAN_RX_OFF_CFG, /* set rx side vlan offload */
64 enum hns3_mbx_tbl_cfg_subcode {
65 HNS3_MBX_VPORT_LIST_CLEAR = 0,
68 enum hns3_mbx_link_fail_subcode {
69 HNS3_MBX_LF_NORMAL = 0,
70 HNS3_MBX_LF_REF_CLOCK_LOST,
71 HNS3_MBX_LF_XSFP_TX_DISABLE,
72 HNS3_MBX_LF_XSFP_ABSENT,
75 #define HNS3_MBX_MAX_MSG_SIZE 16
76 #define HNS3_MBX_MAX_RESP_DATA_SIZE 8
77 #define HNS3_MBX_RING_MAP_BASIC_MSG_NUM 3
78 #define HNS3_MBX_RING_NODE_VARIABLE_NUM 3
80 struct hns3_mbx_resp_status {
81 rte_spinlock_t lock; /* protects against contending sync cmd resp */
82 uint32_t req_msg_data;
87 uint8_t additional_info[HNS3_MBX_MAX_RESP_DATA_SIZE];
90 struct errno_respcode_map {
95 #define HNS3_MBX_NEED_RESP_BIT BIT(0)
97 struct hns3_mbx_vf_to_pf_cmd {
99 uint8_t mbx_src_vfid; /* Auto filled by IMP */
100 uint8_t mbx_need_resp;
104 uint8_t msg[HNS3_MBX_MAX_MSG_SIZE];
107 struct hns3_mbx_pf_to_vf_cmd {
115 struct hns3_ring_chain_param {
118 uint8_t int_gl_index;
121 #define HNS3_MBX_MAX_RING_CHAIN_PARAM_NUM 4
122 struct hns3_vf_bind_vector_msg {
125 struct hns3_ring_chain_param param[HNS3_MBX_MAX_RING_CHAIN_PARAM_NUM];
128 struct hns3_vf_rst_cmd {
134 struct hns3_pf_rst_done_cmd {
139 #define HNS3_PF_RESET_DONE_BIT BIT(0)
141 /* used by VF to store the received Async responses from PF */
142 struct hns3_mbx_arq_ring {
143 #define HNS3_MBX_MAX_ARQ_MSG_SIZE 8
144 #define HNS3_MBX_MAX_ARQ_MSG_NUM 1024
148 uint16_t msg_q[HNS3_MBX_MAX_ARQ_MSG_NUM][HNS3_MBX_MAX_ARQ_MSG_SIZE];
151 #define hns3_mbx_ring_ptr_move_crq(crq) \
152 ((crq)->next_to_use = ((crq)->next_to_use + 1) % (crq)->desc_num)
153 #define hns3_mbx_tail_ptr_move_arq(arq) \
154 ((arq).tail = ((arq).tail + 1) % HNS3_MBX_MAX_ARQ_MSG_SIZE)
155 #define hns3_mbx_head_ptr_move_arq(arq) \
156 ((arq).head = ((arq).head + 1) % HNS3_MBX_MAX_ARQ_MSG_SIZE)
159 void hns3_dev_handle_mbx_msg(struct hns3_hw *hw);
160 int hns3_send_mbx_msg(struct hns3_hw *hw, uint16_t code, uint16_t subcode,
161 const uint8_t *msg_data, uint8_t msg_len, bool need_resp,
162 uint8_t *resp_data, uint16_t resp_len);
163 #endif /* _HNS3_MBX_H_ */