net/mlx5: fix E-Switch DV flow disabling
[dpdk.git] / drivers / net / hns3 / hns3_rss.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018-2021 HiSilicon Limited.
3  */
4
5 #include <rte_ethdev.h>
6 #include <rte_io.h>
7 #include <rte_malloc.h>
8
9 #include "hns3_ethdev.h"
10 #include "hns3_logs.h"
11
12 /*
13  * The hash key used for rss initialization.
14  */
15 static const uint8_t hns3_hash_key[] = {
16         0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2,
17         0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0,
18         0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4,
19         0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C,
20         0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA
21 };
22
23 enum hns3_tuple_field {
24         /* IPV4_TCP ENABLE FIELD */
25         HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_D = 0,
26         HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_S,
27         HNS3_RSS_FIELD_IPV4_TCP_EN_IP_D,
28         HNS3_RSS_FIELD_IPV4_TCP_EN_IP_S,
29
30         /* IPV4_UDP ENABLE FIELD */
31         HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_D = 8,
32         HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_S,
33         HNS3_RSS_FIELD_IPV4_UDP_EN_IP_D,
34         HNS3_RSS_FIELD_IPV4_UDP_EN_IP_S,
35
36         /* IPV4_SCTP ENABLE FIELD */
37         HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_D = 16,
38         HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_S,
39         HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_D,
40         HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_S,
41         HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_VER,
42
43         /* IPV4 ENABLE FIELD */
44         HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_D = 24,
45         HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_S,
46         HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_D,
47         HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_S,
48
49         /* IPV6_TCP ENABLE FIELD */
50         HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_D = 32,
51         HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_S,
52         HNS3_RSS_FIELD_IPV6_TCP_EN_IP_D,
53         HNS3_RSS_FIELD_IPV6_TCP_EN_IP_S,
54
55         /* IPV6_UDP ENABLE FIELD */
56         HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_D = 40,
57         HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_S,
58         HNS3_RSS_FIELD_IPV6_UDP_EN_IP_D,
59         HNS3_RSS_FIELD_IPV6_UDP_EN_IP_S,
60
61         /* IPV6_SCTP ENABLE FIELD */
62         HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D = 48,
63         HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S,
64         HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D,
65         HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S,
66         HNS3_RSS_FIELD_IPV6_SCTP_EN_SCTP_VER,
67
68         /* IPV6 ENABLE FIELD */
69         HNS3_RSS_FIELD_IPV6_NONFRAG_IP_D = 56,
70         HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S,
71         HNS3_RSS_FIELD_IPV6_FRAG_IP_D,
72         HNS3_RSS_FIELD_IPV6_FRAG_IP_S
73 };
74
75 static const struct {
76         uint64_t rss_types;
77         uint64_t rss_field;
78 } hns3_set_tuple_table[] = {
79         { RTE_ETH_RSS_FRAG_IPV4 | RTE_ETH_RSS_L3_SRC_ONLY,
80           BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_S) },
81         { RTE_ETH_RSS_FRAG_IPV4 | RTE_ETH_RSS_L3_DST_ONLY,
82           BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_D) },
83         { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L3_SRC_ONLY,
84           BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_S) },
85         { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L3_DST_ONLY,
86           BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_D) },
87         { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L4_SRC_ONLY,
88           BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_S) },
89         { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L4_DST_ONLY,
90           BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_D) },
91         { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L3_SRC_ONLY,
92           BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_S) },
93         { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L3_DST_ONLY,
94           BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_D) },
95         { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L4_SRC_ONLY,
96           BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_S) },
97         { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L4_DST_ONLY,
98           BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_D) },
99         { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L3_SRC_ONLY,
100           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_S) },
101         { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L3_DST_ONLY,
102           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_D) },
103         { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L4_SRC_ONLY,
104           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_S) },
105         { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L4_DST_ONLY,
106           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_D) },
107         { RTE_ETH_RSS_NONFRAG_IPV4_OTHER | RTE_ETH_RSS_L3_SRC_ONLY,
108           BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_S) },
109         { RTE_ETH_RSS_NONFRAG_IPV4_OTHER | RTE_ETH_RSS_L3_DST_ONLY,
110           BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_D) },
111         { RTE_ETH_RSS_FRAG_IPV6 | RTE_ETH_RSS_L3_SRC_ONLY,
112           BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_S) },
113         { RTE_ETH_RSS_FRAG_IPV6 | RTE_ETH_RSS_L3_DST_ONLY,
114           BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_D) },
115         { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L3_SRC_ONLY,
116           BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_S) },
117         { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L3_DST_ONLY,
118           BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_D) },
119         { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L4_SRC_ONLY,
120           BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_S) },
121         { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L4_DST_ONLY,
122           BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_D) },
123         { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L3_SRC_ONLY,
124           BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_S) },
125         { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L3_DST_ONLY,
126           BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_D) },
127         { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L4_SRC_ONLY,
128           BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_S) },
129         { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L4_DST_ONLY,
130           BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_D) },
131         { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L3_SRC_ONLY,
132           BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S) },
133         { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L3_DST_ONLY,
134           BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D) },
135         { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L4_SRC_ONLY,
136           BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S) },
137         { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L4_DST_ONLY,
138           BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D) },
139         { RTE_ETH_RSS_NONFRAG_IPV6_OTHER | RTE_ETH_RSS_L3_SRC_ONLY,
140           BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S) },
141         { RTE_ETH_RSS_NONFRAG_IPV6_OTHER | RTE_ETH_RSS_L3_DST_ONLY,
142           BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_D) },
143 };
144
145 static const struct {
146         uint64_t rss_types;
147         uint64_t rss_field;
148 } hns3_set_rss_types[] = {
149         { RTE_ETH_RSS_FRAG_IPV4, BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_D) |
150           BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_S) },
151         { RTE_ETH_RSS_NONFRAG_IPV4_TCP, BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_S) |
152           BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_D) |
153           BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_S) |
154           BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_D) },
155         { RTE_ETH_RSS_NONFRAG_IPV4_UDP, BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_S) |
156           BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_D) |
157           BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_S) |
158           BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_D) },
159         { RTE_ETH_RSS_NONFRAG_IPV4_SCTP, BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_S) |
160           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_D) |
161           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_S) |
162           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_D) |
163           BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_VER) },
164         { RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
165           BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_S) |
166           BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_D) },
167         { RTE_ETH_RSS_FRAG_IPV6, BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_S) |
168           BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_D) },
169         { RTE_ETH_RSS_NONFRAG_IPV6_TCP, BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_S) |
170           BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_D) |
171           BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_S) |
172           BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_D) },
173         { RTE_ETH_RSS_NONFRAG_IPV6_UDP, BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_S) |
174           BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_D) |
175           BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_S) |
176           BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_D) },
177         { RTE_ETH_RSS_NONFRAG_IPV6_SCTP, BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S) |
178           BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D) |
179           BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D) |
180           BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S) |
181           BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_SCTP_VER) },
182         { RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
183           BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S) |
184           BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_D) }
185 };
186
187 /*
188  * rss_generic_config command function, opcode:0x0D01.
189  * Used to set algorithm, key_offset and hash key of rss.
190  */
191 int
192 hns3_rss_set_algo_key(struct hns3_hw *hw, const uint8_t *key)
193 {
194 #define HNS3_KEY_OFFSET_MAX     3
195 #define HNS3_SET_HASH_KEY_BYTE_FOUR     2
196
197         struct hns3_rss_generic_config_cmd *req;
198         struct hns3_cmd_desc desc;
199         uint32_t key_offset, key_size;
200         const uint8_t *key_cur;
201         uint8_t cur_offset;
202         int ret;
203
204         req = (struct hns3_rss_generic_config_cmd *)desc.data;
205
206         /*
207          * key_offset=0, hash key byte0~15 is set to hardware.
208          * key_offset=1, hash key byte16~31 is set to hardware.
209          * key_offset=2, hash key byte32~39 is set to hardware.
210          */
211         for (key_offset = 0; key_offset < HNS3_KEY_OFFSET_MAX; key_offset++) {
212                 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_GENERIC_CONFIG,
213                                           false);
214
215                 req->hash_config |=
216                         (hw->rss_info.hash_algo & HNS3_RSS_HASH_ALGO_MASK);
217                 req->hash_config |= (key_offset << HNS3_RSS_HASH_KEY_OFFSET_B);
218
219                 if (key_offset == HNS3_SET_HASH_KEY_BYTE_FOUR)
220                         key_size = HNS3_RSS_KEY_SIZE - HNS3_RSS_HASH_KEY_NUM *
221                         HNS3_SET_HASH_KEY_BYTE_FOUR;
222                 else
223                         key_size = HNS3_RSS_HASH_KEY_NUM;
224
225                 cur_offset = key_offset * HNS3_RSS_HASH_KEY_NUM;
226                 key_cur = key + cur_offset;
227                 memcpy(req->hash_key, key_cur, key_size);
228
229                 ret = hns3_cmd_send(hw, &desc, 1);
230                 if (ret) {
231                         hns3_err(hw, "Configure RSS algo key failed %d", ret);
232                         return ret;
233                 }
234         }
235         /* Update the shadow RSS key with user specified */
236         memcpy(hw->rss_info.key, key, HNS3_RSS_KEY_SIZE);
237         return 0;
238 }
239
240 /*
241  * Used to configure the tuple selection for RSS hash input.
242  */
243 static int
244 hns3_rss_set_input_tuple(struct hns3_hw *hw)
245 {
246         struct hns3_rss_conf *rss_config = &hw->rss_info;
247         struct hns3_rss_input_tuple_cmd *req;
248         struct hns3_cmd_desc desc_tuple;
249         int ret;
250
251         hns3_cmd_setup_basic_desc(&desc_tuple, HNS3_OPC_RSS_INPUT_TUPLE, false);
252
253         req = (struct hns3_rss_input_tuple_cmd *)desc_tuple.data;
254
255         req->tuple_field =
256                 rte_cpu_to_le_64(rss_config->rss_tuple_sets.rss_tuple_fields);
257
258         ret = hns3_cmd_send(hw, &desc_tuple, 1);
259         if (ret)
260                 hns3_err(hw, "Configure RSS input tuple mode failed %d", ret);
261
262         return ret;
263 }
264
265 /*
266  * rss_indirection_table command function, opcode:0x0D07.
267  * Used to configure the indirection table of rss.
268  */
269 int
270 hns3_set_rss_indir_table(struct hns3_hw *hw, uint16_t *indir, uint16_t size)
271 {
272         struct hns3_rss_indirection_table_cmd *req;
273         struct hns3_cmd_desc desc;
274         uint8_t qid_msb_off;
275         uint8_t qid_msb_val;
276         uint16_t q_id;
277         uint16_t i, j;
278         int ret;
279
280         req = (struct hns3_rss_indirection_table_cmd *)desc.data;
281
282         for (i = 0; i < size / HNS3_RSS_CFG_TBL_SIZE; i++) {
283                 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_INDIR_TABLE,
284                                           false);
285                 req->start_table_index =
286                                 rte_cpu_to_le_16(i * HNS3_RSS_CFG_TBL_SIZE);
287                 req->rss_set_bitmap = rte_cpu_to_le_16(HNS3_RSS_SET_BITMAP_MSK);
288                 for (j = 0; j < HNS3_RSS_CFG_TBL_SIZE; j++) {
289                         q_id = indir[i * HNS3_RSS_CFG_TBL_SIZE + j];
290                         req->rss_result_l[j] = q_id & 0xff;
291
292                         qid_msb_off =
293                                 j * HNS3_RSS_CFG_TBL_BW_H / HNS3_BITS_PER_BYTE;
294                         qid_msb_val = (q_id >> HNS3_RSS_CFG_TBL_BW_L & 0x1)
295                                         << (j * HNS3_RSS_CFG_TBL_BW_H %
296                                         HNS3_BITS_PER_BYTE);
297                         req->rss_result_h[qid_msb_off] |= qid_msb_val;
298                 }
299
300                 ret = hns3_cmd_send(hw, &desc, 1);
301                 if (ret) {
302                         hns3_err(hw,
303                                  "Sets RSS indirection table failed %d size %u",
304                                  ret, size);
305                         return ret;
306                 }
307         }
308
309         /* Update redirection table of hw */
310         memcpy(hw->rss_info.rss_indirection_tbl, indir,
311                sizeof(uint16_t) * size);
312
313         return 0;
314 }
315
316 int
317 hns3_rss_reset_indir_table(struct hns3_hw *hw)
318 {
319         uint16_t *lut;
320         int ret;
321
322         lut = rte_zmalloc("hns3_rss_lut",
323                           hw->rss_ind_tbl_size * sizeof(uint16_t), 0);
324         if (lut == NULL) {
325                 hns3_err(hw, "No hns3_rss_lut memory can be allocated");
326                 return -ENOMEM;
327         }
328
329         ret = hns3_set_rss_indir_table(hw, lut, hw->rss_ind_tbl_size);
330         if (ret)
331                 hns3_err(hw, "RSS uninit indir table failed: %d", ret);
332         rte_free(lut);
333
334         return ret;
335 }
336
337 int
338 hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw,
339                              struct hns3_rss_tuple_cfg *tuple, uint64_t rss_hf)
340 {
341         struct hns3_rss_input_tuple_cmd *req;
342         struct hns3_cmd_desc desc;
343         uint32_t fields_count = 0; /* count times for setting tuple fields */
344         uint32_t i;
345         int ret;
346
347         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_INPUT_TUPLE, false);
348
349         req = (struct hns3_rss_input_tuple_cmd *)desc.data;
350
351         for (i = 0; i < RTE_DIM(hns3_set_tuple_table); i++) {
352                 if ((rss_hf & hns3_set_tuple_table[i].rss_types) ==
353                      hns3_set_tuple_table[i].rss_types) {
354                         req->tuple_field |=
355                             rte_cpu_to_le_64(hns3_set_tuple_table[i].rss_field);
356                         fields_count++;
357                 }
358         }
359
360         /*
361          * When user does not specify the following types or a combination of
362          * the following types, it enables all fields for the supported RSS
363          * types. the following types as:
364          * - RTE_ETH_RSS_L3_SRC_ONLY
365          * - RTE_ETH_RSS_L3_DST_ONLY
366          * - RTE_ETH_RSS_L4_SRC_ONLY
367          * - RTE_ETH_RSS_L4_DST_ONLY
368          */
369         if (fields_count == 0) {
370                 for (i = 0; i < RTE_DIM(hns3_set_rss_types); i++) {
371                         if ((rss_hf & hns3_set_rss_types[i].rss_types) ==
372                              hns3_set_rss_types[i].rss_types)
373                                 req->tuple_field |= rte_cpu_to_le_64(
374                                         hns3_set_rss_types[i].rss_field);
375                 }
376         }
377
378         ret = hns3_cmd_send(hw, &desc, 1);
379         if (ret) {
380                 hns3_err(hw, "Update RSS flow types tuples failed %d", ret);
381                 return ret;
382         }
383
384         tuple->rss_tuple_fields = rte_le_to_cpu_64(req->tuple_field);
385
386         return 0;
387 }
388
389 /*
390  * Configure RSS hash protocols and hash key.
391  * @param dev
392  *   Pointer to Ethernet device.
393  * @praram rss_conf
394  *   The configuration select of  rss key size and tuple flow_types.
395  * @return
396  *   0 on success, a negative errno value otherwise is set.
397  */
398 int
399 hns3_dev_rss_hash_update(struct rte_eth_dev *dev,
400                          struct rte_eth_rss_conf *rss_conf)
401 {
402         struct hns3_adapter *hns = dev->data->dev_private;
403         struct hns3_hw *hw = &hns->hw;
404         struct hns3_rss_tuple_cfg *tuple = &hw->rss_info.rss_tuple_sets;
405         struct hns3_rss_conf *rss_cfg = &hw->rss_info;
406         uint8_t key_len = rss_conf->rss_key_len;
407         uint64_t rss_hf = rss_conf->rss_hf;
408         uint8_t *key = rss_conf->rss_key;
409         int ret;
410
411         if (hw->rss_dis_flag)
412                 return -EINVAL;
413
414         rte_spinlock_lock(&hw->lock);
415         ret = hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_hf);
416         if (ret)
417                 goto conf_err;
418
419         if (rss_cfg->conf.types && rss_hf == 0) {
420                 /* Disable RSS, reset indirection table by local variable */
421                 ret = hns3_rss_reset_indir_table(hw);
422                 if (ret)
423                         goto conf_err;
424         } else if (rss_hf && rss_cfg->conf.types == 0) {
425                 /* Enable RSS, restore indirection table by hw's config */
426                 ret = hns3_set_rss_indir_table(hw, rss_cfg->rss_indirection_tbl,
427                                                hw->rss_ind_tbl_size);
428                 if (ret)
429                         goto conf_err;
430         }
431
432         /* Update supported flow types when set tuple success */
433         rss_cfg->conf.types = rss_hf;
434
435         if (key) {
436                 if (key_len != HNS3_RSS_KEY_SIZE) {
437                         hns3_err(hw, "The hash key len(%u) is invalid",
438                                  key_len);
439                         ret = -EINVAL;
440                         goto conf_err;
441                 }
442                 ret = hns3_rss_set_algo_key(hw, key);
443                 if (ret)
444                         goto conf_err;
445         }
446         rte_spinlock_unlock(&hw->lock);
447
448         return 0;
449
450 conf_err:
451         rte_spinlock_unlock(&hw->lock);
452         return ret;
453 }
454
455 /*
456  * Get rss key and rss_hf types set of RSS hash configuration.
457  * @param dev
458  *   Pointer to Ethernet device.
459  * @praram rss_conf
460  *   The buffer to get rss key size and tuple types.
461  * @return
462  *   0 on success.
463  */
464 int
465 hns3_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
466                            struct rte_eth_rss_conf *rss_conf)
467 {
468         struct hns3_adapter *hns = dev->data->dev_private;
469         struct hns3_hw *hw = &hns->hw;
470         struct hns3_rss_conf *rss_cfg = &hw->rss_info;
471
472         rte_spinlock_lock(&hw->lock);
473         rss_conf->rss_hf = rss_cfg->conf.types;
474
475         /* Get the RSS Key required by the user */
476         if (rss_conf->rss_key && rss_conf->rss_key_len >= HNS3_RSS_KEY_SIZE) {
477                 memcpy(rss_conf->rss_key, rss_cfg->key, HNS3_RSS_KEY_SIZE);
478                 rss_conf->rss_key_len = HNS3_RSS_KEY_SIZE;
479         }
480         rte_spinlock_unlock(&hw->lock);
481
482         return 0;
483 }
484
485 /*
486  * Update rss redirection table of RSS.
487  * @param dev
488  *   Pointer to Ethernet device.
489  * @praram reta_conf
490  *   Pointer to the configuration select of mask and redirection tables.
491  * @param reta_size
492  *   Redirection table size.
493  * @return
494  *   0 on success, a negative errno value otherwise is set.
495  */
496 int
497 hns3_dev_rss_reta_update(struct rte_eth_dev *dev,
498                          struct rte_eth_rss_reta_entry64 *reta_conf,
499                          uint16_t reta_size)
500 {
501         struct hns3_adapter *hns = dev->data->dev_private;
502         struct hns3_hw *hw = &hns->hw;
503         struct hns3_rss_conf *rss_cfg = &hw->rss_info;
504         uint16_t indirection_tbl[HNS3_RSS_IND_TBL_SIZE_MAX];
505         uint16_t idx, shift;
506         uint16_t i;
507         int ret;
508
509         if (reta_size != hw->rss_ind_tbl_size) {
510                 hns3_err(hw, "The size of hash lookup table configured (%u)"
511                          "doesn't match the number hardware can supported"
512                          "(%u)", reta_size, hw->rss_ind_tbl_size);
513                 return -EINVAL;
514         }
515         rte_spinlock_lock(&hw->lock);
516         memcpy(indirection_tbl, rss_cfg->rss_indirection_tbl,
517                sizeof(rss_cfg->rss_indirection_tbl));
518         for (i = 0; i < reta_size; i++) {
519                 idx = i / RTE_ETH_RETA_GROUP_SIZE;
520                 shift = i % RTE_ETH_RETA_GROUP_SIZE;
521                 if (reta_conf[idx].reta[shift] >= hw->alloc_rss_size) {
522                         rte_spinlock_unlock(&hw->lock);
523                         hns3_err(hw, "queue id(%u) set to redirection table "
524                                  "exceeds queue number(%u) allocated to a TC",
525                                  reta_conf[idx].reta[shift],
526                                  hw->alloc_rss_size);
527                         return -EINVAL;
528                 }
529
530                 if (reta_conf[idx].mask & (1ULL << shift))
531                         indirection_tbl[i] = reta_conf[idx].reta[shift];
532         }
533
534         ret = hns3_set_rss_indir_table(hw, indirection_tbl,
535                                        hw->rss_ind_tbl_size);
536
537         rte_spinlock_unlock(&hw->lock);
538         return ret;
539 }
540
541 /*
542  * Get rss redirection table of RSS hash configuration.
543  * @param dev
544  *   Pointer to Ethernet device.
545  * @praram reta_conf
546  *   Pointer to the configuration select of mask and redirection tables.
547  * @param reta_size
548  *   Redirection table size.
549  * @return
550  *   0 on success, a negative errno value otherwise is set.
551  */
552 int
553 hns3_dev_rss_reta_query(struct rte_eth_dev *dev,
554                         struct rte_eth_rss_reta_entry64 *reta_conf,
555                         uint16_t reta_size)
556 {
557         struct hns3_adapter *hns = dev->data->dev_private;
558         struct hns3_hw *hw = &hns->hw;
559         struct hns3_rss_conf *rss_cfg = &hw->rss_info;
560         uint16_t idx, shift;
561         uint16_t i;
562
563         if (reta_size != hw->rss_ind_tbl_size) {
564                 hns3_err(hw, "The size of hash lookup table configured (%u)"
565                          " doesn't match the number hardware can supported"
566                          "(%u)", reta_size, hw->rss_ind_tbl_size);
567                 return -EINVAL;
568         }
569         rte_spinlock_lock(&hw->lock);
570         for (i = 0; i < reta_size; i++) {
571                 idx = i / RTE_ETH_RETA_GROUP_SIZE;
572                 shift = i % RTE_ETH_RETA_GROUP_SIZE;
573                 if (reta_conf[idx].mask & (1ULL << shift))
574                         reta_conf[idx].reta[shift] =
575                                                 rss_cfg->rss_indirection_tbl[i];
576         }
577         rte_spinlock_unlock(&hw->lock);
578         return 0;
579 }
580
581 static void
582 hns3_set_rss_tc_mode_entry(struct hns3_hw *hw, uint8_t *tc_valid,
583                            uint16_t *tc_size, uint16_t *tc_offset,
584                            uint8_t tc_num)
585 {
586         struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
587         uint16_t rss_size = hw->alloc_rss_size;
588         uint16_t roundup_size;
589         uint16_t i;
590
591         roundup_size = roundup_pow_of_two(rss_size);
592         roundup_size = ilog2(roundup_size);
593
594         for (i = 0; i < tc_num; i++) {
595                 if (hns->is_vf) {
596                         /*
597                          * For packets with VLAN priorities destined for the VF,
598                          * hardware still assign Rx queue based on the Up-to-TC
599                          * mapping PF configured. But VF has only one TC. If
600                          * other TC don't enable, it causes that the priority
601                          * packets that aren't destined for TC0 aren't received
602                          * by RSS hash but is destined for queue 0. So driver
603                          * has to enable the unused TC by using TC0 queue
604                          * mapping configuration.
605                          */
606                         tc_valid[i] = (hw->hw_tc_map & BIT(i)) ?
607                                         !!(hw->hw_tc_map & BIT(i)) : 1;
608                         tc_size[i] = roundup_size;
609                         tc_offset[i] = (hw->hw_tc_map & BIT(i)) ?
610                                         rss_size * i : 0;
611                 } else {
612                         tc_valid[i] = !!(hw->hw_tc_map & BIT(i));
613                         tc_size[i] = tc_valid[i] ? roundup_size : 0;
614                         tc_offset[i] = tc_valid[i] ? rss_size * i : 0;
615                 }
616         }
617 }
618
619 static int
620 hns3_set_rss_tc_mode(struct hns3_hw *hw)
621 {
622         struct hns3_rss_tc_mode_cmd *req;
623         uint16_t tc_offset[HNS3_MAX_TC_NUM];
624         uint8_t tc_valid[HNS3_MAX_TC_NUM];
625         uint16_t tc_size[HNS3_MAX_TC_NUM];
626         struct hns3_cmd_desc desc;
627         uint16_t i;
628         int ret;
629
630         hns3_set_rss_tc_mode_entry(hw, tc_valid, tc_size,
631                                    tc_offset, HNS3_MAX_TC_NUM);
632
633         req = (struct hns3_rss_tc_mode_cmd *)desc.data;
634         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_TC_MODE, false);
635         for (i = 0; i < HNS3_MAX_TC_NUM; i++) {
636                 uint16_t mode = 0;
637
638                 hns3_set_bit(mode, HNS3_RSS_TC_VALID_B, (tc_valid[i] & 0x1));
639                 hns3_set_field(mode, HNS3_RSS_TC_SIZE_M, HNS3_RSS_TC_SIZE_S,
640                                tc_size[i]);
641                 if (tc_size[i] >> HNS3_RSS_TC_SIZE_MSB_OFFSET > 0)
642                         hns3_set_bit(mode, HNS3_RSS_TC_SIZE_MSB_S, 1);
643                 hns3_set_field(mode, HNS3_RSS_TC_OFFSET_M, HNS3_RSS_TC_OFFSET_S,
644                                tc_offset[i]);
645
646                 req->rss_tc_mode[i] = rte_cpu_to_le_16(mode);
647         }
648         ret = hns3_cmd_send(hw, &desc, 1);
649         if (ret)
650                 hns3_err(hw, "Sets rss tc mode failed %d", ret);
651
652         return ret;
653 }
654
655 static void
656 hns3_rss_tuple_uninit(struct hns3_hw *hw)
657 {
658         struct hns3_cmd_desc desc;
659         int ret;
660
661         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_INPUT_TUPLE, false);
662
663         ret = hns3_cmd_send(hw, &desc, 1);
664         if (ret) {
665                 hns3_err(hw, "RSS uninit tuple failed %d", ret);
666                 return;
667         }
668 }
669
670 /*
671  * Set the default rss configuration in the init of driver.
672  */
673 void
674 hns3_rss_set_default_args(struct hns3_hw *hw)
675 {
676         struct hns3_rss_conf *rss_cfg = &hw->rss_info;
677         uint16_t queue_num = hw->alloc_rss_size;
678         int i;
679
680         /* Default hash algorithm */
681         rss_cfg->conf.func = RTE_ETH_HASH_FUNCTION_TOEPLITZ;
682
683         /* Default RSS key */
684         memcpy(rss_cfg->key, hns3_hash_key, HNS3_RSS_KEY_SIZE);
685
686         /* Initialize RSS indirection table */
687         for (i = 0; i < hw->rss_ind_tbl_size; i++)
688                 rss_cfg->rss_indirection_tbl[i] = i % queue_num;
689 }
690
691 /*
692  * RSS initialization for hns3 PMD.
693  */
694 int
695 hns3_config_rss(struct hns3_adapter *hns)
696 {
697         struct hns3_hw *hw = &hns->hw;
698         struct hns3_rss_conf *rss_cfg = &hw->rss_info;
699         uint8_t *hash_key = rss_cfg->key;
700         int ret, ret1;
701
702         enum rte_eth_rx_mq_mode mq_mode = hw->data->dev_conf.rxmode.mq_mode;
703
704         switch (hw->rss_info.conf.func) {
705         case RTE_ETH_HASH_FUNCTION_SIMPLE_XOR:
706                 hw->rss_info.hash_algo = HNS3_RSS_HASH_ALGO_SIMPLE;
707                 break;
708         case RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ:
709                 hw->rss_info.hash_algo = HNS3_RSS_HASH_ALGO_SYMMETRIC_TOEP;
710                 break;
711         default:
712                 hw->rss_info.hash_algo = HNS3_RSS_HASH_ALGO_TOEPLITZ;
713                 break;
714         }
715
716         /* When RSS is off, redirect the packet queue 0 */
717         if (((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) == 0)
718                 hns3_rss_uninit(hns);
719
720         /* Configure RSS hash algorithm and hash key offset */
721         ret = hns3_rss_set_algo_key(hw, hash_key);
722         if (ret)
723                 return ret;
724
725         /* Configure the tuple selection for RSS hash input */
726         ret = hns3_rss_set_input_tuple(hw);
727         if (ret)
728                 return ret;
729
730         /*
731          * When RSS is off, it doesn't need to configure rss redirection table
732          * to hardware.
733          */
734         if (((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) {
735                 ret = hns3_set_rss_indir_table(hw, rss_cfg->rss_indirection_tbl,
736                                                hw->rss_ind_tbl_size);
737                 if (ret)
738                         goto rss_tuple_uninit;
739         }
740
741         ret = hns3_set_rss_tc_mode(hw);
742         if (ret)
743                 goto rss_indir_table_uninit;
744
745         return ret;
746
747 rss_indir_table_uninit:
748         if (((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) {
749                 ret1 = hns3_rss_reset_indir_table(hw);
750                 if (ret1 != 0)
751                         return ret;
752         }
753
754 rss_tuple_uninit:
755         hns3_rss_tuple_uninit(hw);
756
757         /* Disable RSS */
758         hw->rss_info.conf.types = 0;
759
760         return ret;
761 }
762
763 /*
764  * RSS uninitialization for hns3 PMD.
765  */
766 void
767 hns3_rss_uninit(struct hns3_adapter *hns)
768 {
769         struct hns3_hw *hw = &hns->hw;
770         int ret;
771
772         hns3_rss_tuple_uninit(hw);
773         ret = hns3_rss_reset_indir_table(hw);
774         if (ret != 0)
775                 return;
776
777         /* Disable RSS */
778         hw->rss_info.conf.types = 0;
779 }