1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2021 HiSilicon Limited.
5 #include <rte_ethdev.h>
7 #include <rte_malloc.h>
9 #include "hns3_ethdev.h"
10 #include "hns3_logs.h"
13 * The hash key used for rss initialization.
15 static const uint8_t hns3_hash_key[] = {
16 0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2,
17 0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0,
18 0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4,
19 0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C,
20 0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA
23 enum hns3_tuple_field {
24 /* IPV4_TCP ENABLE FIELD */
25 HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_D = 0,
26 HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_S,
27 HNS3_RSS_FIELD_IPV4_TCP_EN_IP_D,
28 HNS3_RSS_FIELD_IPV4_TCP_EN_IP_S,
30 /* IPV4_UDP ENABLE FIELD */
31 HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_D = 8,
32 HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_S,
33 HNS3_RSS_FIELD_IPV4_UDP_EN_IP_D,
34 HNS3_RSS_FIELD_IPV4_UDP_EN_IP_S,
36 /* IPV4_SCTP ENABLE FIELD */
37 HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_D = 16,
38 HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_S,
39 HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_D,
40 HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_S,
41 HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_VER,
43 /* IPV4 ENABLE FIELD */
44 HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_D = 24,
45 HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_S,
46 HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_D,
47 HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_S,
49 /* IPV6_TCP ENABLE FIELD */
50 HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_D = 32,
51 HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_S,
52 HNS3_RSS_FIELD_IPV6_TCP_EN_IP_D,
53 HNS3_RSS_FIELD_IPV6_TCP_EN_IP_S,
55 /* IPV6_UDP ENABLE FIELD */
56 HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_D = 40,
57 HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_S,
58 HNS3_RSS_FIELD_IPV6_UDP_EN_IP_D,
59 HNS3_RSS_FIELD_IPV6_UDP_EN_IP_S,
61 /* IPV6_SCTP ENABLE FIELD */
62 HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D = 48,
63 HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S,
64 HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D,
65 HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S,
66 HNS3_RSS_FIELD_IPV6_SCTP_EN_SCTP_VER,
68 /* IPV6 ENABLE FIELD */
69 HNS3_RSS_FIELD_IPV6_NONFRAG_IP_D = 56,
70 HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S,
71 HNS3_RSS_FIELD_IPV6_FRAG_IP_D,
72 HNS3_RSS_FIELD_IPV6_FRAG_IP_S
78 } hns3_set_tuple_table[] = {
79 { RTE_ETH_RSS_FRAG_IPV4 | RTE_ETH_RSS_L3_SRC_ONLY,
80 BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_S) },
81 { RTE_ETH_RSS_FRAG_IPV4 | RTE_ETH_RSS_L3_DST_ONLY,
82 BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_D) },
83 { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L3_SRC_ONLY,
84 BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_S) },
85 { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L3_DST_ONLY,
86 BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_D) },
87 { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L4_SRC_ONLY,
88 BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_S) },
89 { RTE_ETH_RSS_NONFRAG_IPV4_TCP | RTE_ETH_RSS_L4_DST_ONLY,
90 BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_D) },
91 { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L3_SRC_ONLY,
92 BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_S) },
93 { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L3_DST_ONLY,
94 BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_D) },
95 { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L4_SRC_ONLY,
96 BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_S) },
97 { RTE_ETH_RSS_NONFRAG_IPV4_UDP | RTE_ETH_RSS_L4_DST_ONLY,
98 BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_D) },
99 { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L3_SRC_ONLY,
100 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_S) },
101 { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L3_DST_ONLY,
102 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_D) },
103 { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L4_SRC_ONLY,
104 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_S) },
105 { RTE_ETH_RSS_NONFRAG_IPV4_SCTP | RTE_ETH_RSS_L4_DST_ONLY,
106 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_D) },
107 { RTE_ETH_RSS_NONFRAG_IPV4_OTHER | RTE_ETH_RSS_L3_SRC_ONLY,
108 BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_S) },
109 { RTE_ETH_RSS_NONFRAG_IPV4_OTHER | RTE_ETH_RSS_L3_DST_ONLY,
110 BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_D) },
111 { RTE_ETH_RSS_FRAG_IPV6 | RTE_ETH_RSS_L3_SRC_ONLY,
112 BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_S) },
113 { RTE_ETH_RSS_FRAG_IPV6 | RTE_ETH_RSS_L3_DST_ONLY,
114 BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_D) },
115 { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L3_SRC_ONLY,
116 BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_S) },
117 { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L3_DST_ONLY,
118 BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_D) },
119 { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L4_SRC_ONLY,
120 BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_S) },
121 { RTE_ETH_RSS_NONFRAG_IPV6_TCP | RTE_ETH_RSS_L4_DST_ONLY,
122 BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_D) },
123 { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L3_SRC_ONLY,
124 BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_S) },
125 { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L3_DST_ONLY,
126 BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_D) },
127 { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L4_SRC_ONLY,
128 BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_S) },
129 { RTE_ETH_RSS_NONFRAG_IPV6_UDP | RTE_ETH_RSS_L4_DST_ONLY,
130 BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_D) },
131 { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L3_SRC_ONLY,
132 BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S) },
133 { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L3_DST_ONLY,
134 BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D) },
135 { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L4_SRC_ONLY,
136 BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S) },
137 { RTE_ETH_RSS_NONFRAG_IPV6_SCTP | RTE_ETH_RSS_L4_DST_ONLY,
138 BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D) },
139 { RTE_ETH_RSS_NONFRAG_IPV6_OTHER | RTE_ETH_RSS_L3_SRC_ONLY,
140 BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S) },
141 { RTE_ETH_RSS_NONFRAG_IPV6_OTHER | RTE_ETH_RSS_L3_DST_ONLY,
142 BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_D) },
145 static const struct {
148 } hns3_set_rss_types[] = {
149 { RTE_ETH_RSS_FRAG_IPV4, BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_D) |
150 BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_FRAG_IP_S) },
151 { RTE_ETH_RSS_NONFRAG_IPV4_TCP, BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_S) |
152 BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_IP_D) |
153 BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_S) |
154 BIT_ULL(HNS3_RSS_FIELD_IPV4_TCP_EN_TCP_D) },
155 { RTE_ETH_RSS_NONFRAG_IPV4_UDP, BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_S) |
156 BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_IP_D) |
157 BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_S) |
158 BIT_ULL(HNS3_RSS_FIELD_IPV4_UDP_EN_UDP_D) },
159 { RTE_ETH_RSS_NONFRAG_IPV4_SCTP, BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_S) |
160 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_IP_D) |
161 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_S) |
162 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_D) |
163 BIT_ULL(HNS3_RSS_FIELD_IPV4_SCTP_EN_SCTP_VER) },
164 { RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
165 BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_S) |
166 BIT_ULL(HNS3_RSS_FIELD_IPV4_EN_NONFRAG_IP_D) },
167 { RTE_ETH_RSS_FRAG_IPV6, BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_S) |
168 BIT_ULL(HNS3_RSS_FIELD_IPV6_FRAG_IP_D) },
169 { RTE_ETH_RSS_NONFRAG_IPV6_TCP, BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_S) |
170 BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_IP_D) |
171 BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_S) |
172 BIT_ULL(HNS3_RSS_FIELD_IPV6_TCP_EN_TCP_D) },
173 { RTE_ETH_RSS_NONFRAG_IPV6_UDP, BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_S) |
174 BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_IP_D) |
175 BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_S) |
176 BIT_ULL(HNS3_RSS_FIELD_IPV6_UDP_EN_UDP_D) },
177 { RTE_ETH_RSS_NONFRAG_IPV6_SCTP, BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_S) |
178 BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_IP_D) |
179 BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_D) |
180 BIT_ULL(HNS3_RSS_FILED_IPV6_SCTP_EN_SCTP_S) |
181 BIT_ULL(HNS3_RSS_FIELD_IPV6_SCTP_EN_SCTP_VER) },
182 { RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
183 BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_S) |
184 BIT_ULL(HNS3_RSS_FIELD_IPV6_NONFRAG_IP_D) }
188 * rss_generic_config command function, opcode:0x0D01.
189 * Used to set algorithm, key_offset and hash key of rss.
192 hns3_rss_set_algo_key(struct hns3_hw *hw, const uint8_t *key)
194 #define HNS3_KEY_OFFSET_MAX 3
195 #define HNS3_SET_HASH_KEY_BYTE_FOUR 2
197 struct hns3_rss_generic_config_cmd *req;
198 struct hns3_cmd_desc desc;
199 uint32_t key_offset, key_size;
200 const uint8_t *key_cur;
204 req = (struct hns3_rss_generic_config_cmd *)desc.data;
207 * key_offset=0, hash key byte0~15 is set to hardware.
208 * key_offset=1, hash key byte16~31 is set to hardware.
209 * key_offset=2, hash key byte32~39 is set to hardware.
211 for (key_offset = 0; key_offset < HNS3_KEY_OFFSET_MAX; key_offset++) {
212 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_GENERIC_CONFIG,
216 (hw->rss_info.hash_algo & HNS3_RSS_HASH_ALGO_MASK);
217 req->hash_config |= (key_offset << HNS3_RSS_HASH_KEY_OFFSET_B);
219 if (key_offset == HNS3_SET_HASH_KEY_BYTE_FOUR)
220 key_size = HNS3_RSS_KEY_SIZE - HNS3_RSS_HASH_KEY_NUM *
221 HNS3_SET_HASH_KEY_BYTE_FOUR;
223 key_size = HNS3_RSS_HASH_KEY_NUM;
225 cur_offset = key_offset * HNS3_RSS_HASH_KEY_NUM;
226 key_cur = key + cur_offset;
227 memcpy(req->hash_key, key_cur, key_size);
229 ret = hns3_cmd_send(hw, &desc, 1);
231 hns3_err(hw, "Configure RSS algo key failed %d", ret);
235 /* Update the shadow RSS key with user specified */
236 memcpy(hw->rss_info.key, key, HNS3_RSS_KEY_SIZE);
241 * rss_indirection_table command function, opcode:0x0D07.
242 * Used to configure the indirection table of rss.
245 hns3_set_rss_indir_table(struct hns3_hw *hw, uint16_t *indir, uint16_t size)
247 struct hns3_rss_indirection_table_cmd *req;
248 struct hns3_cmd_desc desc;
255 req = (struct hns3_rss_indirection_table_cmd *)desc.data;
257 for (i = 0; i < size / HNS3_RSS_CFG_TBL_SIZE; i++) {
258 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_INDIR_TABLE,
260 req->start_table_index =
261 rte_cpu_to_le_16(i * HNS3_RSS_CFG_TBL_SIZE);
262 req->rss_set_bitmap = rte_cpu_to_le_16(HNS3_RSS_SET_BITMAP_MSK);
263 for (j = 0; j < HNS3_RSS_CFG_TBL_SIZE; j++) {
264 q_id = indir[i * HNS3_RSS_CFG_TBL_SIZE + j];
265 req->rss_result_l[j] = q_id & 0xff;
268 j * HNS3_RSS_CFG_TBL_BW_H / HNS3_BITS_PER_BYTE;
269 qid_msb_val = (q_id >> HNS3_RSS_CFG_TBL_BW_L & 0x1)
270 << (j * HNS3_RSS_CFG_TBL_BW_H %
272 req->rss_result_h[qid_msb_off] |= qid_msb_val;
275 ret = hns3_cmd_send(hw, &desc, 1);
278 "Sets RSS indirection table failed %d size %u",
284 /* Update redirection table of hw */
285 memcpy(hw->rss_info.rss_indirection_tbl, indir,
286 sizeof(uint16_t) * size);
292 hns3_rss_reset_indir_table(struct hns3_hw *hw)
297 lut = rte_zmalloc("hns3_rss_lut",
298 hw->rss_ind_tbl_size * sizeof(uint16_t), 0);
300 hns3_err(hw, "No hns3_rss_lut memory can be allocated");
304 ret = hns3_set_rss_indir_table(hw, lut, hw->rss_ind_tbl_size);
306 hns3_err(hw, "RSS uninit indir table failed: %d", ret);
313 hns3_set_rss_tuple_by_rss_hf(struct hns3_hw *hw,
314 struct hns3_rss_tuple_cfg *tuple, uint64_t rss_hf)
316 struct hns3_rss_input_tuple_cmd *req;
317 struct hns3_cmd_desc desc;
318 uint32_t fields_count = 0; /* count times for setting tuple fields */
322 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_INPUT_TUPLE, false);
324 req = (struct hns3_rss_input_tuple_cmd *)desc.data;
326 for (i = 0; i < RTE_DIM(hns3_set_tuple_table); i++) {
327 if ((rss_hf & hns3_set_tuple_table[i].rss_types) ==
328 hns3_set_tuple_table[i].rss_types) {
330 rte_cpu_to_le_64(hns3_set_tuple_table[i].rss_field);
336 * When user does not specify the following types or a combination of
337 * the following types, it enables all fields for the supported RSS
338 * types. the following types as:
339 * - RTE_ETH_RSS_L3_SRC_ONLY
340 * - RTE_ETH_RSS_L3_DST_ONLY
341 * - RTE_ETH_RSS_L4_SRC_ONLY
342 * - RTE_ETH_RSS_L4_DST_ONLY
344 if (fields_count == 0) {
345 for (i = 0; i < RTE_DIM(hns3_set_rss_types); i++) {
346 if ((rss_hf & hns3_set_rss_types[i].rss_types) ==
347 hns3_set_rss_types[i].rss_types)
348 req->tuple_field |= rte_cpu_to_le_64(
349 hns3_set_rss_types[i].rss_field);
353 ret = hns3_cmd_send(hw, &desc, 1);
355 hns3_err(hw, "Update RSS flow types tuples failed %d", ret);
359 tuple->rss_tuple_fields = rte_le_to_cpu_64(req->tuple_field);
360 /* Update supported flow types when set tuple success */
361 hw->rss_info.conf.types = rss_hf;
367 * Configure RSS hash protocols and hash key.
369 * Pointer to Ethernet device.
371 * The configuration select of rss key size and tuple flow_types.
373 * 0 on success, a negative errno value otherwise is set.
376 hns3_dev_rss_hash_update(struct rte_eth_dev *dev,
377 struct rte_eth_rss_conf *rss_conf)
379 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
380 struct hns3_rss_tuple_cfg *tuple = &hw->rss_info.rss_tuple_sets;
381 uint64_t rss_hf_bk = hw->rss_info.conf.types;
382 uint8_t key_len = rss_conf->rss_key_len;
383 uint64_t rss_hf = rss_conf->rss_hf;
384 uint8_t *key = rss_conf->rss_key;
387 if (hw->rss_dis_flag)
390 if (key && key_len != HNS3_RSS_KEY_SIZE) {
391 hns3_err(hw, "the hash key len(%u) is invalid, must be %u",
392 key_len, HNS3_RSS_KEY_SIZE);
396 rte_spinlock_lock(&hw->lock);
397 ret = hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_hf);
402 ret = hns3_rss_set_algo_key(hw, key);
404 goto set_algo_key_fail;
406 rte_spinlock_unlock(&hw->lock);
411 (void)hns3_set_rss_tuple_by_rss_hf(hw, tuple, rss_hf_bk);
413 rte_spinlock_unlock(&hw->lock);
418 * Get rss key and rss_hf types set of RSS hash configuration.
420 * Pointer to Ethernet device.
422 * The buffer to get rss key size and tuple types.
427 hns3_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
428 struct rte_eth_rss_conf *rss_conf)
430 struct hns3_adapter *hns = dev->data->dev_private;
431 struct hns3_hw *hw = &hns->hw;
432 struct hns3_rss_conf *rss_cfg = &hw->rss_info;
434 rte_spinlock_lock(&hw->lock);
435 rss_conf->rss_hf = rss_cfg->conf.types;
437 /* Get the RSS Key required by the user */
438 if (rss_conf->rss_key && rss_conf->rss_key_len >= HNS3_RSS_KEY_SIZE) {
439 memcpy(rss_conf->rss_key, rss_cfg->key, HNS3_RSS_KEY_SIZE);
440 rss_conf->rss_key_len = HNS3_RSS_KEY_SIZE;
442 rte_spinlock_unlock(&hw->lock);
448 * Update rss redirection table of RSS.
450 * Pointer to Ethernet device.
452 * Pointer to the configuration select of mask and redirection tables.
454 * Redirection table size.
456 * 0 on success, a negative errno value otherwise is set.
459 hns3_dev_rss_reta_update(struct rte_eth_dev *dev,
460 struct rte_eth_rss_reta_entry64 *reta_conf,
463 struct hns3_adapter *hns = dev->data->dev_private;
464 struct hns3_hw *hw = &hns->hw;
465 struct hns3_rss_conf *rss_cfg = &hw->rss_info;
466 uint16_t indirection_tbl[HNS3_RSS_IND_TBL_SIZE_MAX];
471 if (reta_size != hw->rss_ind_tbl_size) {
472 hns3_err(hw, "The size of hash lookup table configured (%u)"
473 "doesn't match the number hardware can supported"
474 "(%u)", reta_size, hw->rss_ind_tbl_size);
477 rte_spinlock_lock(&hw->lock);
478 memcpy(indirection_tbl, rss_cfg->rss_indirection_tbl,
479 sizeof(rss_cfg->rss_indirection_tbl));
480 for (i = 0; i < reta_size; i++) {
481 idx = i / RTE_ETH_RETA_GROUP_SIZE;
482 shift = i % RTE_ETH_RETA_GROUP_SIZE;
483 if (reta_conf[idx].reta[shift] >= hw->alloc_rss_size) {
484 rte_spinlock_unlock(&hw->lock);
485 hns3_err(hw, "queue id(%u) set to redirection table "
486 "exceeds queue number(%u) allocated to a TC",
487 reta_conf[idx].reta[shift],
492 if (reta_conf[idx].mask & (1ULL << shift))
493 indirection_tbl[i] = reta_conf[idx].reta[shift];
496 ret = hns3_set_rss_indir_table(hw, indirection_tbl,
497 hw->rss_ind_tbl_size);
499 rte_spinlock_unlock(&hw->lock);
504 * Get rss redirection table of RSS hash configuration.
506 * Pointer to Ethernet device.
508 * Pointer to the configuration select of mask and redirection tables.
510 * Redirection table size.
512 * 0 on success, a negative errno value otherwise is set.
515 hns3_dev_rss_reta_query(struct rte_eth_dev *dev,
516 struct rte_eth_rss_reta_entry64 *reta_conf,
519 struct hns3_adapter *hns = dev->data->dev_private;
520 struct hns3_hw *hw = &hns->hw;
521 struct hns3_rss_conf *rss_cfg = &hw->rss_info;
525 if (reta_size != hw->rss_ind_tbl_size) {
526 hns3_err(hw, "The size of hash lookup table configured (%u)"
527 " doesn't match the number hardware can supported"
528 "(%u)", reta_size, hw->rss_ind_tbl_size);
531 rte_spinlock_lock(&hw->lock);
532 for (i = 0; i < reta_size; i++) {
533 idx = i / RTE_ETH_RETA_GROUP_SIZE;
534 shift = i % RTE_ETH_RETA_GROUP_SIZE;
535 if (reta_conf[idx].mask & (1ULL << shift))
536 reta_conf[idx].reta[shift] =
537 rss_cfg->rss_indirection_tbl[i];
539 rte_spinlock_unlock(&hw->lock);
544 hns3_set_rss_tc_mode_entry(struct hns3_hw *hw, uint8_t *tc_valid,
545 uint16_t *tc_size, uint16_t *tc_offset,
548 struct hns3_adapter *hns = HNS3_DEV_HW_TO_ADAPTER(hw);
549 uint16_t rss_size = hw->alloc_rss_size;
550 uint16_t roundup_size;
553 roundup_size = roundup_pow_of_two(rss_size);
554 roundup_size = ilog2(roundup_size);
556 for (i = 0; i < tc_num; i++) {
559 * For packets with VLAN priorities destined for the VF,
560 * hardware still assign Rx queue based on the Up-to-TC
561 * mapping PF configured. But VF has only one TC. If
562 * other TC don't enable, it causes that the priority
563 * packets that aren't destined for TC0 aren't received
564 * by RSS hash but is destined for queue 0. So driver
565 * has to enable the unused TC by using TC0 queue
566 * mapping configuration.
568 tc_valid[i] = (hw->hw_tc_map & BIT(i)) ?
569 !!(hw->hw_tc_map & BIT(i)) : 1;
570 tc_size[i] = roundup_size;
571 tc_offset[i] = (hw->hw_tc_map & BIT(i)) ?
574 tc_valid[i] = !!(hw->hw_tc_map & BIT(i));
575 tc_size[i] = tc_valid[i] ? roundup_size : 0;
576 tc_offset[i] = tc_valid[i] ? rss_size * i : 0;
582 hns3_set_rss_tc_mode(struct hns3_hw *hw)
584 struct hns3_rss_tc_mode_cmd *req;
585 uint16_t tc_offset[HNS3_MAX_TC_NUM];
586 uint8_t tc_valid[HNS3_MAX_TC_NUM];
587 uint16_t tc_size[HNS3_MAX_TC_NUM];
588 struct hns3_cmd_desc desc;
592 hns3_set_rss_tc_mode_entry(hw, tc_valid, tc_size,
593 tc_offset, HNS3_MAX_TC_NUM);
595 req = (struct hns3_rss_tc_mode_cmd *)desc.data;
596 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_TC_MODE, false);
597 for (i = 0; i < HNS3_MAX_TC_NUM; i++) {
600 hns3_set_bit(mode, HNS3_RSS_TC_VALID_B, (tc_valid[i] & 0x1));
601 hns3_set_field(mode, HNS3_RSS_TC_SIZE_M, HNS3_RSS_TC_SIZE_S,
603 if (tc_size[i] >> HNS3_RSS_TC_SIZE_MSB_OFFSET > 0)
604 hns3_set_bit(mode, HNS3_RSS_TC_SIZE_MSB_S, 1);
605 hns3_set_field(mode, HNS3_RSS_TC_OFFSET_M, HNS3_RSS_TC_OFFSET_S,
608 req->rss_tc_mode[i] = rte_cpu_to_le_16(mode);
610 ret = hns3_cmd_send(hw, &desc, 1);
612 hns3_err(hw, "Sets rss tc mode failed %d", ret);
618 hns3_rss_tuple_uninit(struct hns3_hw *hw)
620 struct hns3_cmd_desc desc;
623 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_RSS_INPUT_TUPLE, false);
625 ret = hns3_cmd_send(hw, &desc, 1);
627 hns3_err(hw, "RSS uninit tuple failed %d", ret);
633 * Set the default rss configuration in the init of driver.
636 hns3_rss_set_default_args(struct hns3_hw *hw)
638 struct hns3_rss_conf *rss_cfg = &hw->rss_info;
639 uint16_t queue_num = hw->alloc_rss_size;
642 /* Default hash algorithm */
643 rss_cfg->conf.func = RTE_ETH_HASH_FUNCTION_TOEPLITZ;
645 /* Default RSS key */
646 memcpy(rss_cfg->key, hns3_hash_key, HNS3_RSS_KEY_SIZE);
648 /* Initialize RSS indirection table */
649 for (i = 0; i < hw->rss_ind_tbl_size; i++)
650 rss_cfg->rss_indirection_tbl[i] = i % queue_num;
654 * RSS initialization for hns3 PMD.
657 hns3_config_rss(struct hns3_adapter *hns)
659 struct hns3_hw *hw = &hns->hw;
660 struct hns3_rss_conf *rss_cfg = &hw->rss_info;
661 uint8_t *hash_key = rss_cfg->key;
665 enum rte_eth_rx_mq_mode mq_mode = hw->data->dev_conf.rxmode.mq_mode;
667 switch (hw->rss_info.conf.func) {
668 case RTE_ETH_HASH_FUNCTION_SIMPLE_XOR:
669 hw->rss_info.hash_algo = HNS3_RSS_HASH_ALGO_SIMPLE;
671 case RTE_ETH_HASH_FUNCTION_SYMMETRIC_TOEPLITZ:
672 hw->rss_info.hash_algo = HNS3_RSS_HASH_ALGO_SYMMETRIC_TOEP;
675 hw->rss_info.hash_algo = HNS3_RSS_HASH_ALGO_TOEPLITZ;
679 /* Configure RSS hash algorithm and hash key offset */
680 ret = hns3_rss_set_algo_key(hw, hash_key);
684 ret = hns3_set_rss_indir_table(hw, rss_cfg->rss_indirection_tbl,
685 hw->rss_ind_tbl_size);
689 ret = hns3_set_rss_tc_mode(hw);
694 * When muli-queue RSS mode flag is not set or unsupported tuples are
695 * set, disable all tuples.
697 rss_hf = hw->rss_info.conf.types;
698 if (!((uint32_t)mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) ||
699 !(rss_hf & HNS3_ETH_RSS_SUPPORT))
702 return hns3_set_rss_tuple_by_rss_hf(hw, &hw->rss_info.rss_tuple_sets,
707 * RSS uninitialization for hns3 PMD.
710 hns3_rss_uninit(struct hns3_adapter *hns)
712 struct hns3_hw *hw = &hns->hw;
715 hns3_rss_tuple_uninit(hw);
716 ret = hns3_rss_reset_indir_table(hw);
721 hw->rss_info.conf.types = 0;