1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2019 Hisilicon Limited.
7 #include <rte_common.h>
8 #include <rte_ethdev.h>
10 #include <rte_malloc.h>
11 #include <rte_spinlock.h>
13 #include "hns3_ethdev.h"
14 #include "hns3_rxtx.h"
15 #include "hns3_logs.h"
18 static const struct hns3_xstats_name_offset hns3_mac_strings[] = {
19 {"mac_tx_mac_pause_num",
20 HNS3_MAC_STATS_OFFSET(mac_tx_mac_pause_num)},
21 {"mac_rx_mac_pause_num",
22 HNS3_MAC_STATS_OFFSET(mac_rx_mac_pause_num)},
23 {"mac_tx_control_pkt_num",
24 HNS3_MAC_STATS_OFFSET(mac_tx_ctrl_pkt_num)},
25 {"mac_rx_control_pkt_num",
26 HNS3_MAC_STATS_OFFSET(mac_rx_ctrl_pkt_num)},
27 {"mac_tx_pfc_pkt_num",
28 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pause_pkt_num)},
29 {"mac_tx_pfc_pri0_pkt_num",
30 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri0_pkt_num)},
31 {"mac_tx_pfc_pri1_pkt_num",
32 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri1_pkt_num)},
33 {"mac_tx_pfc_pri2_pkt_num",
34 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri2_pkt_num)},
35 {"mac_tx_pfc_pri3_pkt_num",
36 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri3_pkt_num)},
37 {"mac_tx_pfc_pri4_pkt_num",
38 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri4_pkt_num)},
39 {"mac_tx_pfc_pri5_pkt_num",
40 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri5_pkt_num)},
41 {"mac_tx_pfc_pri6_pkt_num",
42 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri6_pkt_num)},
43 {"mac_tx_pfc_pri7_pkt_num",
44 HNS3_MAC_STATS_OFFSET(mac_tx_pfc_pri7_pkt_num)},
45 {"mac_rx_pfc_pkt_num",
46 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pause_pkt_num)},
47 {"mac_rx_pfc_pri0_pkt_num",
48 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri0_pkt_num)},
49 {"mac_rx_pfc_pri1_pkt_num",
50 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri1_pkt_num)},
51 {"mac_rx_pfc_pri2_pkt_num",
52 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri2_pkt_num)},
53 {"mac_rx_pfc_pri3_pkt_num",
54 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri3_pkt_num)},
55 {"mac_rx_pfc_pri4_pkt_num",
56 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri4_pkt_num)},
57 {"mac_rx_pfc_pri5_pkt_num",
58 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri5_pkt_num)},
59 {"mac_rx_pfc_pri6_pkt_num",
60 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri6_pkt_num)},
61 {"mac_rx_pfc_pri7_pkt_num",
62 HNS3_MAC_STATS_OFFSET(mac_rx_pfc_pri7_pkt_num)},
63 {"mac_tx_total_pkt_num",
64 HNS3_MAC_STATS_OFFSET(mac_tx_total_pkt_num)},
65 {"mac_tx_total_oct_num",
66 HNS3_MAC_STATS_OFFSET(mac_tx_total_oct_num)},
67 {"mac_tx_good_pkt_num",
68 HNS3_MAC_STATS_OFFSET(mac_tx_good_pkt_num)},
69 {"mac_tx_bad_pkt_num",
70 HNS3_MAC_STATS_OFFSET(mac_tx_bad_pkt_num)},
71 {"mac_tx_good_oct_num",
72 HNS3_MAC_STATS_OFFSET(mac_tx_good_oct_num)},
73 {"mac_tx_bad_oct_num",
74 HNS3_MAC_STATS_OFFSET(mac_tx_bad_oct_num)},
75 {"mac_tx_uni_pkt_num",
76 HNS3_MAC_STATS_OFFSET(mac_tx_uni_pkt_num)},
77 {"mac_tx_multi_pkt_num",
78 HNS3_MAC_STATS_OFFSET(mac_tx_multi_pkt_num)},
79 {"mac_tx_broad_pkt_num",
80 HNS3_MAC_STATS_OFFSET(mac_tx_broad_pkt_num)},
81 {"mac_tx_undersize_pkt_num",
82 HNS3_MAC_STATS_OFFSET(mac_tx_undersize_pkt_num)},
83 {"mac_tx_oversize_pkt_num",
84 HNS3_MAC_STATS_OFFSET(mac_tx_oversize_pkt_num)},
85 {"mac_tx_64_oct_pkt_num",
86 HNS3_MAC_STATS_OFFSET(mac_tx_64_oct_pkt_num)},
87 {"mac_tx_65_127_oct_pkt_num",
88 HNS3_MAC_STATS_OFFSET(mac_tx_65_127_oct_pkt_num)},
89 {"mac_tx_128_255_oct_pkt_num",
90 HNS3_MAC_STATS_OFFSET(mac_tx_128_255_oct_pkt_num)},
91 {"mac_tx_256_511_oct_pkt_num",
92 HNS3_MAC_STATS_OFFSET(mac_tx_256_511_oct_pkt_num)},
93 {"mac_tx_512_1023_oct_pkt_num",
94 HNS3_MAC_STATS_OFFSET(mac_tx_512_1023_oct_pkt_num)},
95 {"mac_tx_1024_1518_oct_pkt_num",
96 HNS3_MAC_STATS_OFFSET(mac_tx_1024_1518_oct_pkt_num)},
97 {"mac_tx_1519_2047_oct_pkt_num",
98 HNS3_MAC_STATS_OFFSET(mac_tx_1519_2047_oct_pkt_num)},
99 {"mac_tx_2048_4095_oct_pkt_num",
100 HNS3_MAC_STATS_OFFSET(mac_tx_2048_4095_oct_pkt_num)},
101 {"mac_tx_4096_8191_oct_pkt_num",
102 HNS3_MAC_STATS_OFFSET(mac_tx_4096_8191_oct_pkt_num)},
103 {"mac_tx_8192_9216_oct_pkt_num",
104 HNS3_MAC_STATS_OFFSET(mac_tx_8192_9216_oct_pkt_num)},
105 {"mac_tx_9217_12287_oct_pkt_num",
106 HNS3_MAC_STATS_OFFSET(mac_tx_9217_12287_oct_pkt_num)},
107 {"mac_tx_12288_16383_oct_pkt_num",
108 HNS3_MAC_STATS_OFFSET(mac_tx_12288_16383_oct_pkt_num)},
109 {"mac_tx_1519_max_good_pkt_num",
110 HNS3_MAC_STATS_OFFSET(mac_tx_1519_max_good_oct_pkt_num)},
111 {"mac_tx_1519_max_bad_pkt_num",
112 HNS3_MAC_STATS_OFFSET(mac_tx_1519_max_bad_oct_pkt_num)},
113 {"mac_rx_total_pkt_num",
114 HNS3_MAC_STATS_OFFSET(mac_rx_total_pkt_num)},
115 {"mac_rx_total_oct_num",
116 HNS3_MAC_STATS_OFFSET(mac_rx_total_oct_num)},
117 {"mac_rx_good_pkt_num",
118 HNS3_MAC_STATS_OFFSET(mac_rx_good_pkt_num)},
119 {"mac_rx_bad_pkt_num",
120 HNS3_MAC_STATS_OFFSET(mac_rx_bad_pkt_num)},
121 {"mac_rx_good_oct_num",
122 HNS3_MAC_STATS_OFFSET(mac_rx_good_oct_num)},
123 {"mac_rx_bad_oct_num",
124 HNS3_MAC_STATS_OFFSET(mac_rx_bad_oct_num)},
125 {"mac_rx_uni_pkt_num",
126 HNS3_MAC_STATS_OFFSET(mac_rx_uni_pkt_num)},
127 {"mac_rx_multi_pkt_num",
128 HNS3_MAC_STATS_OFFSET(mac_rx_multi_pkt_num)},
129 {"mac_rx_broad_pkt_num",
130 HNS3_MAC_STATS_OFFSET(mac_rx_broad_pkt_num)},
131 {"mac_rx_undersize_pkt_num",
132 HNS3_MAC_STATS_OFFSET(mac_rx_undersize_pkt_num)},
133 {"mac_rx_oversize_pkt_num",
134 HNS3_MAC_STATS_OFFSET(mac_rx_oversize_pkt_num)},
135 {"mac_rx_64_oct_pkt_num",
136 HNS3_MAC_STATS_OFFSET(mac_rx_64_oct_pkt_num)},
137 {"mac_rx_65_127_oct_pkt_num",
138 HNS3_MAC_STATS_OFFSET(mac_rx_65_127_oct_pkt_num)},
139 {"mac_rx_128_255_oct_pkt_num",
140 HNS3_MAC_STATS_OFFSET(mac_rx_128_255_oct_pkt_num)},
141 {"mac_rx_256_511_oct_pkt_num",
142 HNS3_MAC_STATS_OFFSET(mac_rx_256_511_oct_pkt_num)},
143 {"mac_rx_512_1023_oct_pkt_num",
144 HNS3_MAC_STATS_OFFSET(mac_rx_512_1023_oct_pkt_num)},
145 {"mac_rx_1024_1518_oct_pkt_num",
146 HNS3_MAC_STATS_OFFSET(mac_rx_1024_1518_oct_pkt_num)},
147 {"mac_rx_1519_2047_oct_pkt_num",
148 HNS3_MAC_STATS_OFFSET(mac_rx_1519_2047_oct_pkt_num)},
149 {"mac_rx_2048_4095_oct_pkt_num",
150 HNS3_MAC_STATS_OFFSET(mac_rx_2048_4095_oct_pkt_num)},
151 {"mac_rx_4096_8191_oct_pkt_num",
152 HNS3_MAC_STATS_OFFSET(mac_rx_4096_8191_oct_pkt_num)},
153 {"mac_rx_8192_9216_oct_pkt_num",
154 HNS3_MAC_STATS_OFFSET(mac_rx_8192_9216_oct_pkt_num)},
155 {"mac_rx_9217_12287_oct_pkt_num",
156 HNS3_MAC_STATS_OFFSET(mac_rx_9217_12287_oct_pkt_num)},
157 {"mac_rx_12288_16383_oct_pkt_num",
158 HNS3_MAC_STATS_OFFSET(mac_rx_12288_16383_oct_pkt_num)},
159 {"mac_rx_1519_max_good_pkt_num",
160 HNS3_MAC_STATS_OFFSET(mac_rx_1519_max_good_oct_pkt_num)},
161 {"mac_rx_1519_max_bad_pkt_num",
162 HNS3_MAC_STATS_OFFSET(mac_rx_1519_max_bad_oct_pkt_num)},
163 {"mac_tx_fragment_pkt_num",
164 HNS3_MAC_STATS_OFFSET(mac_tx_fragment_pkt_num)},
165 {"mac_tx_undermin_pkt_num",
166 HNS3_MAC_STATS_OFFSET(mac_tx_undermin_pkt_num)},
167 {"mac_tx_jabber_pkt_num",
168 HNS3_MAC_STATS_OFFSET(mac_tx_jabber_pkt_num)},
169 {"mac_tx_err_all_pkt_num",
170 HNS3_MAC_STATS_OFFSET(mac_tx_err_all_pkt_num)},
171 {"mac_tx_from_app_good_pkt_num",
172 HNS3_MAC_STATS_OFFSET(mac_tx_from_app_good_pkt_num)},
173 {"mac_tx_from_app_bad_pkt_num",
174 HNS3_MAC_STATS_OFFSET(mac_tx_from_app_bad_pkt_num)},
175 {"mac_rx_fragment_pkt_num",
176 HNS3_MAC_STATS_OFFSET(mac_rx_fragment_pkt_num)},
177 {"mac_rx_undermin_pkt_num",
178 HNS3_MAC_STATS_OFFSET(mac_rx_undermin_pkt_num)},
179 {"mac_rx_jabber_pkt_num",
180 HNS3_MAC_STATS_OFFSET(mac_rx_jabber_pkt_num)},
181 {"mac_rx_fcs_err_pkt_num",
182 HNS3_MAC_STATS_OFFSET(mac_rx_fcs_err_pkt_num)},
183 {"mac_rx_send_app_good_pkt_num",
184 HNS3_MAC_STATS_OFFSET(mac_rx_send_app_good_pkt_num)},
185 {"mac_rx_send_app_bad_pkt_num",
186 HNS3_MAC_STATS_OFFSET(mac_rx_send_app_bad_pkt_num)}
189 static const struct hns3_xstats_name_offset hns3_error_int_stats_strings[] = {
190 {"MAC_AFIFO_TNL_INT_R",
191 HNS3_ERR_INT_STATS_FIELD_OFFSET(mac_afifo_tnl_intr_cnt)},
192 {"PPU_MPF_ABNORMAL_INT_ST2",
193 HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_mpf_abnormal_intr_st2_cnt)},
194 {"SSU_PORT_BASED_ERR_INT",
195 HNS3_ERR_INT_STATS_FIELD_OFFSET(ssu_port_based_pf_intr_cnt)},
196 {"PPP_PF_ABNORMAL_INT_ST0",
197 HNS3_ERR_INT_STATS_FIELD_OFFSET(ppp_pf_abnormal_intr_cnt)},
198 {"PPU_PF_ABNORMAL_INT_ST",
199 HNS3_ERR_INT_STATS_FIELD_OFFSET(ppu_pf_abnormal_intr_cnt)}
202 /* The statistic of reset */
203 static const struct hns3_xstats_name_offset hns3_reset_stats_strings[] = {
205 HNS3_RESET_STATS_FIELD_OFFSET(request_cnt)},
207 HNS3_RESET_STATS_FIELD_OFFSET(global_cnt)},
209 HNS3_RESET_STATS_FIELD_OFFSET(imp_cnt)},
211 HNS3_RESET_STATS_FIELD_OFFSET(exec_cnt)},
212 {"RESET_SUCCESS_CNT",
213 HNS3_RESET_STATS_FIELD_OFFSET(success_cnt)},
215 HNS3_RESET_STATS_FIELD_OFFSET(fail_cnt)},
217 HNS3_RESET_STATS_FIELD_OFFSET(merge_cnt)}
220 /* The statistic of errors in Rx BD */
221 static const struct hns3_xstats_name_offset hns3_rx_bd_error_strings[] = {
222 {"NONE_VALIDATED_DESCRIPTORS",
223 HNS3_RX_BD_ERROR_STATS_FIELD_OFFSET(non_vld_descs)},
224 {"RX_PKT_LEN_ERRORS",
225 HNS3_RX_BD_ERROR_STATS_FIELD_OFFSET(pkt_len_errors)},
227 HNS3_RX_BD_ERROR_STATS_FIELD_OFFSET(l2_errors)},
228 {"RX_L3_CHECKSUM_ERRORS",
229 HNS3_RX_BD_ERROR_STATS_FIELD_OFFSET(l3_csum_erros)},
230 {"RX_L4_CHECKSUM_ERRORS",
231 HNS3_RX_BD_ERROR_STATS_FIELD_OFFSET(l4_csum_erros)},
232 {"RX_OL3_CHECKSUM_ERRORS",
233 HNS3_RX_BD_ERROR_STATS_FIELD_OFFSET(ol3_csum_erros)},
234 {"RX_OL4_CHECKSUM_ERRORS",
235 HNS3_RX_BD_ERROR_STATS_FIELD_OFFSET(ol4_csum_erros)}
238 #define HNS3_NUM_MAC_STATS (sizeof(hns3_mac_strings) / \
239 sizeof(hns3_mac_strings[0]))
241 #define HNS3_NUM_ERROR_INT_XSTATS (sizeof(hns3_error_int_stats_strings) / \
242 sizeof(hns3_error_int_stats_strings[0]))
244 #define HNS3_NUM_RESET_XSTATS (sizeof(hns3_reset_stats_strings) / \
245 sizeof(hns3_reset_stats_strings[0]))
247 #define HNS3_NUM_RX_BD_ERROR_XSTATS (sizeof(hns3_rx_bd_error_strings) / \
248 sizeof(hns3_rx_bd_error_strings[0]))
250 #define HNS3_FIX_NUM_STATS (HNS3_NUM_MAC_STATS + HNS3_NUM_ERROR_INT_XSTATS + \
251 HNS3_NUM_RESET_XSTATS)
254 * Query all the MAC statistics data of Network ICL command ,opcode id: 0x0034.
255 * This command is used before send 'query_mac_stat command', the descriptor
256 * number of 'query_mac_stat command' must match with reg_num in this command.
258 * Pointer to structure hns3_hw.
263 hns3_update_mac_stats(struct hns3_hw *hw, const uint32_t desc_num)
265 uint64_t *data = (uint64_t *)(&hw->mac_stats);
266 struct hns3_cmd_desc *desc;
271 desc = rte_malloc("hns3_mac_desc",
272 desc_num * sizeof(struct hns3_cmd_desc), 0);
274 hns3_err(hw, "Mac_update_stats alloced desc malloc fail");
278 hns3_cmd_setup_basic_desc(desc, HNS3_OPC_STATS_MAC_ALL, true);
279 ret = hns3_cmd_send(hw, desc, desc_num);
281 hns3_err(hw, "Update complete MAC pkt stats fail : %d", ret);
286 for (i = 0; i < desc_num; i++) {
287 /* For special opcode 0034, only the first desc has the head */
289 desc_data = (uint64_t *)(&desc[i].data[0]);
290 n = HNS3_RD_FIRST_STATS_NUM;
292 desc_data = (uint64_t *)(&desc[i]);
293 n = HNS3_RD_OTHER_STATS_NUM;
296 for (k = 0; k < n; k++) {
297 *data += rte_le_to_cpu_64(*desc_data);
308 * Query Mac stat reg num command ,opcode id: 0x0033.
309 * This command is used before send 'query_mac_stat command', the descriptor
310 * number of 'query_mac_stat command' must match with reg_num in this command.
312 * Pointer to structure rte_eth_stats.
317 hns3_mac_query_reg_num(struct rte_eth_dev *dev, uint32_t *desc_num)
319 struct hns3_adapter *hns = dev->data->dev_private;
320 struct hns3_hw *hw = &hns->hw;
321 struct hns3_cmd_desc desc;
326 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_MAC_REG_NUM, true);
327 ret = hns3_cmd_send(hw, &desc, 1);
332 * The num of MAC statistics registers that are provided by IMP in this
335 desc_data = (uint32_t *)(&desc.data[0]);
336 reg_num = rte_le_to_cpu_32(*desc_data);
339 * The descriptor number of 'query_additional_mac_stat command' is
340 * '1 + (reg_num-3)/4 + ((reg_num-3)%4 !=0)';
341 * This value is 83 in this version
343 *desc_num = 1 + ((reg_num - 3) >> 2) +
344 (uint32_t)(((reg_num - 3) & 0x3) ? 1 : 0);
350 hns3_query_update_mac_stats(struct rte_eth_dev *dev)
352 struct hns3_adapter *hns = dev->data->dev_private;
353 struct hns3_hw *hw = &hns->hw;
357 ret = hns3_mac_query_reg_num(dev, &desc_num);
359 ret = hns3_update_mac_stats(hw, desc_num);
361 hns3_err(hw, "Query mac reg num fail : %d", ret);
365 /* Get tqp stats from register */
367 hns3_update_tqp_stats(struct hns3_hw *hw)
369 struct hns3_tqp_stats *stats = &hw->tqp_stats;
370 struct hns3_cmd_desc desc;
375 for (i = 0; i < hw->tqps_num; i++) {
376 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_RX_STATUS,
379 desc.data[0] = rte_cpu_to_le_32((uint32_t)i &
381 ret = hns3_cmd_send(hw, &desc, 1);
383 hns3_err(hw, "Failed to query RX No.%d queue stat: %d",
387 cnt = rte_le_to_cpu_32(desc.data[1]);
388 stats->rcb_rx_ring_pktnum_rcd += cnt;
389 stats->rcb_rx_ring_pktnum[i] += cnt;
391 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_QUERY_TX_STATUS,
394 desc.data[0] = rte_cpu_to_le_32((uint32_t)i &
396 ret = hns3_cmd_send(hw, &desc, 1);
398 hns3_err(hw, "Failed to query TX No.%d queue stat: %d",
402 cnt = rte_le_to_cpu_32(desc.data[1]);
403 stats->rcb_tx_ring_pktnum_rcd += cnt;
404 stats->rcb_tx_ring_pktnum[i] += cnt;
411 * Query tqp tx queue statistics ,opcode id: 0x0B03.
412 * Query tqp rx queue statistics ,opcode id: 0x0B13.
413 * Get all statistics of a port.
415 * Pointer to Ethernet device.
417 * Pointer to structure rte_eth_stats.
422 hns3_stats_get(struct rte_eth_dev *eth_dev, struct rte_eth_stats *rte_stats)
424 struct hns3_adapter *hns = eth_dev->data->dev_private;
425 struct hns3_hw *hw = &hns->hw;
426 struct hns3_tqp_stats *stats = &hw->tqp_stats;
427 struct hns3_rx_queue *rxq;
428 struct hns3_tx_queue *txq;
434 /* Update tqp stats by read register */
435 ret = hns3_update_tqp_stats(hw);
437 hns3_err(hw, "Update tqp stats fail : %d", ret);
441 /* Get the error stats of received packets */
442 num = RTE_MIN(RTE_ETHDEV_QUEUE_STAT_CNTRS, eth_dev->data->nb_rx_queues);
443 for (i = 0; i != num; ++i) {
444 rxq = eth_dev->data->rx_queues[i];
446 cnt = rxq->l2_errors + rxq->pkt_len_errors;
447 rte_stats->q_errors[i] = cnt;
448 rte_stats->q_ipackets[i] =
449 stats->rcb_rx_ring_pktnum[i] - cnt;
450 rte_stats->ierrors += cnt;
453 /* Get the error stats of transmitted packets */
454 num = RTE_MIN(RTE_ETHDEV_QUEUE_STAT_CNTRS, eth_dev->data->nb_tx_queues);
455 for (i = 0; i < num; i++) {
456 txq = eth_dev->data->tx_queues[i];
458 rte_stats->q_opackets[i] = stats->rcb_tx_ring_pktnum[i];
461 rte_stats->oerrors = 0;
462 rte_stats->ipackets = stats->rcb_rx_ring_pktnum_rcd -
464 rte_stats->opackets = stats->rcb_tx_ring_pktnum_rcd -
466 rte_stats->rx_nombuf = eth_dev->data->rx_mbuf_alloc_failed;
472 hns3_stats_reset(struct rte_eth_dev *eth_dev)
474 struct hns3_adapter *hns = eth_dev->data->dev_private;
475 struct hns3_hw *hw = &hns->hw;
476 struct hns3_tqp_stats *stats = &hw->tqp_stats;
477 struct hns3_cmd_desc desc_reset;
478 struct hns3_rx_queue *rxq;
483 * If this is a reset xstats is NULL, and we have cleared the
484 * registers by reading them.
486 for (i = 0; i < hw->tqps_num; i++) {
487 hns3_cmd_setup_basic_desc(&desc_reset, HNS3_OPC_QUERY_RX_STATUS,
489 desc_reset.data[0] = rte_cpu_to_le_32((uint32_t)i &
491 ret = hns3_cmd_send(hw, &desc_reset, 1);
493 hns3_err(hw, "Failed to reset RX No.%d queue stat: %d",
497 hns3_cmd_setup_basic_desc(&desc_reset, HNS3_OPC_QUERY_TX_STATUS,
499 desc_reset.data[0] = rte_cpu_to_le_32((uint32_t)i &
501 ret = hns3_cmd_send(hw, &desc_reset, 1);
503 hns3_err(hw, "Failed to reset TX No.%d queue stat: %d",
508 /* Clear Rx BD and Tx error stats */
509 for (i = 0; i != eth_dev->data->nb_rx_queues; ++i) {
510 rxq = eth_dev->data->rx_queues[i];
512 rxq->pkt_len_errors = 0;
513 rxq->non_vld_descs = 0;
515 rxq->l3_csum_erros = 0;
516 rxq->l4_csum_erros = 0;
517 rxq->ol3_csum_erros = 0;
518 rxq->ol4_csum_erros = 0;
522 memset(stats, 0, sizeof(struct hns3_tqp_stats));
528 hns3_mac_stats_reset(__rte_unused struct rte_eth_dev *dev)
530 struct hns3_adapter *hns = dev->data->dev_private;
531 struct hns3_hw *hw = &hns->hw;
532 struct hns3_mac_stats *mac_stats = &hw->mac_stats;
535 ret = hns3_query_update_mac_stats(dev);
537 hns3_err(hw, "Clear Mac stats fail : %d", ret);
539 memset(mac_stats, 0, sizeof(struct hns3_mac_stats));
542 /* This function calculates the number of xstats based on the current config */
544 hns3_xstats_calc_num(struct rte_eth_dev *dev)
546 struct hns3_adapter *hns = dev->data->dev_private;
549 return dev->data->nb_rx_queues * HNS3_NUM_RX_BD_ERROR_XSTATS +
550 HNS3_NUM_RESET_XSTATS;
552 return dev->data->nb_rx_queues * HNS3_NUM_RX_BD_ERROR_XSTATS +
557 * Retrieve extended(tqp | Mac) statistics of an Ethernet device.
559 * Pointer to Ethernet device.
561 * A pointer to a table of structure of type *rte_eth_xstat*
562 * to be filled with device statistics ids and values.
563 * This parameter can be set to NULL if n is 0.
565 * The size of the xstats array (number of elements).
567 * 0 on fail, count(The size of the statistics elements) on success.
570 hns3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
573 struct hns3_adapter *hns = dev->data->dev_private;
574 struct hns3_pf *pf = &hns->pf;
575 struct hns3_hw *hw = &hns->hw;
576 struct hns3_mac_stats *mac_stats = &hw->mac_stats;
577 struct hns3_reset_stats *reset_stats = &hw->reset.stats;
578 struct hns3_rx_queue *rxq;
587 count = hns3_xstats_calc_num(dev);
594 /* Update Mac stats */
595 ret = hns3_query_update_mac_stats(dev);
597 hns3_err(hw, "Update Mac stats fail : %d", ret);
601 /* Get MAC stats from hw->hw_xstats.mac_stats struct */
602 for (i = 0; i < HNS3_NUM_MAC_STATS; i++) {
603 addr = (char *)mac_stats + hns3_mac_strings[i].offset;
604 xstats[count].value = *(uint64_t *)addr;
605 xstats[count].id = count;
609 for (i = 0; i < HNS3_NUM_ERROR_INT_XSTATS; i++) {
610 addr = (char *)&pf->abn_int_stats +
611 hns3_error_int_stats_strings[i].offset;
612 xstats[count].value = *(uint64_t *)addr;
613 xstats[count].id = count;
618 /* Get the reset stat */
619 for (i = 0; i < HNS3_NUM_RESET_XSTATS; i++) {
620 addr = (char *)reset_stats + hns3_reset_stats_strings[i].offset;
621 xstats[count].value = *(uint64_t *)addr;
622 xstats[count].id = count;
626 /* Get the Rx BD errors stats */
627 for (j = 0; j != dev->data->nb_rx_queues; ++j) {
628 for (i = 0; i < HNS3_NUM_RX_BD_ERROR_XSTATS; i++) {
629 rxq = dev->data->rx_queues[j];
630 addr = (char *)rxq + hns3_rx_bd_error_strings[i].offset;
631 xstats[count].value = *(uint64_t *)addr;
632 xstats[count].id = count;
641 * Retrieve names of extended statistics of an Ethernet device.
643 * There is an assumption that 'xstat_names' and 'xstats' arrays are matched
645 * xstats_names[i].name => xstats[i].value
647 * And the array index is same with id field of 'struct rte_eth_xstat':
650 * This assumption makes key-value pair matching less flexible but simpler.
653 * Pointer to Ethernet device.
654 * @param xstats_names
655 * An rte_eth_xstat_name array of at least *size* elements to
656 * be filled. If set to NULL, the function returns the required number
659 * The size of the xstats_names array (number of elements).
661 * - A positive value lower or equal to size: success. The return value
662 * is the number of entries filled in the stats table.
665 hns3_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
666 struct rte_eth_xstat_name *xstats_names,
667 __rte_unused unsigned int size)
669 struct hns3_adapter *hns = dev->data->dev_private;
670 int cnt_stats = hns3_xstats_calc_num(dev);
674 if (xstats_names == NULL)
677 /* Note: size limited checked in rte_eth_xstats_get_names() */
679 /* Get MAC name from hw->hw_xstats.mac_stats struct */
680 for (i = 0; i < HNS3_NUM_MAC_STATS; i++) {
681 snprintf(xstats_names[count].name,
682 sizeof(xstats_names[count].name),
683 "%s", hns3_mac_strings[i].name);
687 for (i = 0; i < HNS3_NUM_ERROR_INT_XSTATS; i++) {
688 snprintf(xstats_names[count].name,
689 sizeof(xstats_names[count].name),
690 "%s", hns3_error_int_stats_strings[i].name);
694 for (i = 0; i < HNS3_NUM_RESET_XSTATS; i++) {
695 snprintf(xstats_names[count].name,
696 sizeof(xstats_names[count].name),
697 "%s", hns3_reset_stats_strings[i].name);
701 for (j = 0; j < dev->data->nb_rx_queues; j++) {
702 for (i = 0; i < HNS3_NUM_RX_BD_ERROR_XSTATS; i++) {
703 snprintf(xstats_names[count].name,
704 sizeof(xstats_names[count].name),
706 hns3_rx_bd_error_strings[i].name);
715 * Retrieve extended statistics of an Ethernet device.
718 * Pointer to Ethernet device.
720 * A pointer to an ids array passed by application. This tells which
721 * statistics values function should retrieve. This parameter
722 * can be set to NULL if size is 0. In this case function will retrieve
723 * all avalible statistics.
725 * A pointer to a table to be filled with device statistics values.
727 * The size of the ids array (number of elements).
729 * - A positive value lower or equal to size: success. The return value
730 * is the number of entries filled in the stats table.
731 * - A positive value higher than size: error, the given statistics table
732 * is too small. The return value corresponds to the size that should
733 * be given to succeed. The entries in the table are not valid and
734 * shall not be used by the caller.
738 hns3_dev_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
739 uint64_t *values, uint32_t size)
741 struct hns3_adapter *hns = dev->data->dev_private;
742 struct hns3_pf *pf = &hns->pf;
743 struct hns3_hw *hw = &hns->hw;
744 struct hns3_mac_stats *mac_stats = &hw->mac_stats;
745 struct hns3_reset_stats *reset_stats = &hw->reset.stats;
746 struct hns3_rx_queue *rxq;
747 const uint32_t cnt_stats = hns3_xstats_calc_num(dev);
748 uint64_t *values_copy;
755 if (ids == NULL || size < cnt_stats)
758 /* Update tqp stats by read register */
759 ret = hns3_update_tqp_stats(hw);
761 hns3_err(hw, "Update tqp stats fail : %d", ret);
765 len = cnt_stats * HNS3_VALUES_BYTES;
766 values_copy = rte_zmalloc("hns3_xstats_values", len, 0);
767 if (values_copy == NULL) {
768 hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed "
769 "to store statistics values", len);
774 /* Get MAC name from hw->hw_xstats.mac_stats */
775 for (i = 0; i < HNS3_NUM_MAC_STATS; i++) {
776 addr = (char *)mac_stats + hns3_mac_strings[i].offset;
777 values_copy[count] = *(uint64_t *)addr;
781 for (i = 0; i < HNS3_NUM_ERROR_INT_XSTATS; i++) {
782 addr = (char *)&pf->abn_int_stats +
783 hns3_error_int_stats_strings[i].offset;
784 values_copy[count] = *(uint64_t *)addr;
789 for (i = 0; i < HNS3_NUM_RESET_XSTATS; i++) {
790 addr = (char *)reset_stats +
791 hns3_reset_stats_strings[i].offset;
792 values_copy[count] = *(uint64_t *)addr;
796 for (j = 0; j != dev->data->nb_rx_queues; ++j) {
797 for (i = 0; i < HNS3_NUM_RX_BD_ERROR_XSTATS; i++) {
798 rxq = dev->data->rx_queues[j];
799 addr = (char *)rxq + hns3_rx_bd_error_strings[i].offset;
800 values_copy[count] = *(uint64_t *)addr;
805 for (i = 0; i < size; i++) {
806 if (ids[i] >= cnt_stats) {
807 hns3_err(hw, "ids[%d] (%" PRIx64 ") is invalid, "
808 "should < %u", i, ids[i], cnt_stats);
809 rte_free(values_copy);
812 memcpy(&values[i], &values_copy[ids[i]], sizeof(values[i]));
815 rte_free(values_copy);
820 * Retrieve names of extended statistics of an Ethernet device.
823 * Pointer to Ethernet device.
824 * @param xstats_names
825 * An rte_eth_xstat_name array of at least *size* elements to
826 * be filled. If set to NULL, the function returns the required number
829 * IDs array given by app to retrieve specific statistics
831 * The size of the xstats_names array (number of elements).
833 * - A positive value lower or equal to size: success. The return value
834 * is the number of entries filled in the stats table.
835 * - A positive value higher than size: error, the given statistics table
836 * is too small. The return value corresponds to the size that should
837 * be given to succeed. The entries in the table are not valid and
838 * shall not be used by the caller.
841 hns3_dev_xstats_get_names_by_id(struct rte_eth_dev *dev,
842 struct rte_eth_xstat_name *xstats_names,
843 const uint64_t *ids, uint32_t size)
845 struct hns3_adapter *hns = dev->data->dev_private;
846 struct rte_eth_xstat_name *xstats_names_copy;
847 struct hns3_hw *hw = &hns->hw;
848 const uint32_t cnt_stats = hns3_xstats_calc_num(dev);
849 uint16_t count_name = 0;
853 if (ids == NULL || xstats_names == NULL)
856 len = cnt_stats * sizeof(struct rte_eth_xstat_name);
857 xstats_names_copy = rte_zmalloc("hns3_xstats_names", len, 0);
858 if (xstats_names_copy == NULL) {
859 hns3_err(hw, "Failed to allocate %" PRIx64 " bytes needed "
860 "to store statistics names", len);
865 for (i = 0; i < HNS3_NUM_MAC_STATS; i++) {
866 snprintf(xstats_names_copy[count_name].name,
867 sizeof(xstats_names_copy[count_name].name),
868 "%s", hns3_mac_strings[i].name);
871 for (i = 0; i < HNS3_NUM_ERROR_INT_XSTATS; i++) {
872 snprintf(xstats_names_copy[count_name].name,
873 sizeof(xstats_names_copy[count_name].name),
874 "%s", hns3_error_int_stats_strings[i].name);
878 for (i = 0; i < HNS3_NUM_RESET_XSTATS; i++) {
879 snprintf(xstats_names_copy[count_name].name,
880 sizeof(xstats_names_copy[count_name].name),
881 "%s", hns3_reset_stats_strings[i].name);
884 for (j = 0; j != dev->data->nb_rx_queues; ++j) {
885 for (i = 0; i < HNS3_NUM_RX_BD_ERROR_XSTATS; i++) {
886 snprintf(xstats_names_copy[count_name].name,
887 sizeof(xstats_names_copy[count_name].name),
889 hns3_rx_bd_error_strings[i].name);
894 for (i = 0; i < size; i++) {
895 if (ids[i] >= cnt_stats) {
896 hns3_err(hw, "ids[%d] (%" PRIx64 ") is invalid, "
897 "should < %u", i, ids[i], cnt_stats);
898 rte_free(xstats_names_copy);
901 snprintf(xstats_names[i].name, sizeof(xstats_names[i].name),
902 "%s", xstats_names_copy[ids[i]].name);
905 rte_free(xstats_names_copy);
910 hns3_dev_xstats_reset(struct rte_eth_dev *dev)
912 struct hns3_adapter *hns = dev->data->dev_private;
913 struct hns3_pf *pf = &hns->pf;
915 /* Clear tqp stats */
916 (void)hns3_stats_reset(dev);
917 /* Clear reset stats */
918 memset(&hns->hw.reset.stats, 0, sizeof(struct hns3_reset_stats));
923 /* HW registers are cleared on read */
924 hns3_mac_stats_reset(dev);
925 /* Clear error stats */
926 memset(&pf->abn_int_stats, 0, sizeof(struct hns3_err_msix_intr_stats));