drivers/net/i40e/i40e_ethdev_vf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_cycles.h>
  45
  46 #include <rte_interrupts.h>
  47 #include <rte_log.h>
  48 #include <rte_debug.h>
  49 #include <rte_pci.h>
  50 #include <rte_atomic.h>
  51 #include <rte_branch_prediction.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_eal.h>
  55 #include <rte_alarm.h>
  56 #include <rte_ether.h>
  57 #include <rte_ethdev.h>
  58 #include <rte_ethdev_pci.h>
  59 #include <rte_malloc.h>
  60 #include <rte_dev.h>
  61
  62 #include "i40e_logs.h"
  63 #include "base/i40e_prototype.h"
  64 #include "base/i40e_adminq_cmd.h"
  65 #include "base/i40e_type.h"
  66
  67 #include "i40e_rxtx.h"
  68 #include "i40e_ethdev.h"
  69 #include "i40e_pf.h"
  70 #define I40EVF_VSI_DEFAULT_MSIX_INTR     1
  71 #define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
  72
  73 /* busy wait delay in msec */
  74 #define I40EVF_BUSY_WAIT_DELAY 10
  75 #define I40EVF_BUSY_WAIT_COUNT 50
  76 #define MAX_RESET_WAIT_CNT     20
  77
  78 struct i40evf_arq_msg_info {
  79         enum virtchnl_ops ops;
  80         enum i40e_status_code result;
  81         uint16_t buf_len;
  82         uint16_t msg_len;
  83         uint8_t *msg;
  84 };
  85
  86 struct vf_cmd_info {
  87         enum virtchnl_ops ops;
  88         uint8_t *in_args;
  89         uint32_t in_args_size;
  90         uint8_t *out_buffer;
  91         /* Input & output type. pass in buffer size and pass out
  92          * actual return result
  93          */
  94         uint32_t out_size;
  95 };
  96
  97 enum i40evf_aq_result {
  98         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  99         I40EVF_MSG_NON,      /* Read nothing from admin queue */
 100         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
 101         I40EVF_MSG_CMD,      /* Read async command result */
 102 };
 103
 104 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 105 static int i40evf_dev_start(struct rte_eth_dev *dev);
 106 static void i40evf_dev_stop(struct rte_eth_dev *dev);
 107 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
 108                                 struct rte_eth_dev_info *dev_info);
 109 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
 110                                   int wait_to_complete);
 111 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
 112                                 struct rte_eth_stats *stats);
 113 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 114                                  struct rte_eth_xstat *xstats, unsigned n);
 115 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
 116                                        struct rte_eth_xstat_name *xstats_names,
 117                                        unsigned limit);
 118 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
 119 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
 120                                   uint16_t vlan_id, int on);
 121 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 122 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
 123                                 int on);
 124 static void i40evf_dev_close(struct rte_eth_dev *dev);
 125 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
 126 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
 127 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
 128 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
 129 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 130 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 131 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 132                                      uint16_t rx_queue_id);
 133 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 134                                     uint16_t rx_queue_id);
 135 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 136                                      uint16_t tx_queue_id);
 137 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 138                                     uint16_t tx_queue_id);
 139 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 140                                struct ether_addr *addr,
 141                                uint32_t index,
 142                                uint32_t pool);
 143 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 144 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 145                         struct rte_eth_rss_reta_entry64 *reta_conf,
 146                         uint16_t reta_size);
 147 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 148                         struct rte_eth_rss_reta_entry64 *reta_conf,
 149                         uint16_t reta_size);
 150 static int i40evf_config_rss(struct i40e_vf *vf);
 151 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 152                                       struct rte_eth_rss_conf *rss_conf);
 153 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 154                                         struct rte_eth_rss_conf *rss_conf);
 155 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 156 static void i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 157                                         struct ether_addr *mac_addr);
 158 static int
 159 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 160 static int
 161 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 162 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 163                                    uint8_t *msg,
 164                                    uint16_t msglen);
 165
 166 /* Default hash key buffer for RSS */
 167 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 168
 169 struct rte_i40evf_xstats_name_off {
 170         char name[RTE_ETH_XSTATS_NAME_SIZE];
 171         unsigned offset;
 172 };
 173
 174 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 175         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 176         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 177         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 178         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 179         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 180         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 181                 rx_unknown_protocol)},
 182         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 183         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 184         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 185         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 186         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 187         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 188 };
 189
 190 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 191                 sizeof(rte_i40evf_stats_strings[0]))
 192
 193 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 194         .dev_configure        = i40evf_dev_configure,
 195         .dev_start            = i40evf_dev_start,
 196         .dev_stop             = i40evf_dev_stop,
 197         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 198         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 199         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 200         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 201         .link_update          = i40evf_dev_link_update,
 202         .stats_get            = i40evf_dev_stats_get,
 203         .xstats_get           = i40evf_dev_xstats_get,
 204         .xstats_get_names     = i40evf_dev_xstats_get_names,
 205         .xstats_reset         = i40evf_dev_xstats_reset,
 206         .dev_close            = i40evf_dev_close,
 207         .dev_reset            = i40evf_dev_reset,
 208         .dev_infos_get        = i40evf_dev_info_get,
 209         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 210         .vlan_filter_set      = i40evf_vlan_filter_set,
 211         .vlan_offload_set     = i40evf_vlan_offload_set,
 212         .vlan_pvid_set        = i40evf_vlan_pvid_set,
 213         .rx_queue_start       = i40evf_dev_rx_queue_start,
 214         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 215         .tx_queue_start       = i40evf_dev_tx_queue_start,
 216         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 217         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 218         .rx_queue_release     = i40e_dev_rx_queue_release,
 219         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 220         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 221         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 222         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 223         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 224         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 225         .tx_queue_release     = i40e_dev_tx_queue_release,
 226         .rx_queue_count       = i40e_dev_rx_queue_count,
 227         .rxq_info_get         = i40e_rxq_info_get,
 228         .txq_info_get         = i40e_txq_info_get,
 229         .mac_addr_add         = i40evf_add_mac_addr,
 230         .mac_addr_remove      = i40evf_del_mac_addr,
 231         .reta_update          = i40evf_dev_rss_reta_update,
 232         .reta_query           = i40evf_dev_rss_reta_query,
 233         .rss_hash_update      = i40evf_dev_rss_hash_update,
 234         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 235         .mtu_set              = i40evf_dev_mtu_set,
 236         .mac_addr_set         = i40evf_set_default_mac_addr,
 237 };
 238
 239 /*
 240  * Read data in admin queue to get msg from pf driver
 241  */
 242 static enum i40evf_aq_result
 243 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 244 {
 245         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 246         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 247         struct i40e_arq_event_info event;
 248         enum virtchnl_ops opcode;
 249         enum i40e_status_code retval;
 250         int ret;
 251         enum i40evf_aq_result result = I40EVF_MSG_NON;
 252
 253         event.buf_len = data->buf_len;
 254         event.msg_buf = data->msg;
 255         ret = i40e_clean_arq_element(hw, &event, NULL);
 256         /* Can't read any msg from adminQ */
 257         if (ret) {
 258                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 259                         result = I40EVF_MSG_ERR;
 260                 return result;
 261         }
 262
 263         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 264         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 265         /* pf sys event */
 266         if (opcode == VIRTCHNL_OP_EVENT) {
 267                 struct virtchnl_pf_event *vpe =
 268                         (struct virtchnl_pf_event *)event.msg_buf;
 269
 270                 result = I40EVF_MSG_SYS;
 271                 switch (vpe->event) {
 272                 case VIRTCHNL_EVENT_LINK_CHANGE:
 273                         vf->link_up =
 274                                 vpe->event_data.link_event.link_status;
 275                         vf->link_speed =
 276                                 vpe->event_data.link_event.link_speed;
 277                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 278                         PMD_DRV_LOG(INFO, "Link status update:%s",
 279                                     vf->link_up ? "up" : "down");
 280                         break;
 281                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 282                         vf->vf_reset = true;
 283                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 284                         PMD_DRV_LOG(INFO, "vf is reseting");
 285                         break;
 286                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 287                         vf->dev_closed = true;
 288                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 289                         PMD_DRV_LOG(INFO, "PF driver closed");
 290                         break;
 291                 default:
 292                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 293                                     __func__, vpe->event);
 294                 }
 295         } else {
 296                 /* async reply msg on command issued by vf previously */
 297                 result = I40EVF_MSG_CMD;
 298                 /* Actual data length read from PF */
 299                 data->msg_len = event.msg_len;
 300         }
 301
 302         data->result = retval;
 303         data->ops = opcode;
 304
 305         return result;
 306 }
 307
 308 /**
 309  * clear current command. Only call in case execute
 310  * _atomic_set_cmd successfully.
 311  */
 312 static inline void
 313 _clear_cmd(struct i40e_vf *vf)
 314 {
 315         rte_wmb();
 316         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 317 }
 318
 319 /*
 320  * Check there is pending cmd in execution. If none, set new command.
 321  */
 322 static inline int
 323 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 324 {
 325         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 326                         VIRTCHNL_OP_UNKNOWN, ops);
 327
 328         if (!ret)
 329                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 330
 331         return !ret;
 332 }
 333
 334 #define MAX_TRY_TIMES 200
 335 #define ASQ_DELAY_MS  10
 336
 337 static int
 338 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 339 {
 340         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 341         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 342         struct i40evf_arq_msg_info info;
 343         enum i40evf_aq_result ret;
 344         int err, i = 0;
 345
 346         if (_atomic_set_cmd(vf, args->ops))
 347                 return -1;
 348
 349         info.msg = args->out_buffer;
 350         info.buf_len = args->out_size;
 351         info.ops = VIRTCHNL_OP_UNKNOWN;
 352         info.result = I40E_SUCCESS;
 353
 354         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 355                      args->in_args, args->in_args_size, NULL);
 356         if (err) {
 357                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 358                 _clear_cmd(vf);
 359                 return err;
 360         }
 361
 362         switch (args->ops) {
 363         case VIRTCHNL_OP_RESET_VF:
 364                 /*no need to process in this function */
 365                 err = 0;
 366                 break;
 367         case VIRTCHNL_OP_VERSION:
 368         case VIRTCHNL_OP_GET_VF_RESOURCES:
 369                 /* for init adminq commands, need to poll the response */
 370                 err = -1;
 371                 do {
 372                         ret = i40evf_read_pfmsg(dev, &info);
 373                         vf->cmd_retval = info.result;
 374                         if (ret == I40EVF_MSG_CMD) {
 375                                 err = 0;
 376                                 break;
 377                         } else if (ret == I40EVF_MSG_ERR)
 378                                 break;
 379                         rte_delay_ms(ASQ_DELAY_MS);
 380                         /* If don't read msg or read sys event, continue */
 381                 } while (i++ < MAX_TRY_TIMES);
 382                 _clear_cmd(vf);
 383                 break;
 384
 385         default:
 386                 /* for other adminq in running time, waiting the cmd done flag */
 387                 err = -1;
 388                 do {
 389                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 390                                 err = 0;
 391                                 break;
 392                         }
 393                         rte_delay_ms(ASQ_DELAY_MS);
 394                         /* If don't read msg or read sys event, continue */
 395                 } while (i++ < MAX_TRY_TIMES);
 396                 /* If there's no response is received, clear command */
 397                 if (i >= MAX_TRY_TIMES) {
 398                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 399                         _clear_cmd(vf);
 400                 }
 401                 break;
 402         }
 403
 404         return err | vf->cmd_retval;
 405 }
 406
 407 /*
 408  * Check API version with sync wait until version read or fail from admin queue
 409  */
 410 static int
 411 i40evf_check_api_version(struct rte_eth_dev *dev)
 412 {
 413         struct virtchnl_version_info version, *pver;
 414         int err;
 415         struct vf_cmd_info args;
 416         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 417
 418         version.major = VIRTCHNL_VERSION_MAJOR;
 419         version.minor = VIRTCHNL_VERSION_MINOR;
 420
 421         args.ops = VIRTCHNL_OP_VERSION;
 422         args.in_args = (uint8_t *)&version;
 423         args.in_args_size = sizeof(version);
 424         args.out_buffer = vf->aq_resp;
 425         args.out_size = I40E_AQ_BUF_SZ;
 426
 427         err = i40evf_execute_vf_cmd(dev, &args);
 428         if (err) {
 429                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 430                 return err;
 431         }
 432
 433         pver = (struct virtchnl_version_info *)args.out_buffer;
 434         vf->version_major = pver->major;
 435         vf->version_minor = pver->minor;
 436         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 437                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
 438         else if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 439                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 440                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 441         else {
 442                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 443                                         vf->version_major, vf->version_minor,
 444                                                 VIRTCHNL_VERSION_MAJOR,
 445                                                 VIRTCHNL_VERSION_MINOR);
 446                 return -1;
 447         }
 448
 449         return 0;
 450 }
 451
 452 static int
 453 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 454 {
 455         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 456         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 457         int err;
 458         struct vf_cmd_info args;
 459         uint32_t caps, len;
 460
 461         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 462         args.out_buffer = vf->aq_resp;
 463         args.out_size = I40E_AQ_BUF_SZ;
 464         if (PF_IS_V11(vf)) {
 465                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 466                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 467                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 468                        VIRTCHNL_VF_OFFLOAD_VLAN |
 469                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 470                 args.in_args = (uint8_t *)&caps;
 471                 args.in_args_size = sizeof(caps);
 472         } else {
 473                 args.in_args = NULL;
 474                 args.in_args_size = 0;
 475         }
 476         err = i40evf_execute_vf_cmd(dev, &args);
 477
 478         if (err) {
 479                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 480                 return err;
 481         }
 482
 483         len =  sizeof(struct virtchnl_vf_resource) +
 484                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 485
 486         (void)rte_memcpy(vf->vf_res, args.out_buffer,
 487                         RTE_MIN(args.out_size, len));
 488         i40e_vf_parse_hw_config(hw, vf->vf_res);
 489
 490         return 0;
 491 }
 492
 493 static int
 494 i40evf_config_promisc(struct rte_eth_dev *dev,
 495                       bool enable_unicast,
 496                       bool enable_multicast)
 497 {
 498         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 499         int err;
 500         struct vf_cmd_info args;
 501         struct virtchnl_promisc_info promisc;
 502
 503         promisc.flags = 0;
 504         promisc.vsi_id = vf->vsi_res->vsi_id;
 505
 506         if (enable_unicast)
 507                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 508
 509         if (enable_multicast)
 510                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 511
 512         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 513         args.in_args = (uint8_t *)&promisc;
 514         args.in_args_size = sizeof(promisc);
 515         args.out_buffer = vf->aq_resp;
 516         args.out_size = I40E_AQ_BUF_SZ;
 517
 518         err = i40evf_execute_vf_cmd(dev, &args);
 519
 520         if (err)
 521                 PMD_DRV_LOG(ERR, "fail to execute command "
 522                             "CONFIG_PROMISCUOUS_MODE");
 523         return err;
 524 }
 525
 526 static int
 527 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 528 {
 529         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 530         struct vf_cmd_info args;
 531         int ret;
 532
 533         memset(&args, 0, sizeof(args));
 534         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 535         args.in_args = NULL;
 536         args.in_args_size = 0;
 537         args.out_buffer = vf->aq_resp;
 538         args.out_size = I40E_AQ_BUF_SZ;
 539         ret = i40evf_execute_vf_cmd(dev, &args);
 540         if (ret)
 541                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 542                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 543
 544         return ret;
 545 }
 546
 547 static int
 548 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 549 {
 550         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 551         struct vf_cmd_info args;
 552         int ret;
 553
 554         memset(&args, 0, sizeof(args));
 555         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 556         args.in_args = NULL;
 557         args.in_args_size = 0;
 558         args.out_buffer = vf->aq_resp;
 559         args.out_size = I40E_AQ_BUF_SZ;
 560         ret = i40evf_execute_vf_cmd(dev, &args);
 561         if (ret)
 562                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 563                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 564
 565         return ret;
 566 }
 567
 568 static int
 569 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
 570                                 struct i40e_vsi_vlan_pvid_info *info)
 571 {
 572         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 573         int err;
 574         struct vf_cmd_info args;
 575         struct virtchnl_pvid_info tpid_info;
 576
 577         if (info == NULL) {
 578                 PMD_DRV_LOG(ERR, "invalid parameters");
 579                 return I40E_ERR_PARAM;
 580         }
 581
 582         memset(&tpid_info, 0, sizeof(tpid_info));
 583         tpid_info.vsi_id = vf->vsi_res->vsi_id;
 584         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
 585
 586         args.ops = (enum virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
 587         args.in_args = (uint8_t *)&tpid_info;
 588         args.in_args_size = sizeof(tpid_info);
 589         args.out_buffer = vf->aq_resp;
 590         args.out_size = I40E_AQ_BUF_SZ;
 591
 592         err = i40evf_execute_vf_cmd(dev, &args);
 593         if (err)
 594                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
 595
 596         return err;
 597 }
 598
 599 static void
 600 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 601                                   uint16_t vsi_id,
 602                                   uint16_t queue_id,
 603                                   uint16_t nb_txq,
 604                                   struct i40e_tx_queue *txq)
 605 {
 606         txq_info->vsi_id = vsi_id;
 607         txq_info->queue_id = queue_id;
 608         if (queue_id < nb_txq) {
 609                 txq_info->ring_len = txq->nb_tx_desc;
 610                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 611         }
 612 }
 613
 614 static void
 615 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 616                                   uint16_t vsi_id,
 617                                   uint16_t queue_id,
 618                                   uint16_t nb_rxq,
 619                                   uint32_t max_pkt_size,
 620                                   struct i40e_rx_queue *rxq)
 621 {
 622         rxq_info->vsi_id = vsi_id;
 623         rxq_info->queue_id = queue_id;
 624         rxq_info->max_pkt_size = max_pkt_size;
 625         if (queue_id < nb_rxq) {
 626                 rxq_info->ring_len = rxq->nb_rx_desc;
 627                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 628                 rxq_info->databuffer_size =
 629                         (rte_pktmbuf_data_room_size(rxq->mp) -
 630                                 RTE_PKTMBUF_HEADROOM);
 631         }
 632 }
 633
 634 /* It configures VSI queues to co-work with Linux PF host */
 635 static int
 636 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 637 {
 638         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 639         struct i40e_rx_queue **rxq =
 640                 (struct i40e_rx_queue **)dev->data->rx_queues;
 641         struct i40e_tx_queue **txq =
 642                 (struct i40e_tx_queue **)dev->data->tx_queues;
 643         struct virtchnl_vsi_queue_config_info *vc_vqci;
 644         struct virtchnl_queue_pair_info *vc_qpi;
 645         struct vf_cmd_info args;
 646         uint16_t i, nb_qp = vf->num_queue_pairs;
 647         const uint32_t size =
 648                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 649         uint8_t buff[size];
 650         int ret;
 651
 652         memset(buff, 0, sizeof(buff));
 653         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 654         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 655         vc_vqci->num_queue_pairs = nb_qp;
 656
 657         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 658                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 659                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 660                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 661                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 662                                         vf->max_pkt_len, rxq[i]);
 663         }
 664         memset(&args, 0, sizeof(args));
 665         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 666         args.in_args = (uint8_t *)vc_vqci;
 667         args.in_args_size = size;
 668         args.out_buffer = vf->aq_resp;
 669         args.out_size = I40E_AQ_BUF_SZ;
 670         ret = i40evf_execute_vf_cmd(dev, &args);
 671         if (ret)
 672                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 673                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 674
 675         return ret;
 676 }
 677
 678 /* It configures VSI queues to co-work with DPDK PF host */
 679 static int
 680 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
 681 {
 682         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 683         struct i40e_rx_queue **rxq =
 684                 (struct i40e_rx_queue **)dev->data->rx_queues;
 685         struct i40e_tx_queue **txq =
 686                 (struct i40e_tx_queue **)dev->data->tx_queues;
 687         struct virtchnl_vsi_queue_config_ext_info *vc_vqcei;
 688         struct virtchnl_queue_pair_ext_info *vc_qpei;
 689         struct vf_cmd_info args;
 690         uint16_t i, nb_qp = vf->num_queue_pairs;
 691         const uint32_t size =
 692                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
 693         uint8_t buff[size];
 694         int ret;
 695
 696         memset(buff, 0, sizeof(buff));
 697         vc_vqcei = (struct virtchnl_vsi_queue_config_ext_info *)buff;
 698         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
 699         vc_vqcei->num_queue_pairs = nb_qp;
 700         vc_qpei = vc_vqcei->qpair;
 701         for (i = 0; i < nb_qp; i++, vc_qpei++) {
 702                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
 703                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 704                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
 705                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
 706                                         vf->max_pkt_len, rxq[i]);
 707                 if (i < dev->data->nb_rx_queues)
 708                         /*
 709                          * It adds extra info for configuring VSI queues, which
 710                          * is needed to enable the configurable crc stripping
 711                          * in VF.
 712                          */
 713                         vc_qpei->rxq_ext.crcstrip =
 714                                 dev->data->dev_conf.rxmode.hw_strip_crc;
 715         }
 716         memset(&args, 0, sizeof(args));
 717         args.ops =
 718                 (enum virtchnl_ops)VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
 719         args.in_args = (uint8_t *)vc_vqcei;
 720         args.in_args_size = size;
 721         args.out_buffer = vf->aq_resp;
 722         args.out_size = I40E_AQ_BUF_SZ;
 723         ret = i40evf_execute_vf_cmd(dev, &args);
 724         if (ret)
 725                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 726                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT");
 727
 728         return ret;
 729 }
 730
 731 static int
 732 i40evf_configure_queues(struct rte_eth_dev *dev)
 733 {
 734         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 735
 736         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 737                 /* To support DPDK PF host */
 738                 return i40evf_configure_vsi_queues_ext(dev);
 739         else
 740                 /* To support Linux PF host */
 741                 return i40evf_configure_vsi_queues(dev);
 742 }
 743
 744 static int
 745 i40evf_config_irq_map(struct rte_eth_dev *dev)
 746 {
 747         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 748         struct vf_cmd_info args;
 749         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 750                 sizeof(struct virtchnl_vector_map)];
 751         struct virtchnl_irq_map_info *map_info;
 752         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 753         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 754         uint32_t vector_id;
 755         int i, err;
 756
 757         if (rte_intr_allow_others(intr_handle)) {
 758                 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 759                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
 760                 else
 761                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
 762         } else {
 763                 vector_id = I40E_MISC_VEC_ID;
 764         }
 765
 766         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 767         map_info->num_vectors = 1;
 768         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 769         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 770         /* Alway use default dynamic MSIX interrupt */
 771         map_info->vecmap[0].vector_id = vector_id;
 772         /* Don't map any tx queue */
 773         map_info->vecmap[0].txq_map = 0;
 774         map_info->vecmap[0].rxq_map = 0;
 775         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 776                 map_info->vecmap[0].rxq_map |= 1 << i;
 777                 if (rte_intr_dp_is_en(intr_handle))
 778                         intr_handle->intr_vec[i] = vector_id;
 779         }
 780
 781         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 782         args.in_args = (u8 *)cmd_buffer;
 783         args.in_args_size = sizeof(cmd_buffer);
 784         args.out_buffer = vf->aq_resp;
 785         args.out_size = I40E_AQ_BUF_SZ;
 786         err = i40evf_execute_vf_cmd(dev, &args);
 787         if (err)
 788                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 789
 790         return err;
 791 }
 792
 793 static int
 794 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 795                                 bool on)
 796 {
 797         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 798         struct virtchnl_queue_select queue_select;
 799         int err;
 800         struct vf_cmd_info args;
 801         memset(&queue_select, 0, sizeof(queue_select));
 802         queue_select.vsi_id = vf->vsi_res->vsi_id;
 803
 804         if (isrx)
 805                 queue_select.rx_queues |= 1 << qid;
 806         else
 807                 queue_select.tx_queues |= 1 << qid;
 808
 809         if (on)
 810                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 811         else
 812                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 813         args.in_args = (u8 *)&queue_select;
 814         args.in_args_size = sizeof(queue_select);
 815         args.out_buffer = vf->aq_resp;
 816         args.out_size = I40E_AQ_BUF_SZ;
 817         err = i40evf_execute_vf_cmd(dev, &args);
 818         if (err)
 819                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 820                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 821
 822         return err;
 823 }
 824
 825 static int
 826 i40evf_start_queues(struct rte_eth_dev *dev)
 827 {
 828         struct rte_eth_dev_data *dev_data = dev->data;
 829         int i;
 830         struct i40e_rx_queue *rxq;
 831         struct i40e_tx_queue *txq;
 832
 833         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 834                 rxq = dev_data->rx_queues[i];
 835                 if (rxq->rx_deferred_start)
 836                         continue;
 837                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 838                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 839                         return -1;
 840                 }
 841         }
 842
 843         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 844                 txq = dev_data->tx_queues[i];
 845                 if (txq->tx_deferred_start)
 846                         continue;
 847                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 848                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 849                         return -1;
 850                 }
 851         }
 852
 853         return 0;
 854 }
 855
 856 static int
 857 i40evf_stop_queues(struct rte_eth_dev *dev)
 858 {
 859         int i;
 860
 861         /* Stop TX queues first */
 862         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 863                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 864                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 865                         return -1;
 866                 }
 867         }
 868
 869         /* Then stop RX queues */
 870         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 871                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 872                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 873                         return -1;
 874                 }
 875         }
 876
 877         return 0;
 878 }
 879
 880 static int
 881 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 882                     struct ether_addr *addr,
 883                     __rte_unused uint32_t index,
 884                     __rte_unused uint32_t pool)
 885 {
 886         struct virtchnl_ether_addr_list *list;
 887         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 888         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 889                         sizeof(struct virtchnl_ether_addr)];
 890         int err;
 891         struct vf_cmd_info args;
 892
 893         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 894                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 895                             addr->addr_bytes[0], addr->addr_bytes[1],
 896                             addr->addr_bytes[2], addr->addr_bytes[3],
 897                             addr->addr_bytes[4], addr->addr_bytes[5]);
 898                 return I40E_ERR_INVALID_MAC_ADDR;
 899         }
 900
 901         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 902         list->vsi_id = vf->vsi_res->vsi_id;
 903         list->num_elements = 1;
 904         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 905                                         sizeof(addr->addr_bytes));
 906
 907         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 908         args.in_args = cmd_buffer;
 909         args.in_args_size = sizeof(cmd_buffer);
 910         args.out_buffer = vf->aq_resp;
 911         args.out_size = I40E_AQ_BUF_SZ;
 912         err = i40evf_execute_vf_cmd(dev, &args);
 913         if (err)
 914                 PMD_DRV_LOG(ERR, "fail to execute command "
 915                             "OP_ADD_ETHER_ADDRESS");
 916         else
 917                 vf->vsi.mac_num++;
 918
 919         return err;
 920 }
 921
 922 static void
 923 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 924                             struct ether_addr *addr)
 925 {
 926         struct virtchnl_ether_addr_list *list;
 927         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 928         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 929                         sizeof(struct virtchnl_ether_addr)];
 930         int err;
 931         struct vf_cmd_info args;
 932
 933         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 934                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 935                             addr->addr_bytes[0], addr->addr_bytes[1],
 936                             addr->addr_bytes[2], addr->addr_bytes[3],
 937                             addr->addr_bytes[4], addr->addr_bytes[5]);
 938                 return;
 939         }
 940
 941         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 942         list->vsi_id = vf->vsi_res->vsi_id;
 943         list->num_elements = 1;
 944         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 945                         sizeof(addr->addr_bytes));
 946
 947         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 948         args.in_args = cmd_buffer;
 949         args.in_args_size = sizeof(cmd_buffer);
 950         args.out_buffer = vf->aq_resp;
 951         args.out_size = I40E_AQ_BUF_SZ;
 952         err = i40evf_execute_vf_cmd(dev, &args);
 953         if (err)
 954                 PMD_DRV_LOG(ERR, "fail to execute command "
 955                             "OP_DEL_ETHER_ADDRESS");
 956         else
 957                 vf->vsi.mac_num--;
 958         return;
 959 }
 960
 961 static void
 962 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 963 {
 964         struct rte_eth_dev_data *data = dev->data;
 965         struct ether_addr *addr;
 966
 967         addr = &data->mac_addrs[index];
 968
 969         i40evf_del_mac_addr_by_addr(dev, addr);
 970 }
 971
 972 static int
 973 i40evf_update_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 974 {
 975         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 976         struct virtchnl_queue_select q_stats;
 977         int err;
 978         struct vf_cmd_info args;
 979
 980         memset(&q_stats, 0, sizeof(q_stats));
 981         q_stats.vsi_id = vf->vsi_res->vsi_id;
 982         args.ops = VIRTCHNL_OP_GET_STATS;
 983         args.in_args = (u8 *)&q_stats;
 984         args.in_args_size = sizeof(q_stats);
 985         args.out_buffer = vf->aq_resp;
 986         args.out_size = I40E_AQ_BUF_SZ;
 987
 988         err = i40evf_execute_vf_cmd(dev, &args);
 989         if (err) {
 990                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 991                 *pstats = NULL;
 992                 return err;
 993         }
 994         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 995         return 0;
 996 }
 997
 998 static int
 999 i40evf_get_statistics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1000 {
1001         int ret;
1002         struct i40e_eth_stats *pstats = NULL;
1003
1004         ret = i40evf_update_stats(dev, &pstats);
1005         if (ret != 0)
1006                 return 0;
1007
1008         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
1009                                                 pstats->rx_broadcast;
1010         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
1011                                                 pstats->tx_unicast;
1012         stats->imissed = pstats->rx_discards;
1013         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
1014         stats->ibytes = pstats->rx_bytes;
1015         stats->obytes = pstats->tx_bytes;
1016
1017         return 0;
1018 }
1019
1020 static void
1021 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
1022 {
1023         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1024         struct i40e_eth_stats *pstats = NULL;
1025
1026         /* read stat values to clear hardware registers */
1027         i40evf_update_stats(dev, &pstats);
1028
1029         /* set stats offset base on current values */
1030         vf->vsi.eth_stats_offset = vf->vsi.eth_stats;
1031 }
1032
1033 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1034                                       struct rte_eth_xstat_name *xstats_names,
1035                                       __rte_unused unsigned limit)
1036 {
1037         unsigned i;
1038
1039         if (xstats_names != NULL)
1040                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1041                         snprintf(xstats_names[i].name,
1042                                 sizeof(xstats_names[i].name),
1043                                 "%s", rte_i40evf_stats_strings[i].name);
1044                 }
1045         return I40EVF_NB_XSTATS;
1046 }
1047
1048 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1049                                  struct rte_eth_xstat *xstats, unsigned n)
1050 {
1051         int ret;
1052         unsigned i;
1053         struct i40e_eth_stats *pstats = NULL;
1054
1055         if (n < I40EVF_NB_XSTATS)
1056                 return I40EVF_NB_XSTATS;
1057
1058         ret = i40evf_update_stats(dev, &pstats);
1059         if (ret != 0)
1060                 return 0;
1061
1062         if (!xstats)
1063                 return 0;
1064
1065         /* loop over xstats array and values from pstats */
1066         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1067                 xstats[i].id = i;
1068                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1069                         rte_i40evf_stats_strings[i].offset);
1070         }
1071
1072         return I40EVF_NB_XSTATS;
1073 }
1074
1075 static int
1076 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1077 {
1078         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1079         struct virtchnl_vlan_filter_list *vlan_list;
1080         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1081                                                         sizeof(uint16_t)];
1082         int err;
1083         struct vf_cmd_info args;
1084
1085         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1086         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1087         vlan_list->num_elements = 1;
1088         vlan_list->vlan_id[0] = vlanid;
1089
1090         args.ops = VIRTCHNL_OP_ADD_VLAN;
1091         args.in_args = (u8 *)&cmd_buffer;
1092         args.in_args_size = sizeof(cmd_buffer);
1093         args.out_buffer = vf->aq_resp;
1094         args.out_size = I40E_AQ_BUF_SZ;
1095         err = i40evf_execute_vf_cmd(dev, &args);
1096         if (err)
1097                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1098
1099         return err;
1100 }
1101
1102 static int
1103 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1104 {
1105         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1106         struct virtchnl_vlan_filter_list *vlan_list;
1107         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1108                                                         sizeof(uint16_t)];
1109         int err;
1110         struct vf_cmd_info args;
1111
1112         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1113         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1114         vlan_list->num_elements = 1;
1115         vlan_list->vlan_id[0] = vlanid;
1116
1117         args.ops = VIRTCHNL_OP_DEL_VLAN;
1118         args.in_args = (u8 *)&cmd_buffer;
1119         args.in_args_size = sizeof(cmd_buffer);
1120         args.out_buffer = vf->aq_resp;
1121         args.out_size = I40E_AQ_BUF_SZ;
1122         err = i40evf_execute_vf_cmd(dev, &args);
1123         if (err)
1124                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1125
1126         return err;
1127 }
1128
1129 static const struct rte_pci_id pci_id_i40evf_map[] = {
1130         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1131         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1132         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1133         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1134         { .vendor_id = 0, /* sentinel */ },
1135 };
1136
1137 static inline int
1138 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1139                                     struct rte_eth_link *link)
1140 {
1141         struct rte_eth_link *dst = &(dev->data->dev_link);
1142         struct rte_eth_link *src = link;
1143
1144         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1145                                         *(uint64_t *)src) == 0)
1146                 return -1;
1147
1148         return 0;
1149 }
1150
1151 /* Disable IRQ0 */
1152 static inline void
1153 i40evf_disable_irq0(struct i40e_hw *hw)
1154 {
1155         /* Disable all interrupt types */
1156         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1157         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1158                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1159         I40EVF_WRITE_FLUSH(hw);
1160 }
1161
1162 /* Enable IRQ0 */
1163 static inline void
1164 i40evf_enable_irq0(struct i40e_hw *hw)
1165 {
1166         /* Enable admin queue interrupt trigger */
1167         uint32_t val;
1168
1169         i40evf_disable_irq0(hw);
1170         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1171         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1172                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1173         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1174
1175         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1176                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1177                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1178                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1179
1180         I40EVF_WRITE_FLUSH(hw);
1181 }
1182
1183 static int
1184 i40evf_reset_vf(struct i40e_hw *hw)
1185 {
1186         int i, reset;
1187
1188         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1189                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1190                 return -1;
1191         }
1192         /**
1193           * After issuing vf reset command to pf, pf won't necessarily
1194           * reset vf, it depends on what state it exactly is. If it's not
1195           * initialized yet, it won't have vf reset since it's in a certain
1196           * state. If not, it will try to reset. Even vf is reset, pf will
1197           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1198           * it to ACTIVE. In this duration, vf may not catch the moment that
1199           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1200           */
1201         rte_delay_ms(200);
1202
1203         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1204                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1205                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1206                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1207                 if (VIRTCHNL_VFR_COMPLETED == reset || VIRTCHNL_VFR_VFACTIVE == reset)
1208                         break;
1209                 else
1210                         rte_delay_ms(50);
1211         }
1212
1213         if (i >= MAX_RESET_WAIT_CNT) {
1214                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1215                 return -1;
1216         }
1217
1218         return 0;
1219 }
1220
1221 static int
1222 i40evf_init_vf(struct rte_eth_dev *dev)
1223 {
1224         int i, err, bufsz;
1225         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1226         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1227         uint16_t interval =
1228                 i40e_calc_itr_interval(I40E_QUEUE_ITR_INTERVAL_MAX);
1229
1230         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1231         vf->dev_data = dev->data;
1232         err = i40e_set_mac_type(hw);
1233         if (err) {
1234                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1235                 goto err;
1236         }
1237
1238         i40e_init_adminq_parameter(hw);
1239         err = i40e_init_adminq(hw);
1240         if (err) {
1241                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1242                 goto err;
1243         }
1244
1245         /* Reset VF and wait until it's complete */
1246         if (i40evf_reset_vf(hw)) {
1247                 PMD_INIT_LOG(ERR, "reset NIC failed");
1248                 goto err_aq;
1249         }
1250
1251         /* VF reset, shutdown admin queue and initialize again */
1252         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1253                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1254                 return -1;
1255         }
1256
1257         i40e_init_adminq_parameter(hw);
1258         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1259                 PMD_INIT_LOG(ERR, "init_adminq failed");
1260                 return -1;
1261         }
1262         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1263         if (!vf->aq_resp) {
1264                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1265                         goto err_aq;
1266         }
1267         if (i40evf_check_api_version(dev) != 0) {
1268                 PMD_INIT_LOG(ERR, "check_api version failed");
1269                 goto err_aq;
1270         }
1271         bufsz = sizeof(struct virtchnl_vf_resource) +
1272                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1273         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1274         if (!vf->vf_res) {
1275                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1276                         goto err_aq;
1277         }
1278
1279         if (i40evf_get_vf_resource(dev) != 0) {
1280                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1281                 goto err_alloc;
1282         }
1283
1284         /* got VF config message back from PF, now we can parse it */
1285         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1286                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1287                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1288         }
1289
1290         if (!vf->vsi_res) {
1291                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1292                 goto err_alloc;
1293         }
1294
1295         if (hw->mac.type == I40E_MAC_X722_VF)
1296                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1297         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1298         vf->vsi.type = (enum i40e_vsi_type)vf->vsi_res->vsi_type;
1299         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1300         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1301
1302         /* Store the MAC address configured by host, or generate random one */
1303         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1304                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1305         else
1306                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1307
1308         /* If the PF host is not DPDK, set the interval of ITR0 to max*/
1309         if (vf->version_major != I40E_DPDK_VERSION_MAJOR) {
1310                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1311                                (I40E_ITR_INDEX_DEFAULT <<
1312                                 I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1313                                (interval <<
1314                                 I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1315                 I40EVF_WRITE_FLUSH(hw);
1316         }
1317
1318         return 0;
1319
1320 err_alloc:
1321         rte_free(vf->vf_res);
1322 err_aq:
1323         i40e_shutdown_adminq(hw); /* ignore error */
1324 err:
1325         return -1;
1326 }
1327
1328 static int
1329 i40evf_uninit_vf(struct rte_eth_dev *dev)
1330 {
1331         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1332         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1333
1334         PMD_INIT_FUNC_TRACE();
1335
1336         if (hw->adapter_stopped == 0)
1337                 i40evf_dev_close(dev);
1338         rte_free(vf->vf_res);
1339         vf->vf_res = NULL;
1340         rte_free(vf->aq_resp);
1341         vf->aq_resp = NULL;
1342
1343         return 0;
1344 }
1345
1346 static void
1347 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1348                 __rte_unused uint16_t msglen)
1349 {
1350         struct virtchnl_pf_event *pf_msg =
1351                         (struct virtchnl_pf_event *)msg;
1352         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1353
1354         switch (pf_msg->event) {
1355         case VIRTCHNL_EVENT_RESET_IMPENDING:
1356                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1357                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1358                                               NULL, NULL);
1359                 break;
1360         case VIRTCHNL_EVENT_LINK_CHANGE:
1361                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1362                 vf->link_up = pf_msg->event_data.link_event.link_status;
1363                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1364                 break;
1365         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1366                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1367                 break;
1368         default:
1369                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1370                 break;
1371         }
1372 }
1373
1374 static void
1375 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1376 {
1377         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1378         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1379         struct i40e_arq_event_info info;
1380         uint16_t pending, aq_opc;
1381         enum virtchnl_ops msg_opc;
1382         enum i40e_status_code msg_ret;
1383         int ret;
1384
1385         info.buf_len = I40E_AQ_BUF_SZ;
1386         if (!vf->aq_resp) {
1387                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1388                 return;
1389         }
1390         info.msg_buf = vf->aq_resp;
1391
1392         pending = 1;
1393         while (pending) {
1394                 ret = i40e_clean_arq_element(hw, &info, &pending);
1395
1396                 if (ret != I40E_SUCCESS) {
1397                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1398                                     "ret: %d", ret);
1399                         break;
1400                 }
1401                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1402                 /* For the message sent from pf to vf, opcode is stored in
1403                  * cookie_high of struct i40e_aq_desc, while return error code
1404                  * are stored in cookie_low, Which is done by
1405                  * i40e_aq_send_msg_to_vf in PF driver.*/
1406                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1407                                                   info.desc.cookie_high);
1408                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1409                                                   info.desc.cookie_low);
1410                 switch (aq_opc) {
1411                 case i40e_aqc_opc_send_msg_to_vf:
1412                         if (msg_opc == VIRTCHNL_OP_EVENT)
1413                                 /* process event*/
1414                                 i40evf_handle_pf_event(dev, info.msg_buf,
1415                                                        info.msg_len);
1416                         else {
1417                                 /* read message and it's expected one */
1418                                 if (msg_opc == vf->pend_cmd) {
1419                                         vf->cmd_retval = msg_ret;
1420                                         /* prevent compiler reordering */
1421                                         rte_compiler_barrier();
1422                                         _clear_cmd(vf);
1423                                 } else
1424                                         PMD_DRV_LOG(ERR, "command mismatch,"
1425                                                 "expect %u, get %u",
1426                                                 vf->pend_cmd, msg_opc);
1427                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1428                                              " opcode = %d", msg_opc);
1429                         }
1430                         break;
1431                 default:
1432                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1433                                     aq_opc);
1434                         break;
1435                 }
1436         }
1437 }
1438
1439 /**
1440  * Interrupt handler triggered by NIC  for handling
1441  * specific interrupt. Only adminq interrupt is processed in VF.
1442  *
1443  * @param handle
1444  *  Pointer to interrupt handle.
1445  * @param param
1446  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1447  *
1448  * @return
1449  *  void
1450  */
1451 static void
1452 i40evf_dev_interrupt_handler(void *param)
1453 {
1454         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1455         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1456         uint32_t icr0;
1457
1458         i40evf_disable_irq0(hw);
1459
1460         /* read out interrupt causes */
1461         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1462
1463         /* No interrupt event indicated */
1464         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK)) {
1465                 PMD_DRV_LOG(DEBUG, "No interrupt event, nothing to do");
1466                 goto done;
1467         }
1468
1469         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1470                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1471                 i40evf_handle_aq_msg(dev);
1472         }
1473
1474         /* Link Status Change interrupt */
1475         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1476                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1477                                    " do nothing");
1478
1479 done:
1480         i40evf_enable_irq0(hw);
1481         rte_intr_enable(dev->intr_handle);
1482 }
1483
1484 static int
1485 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1486 {
1487         struct i40e_hw *hw
1488                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1489         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1490
1491         PMD_INIT_FUNC_TRACE();
1492
1493         /* assign ops func pointer */
1494         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1495         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1496         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1497
1498         /*
1499          * For secondary processes, we don't initialise any further as primary
1500          * has already done this work.
1501          */
1502         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1503                 i40e_set_rx_function(eth_dev);
1504                 i40e_set_tx_function(eth_dev);
1505                 return 0;
1506         }
1507         i40e_set_default_ptype_table(eth_dev);
1508         rte_eth_copy_pci_info(eth_dev, pci_dev);
1509         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1510
1511         hw->vendor_id = pci_dev->id.vendor_id;
1512         hw->device_id = pci_dev->id.device_id;
1513         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1514         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1515         hw->bus.device = pci_dev->addr.devid;
1516         hw->bus.func = pci_dev->addr.function;
1517         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1518         hw->adapter_stopped = 0;
1519
1520         if(i40evf_init_vf(eth_dev) != 0) {
1521                 PMD_INIT_LOG(ERR, "Init vf failed");
1522                 return -1;
1523         }
1524
1525         /* register callback func to eal lib */
1526         rte_intr_callback_register(&pci_dev->intr_handle,
1527                 i40evf_dev_interrupt_handler, (void *)eth_dev);
1528
1529         /* enable uio intr after callback register */
1530         rte_intr_enable(&pci_dev->intr_handle);
1531
1532         /* configure and enable device interrupt */
1533         i40evf_enable_irq0(hw);
1534
1535         /* copy mac addr */
1536         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1537                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1538                                         0);
1539         if (eth_dev->data->mac_addrs == NULL) {
1540                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1541                                 " store MAC addresses",
1542                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1543                 return -ENOMEM;
1544         }
1545         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1546                         &eth_dev->data->mac_addrs[0]);
1547
1548         return 0;
1549 }
1550
1551 static int
1552 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1553 {
1554         PMD_INIT_FUNC_TRACE();
1555
1556         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1557                 return -EPERM;
1558
1559         eth_dev->dev_ops = NULL;
1560         eth_dev->rx_pkt_burst = NULL;
1561         eth_dev->tx_pkt_burst = NULL;
1562
1563         if (i40evf_uninit_vf(eth_dev) != 0) {
1564                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1565                 return -1;
1566         }
1567
1568         rte_free(eth_dev->data->mac_addrs);
1569         eth_dev->data->mac_addrs = NULL;
1570
1571         return 0;
1572 }
1573
1574 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1575         struct rte_pci_device *pci_dev)
1576 {
1577         return rte_eth_dev_pci_generic_probe(pci_dev,
1578                 sizeof(struct i40e_adapter), i40evf_dev_init);
1579 }
1580
1581 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1582 {
1583         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1584 }
1585
1586 /*
1587  * virtual function driver struct
1588  */
1589 static struct rte_pci_driver rte_i40evf_pmd = {
1590         .id_table = pci_id_i40evf_map,
1591         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1592         .probe = eth_i40evf_pci_probe,
1593         .remove = eth_i40evf_pci_remove,
1594 };
1595
1596 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1597 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1598 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1599
1600 static int
1601 i40evf_dev_configure(struct rte_eth_dev *dev)
1602 {
1603         struct i40e_adapter *ad =
1604                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1605         struct rte_eth_conf *conf = &dev->data->dev_conf;
1606         struct i40e_vf *vf;
1607
1608         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1609          * allocation or vector Rx preconditions we will reset it.
1610          */
1611         ad->rx_bulk_alloc_allowed = true;
1612         ad->rx_vec_allowed = true;
1613         ad->tx_simple_allowed = true;
1614         ad->tx_vec_allowed = true;
1615
1616         /* For non-DPDK PF drivers, VF has no ability to disable HW
1617          * CRC strip, and is implicitly enabled by the PF.
1618          */
1619         if (!conf->rxmode.hw_strip_crc) {
1620                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1621                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1622                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1623                         /* Peer is running non-DPDK PF driver. */
1624                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1625                         return -EINVAL;
1626                 }
1627         }
1628
1629         return i40evf_init_vlan(dev);
1630 }
1631
1632 static int
1633 i40evf_init_vlan(struct rte_eth_dev *dev)
1634 {
1635         struct rte_eth_dev_data *data = dev->data;
1636         int ret;
1637
1638         /* Apply vlan offload setting */
1639         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1640
1641         /* Apply pvid setting */
1642         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1643                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1644         return ret;
1645 }
1646
1647 static void
1648 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1649 {
1650         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1651
1652         /* Vlan stripping setting */
1653         if (mask & ETH_VLAN_STRIP_MASK) {
1654                 /* Enable or disable VLAN stripping */
1655                 if (dev_conf->rxmode.hw_vlan_strip)
1656                         i40evf_enable_vlan_strip(dev);
1657                 else
1658                         i40evf_disable_vlan_strip(dev);
1659         }
1660 }
1661
1662 static int
1663 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1664 {
1665         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1666         struct i40e_vsi_vlan_pvid_info info;
1667         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1668
1669         memset(&info, 0, sizeof(info));
1670         info.on = on;
1671
1672         /* Linux pf host don't support vlan offload yet */
1673         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1674                 if (info.on)
1675                         info.config.pvid = pvid;
1676                 else {
1677                         info.config.reject.tagged =
1678                                 dev_conf->txmode.hw_vlan_reject_tagged;
1679                         info.config.reject.untagged =
1680                                 dev_conf->txmode.hw_vlan_reject_untagged;
1681                 }
1682                 return i40evf_config_vlan_pvid(dev, &info);
1683         }
1684
1685         return 0;
1686 }
1687
1688 static int
1689 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1690 {
1691         struct i40e_rx_queue *rxq;
1692         int err = 0;
1693         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1694
1695         PMD_INIT_FUNC_TRACE();
1696
1697         if (rx_queue_id < dev->data->nb_rx_queues) {
1698                 rxq = dev->data->rx_queues[rx_queue_id];
1699
1700                 err = i40e_alloc_rx_queue_mbufs(rxq);
1701                 if (err) {
1702                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1703                         return err;
1704                 }
1705
1706                 rte_wmb();
1707
1708                 /* Init the RX tail register. */
1709                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1710                 I40EVF_WRITE_FLUSH(hw);
1711
1712                 /* Ready to switch the queue on */
1713                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1714
1715                 if (err)
1716                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1717                                     rx_queue_id);
1718                 else
1719                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1720         }
1721
1722         return err;
1723 }
1724
1725 static int
1726 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1727 {
1728         struct i40e_rx_queue *rxq;
1729         int err;
1730
1731         if (rx_queue_id < dev->data->nb_rx_queues) {
1732                 rxq = dev->data->rx_queues[rx_queue_id];
1733
1734                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1735
1736                 if (err) {
1737                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1738                                     rx_queue_id);
1739                         return err;
1740                 }
1741
1742                 i40e_rx_queue_release_mbufs(rxq);
1743                 i40e_reset_rx_queue(rxq);
1744                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1745         }
1746
1747         return 0;
1748 }
1749
1750 static int
1751 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1752 {
1753         int err = 0;
1754
1755         PMD_INIT_FUNC_TRACE();
1756
1757         if (tx_queue_id < dev->data->nb_tx_queues) {
1758
1759                 /* Ready to switch the queue on */
1760                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1761
1762                 if (err)
1763                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1764                                     tx_queue_id);
1765                 else
1766                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1767         }
1768
1769         return err;
1770 }
1771
1772 static int
1773 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1774 {
1775         struct i40e_tx_queue *txq;
1776         int err;
1777
1778         if (tx_queue_id < dev->data->nb_tx_queues) {
1779                 txq = dev->data->tx_queues[tx_queue_id];
1780
1781                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1782
1783                 if (err) {
1784                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1785                                     tx_queue_id);
1786                         return err;
1787                 }
1788
1789                 i40e_tx_queue_release_mbufs(txq);
1790                 i40e_reset_tx_queue(txq);
1791                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1792         }
1793
1794         return 0;
1795 }
1796
1797 static int
1798 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1799 {
1800         int ret;
1801
1802         if (on)
1803                 ret = i40evf_add_vlan(dev, vlan_id);
1804         else
1805                 ret = i40evf_del_vlan(dev,vlan_id);
1806
1807         return ret;
1808 }
1809
1810 static int
1811 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1812 {
1813         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1814         struct rte_eth_dev_data *dev_data = dev->data;
1815         struct rte_pktmbuf_pool_private *mbp_priv;
1816         uint16_t buf_size, len;
1817
1818         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1819         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1820         I40EVF_WRITE_FLUSH(hw);
1821
1822         /* Calculate the maximum packet length allowed */
1823         mbp_priv = rte_mempool_get_priv(rxq->mp);
1824         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1825                                         RTE_PKTMBUF_HEADROOM);
1826         rxq->hs_mode = i40e_header_split_none;
1827         rxq->rx_hdr_len = 0;
1828         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1829         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1830         rxq->max_pkt_len = RTE_MIN(len,
1831                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1832
1833         /**
1834          * Check if the jumbo frame and maximum packet length are set correctly
1835          */
1836         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1837                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1838                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1839                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1840                                 "larger than %u and smaller than %u, as jumbo "
1841                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1842                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1843                         return I40E_ERR_CONFIG;
1844                 }
1845         } else {
1846                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1847                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1848                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1849                                 "larger than %u and smaller than %u, as jumbo "
1850                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1851                                                 (uint32_t)ETHER_MAX_LEN);
1852                         return I40E_ERR_CONFIG;
1853                 }
1854         }
1855
1856         if (dev_data->dev_conf.rxmode.enable_scatter ||
1857             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1858                 dev_data->scattered_rx = 1;
1859         }
1860
1861         return 0;
1862 }
1863
1864 static int
1865 i40evf_rx_init(struct rte_eth_dev *dev)
1866 {
1867         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1868         uint16_t i;
1869         int ret = I40E_SUCCESS;
1870         struct i40e_rx_queue **rxq =
1871                 (struct i40e_rx_queue **)dev->data->rx_queues;
1872
1873         i40evf_config_rss(vf);
1874         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1875                 if (!rxq[i] || !rxq[i]->q_set)
1876                         continue;
1877                 ret = i40evf_rxq_init(dev, rxq[i]);
1878                 if (ret != I40E_SUCCESS)
1879                         break;
1880         }
1881         if (ret == I40E_SUCCESS)
1882                 i40e_set_rx_function(dev);
1883
1884         return ret;
1885 }
1886
1887 static void
1888 i40evf_tx_init(struct rte_eth_dev *dev)
1889 {
1890         uint16_t i;
1891         struct i40e_tx_queue **txq =
1892                 (struct i40e_tx_queue **)dev->data->tx_queues;
1893         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1894
1895         for (i = 0; i < dev->data->nb_tx_queues; i++)
1896                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1897
1898         i40e_set_tx_function(dev);
1899 }
1900
1901 static inline void
1902 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1903 {
1904         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1905         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1906         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1907         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1908
1909         if (!rte_intr_allow_others(intr_handle)) {
1910                 I40E_WRITE_REG(hw,
1911                                I40E_VFINT_DYN_CTL01,
1912                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1913                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1914                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1915                 I40EVF_WRITE_FLUSH(hw);
1916                 return;
1917         }
1918
1919         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1920                 /* To support DPDK PF host */
1921                 I40E_WRITE_REG(hw,
1922                         I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1923                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1924                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1925         /* If host driver is kernel driver, do nothing.
1926          * Interrupt 0 is used for rx packets, but don't set
1927          * I40E_VFINT_DYN_CTL01,
1928          * because it is already done in i40evf_enable_irq0.
1929          */
1930
1931         I40EVF_WRITE_FLUSH(hw);
1932 }
1933
1934 static inline void
1935 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1936 {
1937         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1938         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1939         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1940         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1941
1942         if (!rte_intr_allow_others(intr_handle)) {
1943                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1944                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1945                 I40EVF_WRITE_FLUSH(hw);
1946                 return;
1947         }
1948
1949         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1950                 I40E_WRITE_REG(hw,
1951                                I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR
1952                                                     - 1),
1953                                0);
1954         /* If host driver is kernel driver, do nothing.
1955          * Interrupt 0 is used for rx packets, but don't zero
1956          * I40E_VFINT_DYN_CTL01,
1957          * because interrupt 0 is also used for adminq processing.
1958          */
1959
1960         I40EVF_WRITE_FLUSH(hw);
1961 }
1962
1963 static int
1964 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1965 {
1966         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1967         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1968         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1969         uint16_t interval =
1970                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
1971         uint16_t msix_intr;
1972
1973         msix_intr = intr_handle->intr_vec[queue_id];
1974         if (msix_intr == I40E_MISC_VEC_ID)
1975                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1976                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1977                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1978                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1979                                (interval <<
1980                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1981         else
1982                 I40E_WRITE_REG(hw,
1983                                I40E_VFINT_DYN_CTLN1(msix_intr -
1984                                                     I40E_RX_VEC_START),
1985                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1986                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1987                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1988                                (interval <<
1989                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1990
1991         I40EVF_WRITE_FLUSH(hw);
1992
1993         rte_intr_enable(&pci_dev->intr_handle);
1994
1995         return 0;
1996 }
1997
1998 static int
1999 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
2000 {
2001         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2002         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2003         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2004         uint16_t msix_intr;
2005
2006         msix_intr = intr_handle->intr_vec[queue_id];
2007         if (msix_intr == I40E_MISC_VEC_ID)
2008                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
2009         else
2010                 I40E_WRITE_REG(hw,
2011                                I40E_VFINT_DYN_CTLN1(msix_intr -
2012                                                     I40E_RX_VEC_START),
2013                                0);
2014
2015         I40EVF_WRITE_FLUSH(hw);
2016
2017         return 0;
2018 }
2019
2020 static void
2021 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
2022 {
2023         struct virtchnl_ether_addr_list *list;
2024         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2025         int err, i, j;
2026         int next_begin = 0;
2027         int begin = 0;
2028         uint32_t len;
2029         struct ether_addr *addr;
2030         struct vf_cmd_info args;
2031
2032         do {
2033                 j = 0;
2034                 len = sizeof(struct virtchnl_ether_addr_list);
2035                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2036                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
2037                                 continue;
2038                         len += sizeof(struct virtchnl_ether_addr);
2039                         if (len >= I40E_AQ_BUF_SZ) {
2040                                 next_begin = i + 1;
2041                                 break;
2042                         }
2043                 }
2044
2045                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2046                 if (!list) {
2047                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2048                         return;
2049                 }
2050
2051                 for (i = begin; i < next_begin; i++) {
2052                         addr = &dev->data->mac_addrs[i];
2053                         if (is_zero_ether_addr(addr))
2054                                 continue;
2055                         (void)rte_memcpy(list->list[j].addr, addr->addr_bytes,
2056                                          sizeof(addr->addr_bytes));
2057                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
2058                                     addr->addr_bytes[0], addr->addr_bytes[1],
2059                                     addr->addr_bytes[2], addr->addr_bytes[3],
2060                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2061                         j++;
2062                 }
2063                 list->vsi_id = vf->vsi_res->vsi_id;
2064                 list->num_elements = j;
2065                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2066                            VIRTCHNL_OP_DEL_ETH_ADDR;
2067                 args.in_args = (uint8_t *)list;
2068                 args.in_args_size = len;
2069                 args.out_buffer = vf->aq_resp;
2070                 args.out_size = I40E_AQ_BUF_SZ;
2071                 err = i40evf_execute_vf_cmd(dev, &args);
2072                 if (err) {
2073                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2074                                     add ? "OP_ADD_ETHER_ADDRESS" :
2075                                     "OP_DEL_ETHER_ADDRESS");
2076                 } else {
2077                         if (add)
2078                                 vf->vsi.mac_num++;
2079                         else
2080                                 vf->vsi.mac_num--;
2081                 }
2082                 rte_free(list);
2083                 begin = next_begin;
2084         } while (begin < I40E_NUM_MACADDR_MAX);
2085 }
2086
2087 static int
2088 i40evf_dev_start(struct rte_eth_dev *dev)
2089 {
2090         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2091         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2092         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2093         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2094         uint32_t intr_vector = 0;
2095
2096         PMD_INIT_FUNC_TRACE();
2097
2098         hw->adapter_stopped = 0;
2099
2100         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2101         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2102                                         dev->data->nb_tx_queues);
2103
2104         /* check and configure queue intr-vector mapping */
2105         if (dev->data->dev_conf.intr_conf.rxq != 0) {
2106                 intr_vector = dev->data->nb_rx_queues;
2107                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2108                         return -1;
2109         }
2110
2111         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2112                 intr_handle->intr_vec =
2113                         rte_zmalloc("intr_vec",
2114                                     dev->data->nb_rx_queues * sizeof(int), 0);
2115                 if (!intr_handle->intr_vec) {
2116                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2117                                      " intr_vec", dev->data->nb_rx_queues);
2118                         return -ENOMEM;
2119                 }
2120         }
2121
2122         if (i40evf_rx_init(dev) != 0){
2123                 PMD_DRV_LOG(ERR, "failed to do RX init");
2124                 return -1;
2125         }
2126
2127         i40evf_tx_init(dev);
2128
2129         if (i40evf_configure_queues(dev) != 0) {
2130                 PMD_DRV_LOG(ERR, "configure queues failed");
2131                 goto err_queue;
2132         }
2133         if (i40evf_config_irq_map(dev)) {
2134                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2135                 goto err_queue;
2136         }
2137
2138         /* Set all mac addrs */
2139         i40evf_add_del_all_mac_addr(dev, TRUE);
2140
2141         if (i40evf_start_queues(dev) != 0) {
2142                 PMD_DRV_LOG(ERR, "enable queues failed");
2143                 goto err_mac;
2144         }
2145
2146         i40evf_enable_queues_intr(dev);
2147         return 0;
2148
2149 err_mac:
2150         i40evf_add_del_all_mac_addr(dev, FALSE);
2151 err_queue:
2152         return -1;
2153 }
2154
2155 static void
2156 i40evf_dev_stop(struct rte_eth_dev *dev)
2157 {
2158         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2159         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2160         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev);
2161
2162         PMD_INIT_FUNC_TRACE();
2163
2164         if (hw->adapter_stopped == 1)
2165                 return;
2166         i40evf_stop_queues(dev);
2167         i40evf_disable_queues_intr(dev);
2168         i40e_dev_clear_queues(dev);
2169
2170         /* Clean datapath event and queue/vec mapping */
2171         rte_intr_efd_disable(intr_handle);
2172         if (intr_handle->intr_vec) {
2173                 rte_free(intr_handle->intr_vec);
2174                 intr_handle->intr_vec = NULL;
2175         }
2176         /* remove all mac addrs */
2177         i40evf_add_del_all_mac_addr(dev, FALSE);
2178         hw->adapter_stopped = 1;
2179
2180 }
2181
2182 static int
2183 i40evf_dev_link_update(struct rte_eth_dev *dev,
2184                        __rte_unused int wait_to_complete)
2185 {
2186         struct rte_eth_link new_link;
2187         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2188         /*
2189          * DPDK pf host provide interfacet to acquire link status
2190          * while Linux driver does not
2191          */
2192
2193         /* Linux driver PF host */
2194         switch (vf->link_speed) {
2195         case I40E_LINK_SPEED_100MB:
2196                 new_link.link_speed = ETH_SPEED_NUM_100M;
2197                 break;
2198         case I40E_LINK_SPEED_1GB:
2199                 new_link.link_speed = ETH_SPEED_NUM_1G;
2200                 break;
2201         case I40E_LINK_SPEED_10GB:
2202                 new_link.link_speed = ETH_SPEED_NUM_10G;
2203                 break;
2204         case I40E_LINK_SPEED_20GB:
2205                 new_link.link_speed = ETH_SPEED_NUM_20G;
2206                 break;
2207         case I40E_LINK_SPEED_25GB:
2208                 new_link.link_speed = ETH_SPEED_NUM_25G;
2209                 break;
2210         case I40E_LINK_SPEED_40GB:
2211                 new_link.link_speed = ETH_SPEED_NUM_40G;
2212                 break;
2213         default:
2214                 new_link.link_speed = ETH_SPEED_NUM_100M;
2215                 break;
2216         }
2217         /* full duplex only */
2218         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2219         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2220                                              ETH_LINK_DOWN;
2221
2222         i40evf_dev_atomic_write_link_status(dev, &new_link);
2223
2224         return 0;
2225 }
2226
2227 static void
2228 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2229 {
2230         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2231         int ret;
2232
2233         /* If enabled, just return */
2234         if (vf->promisc_unicast_enabled)
2235                 return;
2236
2237         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2238         if (ret == 0)
2239                 vf->promisc_unicast_enabled = TRUE;
2240 }
2241
2242 static void
2243 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2244 {
2245         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2246         int ret;
2247
2248         /* If disabled, just return */
2249         if (!vf->promisc_unicast_enabled)
2250                 return;
2251
2252         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2253         if (ret == 0)
2254                 vf->promisc_unicast_enabled = FALSE;
2255 }
2256
2257 static void
2258 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2259 {
2260         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2261         int ret;
2262
2263         /* If enabled, just return */
2264         if (vf->promisc_multicast_enabled)
2265                 return;
2266
2267         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2268         if (ret == 0)
2269                 vf->promisc_multicast_enabled = TRUE;
2270 }
2271
2272 static void
2273 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2274 {
2275         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2276         int ret;
2277
2278         /* If enabled, just return */
2279         if (!vf->promisc_multicast_enabled)
2280                 return;
2281
2282         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2283         if (ret == 0)
2284                 vf->promisc_multicast_enabled = FALSE;
2285 }
2286
2287 static void
2288 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2289 {
2290         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2291
2292         memset(dev_info, 0, sizeof(*dev_info));
2293         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2294         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2295         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2296         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2297         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2298         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2299         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2300         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
2301         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2302         dev_info->rx_offload_capa =
2303                 DEV_RX_OFFLOAD_VLAN_STRIP |
2304                 DEV_RX_OFFLOAD_QINQ_STRIP |
2305                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2306                 DEV_RX_OFFLOAD_UDP_CKSUM |
2307                 DEV_RX_OFFLOAD_TCP_CKSUM;
2308         dev_info->tx_offload_capa =
2309                 DEV_TX_OFFLOAD_VLAN_INSERT |
2310                 DEV_TX_OFFLOAD_QINQ_INSERT |
2311                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2312                 DEV_TX_OFFLOAD_UDP_CKSUM |
2313                 DEV_TX_OFFLOAD_TCP_CKSUM |
2314                 DEV_TX_OFFLOAD_SCTP_CKSUM;
2315
2316         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2317                 .rx_thresh = {
2318                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2319                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2320                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2321                 },
2322                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2323                 .rx_drop_en = 0,
2324         };
2325
2326         dev_info->default_txconf = (struct rte_eth_txconf) {
2327                 .tx_thresh = {
2328                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2329                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2330                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2331                 },
2332                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2333                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2334                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2335                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2336         };
2337
2338         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2339                 .nb_max = I40E_MAX_RING_DESC,
2340                 .nb_min = I40E_MIN_RING_DESC,
2341                 .nb_align = I40E_ALIGN_RING_DESC,
2342         };
2343
2344         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2345                 .nb_max = I40E_MAX_RING_DESC,
2346                 .nb_min = I40E_MIN_RING_DESC,
2347                 .nb_align = I40E_ALIGN_RING_DESC,
2348         };
2349 }
2350
2351 static void
2352 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2353 {
2354         if (i40evf_get_statistics(dev, stats))
2355                 PMD_DRV_LOG(ERR, "Get statistics failed");
2356 }
2357
2358 static void
2359 i40evf_dev_close(struct rte_eth_dev *dev)
2360 {
2361         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2362         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2363         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2364
2365         i40evf_dev_stop(dev);
2366         i40e_dev_free_queues(dev);
2367         i40evf_reset_vf(hw);
2368         i40e_shutdown_adminq(hw);
2369         /* disable uio intr before callback unregister */
2370         rte_intr_disable(intr_handle);
2371
2372         /* unregister callback func from eal lib */
2373         rte_intr_callback_unregister(intr_handle,
2374                                      i40evf_dev_interrupt_handler, dev);
2375         i40evf_disable_irq0(hw);
2376 }
2377
2378 /*
2379  * Reset VF device only to re-initialize resources in PMD layer
2380  */
2381 static int
2382 i40evf_dev_reset(struct rte_eth_dev *dev)
2383 {
2384         int ret;
2385
2386         ret = i40evf_dev_uninit(dev);
2387         if (ret)
2388                 return ret;
2389
2390         ret = i40evf_dev_init(dev);
2391
2392         return ret;
2393 }
2394
2395 static int
2396 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2397 {
2398         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2399         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2400         int ret;
2401
2402         if (!lut)
2403                 return -EINVAL;
2404
2405         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2406                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2407                                           lut, lut_size);
2408                 if (ret) {
2409                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2410                         return ret;
2411                 }
2412         } else {
2413                 uint32_t *lut_dw = (uint32_t *)lut;
2414                 uint16_t i, lut_size_dw = lut_size / 4;
2415
2416                 for (i = 0; i < lut_size_dw; i++)
2417                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2418         }
2419
2420         return 0;
2421 }
2422
2423 static int
2424 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2425 {
2426         struct i40e_vf *vf;
2427         struct i40e_hw *hw;
2428         int ret;
2429
2430         if (!vsi || !lut)
2431                 return -EINVAL;
2432
2433         vf = I40E_VSI_TO_VF(vsi);
2434         hw = I40E_VSI_TO_HW(vsi);
2435
2436         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2437                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2438                                           lut, lut_size);
2439                 if (ret) {
2440                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2441                         return ret;
2442                 }
2443         } else {
2444                 uint32_t *lut_dw = (uint32_t *)lut;
2445                 uint16_t i, lut_size_dw = lut_size / 4;
2446
2447                 for (i = 0; i < lut_size_dw; i++)
2448                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2449                 I40EVF_WRITE_FLUSH(hw);
2450         }
2451
2452         return 0;
2453 }
2454
2455 static int
2456 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2457                            struct rte_eth_rss_reta_entry64 *reta_conf,
2458                            uint16_t reta_size)
2459 {
2460         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2461         uint8_t *lut;
2462         uint16_t i, idx, shift;
2463         int ret;
2464
2465         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2466                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2467                         "(%d) doesn't match the number of hardware can "
2468                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2469                 return -EINVAL;
2470         }
2471
2472         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2473         if (!lut) {
2474                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2475                 return -ENOMEM;
2476         }
2477         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2478         if (ret)
2479                 goto out;
2480         for (i = 0; i < reta_size; i++) {
2481                 idx = i / RTE_RETA_GROUP_SIZE;
2482                 shift = i % RTE_RETA_GROUP_SIZE;
2483                 if (reta_conf[idx].mask & (1ULL << shift))
2484                         lut[i] = reta_conf[idx].reta[shift];
2485         }
2486         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2487
2488 out:
2489         rte_free(lut);
2490
2491         return ret;
2492 }
2493
2494 static int
2495 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2496                           struct rte_eth_rss_reta_entry64 *reta_conf,
2497                           uint16_t reta_size)
2498 {
2499         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2500         uint16_t i, idx, shift;
2501         uint8_t *lut;
2502         int ret;
2503
2504         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2505                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2506                         "(%d) doesn't match the number of hardware can "
2507                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2508                 return -EINVAL;
2509         }
2510
2511         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2512         if (!lut) {
2513                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2514                 return -ENOMEM;
2515         }
2516
2517         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2518         if (ret)
2519                 goto out;
2520         for (i = 0; i < reta_size; i++) {
2521                 idx = i / RTE_RETA_GROUP_SIZE;
2522                 shift = i % RTE_RETA_GROUP_SIZE;
2523                 if (reta_conf[idx].mask & (1ULL << shift))
2524                         reta_conf[idx].reta[shift] = lut[i];
2525         }
2526
2527 out:
2528         rte_free(lut);
2529
2530         return ret;
2531 }
2532
2533 static int
2534 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2535 {
2536         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2537         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2538         int ret = 0;
2539
2540         if (!key || key_len == 0) {
2541                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2542                 return 0;
2543         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2544                 sizeof(uint32_t)) {
2545                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2546                 return -EINVAL;
2547         }
2548
2549         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2550                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2551                         (struct i40e_aqc_get_set_rss_key_data *)key;
2552
2553                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2554                 if (ret)
2555                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2556                                      "via AQ");
2557         } else {
2558                 uint32_t *hash_key = (uint32_t *)key;
2559                 uint16_t i;
2560
2561                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2562                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2563                 I40EVF_WRITE_FLUSH(hw);
2564         }
2565
2566         return ret;
2567 }
2568
2569 static int
2570 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2571 {
2572         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2573         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2574         int ret;
2575
2576         if (!key || !key_len)
2577                 return -EINVAL;
2578
2579         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2580                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2581                         (struct i40e_aqc_get_set_rss_key_data *)key);
2582                 if (ret) {
2583                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2584                         return ret;
2585                 }
2586         } else {
2587                 uint32_t *key_dw = (uint32_t *)key;
2588                 uint16_t i;
2589
2590                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2591                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2592         }
2593         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2594
2595         return 0;
2596 }
2597
2598 static int
2599 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2600 {
2601         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2602         uint64_t rss_hf, hena;
2603         int ret;
2604
2605         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2606                                  rss_conf->rss_key_len);
2607         if (ret)
2608                 return ret;
2609
2610         rss_hf = rss_conf->rss_hf;
2611         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2612         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2613         if (hw->mac.type == I40E_MAC_X722)
2614                 hena &= ~I40E_RSS_HENA_ALL_X722;
2615         else
2616                 hena &= ~I40E_RSS_HENA_ALL;
2617         hena |= i40e_config_hena(rss_hf, hw->mac.type);
2618         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2619         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2620         I40EVF_WRITE_FLUSH(hw);
2621
2622         return 0;
2623 }
2624
2625 static void
2626 i40evf_disable_rss(struct i40e_vf *vf)
2627 {
2628         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2629         uint64_t hena;
2630
2631         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2632         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2633         if (hw->mac.type == I40E_MAC_X722)
2634                 hena &= ~I40E_RSS_HENA_ALL_X722;
2635         else
2636                 hena &= ~I40E_RSS_HENA_ALL;
2637         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2638         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2639         I40EVF_WRITE_FLUSH(hw);
2640 }
2641
2642 static int
2643 i40evf_config_rss(struct i40e_vf *vf)
2644 {
2645         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2646         struct rte_eth_rss_conf rss_conf;
2647         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2648         uint16_t num;
2649
2650         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2651                 i40evf_disable_rss(vf);
2652                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2653                 return 0;
2654         }
2655
2656         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2657         /* Fill out the look up table */
2658         for (i = 0, j = 0; i < nb_q; i++, j++) {
2659                 if (j >= num)
2660                         j = 0;
2661                 lut = (lut << 8) | j;
2662                 if ((i & 3) == 3)
2663                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2664         }
2665
2666         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2667         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
2668                 i40evf_disable_rss(vf);
2669                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2670                 return 0;
2671         }
2672
2673         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2674                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2675                 /* Calculate the default hash key */
2676                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2677                         rss_key_default[i] = (uint32_t)rte_rand();
2678                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2679                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2680                         sizeof(uint32_t);
2681         }
2682
2683         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2684 }
2685
2686 static int
2687 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2688                            struct rte_eth_rss_conf *rss_conf)
2689 {
2690         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2691         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2692         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
2693         uint64_t hena;
2694
2695         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2696         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2697         if (!(hena & ((hw->mac.type == I40E_MAC_X722)
2698                  ? I40E_RSS_HENA_ALL_X722
2699                  : I40E_RSS_HENA_ALL))) { /* RSS disabled */
2700                 if (rss_hf != 0) /* Enable RSS */
2701                         return -EINVAL;
2702                 return 0;
2703         }
2704
2705         /* RSS enabled */
2706         if (rss_hf == 0) /* Disable RSS */
2707                 return -EINVAL;
2708
2709         return i40evf_hw_rss_hash_set(vf, rss_conf);
2710 }
2711
2712 static int
2713 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2714                              struct rte_eth_rss_conf *rss_conf)
2715 {
2716         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2717         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2718         uint64_t hena;
2719
2720         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2721                            &rss_conf->rss_key_len);
2722
2723         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2724         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2725         rss_conf->rss_hf = i40e_parse_hena(hena);
2726
2727         return 0;
2728 }
2729
2730 static int
2731 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2732 {
2733         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2734         struct rte_eth_dev_data *dev_data = vf->dev_data;
2735         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2736         int ret = 0;
2737
2738         /* check if mtu is within the allowed range */
2739         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2740                 return -EINVAL;
2741
2742         /* mtu setting is forbidden if port is start */
2743         if (dev_data->dev_started) {
2744                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2745                             dev_data->port_id);
2746                 return -EBUSY;
2747         }
2748
2749         if (frame_size > ETHER_MAX_LEN)
2750                 dev_data->dev_conf.rxmode.jumbo_frame = 1;
2751         else
2752                 dev_data->dev_conf.rxmode.jumbo_frame = 0;
2753
2754         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2755
2756         return ret;
2757 }
2758
2759 static void
2760 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2761                             struct ether_addr *mac_addr)
2762 {
2763         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2764
2765         if (!is_valid_assigned_ether_addr(mac_addr)) {
2766                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2767                 return;
2768         }
2769
2770         if (is_same_ether_addr(mac_addr, dev->data->mac_addrs))
2771                 return;
2772
2773         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2774                 return;
2775
2776         i40evf_del_mac_addr_by_addr(dev, dev->data->mac_addrs);
2777
2778         i40evf_add_mac_addr(dev, mac_addr, 0, 0);
2779 }