drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  97 static int i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  98 static int i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  99 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 100 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 101                                      uint16_t rx_queue_id);
 102 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 103                                     uint16_t rx_queue_id);
 104 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 105                                      uint16_t tx_queue_id);
 106 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 107                                     uint16_t tx_queue_id);
 108 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 109                                struct rte_ether_addr *addr,
 110                                uint32_t index,
 111                                uint32_t pool);
 112 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 113 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 114                         struct rte_eth_rss_reta_entry64 *reta_conf,
 115                         uint16_t reta_size);
 116 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 117                         struct rte_eth_rss_reta_entry64 *reta_conf,
 118                         uint16_t reta_size);
 119 static int i40evf_config_rss(struct i40e_vf *vf);
 120 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 121                                       struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 123                                         struct rte_eth_rss_conf *rss_conf);
 124 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 125 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 126                                         struct rte_ether_addr *mac_addr);
 127 static int
 128 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static int
 130 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 131 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 132                                    uint8_t *msg,
 133                                    uint16_t msglen);
 134
 135 static int
 136 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 137                         struct rte_ether_addr *mc_addr_set,
 138                         uint32_t nb_mc_addr, bool add);
 139 static int
 140 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 141                         struct rte_ether_addr *mc_addr_set,
 142                         uint32_t nb_mc_addr);
 143 static void
 144 i40evf_dev_alarm_handler(void *param);
 145
 146 /* Default hash key buffer for RSS */
 147 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 148
 149 struct rte_i40evf_xstats_name_off {
 150         char name[RTE_ETH_XSTATS_NAME_SIZE];
 151         unsigned offset;
 152 };
 153
 154 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 155         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 156         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 157         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 158         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 159         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 160         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 161                 rx_unknown_protocol)},
 162         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 163         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 164         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 165         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 166         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 167         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 168 };
 169
 170 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 171                 sizeof(rte_i40evf_stats_strings[0]))
 172
 173 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 174         .dev_configure        = i40evf_dev_configure,
 175         .dev_start            = i40evf_dev_start,
 176         .dev_stop             = i40evf_dev_stop,
 177         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 178         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 179         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 180         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 181         .link_update          = i40evf_dev_link_update,
 182         .stats_get            = i40evf_dev_stats_get,
 183         .stats_reset          = i40evf_dev_xstats_reset,
 184         .xstats_get           = i40evf_dev_xstats_get,
 185         .xstats_get_names     = i40evf_dev_xstats_get_names,
 186         .xstats_reset         = i40evf_dev_xstats_reset,
 187         .dev_close            = i40evf_dev_close,
 188         .dev_reset            = i40evf_dev_reset,
 189         .dev_infos_get        = i40evf_dev_info_get,
 190         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 191         .vlan_filter_set      = i40evf_vlan_filter_set,
 192         .vlan_offload_set     = i40evf_vlan_offload_set,
 193         .rx_queue_start       = i40evf_dev_rx_queue_start,
 194         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 195         .tx_queue_start       = i40evf_dev_tx_queue_start,
 196         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 197         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 198         .rx_queue_release     = i40e_dev_rx_queue_release,
 199         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 200         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 201         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 202         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 203         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 204         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 205         .tx_queue_release     = i40e_dev_tx_queue_release,
 206         .rx_queue_count       = i40e_dev_rx_queue_count,
 207         .rxq_info_get         = i40e_rxq_info_get,
 208         .txq_info_get         = i40e_txq_info_get,
 209         .mac_addr_add         = i40evf_add_mac_addr,
 210         .mac_addr_remove      = i40evf_del_mac_addr,
 211         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 212         .reta_update          = i40evf_dev_rss_reta_update,
 213         .reta_query           = i40evf_dev_rss_reta_query,
 214         .rss_hash_update      = i40evf_dev_rss_hash_update,
 215         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 216         .mtu_set              = i40evf_dev_mtu_set,
 217         .mac_addr_set         = i40evf_set_default_mac_addr,
 218         .tx_done_cleanup      = i40e_tx_done_cleanup,
 219 };
 220
 221 /*
 222  * Read data in admin queue to get msg from pf driver
 223  */
 224 static enum i40evf_aq_result
 225 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 226 {
 227         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 228         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 229         struct i40e_arq_event_info event;
 230         enum virtchnl_ops opcode;
 231         enum i40e_status_code retval;
 232         int ret;
 233         enum i40evf_aq_result result = I40EVF_MSG_NON;
 234
 235         event.buf_len = data->buf_len;
 236         event.msg_buf = data->msg;
 237         ret = i40e_clean_arq_element(hw, &event, NULL);
 238         /* Can't read any msg from adminQ */
 239         if (ret) {
 240                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 241                         result = I40EVF_MSG_ERR;
 242                 return result;
 243         }
 244
 245         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 246         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 247         /* pf sys event */
 248         if (opcode == VIRTCHNL_OP_EVENT) {
 249                 struct virtchnl_pf_event *vpe =
 250                         (struct virtchnl_pf_event *)event.msg_buf;
 251
 252                 result = I40EVF_MSG_SYS;
 253                 switch (vpe->event) {
 254                 case VIRTCHNL_EVENT_LINK_CHANGE:
 255                         vf->link_up =
 256                                 vpe->event_data.link_event.link_status;
 257                         vf->link_speed =
 258                                 vpe->event_data.link_event.link_speed;
 259                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 260                         PMD_DRV_LOG(INFO, "Link status update:%s",
 261                                     vf->link_up ? "up" : "down");
 262                         break;
 263                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 264                         vf->vf_reset = true;
 265                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 266                         PMD_DRV_LOG(INFO, "vf is reseting");
 267                         break;
 268                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 269                         vf->dev_closed = true;
 270                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 271                         PMD_DRV_LOG(INFO, "PF driver closed");
 272                         break;
 273                 default:
 274                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 275                                     __func__, vpe->event);
 276                 }
 277         } else {
 278                 /* async reply msg on command issued by vf previously */
 279                 result = I40EVF_MSG_CMD;
 280                 /* Actual data length read from PF */
 281                 data->msg_len = event.msg_len;
 282         }
 283
 284         data->result = retval;
 285         data->ops = opcode;
 286
 287         return result;
 288 }
 289
 290 /**
 291  * clear current command. Only call in case execute
 292  * _atomic_set_cmd successfully.
 293  */
 294 static inline void
 295 _clear_cmd(struct i40e_vf *vf)
 296 {
 297         rte_wmb();
 298         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 299 }
 300
 301 /*
 302  * Check there is pending cmd in execution. If none, set new command.
 303  */
 304 static inline int
 305 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 306 {
 307         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 308                         VIRTCHNL_OP_UNKNOWN, ops);
 309
 310         if (!ret)
 311                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 312
 313         return !ret;
 314 }
 315
 316 #define MAX_TRY_TIMES 200
 317 #define ASQ_DELAY_MS  10
 318
 319 static int
 320 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 321 {
 322         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 323         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 324         struct i40evf_arq_msg_info info;
 325         enum i40evf_aq_result ret;
 326         int err, i = 0;
 327
 328         if (_atomic_set_cmd(vf, args->ops))
 329                 return -1;
 330
 331         info.msg = args->out_buffer;
 332         info.buf_len = args->out_size;
 333         info.ops = VIRTCHNL_OP_UNKNOWN;
 334         info.result = I40E_SUCCESS;
 335
 336         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 337                      args->in_args, args->in_args_size, NULL);
 338         if (err) {
 339                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 340                 _clear_cmd(vf);
 341                 return err;
 342         }
 343
 344         switch (args->ops) {
 345         case VIRTCHNL_OP_RESET_VF:
 346                 /*no need to process in this function */
 347                 err = 0;
 348                 break;
 349         case VIRTCHNL_OP_VERSION:
 350         case VIRTCHNL_OP_GET_VF_RESOURCES:
 351                 /* for init adminq commands, need to poll the response */
 352                 err = -1;
 353                 do {
 354                         ret = i40evf_read_pfmsg(dev, &info);
 355                         vf->cmd_retval = info.result;
 356                         if (ret == I40EVF_MSG_CMD) {
 357                                 err = 0;
 358                                 break;
 359                         } else if (ret == I40EVF_MSG_ERR)
 360                                 break;
 361                         rte_delay_ms(ASQ_DELAY_MS);
 362                         /* If don't read msg or read sys event, continue */
 363                 } while (i++ < MAX_TRY_TIMES);
 364                 _clear_cmd(vf);
 365                 break;
 366         case VIRTCHNL_OP_REQUEST_QUEUES:
 367                 /**
 368                  * ignore async reply, only wait for system message,
 369                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 370                  * if not, means request queues failed.
 371                  */
 372                 err = -1;
 373                 do {
 374                         ret = i40evf_read_pfmsg(dev, &info);
 375                         vf->cmd_retval = info.result;
 376                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 377                                 err = 0;
 378                                 break;
 379                         } else if (ret == I40EVF_MSG_ERR ||
 380                                            ret == I40EVF_MSG_CMD) {
 381                                 break;
 382                         }
 383                         rte_delay_ms(ASQ_DELAY_MS);
 384                         /* If don't read msg or read sys event, continue */
 385                 } while (i++ < MAX_TRY_TIMES);
 386                 _clear_cmd(vf);
 387                 break;
 388
 389         default:
 390                 /* for other adminq in running time, waiting the cmd done flag */
 391                 err = -1;
 392                 do {
 393                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 394                                 err = 0;
 395                                 break;
 396                         }
 397                         rte_delay_ms(ASQ_DELAY_MS);
 398                         /* If don't read msg or read sys event, continue */
 399                 } while (i++ < MAX_TRY_TIMES);
 400                 /* If there's no response is received, clear command */
 401                 if (i >= MAX_TRY_TIMES) {
 402                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 403                         _clear_cmd(vf);
 404                 }
 405                 break;
 406         }
 407
 408         return err | vf->cmd_retval;
 409 }
 410
 411 /*
 412  * Check API version with sync wait until version read or fail from admin queue
 413  */
 414 static int
 415 i40evf_check_api_version(struct rte_eth_dev *dev)
 416 {
 417         struct virtchnl_version_info version, *pver;
 418         int err;
 419         struct vf_cmd_info args;
 420         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 421
 422         version.major = VIRTCHNL_VERSION_MAJOR;
 423         version.minor = VIRTCHNL_VERSION_MINOR;
 424
 425         args.ops = VIRTCHNL_OP_VERSION;
 426         args.in_args = (uint8_t *)&version;
 427         args.in_args_size = sizeof(version);
 428         args.out_buffer = vf->aq_resp;
 429         args.out_size = I40E_AQ_BUF_SZ;
 430
 431         err = i40evf_execute_vf_cmd(dev, &args);
 432         if (err) {
 433                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 434                 return err;
 435         }
 436
 437         pver = (struct virtchnl_version_info *)args.out_buffer;
 438         vf->version_major = pver->major;
 439         vf->version_minor = pver->minor;
 440         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 441                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 442                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 443         else {
 444                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 445                                         vf->version_major, vf->version_minor,
 446                                                 VIRTCHNL_VERSION_MAJOR,
 447                                                 VIRTCHNL_VERSION_MINOR);
 448                 return -1;
 449         }
 450
 451         return 0;
 452 }
 453
 454 static int
 455 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 456 {
 457         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 458         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 459         int err;
 460         struct vf_cmd_info args;
 461         uint32_t caps, len;
 462
 463         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 464         args.out_buffer = vf->aq_resp;
 465         args.out_size = I40E_AQ_BUF_SZ;
 466         if (PF_IS_V11(vf)) {
 467                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 468                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 469                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 470                        VIRTCHNL_VF_OFFLOAD_VLAN |
 471                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 472                 args.in_args = (uint8_t *)&caps;
 473                 args.in_args_size = sizeof(caps);
 474         } else {
 475                 args.in_args = NULL;
 476                 args.in_args_size = 0;
 477         }
 478         err = i40evf_execute_vf_cmd(dev, &args);
 479
 480         if (err) {
 481                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 482                 return err;
 483         }
 484
 485         len =  sizeof(struct virtchnl_vf_resource) +
 486                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 487
 488         rte_memcpy(vf->vf_res, args.out_buffer,
 489                         RTE_MIN(args.out_size, len));
 490         i40e_vf_parse_hw_config(hw, vf->vf_res);
 491
 492         return 0;
 493 }
 494
 495 static int
 496 i40evf_config_promisc(struct rte_eth_dev *dev,
 497                       bool enable_unicast,
 498                       bool enable_multicast)
 499 {
 500         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 501         int err;
 502         struct vf_cmd_info args;
 503         struct virtchnl_promisc_info promisc;
 504
 505         promisc.flags = 0;
 506         promisc.vsi_id = vf->vsi_res->vsi_id;
 507
 508         if (enable_unicast)
 509                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 510
 511         if (enable_multicast)
 512                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 513
 514         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 515         args.in_args = (uint8_t *)&promisc;
 516         args.in_args_size = sizeof(promisc);
 517         args.out_buffer = vf->aq_resp;
 518         args.out_size = I40E_AQ_BUF_SZ;
 519
 520         err = i40evf_execute_vf_cmd(dev, &args);
 521
 522         if (err)
 523                 PMD_DRV_LOG(ERR, "fail to execute command "
 524                             "CONFIG_PROMISCUOUS_MODE");
 525         return err;
 526 }
 527
 528 static int
 529 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 530 {
 531         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 532         struct vf_cmd_info args;
 533         int ret;
 534
 535         memset(&args, 0, sizeof(args));
 536         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 537         args.in_args = NULL;
 538         args.in_args_size = 0;
 539         args.out_buffer = vf->aq_resp;
 540         args.out_size = I40E_AQ_BUF_SZ;
 541         ret = i40evf_execute_vf_cmd(dev, &args);
 542         if (ret)
 543                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 544                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 545
 546         return ret;
 547 }
 548
 549 static int
 550 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 551 {
 552         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 553         struct vf_cmd_info args;
 554         int ret;
 555
 556         memset(&args, 0, sizeof(args));
 557         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 558         args.in_args = NULL;
 559         args.in_args_size = 0;
 560         args.out_buffer = vf->aq_resp;
 561         args.out_size = I40E_AQ_BUF_SZ;
 562         ret = i40evf_execute_vf_cmd(dev, &args);
 563         if (ret)
 564                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 565                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 566
 567         return ret;
 568 }
 569
 570 static void
 571 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 572                                   uint16_t vsi_id,
 573                                   uint16_t queue_id,
 574                                   uint16_t nb_txq,
 575                                   struct i40e_tx_queue *txq)
 576 {
 577         txq_info->vsi_id = vsi_id;
 578         txq_info->queue_id = queue_id;
 579         if (queue_id < nb_txq && txq) {
 580                 txq_info->ring_len = txq->nb_tx_desc;
 581                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 582         }
 583 }
 584
 585 static void
 586 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 587                                   uint16_t vsi_id,
 588                                   uint16_t queue_id,
 589                                   uint16_t nb_rxq,
 590                                   uint32_t max_pkt_size,
 591                                   struct i40e_rx_queue *rxq)
 592 {
 593         rxq_info->vsi_id = vsi_id;
 594         rxq_info->queue_id = queue_id;
 595         rxq_info->max_pkt_size = max_pkt_size;
 596         if (queue_id < nb_rxq && rxq) {
 597                 rxq_info->ring_len = rxq->nb_rx_desc;
 598                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 599                 rxq_info->databuffer_size =
 600                         (rte_pktmbuf_data_room_size(rxq->mp) -
 601                                 RTE_PKTMBUF_HEADROOM);
 602         }
 603 }
 604
 605 static int
 606 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 607 {
 608         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 609         struct i40e_rx_queue **rxq =
 610                 (struct i40e_rx_queue **)dev->data->rx_queues;
 611         struct i40e_tx_queue **txq =
 612                 (struct i40e_tx_queue **)dev->data->tx_queues;
 613         struct virtchnl_vsi_queue_config_info *vc_vqci;
 614         struct virtchnl_queue_pair_info *vc_qpi;
 615         struct vf_cmd_info args;
 616         uint16_t i, nb_qp = vf->num_queue_pairs;
 617         const uint32_t size =
 618                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 619         uint8_t buff[size];
 620         int ret;
 621
 622         memset(buff, 0, sizeof(buff));
 623         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 624         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 625         vc_vqci->num_queue_pairs = nb_qp;
 626
 627         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 628                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 629                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 630                         txq ? txq[i] : NULL);
 631                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 632                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 633                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 634         }
 635         memset(&args, 0, sizeof(args));
 636         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 637         args.in_args = (uint8_t *)vc_vqci;
 638         args.in_args_size = size;
 639         args.out_buffer = vf->aq_resp;
 640         args.out_size = I40E_AQ_BUF_SZ;
 641         ret = i40evf_execute_vf_cmd(dev, &args);
 642         if (ret)
 643                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 644                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 645
 646         return ret;
 647 }
 648
 649 static int
 650 i40evf_config_irq_map(struct rte_eth_dev *dev)
 651 {
 652         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 653         struct vf_cmd_info args;
 654         uint8_t *cmd_buffer = NULL;
 655         struct virtchnl_irq_map_info *map_info;
 656         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 657         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 658         uint32_t vec, cmd_buffer_size, max_vectors, nb_msix, msix_base, i;
 659         uint16_t rxq_map[vf->vf_res->max_vectors];
 660         int err;
 661
 662         memset(rxq_map, 0, sizeof(rxq_map));
 663         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 664                 rte_intr_allow_others(intr_handle)) {
 665                 msix_base = I40E_RX_VEC_START;
 666                 /* For interrupt mode, available vector id is from 1. */
 667                 max_vectors = vf->vf_res->max_vectors - 1;
 668                 nb_msix = RTE_MIN(max_vectors, intr_handle->nb_efd);
 669
 670                 vec = msix_base;
 671                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 672                         rxq_map[vec] |= 1 << i;
 673                         intr_handle->intr_vec[i] = vec++;
 674                         if (vec >= vf->vf_res->max_vectors)
 675                                 vec = msix_base;
 676                 }
 677         } else {
 678                 msix_base = I40E_MISC_VEC_ID;
 679                 nb_msix = 1;
 680
 681                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 682                         rxq_map[msix_base] |= 1 << i;
 683                         if (rte_intr_dp_is_en(intr_handle))
 684                                 intr_handle->intr_vec[i] = msix_base;
 685                 }
 686         }
 687
 688         cmd_buffer_size = sizeof(struct virtchnl_irq_map_info) +
 689                         sizeof(struct virtchnl_vector_map) * nb_msix;
 690         cmd_buffer = rte_zmalloc("i40e", cmd_buffer_size, 0);
 691         if (!cmd_buffer) {
 692                 PMD_DRV_LOG(ERR, "Failed to allocate memory");
 693                 return I40E_ERR_NO_MEMORY;
 694         }
 695
 696         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 697         map_info->num_vectors = nb_msix;
 698         for (i = 0; i < nb_msix; i++) {
 699                 map_info->vecmap[i].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 700                 map_info->vecmap[i].vsi_id = vf->vsi_res->vsi_id;
 701                 map_info->vecmap[i].vector_id = msix_base + i;
 702                 map_info->vecmap[i].txq_map = 0;
 703                 map_info->vecmap[i].rxq_map = rxq_map[msix_base + i];
 704         }
 705
 706         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 707         args.in_args = (u8 *)cmd_buffer;
 708         args.in_args_size = cmd_buffer_size;
 709         args.out_buffer = vf->aq_resp;
 710         args.out_size = I40E_AQ_BUF_SZ;
 711         err = i40evf_execute_vf_cmd(dev, &args);
 712         if (err)
 713                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 714
 715         rte_free(cmd_buffer);
 716
 717         return err;
 718 }
 719
 720 static int
 721 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 722                                 bool on)
 723 {
 724         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 725         struct virtchnl_queue_select queue_select;
 726         int err;
 727         struct vf_cmd_info args;
 728         memset(&queue_select, 0, sizeof(queue_select));
 729         queue_select.vsi_id = vf->vsi_res->vsi_id;
 730
 731         if (isrx)
 732                 queue_select.rx_queues |= 1 << qid;
 733         else
 734                 queue_select.tx_queues |= 1 << qid;
 735
 736         if (on)
 737                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 738         else
 739                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 740         args.in_args = (u8 *)&queue_select;
 741         args.in_args_size = sizeof(queue_select);
 742         args.out_buffer = vf->aq_resp;
 743         args.out_size = I40E_AQ_BUF_SZ;
 744         err = i40evf_execute_vf_cmd(dev, &args);
 745         if (err)
 746                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 747                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 748
 749         return err;
 750 }
 751
 752 static int
 753 i40evf_start_queues(struct rte_eth_dev *dev)
 754 {
 755         struct rte_eth_dev_data *dev_data = dev->data;
 756         int i;
 757         struct i40e_rx_queue *rxq;
 758         struct i40e_tx_queue *txq;
 759
 760         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 761                 rxq = dev_data->rx_queues[i];
 762                 if (rxq->rx_deferred_start)
 763                         continue;
 764                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 765                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 766                         return -1;
 767                 }
 768         }
 769
 770         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 771                 txq = dev_data->tx_queues[i];
 772                 if (txq->tx_deferred_start)
 773                         continue;
 774                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 775                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 776                         return -1;
 777                 }
 778         }
 779
 780         return 0;
 781 }
 782
 783 static int
 784 i40evf_stop_queues(struct rte_eth_dev *dev)
 785 {
 786         int i;
 787
 788         /* Stop TX queues first */
 789         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 790                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 791                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 792                         return -1;
 793                 }
 794         }
 795
 796         /* Then stop RX queues */
 797         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 798                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 799                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 800                         return -1;
 801                 }
 802         }
 803
 804         return 0;
 805 }
 806
 807 static int
 808 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 809                     struct rte_ether_addr *addr,
 810                     __rte_unused uint32_t index,
 811                     __rte_unused uint32_t pool)
 812 {
 813         struct virtchnl_ether_addr_list *list;
 814         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 815         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 816                         sizeof(struct virtchnl_ether_addr)];
 817         int err;
 818         struct vf_cmd_info args;
 819
 820         if (rte_is_zero_ether_addr(addr)) {
 821                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 822                             addr->addr_bytes[0], addr->addr_bytes[1],
 823                             addr->addr_bytes[2], addr->addr_bytes[3],
 824                             addr->addr_bytes[4], addr->addr_bytes[5]);
 825                 return I40E_ERR_INVALID_MAC_ADDR;
 826         }
 827
 828         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 829         list->vsi_id = vf->vsi_res->vsi_id;
 830         list->num_elements = 1;
 831         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 832                                         sizeof(addr->addr_bytes));
 833
 834         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 835         args.in_args = cmd_buffer;
 836         args.in_args_size = sizeof(cmd_buffer);
 837         args.out_buffer = vf->aq_resp;
 838         args.out_size = I40E_AQ_BUF_SZ;
 839         err = i40evf_execute_vf_cmd(dev, &args);
 840         if (err)
 841                 PMD_DRV_LOG(ERR, "fail to execute command "
 842                             "OP_ADD_ETHER_ADDRESS");
 843         else
 844                 vf->vsi.mac_num++;
 845
 846         return err;
 847 }
 848
 849 static void
 850 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 851                             struct rte_ether_addr *addr)
 852 {
 853         struct virtchnl_ether_addr_list *list;
 854         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 855         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 856                         sizeof(struct virtchnl_ether_addr)];
 857         int err;
 858         struct vf_cmd_info args;
 859
 860         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 861                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 862                             addr->addr_bytes[0], addr->addr_bytes[1],
 863                             addr->addr_bytes[2], addr->addr_bytes[3],
 864                             addr->addr_bytes[4], addr->addr_bytes[5]);
 865                 return;
 866         }
 867
 868         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 869         list->vsi_id = vf->vsi_res->vsi_id;
 870         list->num_elements = 1;
 871         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 872                         sizeof(addr->addr_bytes));
 873
 874         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 875         args.in_args = cmd_buffer;
 876         args.in_args_size = sizeof(cmd_buffer);
 877         args.out_buffer = vf->aq_resp;
 878         args.out_size = I40E_AQ_BUF_SZ;
 879         err = i40evf_execute_vf_cmd(dev, &args);
 880         if (err)
 881                 PMD_DRV_LOG(ERR, "fail to execute command "
 882                             "OP_DEL_ETHER_ADDRESS");
 883         else
 884                 vf->vsi.mac_num--;
 885         return;
 886 }
 887
 888 static void
 889 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 890 {
 891         struct rte_eth_dev_data *data = dev->data;
 892         struct rte_ether_addr *addr;
 893
 894         addr = &data->mac_addrs[index];
 895
 896         i40evf_del_mac_addr_by_addr(dev, addr);
 897 }
 898
 899 static int
 900 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 901 {
 902         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 903         struct virtchnl_queue_select q_stats;
 904         int err;
 905         struct vf_cmd_info args;
 906
 907         memset(&q_stats, 0, sizeof(q_stats));
 908         q_stats.vsi_id = vf->vsi_res->vsi_id;
 909         args.ops = VIRTCHNL_OP_GET_STATS;
 910         args.in_args = (u8 *)&q_stats;
 911         args.in_args_size = sizeof(q_stats);
 912         args.out_buffer = vf->aq_resp;
 913         args.out_size = I40E_AQ_BUF_SZ;
 914
 915         err = i40evf_execute_vf_cmd(dev, &args);
 916         if (err) {
 917                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 918                 *pstats = NULL;
 919                 return err;
 920         }
 921         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 922         return 0;
 923 }
 924
 925 static void
 926 i40evf_stat_update_48(uint64_t *offset,
 927                    uint64_t *stat)
 928 {
 929         if (*stat >= *offset)
 930                 *stat = *stat - *offset;
 931         else
 932                 *stat = (uint64_t)((*stat +
 933                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 934
 935         *stat &= I40E_48_BIT_MASK;
 936 }
 937
 938 static void
 939 i40evf_stat_update_32(uint64_t *offset,
 940                    uint64_t *stat)
 941 {
 942         if (*stat >= *offset)
 943                 *stat = (uint64_t)(*stat - *offset);
 944         else
 945                 *stat = (uint64_t)((*stat +
 946                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 947 }
 948
 949 static void
 950 i40evf_update_stats(struct i40e_vsi *vsi,
 951                                         struct i40e_eth_stats *nes)
 952 {
 953         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 954
 955         i40evf_stat_update_48(&oes->rx_bytes,
 956                             &nes->rx_bytes);
 957         i40evf_stat_update_48(&oes->rx_unicast,
 958                             &nes->rx_unicast);
 959         i40evf_stat_update_48(&oes->rx_multicast,
 960                             &nes->rx_multicast);
 961         i40evf_stat_update_48(&oes->rx_broadcast,
 962                             &nes->rx_broadcast);
 963         i40evf_stat_update_32(&oes->rx_discards,
 964                                 &nes->rx_discards);
 965         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 966                             &nes->rx_unknown_protocol);
 967         i40evf_stat_update_48(&oes->tx_bytes,
 968                             &nes->tx_bytes);
 969         i40evf_stat_update_48(&oes->tx_unicast,
 970                             &nes->tx_unicast);
 971         i40evf_stat_update_48(&oes->tx_multicast,
 972                             &nes->tx_multicast);
 973         i40evf_stat_update_48(&oes->tx_broadcast,
 974                             &nes->tx_broadcast);
 975         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 976         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 977 }
 978
 979 static int
 980 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 981 {
 982         int ret;
 983         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 984         struct i40e_eth_stats *pstats = NULL;
 985
 986         /* read stat values to clear hardware registers */
 987         ret = i40evf_query_stats(dev, &pstats);
 988
 989         /* set stats offset base on current values */
 990         if (ret == 0)
 991                 vf->vsi.eth_stats_offset = *pstats;
 992
 993         return ret;
 994 }
 995
 996 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 997                                       struct rte_eth_xstat_name *xstats_names,
 998                                       __rte_unused unsigned limit)
 999 {
1000         unsigned i;
1001
1002         if (xstats_names != NULL)
1003                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1004                         snprintf(xstats_names[i].name,
1005                                 sizeof(xstats_names[i].name),
1006                                 "%s", rte_i40evf_stats_strings[i].name);
1007                 }
1008         return I40EVF_NB_XSTATS;
1009 }
1010
1011 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1012                                  struct rte_eth_xstat *xstats, unsigned n)
1013 {
1014         int ret;
1015         unsigned i;
1016         struct i40e_eth_stats *pstats = NULL;
1017         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1018         struct i40e_vsi *vsi = &vf->vsi;
1019
1020         if (n < I40EVF_NB_XSTATS)
1021                 return I40EVF_NB_XSTATS;
1022
1023         ret = i40evf_query_stats(dev, &pstats);
1024         if (ret != 0)
1025                 return 0;
1026
1027         if (!xstats)
1028                 return 0;
1029
1030         i40evf_update_stats(vsi, pstats);
1031
1032         /* loop over xstats array and values from pstats */
1033         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1034                 xstats[i].id = i;
1035                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1036                         rte_i40evf_stats_strings[i].offset);
1037         }
1038
1039         return I40EVF_NB_XSTATS;
1040 }
1041
1042 static int
1043 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1044 {
1045         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1046         struct virtchnl_vlan_filter_list *vlan_list;
1047         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1048                                                         sizeof(uint16_t)];
1049         int err;
1050         struct vf_cmd_info args;
1051
1052         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1053         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1054         vlan_list->num_elements = 1;
1055         vlan_list->vlan_id[0] = vlanid;
1056
1057         args.ops = VIRTCHNL_OP_ADD_VLAN;
1058         args.in_args = (u8 *)&cmd_buffer;
1059         args.in_args_size = sizeof(cmd_buffer);
1060         args.out_buffer = vf->aq_resp;
1061         args.out_size = I40E_AQ_BUF_SZ;
1062         err = i40evf_execute_vf_cmd(dev, &args);
1063         if (err)
1064                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1065
1066         return err;
1067 }
1068
1069 static int
1070 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1071 {
1072         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1073         struct virtchnl_vf_res_request vfres;
1074         struct vf_cmd_info args;
1075         int err;
1076
1077         vfres.num_queue_pairs = num;
1078
1079         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1080         args.in_args = (u8 *)&vfres;
1081         args.in_args_size = sizeof(vfres);
1082         args.out_buffer = vf->aq_resp;
1083         args.out_size = I40E_AQ_BUF_SZ;
1084
1085         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1086         err = i40evf_execute_vf_cmd(dev, &args);
1087         if (err)
1088                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1089
1090         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1091                           i40evf_dev_alarm_handler, dev);
1092         return err;
1093 }
1094
1095 static int
1096 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1097 {
1098         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1099         struct virtchnl_vlan_filter_list *vlan_list;
1100         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1101                                                         sizeof(uint16_t)];
1102         int err;
1103         struct vf_cmd_info args;
1104
1105         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1106         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1107         vlan_list->num_elements = 1;
1108         vlan_list->vlan_id[0] = vlanid;
1109
1110         args.ops = VIRTCHNL_OP_DEL_VLAN;
1111         args.in_args = (u8 *)&cmd_buffer;
1112         args.in_args_size = sizeof(cmd_buffer);
1113         args.out_buffer = vf->aq_resp;
1114         args.out_size = I40E_AQ_BUF_SZ;
1115         err = i40evf_execute_vf_cmd(dev, &args);
1116         if (err)
1117                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1118
1119         return err;
1120 }
1121
1122 static const struct rte_pci_id pci_id_i40evf_map[] = {
1123         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1124         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1125         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1126         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1127         { .vendor_id = 0, /* sentinel */ },
1128 };
1129
1130 /* Disable IRQ0 */
1131 static inline void
1132 i40evf_disable_irq0(struct i40e_hw *hw)
1133 {
1134         /* Disable all interrupt types */
1135         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1136         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1137                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1138         I40EVF_WRITE_FLUSH(hw);
1139 }
1140
1141 /* Enable IRQ0 */
1142 static inline void
1143 i40evf_enable_irq0(struct i40e_hw *hw)
1144 {
1145         /* Enable admin queue interrupt trigger */
1146         uint32_t val;
1147
1148         i40evf_disable_irq0(hw);
1149         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1150         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1151                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1152         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1153
1154         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1155                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1156                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1157                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1158
1159         I40EVF_WRITE_FLUSH(hw);
1160 }
1161
1162 static int
1163 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1164 {
1165         int i, reset;
1166         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1167         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1168
1169         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1170                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1171                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1172                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1173                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1174                     reset == VIRTCHNL_VFR_COMPLETED)
1175                         break;
1176                 rte_delay_ms(50);
1177         }
1178
1179         if (i >= MAX_RESET_WAIT_CNT)
1180                 return -1;
1181
1182         vf->vf_reset = false;
1183         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1184
1185         return 0;
1186 }
1187 static int
1188 i40evf_reset_vf(struct rte_eth_dev *dev)
1189 {
1190         int ret;
1191         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1192
1193         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1194                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1195                 return -1;
1196         }
1197         /**
1198           * After issuing vf reset command to pf, pf won't necessarily
1199           * reset vf, it depends on what state it exactly is. If it's not
1200           * initialized yet, it won't have vf reset since it's in a certain
1201           * state. If not, it will try to reset. Even vf is reset, pf will
1202           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1203           * it to ACTIVE. In this duration, vf may not catch the moment that
1204           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1205           */
1206         rte_delay_ms(200);
1207
1208         ret = i40evf_check_vf_reset_done(dev);
1209         if (ret) {
1210                 PMD_INIT_LOG(ERR, "VF is still resetting");
1211                 return ret;
1212         }
1213
1214         return 0;
1215 }
1216
1217 static int
1218 i40evf_init_vf(struct rte_eth_dev *dev)
1219 {
1220         int i, err, bufsz;
1221         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1222         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1223         uint16_t interval =
1224                 i40e_calc_itr_interval(0, 0);
1225
1226         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1227         vf->dev_data = dev->data;
1228         err = i40e_set_mac_type(hw);
1229         if (err) {
1230                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1231                 goto err;
1232         }
1233
1234         err = i40evf_check_vf_reset_done(dev);
1235         if (err)
1236                 goto err;
1237
1238         i40e_init_adminq_parameter(hw);
1239         err = i40e_init_adminq(hw);
1240         if (err) {
1241                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1242                 goto err;
1243         }
1244
1245         /* Reset VF and wait until it's complete */
1246         if (i40evf_reset_vf(dev)) {
1247                 PMD_INIT_LOG(ERR, "reset NIC failed");
1248                 goto err_aq;
1249         }
1250
1251         /* VF reset, shutdown admin queue and initialize again */
1252         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1253                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1254                 goto err;
1255         }
1256
1257         i40e_init_adminq_parameter(hw);
1258         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1259                 PMD_INIT_LOG(ERR, "init_adminq failed");
1260                 goto err;
1261         }
1262
1263         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1264         if (!vf->aq_resp) {
1265                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1266                 goto err_aq;
1267         }
1268         if (i40evf_check_api_version(dev) != 0) {
1269                 PMD_INIT_LOG(ERR, "check_api version failed");
1270                 goto err_api;
1271         }
1272         bufsz = sizeof(struct virtchnl_vf_resource) +
1273                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1274         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1275         if (!vf->vf_res) {
1276                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1277                 goto err_api;
1278         }
1279
1280         if (i40evf_get_vf_resource(dev) != 0) {
1281                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1282                 goto err_alloc;
1283         }
1284
1285         /* got VF config message back from PF, now we can parse it */
1286         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1287                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1288                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1289         }
1290
1291         if (!vf->vsi_res) {
1292                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1293                 goto err_alloc;
1294         }
1295
1296         if (hw->mac.type == I40E_MAC_X722_VF)
1297                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1298         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1299
1300         switch (vf->vsi_res->vsi_type) {
1301         case VIRTCHNL_VSI_SRIOV:
1302                 vf->vsi.type = I40E_VSI_SRIOV;
1303                 break;
1304         default:
1305                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1306                 break;
1307         }
1308         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1309         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1310
1311         /* Store the MAC address configured by host, or generate random one */
1312         if (!rte_is_valid_assigned_ether_addr(
1313                         (struct rte_ether_addr *)hw->mac.addr))
1314                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1315
1316         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1317                        (I40E_ITR_INDEX_DEFAULT <<
1318                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1319                        (interval <<
1320                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1321         I40EVF_WRITE_FLUSH(hw);
1322
1323         return 0;
1324
1325 err_alloc:
1326         rte_free(vf->vf_res);
1327         vf->vsi_res = NULL;
1328 err_api:
1329         rte_free(vf->aq_resp);
1330 err_aq:
1331         i40e_shutdown_adminq(hw); /* ignore error */
1332 err:
1333         return -1;
1334 }
1335
1336 static int
1337 i40evf_uninit_vf(struct rte_eth_dev *dev)
1338 {
1339         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1340
1341         PMD_INIT_FUNC_TRACE();
1342
1343         if (hw->adapter_closed == 0)
1344                 i40evf_dev_close(dev);
1345
1346         return 0;
1347 }
1348
1349 static void
1350 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1351                 __rte_unused uint16_t msglen)
1352 {
1353         struct virtchnl_pf_event *pf_msg =
1354                         (struct virtchnl_pf_event *)msg;
1355         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1356
1357         switch (pf_msg->event) {
1358         case VIRTCHNL_EVENT_RESET_IMPENDING:
1359                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1360                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1361                                               NULL);
1362                 break;
1363         case VIRTCHNL_EVENT_LINK_CHANGE:
1364                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1365                 vf->link_up = pf_msg->event_data.link_event.link_status;
1366                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1367                 break;
1368         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1369                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1370                 break;
1371         default:
1372                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1373                 break;
1374         }
1375 }
1376
1377 static void
1378 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1379 {
1380         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1381         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1382         struct i40e_arq_event_info info;
1383         uint16_t pending, aq_opc;
1384         enum virtchnl_ops msg_opc;
1385         enum i40e_status_code msg_ret;
1386         int ret;
1387
1388         info.buf_len = I40E_AQ_BUF_SZ;
1389         if (!vf->aq_resp) {
1390                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1391                 return;
1392         }
1393         info.msg_buf = vf->aq_resp;
1394
1395         pending = 1;
1396         while (pending) {
1397                 ret = i40e_clean_arq_element(hw, &info, &pending);
1398
1399                 if (ret != I40E_SUCCESS) {
1400                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1401                                     "ret: %d", ret);
1402                         break;
1403                 }
1404                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1405                 /* For the message sent from pf to vf, opcode is stored in
1406                  * cookie_high of struct i40e_aq_desc, while return error code
1407                  * are stored in cookie_low, Which is done by
1408                  * i40e_aq_send_msg_to_vf in PF driver.*/
1409                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1410                                                   info.desc.cookie_high);
1411                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1412                                                   info.desc.cookie_low);
1413                 switch (aq_opc) {
1414                 case i40e_aqc_opc_send_msg_to_vf:
1415                         if (msg_opc == VIRTCHNL_OP_EVENT)
1416                                 /* process event*/
1417                                 i40evf_handle_pf_event(dev, info.msg_buf,
1418                                                        info.msg_len);
1419                         else {
1420                                 /* read message and it's expected one */
1421                                 if (msg_opc == vf->pend_cmd) {
1422                                         vf->cmd_retval = msg_ret;
1423                                         /* prevent compiler reordering */
1424                                         rte_compiler_barrier();
1425                                         _clear_cmd(vf);
1426                                 } else
1427                                         PMD_DRV_LOG(ERR, "command mismatch,"
1428                                                 "expect %u, get %u",
1429                                                 vf->pend_cmd, msg_opc);
1430                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1431                                              " opcode = %d", msg_opc);
1432                         }
1433                         break;
1434                 default:
1435                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1436                                     aq_opc);
1437                         break;
1438                 }
1439         }
1440 }
1441
1442 /**
1443  * Interrupt handler triggered by NIC  for handling
1444  * specific interrupt. Only adminq interrupt is processed in VF.
1445  *
1446  * @param handle
1447  *  Pointer to interrupt handle.
1448  * @param param
1449  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1450  *
1451  * @return
1452  *  void
1453  */
1454 static void
1455 i40evf_dev_alarm_handler(void *param)
1456 {
1457         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1458         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1459         uint32_t icr0;
1460
1461         i40evf_disable_irq0(hw);
1462
1463         /* read out interrupt causes */
1464         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1465
1466         /* No interrupt event indicated */
1467         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1468                 goto done;
1469
1470         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1471                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1472                 i40evf_handle_aq_msg(dev);
1473         }
1474
1475         /* Link Status Change interrupt */
1476         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1477                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1478                                    " do nothing");
1479
1480 done:
1481         i40evf_enable_irq0(hw);
1482         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1483                           i40evf_dev_alarm_handler, dev);
1484 }
1485
1486 static int
1487 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1488 {
1489         struct i40e_hw *hw
1490                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1491         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1492
1493         PMD_INIT_FUNC_TRACE();
1494
1495         /* assign ops func pointer */
1496         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1497         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1498         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1499
1500         /*
1501          * For secondary processes, we don't initialise any further as primary
1502          * has already done this work.
1503          */
1504         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1505                 i40e_set_rx_function(eth_dev);
1506                 i40e_set_tx_function(eth_dev);
1507                 return 0;
1508         }
1509         i40e_set_default_ptype_table(eth_dev);
1510         rte_eth_copy_pci_info(eth_dev, pci_dev);
1511
1512         hw->vendor_id = pci_dev->id.vendor_id;
1513         hw->device_id = pci_dev->id.device_id;
1514         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1515         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1516         hw->bus.device = pci_dev->addr.devid;
1517         hw->bus.func = pci_dev->addr.function;
1518         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1519         hw->adapter_stopped = 0;
1520         hw->adapter_closed = 0;
1521
1522         /* Pass the information to the rte_eth_dev_close() that it should also
1523          * release the private port resources.
1524          */
1525         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1526
1527         if(i40evf_init_vf(eth_dev) != 0) {
1528                 PMD_INIT_LOG(ERR, "Init vf failed");
1529                 return -1;
1530         }
1531
1532         i40e_set_default_pctype_table(eth_dev);
1533         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1534                           i40evf_dev_alarm_handler, eth_dev);
1535
1536         /* configure and enable device interrupt */
1537         i40evf_enable_irq0(hw);
1538
1539         /* copy mac addr */
1540         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1541                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1542                                 0);
1543         if (eth_dev->data->mac_addrs == NULL) {
1544                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1545                                 " store MAC addresses",
1546                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1547                 return -ENOMEM;
1548         }
1549         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1550                         &eth_dev->data->mac_addrs[0]);
1551
1552         return 0;
1553 }
1554
1555 static int
1556 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1557 {
1558         PMD_INIT_FUNC_TRACE();
1559
1560         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1561                 return -EPERM;
1562
1563         if (i40evf_uninit_vf(eth_dev) != 0) {
1564                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1565                 return -1;
1566         }
1567
1568         return 0;
1569 }
1570
1571 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1572         struct rte_pci_device *pci_dev)
1573 {
1574         return rte_eth_dev_pci_generic_probe(pci_dev,
1575                 sizeof(struct i40e_adapter), i40evf_dev_init);
1576 }
1577
1578 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1579 {
1580         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1581 }
1582
1583 /*
1584  * virtual function driver struct
1585  */
1586 static struct rte_pci_driver rte_i40evf_pmd = {
1587         .id_table = pci_id_i40evf_map,
1588         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1589         .probe = eth_i40evf_pci_probe,
1590         .remove = eth_i40evf_pci_remove,
1591 };
1592
1593 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1594 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1595 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1596
1597 static int
1598 i40evf_dev_configure(struct rte_eth_dev *dev)
1599 {
1600         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1601         struct i40e_adapter *ad =
1602                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1603         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1604                                 dev->data->nb_tx_queues);
1605
1606         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1607          * allocation or vector Rx preconditions we will reset it.
1608          */
1609         ad->rx_bulk_alloc_allowed = true;
1610         ad->rx_vec_allowed = true;
1611         ad->tx_simple_allowed = true;
1612         ad->tx_vec_allowed = true;
1613
1614         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1615                 int ret = 0;
1616
1617                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1618                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1619                 ret = i40evf_request_queues(dev, num_queue_pairs);
1620                 if (ret != 0)
1621                         return ret;
1622
1623                 ret = i40evf_dev_reset(dev);
1624                 if (ret != 0)
1625                         return ret;
1626         }
1627
1628         return i40evf_init_vlan(dev);
1629 }
1630
1631 static int
1632 i40evf_init_vlan(struct rte_eth_dev *dev)
1633 {
1634         /* Apply vlan offload setting */
1635         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1636
1637         return 0;
1638 }
1639
1640 static int
1641 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1642 {
1643         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1644         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1645
1646         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1647                 return -ENOTSUP;
1648
1649         /* Vlan stripping setting */
1650         if (mask & ETH_VLAN_STRIP_MASK) {
1651                 /* Enable or disable VLAN stripping */
1652                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1653                         i40evf_enable_vlan_strip(dev);
1654                 else
1655                         i40evf_disable_vlan_strip(dev);
1656         }
1657
1658         return 0;
1659 }
1660
1661 static int
1662 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1663 {
1664         struct i40e_rx_queue *rxq;
1665         int err;
1666         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1667
1668         PMD_INIT_FUNC_TRACE();
1669
1670         rxq = dev->data->rx_queues[rx_queue_id];
1671
1672         err = i40e_alloc_rx_queue_mbufs(rxq);
1673         if (err) {
1674                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1675                 return err;
1676         }
1677
1678         rte_wmb();
1679
1680         /* Init the RX tail register. */
1681         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1682         I40EVF_WRITE_FLUSH(hw);
1683
1684         /* Ready to switch the queue on */
1685         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1686         if (err) {
1687                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1688                             rx_queue_id);
1689                 return err;
1690         }
1691         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1692
1693         return 0;
1694 }
1695
1696 static int
1697 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1698 {
1699         struct i40e_rx_queue *rxq;
1700         int err;
1701
1702         rxq = dev->data->rx_queues[rx_queue_id];
1703
1704         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1705         if (err) {
1706                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1707                             rx_queue_id);
1708                 return err;
1709         }
1710
1711         i40e_rx_queue_release_mbufs(rxq);
1712         i40e_reset_rx_queue(rxq);
1713         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1714
1715         return 0;
1716 }
1717
1718 static int
1719 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1720 {
1721         int err;
1722
1723         PMD_INIT_FUNC_TRACE();
1724
1725         /* Ready to switch the queue on */
1726         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1727         if (err) {
1728                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1729                             tx_queue_id);
1730                 return err;
1731         }
1732         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1733
1734         return 0;
1735 }
1736
1737 static int
1738 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1739 {
1740         struct i40e_tx_queue *txq;
1741         int err;
1742
1743         txq = dev->data->tx_queues[tx_queue_id];
1744
1745         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1746         if (err) {
1747                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1748                             tx_queue_id);
1749                 return err;
1750         }
1751
1752         i40e_tx_queue_release_mbufs(txq);
1753         i40e_reset_tx_queue(txq);
1754         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1755
1756         return 0;
1757 }
1758
1759 static int
1760 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1761 {
1762         int ret;
1763
1764         if (on)
1765                 ret = i40evf_add_vlan(dev, vlan_id);
1766         else
1767                 ret = i40evf_del_vlan(dev,vlan_id);
1768
1769         return ret;
1770 }
1771
1772 static int
1773 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1774 {
1775         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1776         struct rte_eth_dev_data *dev_data = dev->data;
1777         struct rte_pktmbuf_pool_private *mbp_priv;
1778         uint16_t buf_size, len;
1779
1780         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1781         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1782         I40EVF_WRITE_FLUSH(hw);
1783
1784         /* Calculate the maximum packet length allowed */
1785         mbp_priv = rte_mempool_get_priv(rxq->mp);
1786         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1787                                         RTE_PKTMBUF_HEADROOM);
1788         rxq->hs_mode = i40e_header_split_none;
1789         rxq->rx_hdr_len = 0;
1790         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1791         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1792         rxq->max_pkt_len = RTE_MIN(len,
1793                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1794
1795         /**
1796          * Check if the jumbo frame and maximum packet length are set correctly
1797          */
1798         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1799                 if (rxq->max_pkt_len <= RTE_ETHER_MAX_LEN ||
1800                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1801                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1802                                 "larger than %u and smaller than %u, as jumbo "
1803                                 "frame is enabled", (uint32_t)RTE_ETHER_MAX_LEN,
1804                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1805                         return I40E_ERR_CONFIG;
1806                 }
1807         } else {
1808                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1809                     rxq->max_pkt_len > RTE_ETHER_MAX_LEN) {
1810                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1811                                 "larger than %u and smaller than %u, as jumbo "
1812                                 "frame is disabled",
1813                                 (uint32_t)RTE_ETHER_MIN_LEN,
1814                                 (uint32_t)RTE_ETHER_MAX_LEN);
1815                         return I40E_ERR_CONFIG;
1816                 }
1817         }
1818
1819         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1820             rxq->max_pkt_len > buf_size)
1821                 dev_data->scattered_rx = 1;
1822
1823         return 0;
1824 }
1825
1826 static int
1827 i40evf_rx_init(struct rte_eth_dev *dev)
1828 {
1829         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1830         uint16_t i;
1831         int ret = I40E_SUCCESS;
1832         struct i40e_rx_queue **rxq =
1833                 (struct i40e_rx_queue **)dev->data->rx_queues;
1834
1835         i40evf_config_rss(vf);
1836         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1837                 if (!rxq[i] || !rxq[i]->q_set)
1838                         continue;
1839                 ret = i40evf_rxq_init(dev, rxq[i]);
1840                 if (ret != I40E_SUCCESS)
1841                         break;
1842         }
1843         if (ret == I40E_SUCCESS)
1844                 i40e_set_rx_function(dev);
1845
1846         return ret;
1847 }
1848
1849 static void
1850 i40evf_tx_init(struct rte_eth_dev *dev)
1851 {
1852         uint16_t i;
1853         struct i40e_tx_queue **txq =
1854                 (struct i40e_tx_queue **)dev->data->tx_queues;
1855         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1856
1857         for (i = 0; i < dev->data->nb_tx_queues; i++)
1858                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1859
1860         i40e_set_tx_function(dev);
1861 }
1862
1863 static inline void
1864 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1865 {
1866         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1867         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1868         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1869
1870         if (!rte_intr_allow_others(intr_handle)) {
1871                 I40E_WRITE_REG(hw,
1872                                I40E_VFINT_DYN_CTL01,
1873                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1874                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1875                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1876                 I40EVF_WRITE_FLUSH(hw);
1877                 return;
1878         }
1879
1880         I40EVF_WRITE_FLUSH(hw);
1881 }
1882
1883 static inline void
1884 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1885 {
1886         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1887         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1888         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1889
1890         if (!rte_intr_allow_others(intr_handle)) {
1891                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1892                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1893                 I40EVF_WRITE_FLUSH(hw);
1894                 return;
1895         }
1896
1897         I40EVF_WRITE_FLUSH(hw);
1898 }
1899
1900 static int
1901 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1902 {
1903         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1904         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1905         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1906         uint16_t interval =
1907                 i40e_calc_itr_interval(0, 0);
1908         uint16_t msix_intr;
1909
1910         msix_intr = intr_handle->intr_vec[queue_id];
1911         if (msix_intr == I40E_MISC_VEC_ID)
1912                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1913                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1914                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1915                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1916                                (interval <<
1917                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1918         else
1919                 I40E_WRITE_REG(hw,
1920                                I40E_VFINT_DYN_CTLN1(msix_intr -
1921                                                     I40E_RX_VEC_START),
1922                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1923                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1924                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1925                                (interval <<
1926                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1927
1928         I40EVF_WRITE_FLUSH(hw);
1929
1930         return 0;
1931 }
1932
1933 static int
1934 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1935 {
1936         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1937         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1938         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1939         uint16_t msix_intr;
1940
1941         msix_intr = intr_handle->intr_vec[queue_id];
1942         if (msix_intr == I40E_MISC_VEC_ID)
1943                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1944         else
1945                 I40E_WRITE_REG(hw,
1946                                I40E_VFINT_DYN_CTLN1(msix_intr -
1947                                                     I40E_RX_VEC_START),
1948                                0);
1949
1950         I40EVF_WRITE_FLUSH(hw);
1951
1952         return 0;
1953 }
1954
1955 static void
1956 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1957 {
1958         struct virtchnl_ether_addr_list *list;
1959         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1960         int err, i, j;
1961         int next_begin = 0;
1962         int begin = 0;
1963         uint32_t len;
1964         struct rte_ether_addr *addr;
1965         struct vf_cmd_info args;
1966
1967         do {
1968                 j = 0;
1969                 len = sizeof(struct virtchnl_ether_addr_list);
1970                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1971                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
1972                                 continue;
1973                         len += sizeof(struct virtchnl_ether_addr);
1974                         if (len >= I40E_AQ_BUF_SZ) {
1975                                 next_begin = i + 1;
1976                                 break;
1977                         }
1978                 }
1979
1980                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1981                 if (!list) {
1982                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1983                         return;
1984                 }
1985
1986                 for (i = begin; i < next_begin; i++) {
1987                         addr = &dev->data->mac_addrs[i];
1988                         if (rte_is_zero_ether_addr(addr))
1989                                 continue;
1990                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1991                                          sizeof(addr->addr_bytes));
1992                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1993                                     addr->addr_bytes[0], addr->addr_bytes[1],
1994                                     addr->addr_bytes[2], addr->addr_bytes[3],
1995                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1996                         j++;
1997                 }
1998                 list->vsi_id = vf->vsi_res->vsi_id;
1999                 list->num_elements = j;
2000                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2001                            VIRTCHNL_OP_DEL_ETH_ADDR;
2002                 args.in_args = (uint8_t *)list;
2003                 args.in_args_size = len;
2004                 args.out_buffer = vf->aq_resp;
2005                 args.out_size = I40E_AQ_BUF_SZ;
2006                 err = i40evf_execute_vf_cmd(dev, &args);
2007                 if (err) {
2008                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2009                                     add ? "OP_ADD_ETHER_ADDRESS" :
2010                                     "OP_DEL_ETHER_ADDRESS");
2011                 } else {
2012                         if (add)
2013                                 vf->vsi.mac_num++;
2014                         else
2015                                 vf->vsi.mac_num--;
2016                 }
2017                 rte_free(list);
2018                 begin = next_begin;
2019         } while (begin < I40E_NUM_MACADDR_MAX);
2020 }
2021
2022 static int
2023 i40evf_dev_start(struct rte_eth_dev *dev)
2024 {
2025         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2026         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2027         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2028         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2029         uint32_t intr_vector = 0;
2030
2031         PMD_INIT_FUNC_TRACE();
2032
2033         hw->adapter_stopped = 0;
2034
2035         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2036         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2037                                         dev->data->nb_tx_queues);
2038
2039         /* check and configure queue intr-vector mapping */
2040         if (rte_intr_cap_multiple(intr_handle) &&
2041             dev->data->dev_conf.intr_conf.rxq) {
2042                 intr_vector = dev->data->nb_rx_queues;
2043                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2044                         return -1;
2045         }
2046
2047         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2048                 intr_handle->intr_vec =
2049                         rte_zmalloc("intr_vec",
2050                                     dev->data->nb_rx_queues * sizeof(int), 0);
2051                 if (!intr_handle->intr_vec) {
2052                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2053                                      " intr_vec", dev->data->nb_rx_queues);
2054                         return -ENOMEM;
2055                 }
2056         }
2057
2058         if (i40evf_rx_init(dev) != 0){
2059                 PMD_DRV_LOG(ERR, "failed to do RX init");
2060                 return -1;
2061         }
2062
2063         i40evf_tx_init(dev);
2064
2065         if (i40evf_configure_vsi_queues(dev) != 0) {
2066                 PMD_DRV_LOG(ERR, "configure queues failed");
2067                 goto err_queue;
2068         }
2069         if (i40evf_config_irq_map(dev)) {
2070                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2071                 goto err_queue;
2072         }
2073
2074         /* Set all mac addrs */
2075         i40evf_add_del_all_mac_addr(dev, TRUE);
2076         /* Set all multicast addresses */
2077         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2078                                 TRUE);
2079
2080         if (i40evf_start_queues(dev) != 0) {
2081                 PMD_DRV_LOG(ERR, "enable queues failed");
2082                 goto err_mac;
2083         }
2084
2085         /* only enable interrupt in rx interrupt mode */
2086         if (dev->data->dev_conf.intr_conf.rxq != 0)
2087                 rte_intr_enable(intr_handle);
2088
2089         i40evf_enable_queues_intr(dev);
2090
2091         return 0;
2092
2093 err_mac:
2094         i40evf_add_del_all_mac_addr(dev, FALSE);
2095         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2096                                 FALSE);
2097 err_queue:
2098         return -1;
2099 }
2100
2101 static void
2102 i40evf_dev_stop(struct rte_eth_dev *dev)
2103 {
2104         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2105         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2106         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2107         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2108
2109         PMD_INIT_FUNC_TRACE();
2110
2111         if (dev->data->dev_conf.intr_conf.rxq != 0)
2112                 rte_intr_disable(intr_handle);
2113
2114         if (hw->adapter_stopped == 1)
2115                 return;
2116         i40evf_stop_queues(dev);
2117         i40evf_disable_queues_intr(dev);
2118         i40e_dev_clear_queues(dev);
2119
2120         /* Clean datapath event and queue/vec mapping */
2121         rte_intr_efd_disable(intr_handle);
2122         if (intr_handle->intr_vec) {
2123                 rte_free(intr_handle->intr_vec);
2124                 intr_handle->intr_vec = NULL;
2125         }
2126         /* remove all mac addrs */
2127         i40evf_add_del_all_mac_addr(dev, FALSE);
2128         /* remove all multicast addresses */
2129         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2130                                 FALSE);
2131         hw->adapter_stopped = 1;
2132
2133 }
2134
2135 static int
2136 i40evf_dev_link_update(struct rte_eth_dev *dev,
2137                        __rte_unused int wait_to_complete)
2138 {
2139         struct rte_eth_link new_link;
2140         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2141         /*
2142          * DPDK pf host provide interfacet to acquire link status
2143          * while Linux driver does not
2144          */
2145
2146         memset(&new_link, 0, sizeof(new_link));
2147         /* Linux driver PF host */
2148         switch (vf->link_speed) {
2149         case I40E_LINK_SPEED_100MB:
2150                 new_link.link_speed = ETH_SPEED_NUM_100M;
2151                 break;
2152         case I40E_LINK_SPEED_1GB:
2153                 new_link.link_speed = ETH_SPEED_NUM_1G;
2154                 break;
2155         case I40E_LINK_SPEED_10GB:
2156                 new_link.link_speed = ETH_SPEED_NUM_10G;
2157                 break;
2158         case I40E_LINK_SPEED_20GB:
2159                 new_link.link_speed = ETH_SPEED_NUM_20G;
2160                 break;
2161         case I40E_LINK_SPEED_25GB:
2162                 new_link.link_speed = ETH_SPEED_NUM_25G;
2163                 break;
2164         case I40E_LINK_SPEED_40GB:
2165                 new_link.link_speed = ETH_SPEED_NUM_40G;
2166                 break;
2167         default:
2168                 new_link.link_speed = ETH_SPEED_NUM_NONE;
2169                 break;
2170         }
2171         /* full duplex only */
2172         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2173         new_link.link_status = vf->link_up &&
2174                                 new_link.link_speed != ETH_SPEED_NUM_NONE
2175                                 ? ETH_LINK_UP
2176                                 : ETH_LINK_DOWN;
2177         new_link.link_autoneg =
2178                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2179
2180         return rte_eth_linkstatus_set(dev, &new_link);
2181 }
2182
2183 static int
2184 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2185 {
2186         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2187         int ret;
2188
2189         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2190         if (ret == 0)
2191                 vf->promisc_unicast_enabled = TRUE;
2192         else if (ret == I40E_NOT_SUPPORTED)
2193                 ret = -ENOTSUP;
2194         else
2195                 ret = -EAGAIN;
2196
2197         return ret;
2198 }
2199
2200 static int
2201 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2202 {
2203         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2204         int ret;
2205
2206         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2207         if (ret == 0)
2208                 vf->promisc_unicast_enabled = FALSE;
2209         else if (ret == I40E_NOT_SUPPORTED)
2210                 ret = -ENOTSUP;
2211         else
2212                 ret = -EAGAIN;
2213
2214         return ret;
2215 }
2216
2217 static int
2218 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2219 {
2220         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2221         int ret;
2222
2223         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2224         if (ret == 0)
2225                 vf->promisc_multicast_enabled = TRUE;
2226         else if (ret == I40E_NOT_SUPPORTED)
2227                 ret = -ENOTSUP;
2228         else
2229                 ret = -EAGAIN;
2230
2231         return ret;
2232 }
2233
2234 static int
2235 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2236 {
2237         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2238         int ret;
2239
2240         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2241         if (ret == 0)
2242                 vf->promisc_multicast_enabled = FALSE;
2243         else if (ret == I40E_NOT_SUPPORTED)
2244                 ret = -ENOTSUP;
2245         else
2246                 ret = -EAGAIN;
2247
2248         return ret;
2249 }
2250
2251 static int
2252 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2253 {
2254         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2255
2256         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2257         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2258         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2259         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2260         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2261         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2262         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2263         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2264         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2265         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2266         dev_info->rx_queue_offload_capa = 0;
2267         dev_info->rx_offload_capa =
2268                 DEV_RX_OFFLOAD_VLAN_STRIP |
2269                 DEV_RX_OFFLOAD_QINQ_STRIP |
2270                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2271                 DEV_RX_OFFLOAD_UDP_CKSUM |
2272                 DEV_RX_OFFLOAD_TCP_CKSUM |
2273                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2274                 DEV_RX_OFFLOAD_SCATTER |
2275                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2276                 DEV_RX_OFFLOAD_VLAN_FILTER;
2277
2278         dev_info->tx_queue_offload_capa = 0;
2279         dev_info->tx_offload_capa =
2280                 DEV_TX_OFFLOAD_VLAN_INSERT |
2281                 DEV_TX_OFFLOAD_QINQ_INSERT |
2282                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2283                 DEV_TX_OFFLOAD_UDP_CKSUM |
2284                 DEV_TX_OFFLOAD_TCP_CKSUM |
2285                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2286                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2287                 DEV_TX_OFFLOAD_TCP_TSO |
2288                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2289                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2290                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2291                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2292                 DEV_TX_OFFLOAD_MULTI_SEGS;
2293
2294         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2295                 .rx_thresh = {
2296                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2297                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2298                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2299                 },
2300                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2301                 .rx_drop_en = 0,
2302                 .offloads = 0,
2303         };
2304
2305         dev_info->default_txconf = (struct rte_eth_txconf) {
2306                 .tx_thresh = {
2307                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2308                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2309                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2310                 },
2311                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2312                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2313                 .offloads = 0,
2314         };
2315
2316         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2317                 .nb_max = I40E_MAX_RING_DESC,
2318                 .nb_min = I40E_MIN_RING_DESC,
2319                 .nb_align = I40E_ALIGN_RING_DESC,
2320         };
2321
2322         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2323                 .nb_max = I40E_MAX_RING_DESC,
2324                 .nb_min = I40E_MIN_RING_DESC,
2325                 .nb_align = I40E_ALIGN_RING_DESC,
2326         };
2327
2328         return 0;
2329 }
2330
2331 static int
2332 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2333 {
2334         int ret;
2335         struct i40e_eth_stats *pstats = NULL;
2336         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2337         struct i40e_vsi *vsi = &vf->vsi;
2338
2339         ret = i40evf_query_stats(dev, &pstats);
2340         if (ret == 0) {
2341                 i40evf_update_stats(vsi, pstats);
2342
2343                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2344                                                 pstats->rx_broadcast;
2345                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2346                                                 pstats->tx_unicast;
2347                 stats->imissed = pstats->rx_discards;
2348                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2349                 stats->ibytes = pstats->rx_bytes;
2350                 stats->obytes = pstats->tx_bytes;
2351         } else {
2352                 PMD_DRV_LOG(ERR, "Get statistics failed");
2353         }
2354         return ret;
2355 }
2356
2357 static void
2358 i40evf_dev_close(struct rte_eth_dev *dev)
2359 {
2360         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2361         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2362
2363         i40evf_dev_stop(dev);
2364         i40e_dev_free_queues(dev);
2365         /*
2366          * disable promiscuous mode before reset vf
2367          * it is a workaround solution when work with kernel driver
2368          * and it is not the normal way
2369          */
2370         i40evf_dev_promiscuous_disable(dev);
2371         i40evf_dev_allmulticast_disable(dev);
2372         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2373
2374         i40evf_reset_vf(dev);
2375         i40e_shutdown_adminq(hw);
2376         i40evf_disable_irq0(hw);
2377
2378         dev->dev_ops = NULL;
2379         dev->rx_pkt_burst = NULL;
2380         dev->tx_pkt_burst = NULL;
2381
2382         rte_free(vf->vf_res);
2383         vf->vf_res = NULL;
2384         rte_free(vf->aq_resp);
2385         vf->aq_resp = NULL;
2386
2387         hw->adapter_closed = 1;
2388 }
2389
2390 /*
2391  * Reset VF device only to re-initialize resources in PMD layer
2392  */
2393 static int
2394 i40evf_dev_reset(struct rte_eth_dev *dev)
2395 {
2396         int ret;
2397
2398         ret = i40evf_dev_uninit(dev);
2399         if (ret)
2400                 return ret;
2401
2402         ret = i40evf_dev_init(dev);
2403
2404         return ret;
2405 }
2406
2407 static int
2408 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2409 {
2410         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2411         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2412         int ret;
2413
2414         if (!lut)
2415                 return -EINVAL;
2416
2417         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2418                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2419                                           lut, lut_size);
2420                 if (ret) {
2421                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2422                         return ret;
2423                 }
2424         } else {
2425                 uint32_t *lut_dw = (uint32_t *)lut;
2426                 uint16_t i, lut_size_dw = lut_size / 4;
2427
2428                 for (i = 0; i < lut_size_dw; i++)
2429                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2430         }
2431
2432         return 0;
2433 }
2434
2435 static int
2436 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2437 {
2438         struct i40e_vf *vf;
2439         struct i40e_hw *hw;
2440         int ret;
2441
2442         if (!vsi || !lut)
2443                 return -EINVAL;
2444
2445         vf = I40E_VSI_TO_VF(vsi);
2446         hw = I40E_VSI_TO_HW(vsi);
2447
2448         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2449                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2450                                           lut, lut_size);
2451                 if (ret) {
2452                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2453                         return ret;
2454                 }
2455         } else {
2456                 uint32_t *lut_dw = (uint32_t *)lut;
2457                 uint16_t i, lut_size_dw = lut_size / 4;
2458
2459                 for (i = 0; i < lut_size_dw; i++)
2460                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2461                 I40EVF_WRITE_FLUSH(hw);
2462         }
2463
2464         return 0;
2465 }
2466
2467 static int
2468 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2469                            struct rte_eth_rss_reta_entry64 *reta_conf,
2470                            uint16_t reta_size)
2471 {
2472         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2473         uint8_t *lut;
2474         uint16_t i, idx, shift;
2475         int ret;
2476
2477         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2478                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2479                         "(%d) doesn't match the number of hardware can "
2480                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2481                 return -EINVAL;
2482         }
2483
2484         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2485         if (!lut) {
2486                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2487                 return -ENOMEM;
2488         }
2489         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2490         if (ret)
2491                 goto out;
2492         for (i = 0; i < reta_size; i++) {
2493                 idx = i / RTE_RETA_GROUP_SIZE;
2494                 shift = i % RTE_RETA_GROUP_SIZE;
2495                 if (reta_conf[idx].mask & (1ULL << shift))
2496                         lut[i] = reta_conf[idx].reta[shift];
2497         }
2498         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2499
2500 out:
2501         rte_free(lut);
2502
2503         return ret;
2504 }
2505
2506 static int
2507 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2508                           struct rte_eth_rss_reta_entry64 *reta_conf,
2509                           uint16_t reta_size)
2510 {
2511         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2512         uint16_t i, idx, shift;
2513         uint8_t *lut;
2514         int ret;
2515
2516         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2517                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2518                         "(%d) doesn't match the number of hardware can "
2519                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2520                 return -EINVAL;
2521         }
2522
2523         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2524         if (!lut) {
2525                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2526                 return -ENOMEM;
2527         }
2528
2529         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2530         if (ret)
2531                 goto out;
2532         for (i = 0; i < reta_size; i++) {
2533                 idx = i / RTE_RETA_GROUP_SIZE;
2534                 shift = i % RTE_RETA_GROUP_SIZE;
2535                 if (reta_conf[idx].mask & (1ULL << shift))
2536                         reta_conf[idx].reta[shift] = lut[i];
2537         }
2538
2539 out:
2540         rte_free(lut);
2541
2542         return ret;
2543 }
2544
2545 static int
2546 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2547 {
2548         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2549         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2550         int ret = 0;
2551
2552         if (!key || key_len == 0) {
2553                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2554                 return 0;
2555         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2556                 sizeof(uint32_t)) {
2557                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2558                 return -EINVAL;
2559         }
2560
2561         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2562                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2563                         (struct i40e_aqc_get_set_rss_key_data *)key;
2564
2565                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2566                 if (ret)
2567                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2568                                      "via AQ");
2569         } else {
2570                 uint32_t *hash_key = (uint32_t *)key;
2571                 uint16_t i;
2572
2573                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2574                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2575                 I40EVF_WRITE_FLUSH(hw);
2576         }
2577
2578         return ret;
2579 }
2580
2581 static int
2582 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2583 {
2584         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2585         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2586         int ret;
2587
2588         if (!key || !key_len)
2589                 return -EINVAL;
2590
2591         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2592                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2593                         (struct i40e_aqc_get_set_rss_key_data *)key);
2594                 if (ret) {
2595                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2596                         return ret;
2597                 }
2598         } else {
2599                 uint32_t *key_dw = (uint32_t *)key;
2600                 uint16_t i;
2601
2602                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2603                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2604         }
2605         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2606
2607         return 0;
2608 }
2609
2610 static int
2611 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2612 {
2613         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2614         uint64_t hena;
2615         int ret;
2616
2617         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2618                                  rss_conf->rss_key_len);
2619         if (ret)
2620                 return ret;
2621
2622         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2623         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2624         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2625         I40EVF_WRITE_FLUSH(hw);
2626
2627         return 0;
2628 }
2629
2630 static void
2631 i40evf_disable_rss(struct i40e_vf *vf)
2632 {
2633         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2634
2635         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2636         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2637         I40EVF_WRITE_FLUSH(hw);
2638 }
2639
2640 static int
2641 i40evf_config_rss(struct i40e_vf *vf)
2642 {
2643         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2644         struct rte_eth_rss_conf rss_conf;
2645         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2646         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2647         uint16_t num;
2648         uint8_t *lut_info;
2649         int ret;
2650
2651         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2652                 i40evf_disable_rss(vf);
2653                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2654                 return 0;
2655         }
2656
2657         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2658         /* Fill out the look up table */
2659         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2660                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2661                         if (j >= num)
2662                                 j = 0;
2663                         lut = (lut << 8) | j;
2664                         if ((i & 3) == 3)
2665                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2666                 }
2667         } else {
2668                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2669                 if (!lut_info) {
2670                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2671                         return -ENOMEM;
2672                 }
2673
2674                 for (i = 0; i < rss_lut_size; i++)
2675                         lut_info[i] = i % vf->num_queue_pairs;
2676
2677                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2678                                          rss_lut_size);
2679                 rte_free(lut_info);
2680                 if (ret)
2681                         return ret;
2682         }
2683
2684         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2685         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2686                 i40evf_disable_rss(vf);
2687                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2688                 return 0;
2689         }
2690
2691         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2692                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2693                 /* Calculate the default hash key */
2694                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2695                         rss_key_default[i] = (uint32_t)rte_rand();
2696                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2697                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2698                         sizeof(uint32_t);
2699         }
2700
2701         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2702 }
2703
2704 static int
2705 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2706                            struct rte_eth_rss_conf *rss_conf)
2707 {
2708         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2709         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2710         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2711         uint64_t hena;
2712
2713         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2714         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2715
2716         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2717                 if (rss_hf != 0) /* Enable RSS */
2718                         return -EINVAL;
2719                 return 0;
2720         }
2721
2722         /* RSS enabled */
2723         if (rss_hf == 0) /* Disable RSS */
2724                 return -EINVAL;
2725
2726         return i40evf_hw_rss_hash_set(vf, rss_conf);
2727 }
2728
2729 static int
2730 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2731                              struct rte_eth_rss_conf *rss_conf)
2732 {
2733         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2734         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2735         uint64_t hena;
2736
2737         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2738                            &rss_conf->rss_key_len);
2739
2740         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2741         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2742         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2743
2744         return 0;
2745 }
2746
2747 static int
2748 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2749 {
2750         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2751         struct rte_eth_dev_data *dev_data = vf->dev_data;
2752         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2753         int ret = 0;
2754
2755         /* check if mtu is within the allowed range */
2756         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2757                 return -EINVAL;
2758
2759         /* mtu setting is forbidden if port is start */
2760         if (dev_data->dev_started) {
2761                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2762                             dev_data->port_id);
2763                 return -EBUSY;
2764         }
2765
2766         if (frame_size > RTE_ETHER_MAX_LEN)
2767                 dev_data->dev_conf.rxmode.offloads |=
2768                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2769         else
2770                 dev_data->dev_conf.rxmode.offloads &=
2771                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2772         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2773
2774         return ret;
2775 }
2776
2777 static int
2778 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2779                             struct rte_ether_addr *mac_addr)
2780 {
2781         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2782
2783         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2784                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2785                 return -EINVAL;
2786         }
2787
2788         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2789
2790         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2791                 return -EIO;
2792
2793         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2794         return 0;
2795 }
2796
2797 static int
2798 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2799                         struct rte_ether_addr *mc_addrs,
2800                         uint32_t mc_addrs_num, bool add)
2801 {
2802         struct virtchnl_ether_addr_list *list;
2803         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2804         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2805                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2806         uint32_t i;
2807         int err;
2808         struct vf_cmd_info args;
2809
2810         if (mc_addrs == NULL || mc_addrs_num == 0)
2811                 return 0;
2812
2813         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2814                 return -EINVAL;
2815
2816         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2817         list->vsi_id = vf->vsi_res->vsi_id;
2818         list->num_elements = mc_addrs_num;
2819
2820         for (i = 0; i < mc_addrs_num; i++) {
2821                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2822                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2823                                     mc_addrs[i].addr_bytes[0],
2824                                     mc_addrs[i].addr_bytes[1],
2825                                     mc_addrs[i].addr_bytes[2],
2826                                     mc_addrs[i].addr_bytes[3],
2827                                     mc_addrs[i].addr_bytes[4],
2828                                     mc_addrs[i].addr_bytes[5]);
2829                         return -EINVAL;
2830                 }
2831
2832                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2833                         sizeof(list->list[i].addr));
2834         }
2835
2836         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2837         args.in_args = cmd_buffer;
2838         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2839                 i * sizeof(struct virtchnl_ether_addr);
2840         args.out_buffer = vf->aq_resp;
2841         args.out_size = I40E_AQ_BUF_SZ;
2842         err = i40evf_execute_vf_cmd(dev, &args);
2843         if (err) {
2844                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2845                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2846                 return err;
2847         }
2848
2849         return 0;
2850 }
2851
2852 static int
2853 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2854                         struct rte_ether_addr *mc_addrs,
2855                         uint32_t mc_addrs_num)
2856 {
2857         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2858         int err;
2859
2860         /* flush previous addresses */
2861         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2862                                 FALSE);
2863         if (err)
2864                 return err;
2865
2866         vf->mc_addrs_num = 0;
2867
2868         /* add new ones */
2869         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2870                                         TRUE);
2871         if (err)
2872                 return err;
2873
2874         vf->mc_addrs_num = mc_addrs_num;
2875         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2876
2877         return 0;
2878 }
2879
2880 bool
2881 is_i40evf_supported(struct rte_eth_dev *dev)
2882 {
2883         return is_device_supported(dev, &rte_i40evf_pmd);
2884 }