4 * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/queue.h>
42 #include <rte_byteorder.h>
43 #include <rte_common.h>
44 #include <rte_cycles.h>
46 #include <rte_interrupts.h>
48 #include <rte_debug.h>
50 #include <rte_atomic.h>
51 #include <rte_branch_prediction.h>
52 #include <rte_memory.h>
53 #include <rte_memzone.h>
55 #include <rte_alarm.h>
56 #include <rte_ether.h>
57 #include <rte_ethdev.h>
58 #include <rte_atomic.h>
59 #include <rte_malloc.h>
62 #include "i40e_logs.h"
63 #include "base/i40e_prototype.h"
64 #include "base/i40e_adminq_cmd.h"
65 #include "base/i40e_type.h"
67 #include "i40e_rxtx.h"
68 #include "i40e_ethdev.h"
70 #define I40EVF_VSI_DEFAULT_MSIX_INTR 1
71 #define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
73 /* busy wait delay in msec */
74 #define I40EVF_BUSY_WAIT_DELAY 10
75 #define I40EVF_BUSY_WAIT_COUNT 50
76 #define MAX_RESET_WAIT_CNT 20
77 /*ITR index for NOITR*/
78 #define I40E_QINT_RQCTL_MSIX_INDX_NOITR 3
80 struct i40evf_arq_msg_info {
81 enum i40e_virtchnl_ops ops;
82 enum i40e_status_code result;
89 enum i40e_virtchnl_ops ops;
91 uint32_t in_args_size;
93 /* Input & output type. pass in buffer size and pass out
94 * actual return result
99 enum i40evf_aq_result {
100 I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
101 I40EVF_MSG_NON, /* Read nothing from admin queue */
102 I40EVF_MSG_SYS, /* Read system msg from admin queue */
103 I40EVF_MSG_CMD, /* Read async command result */
106 /* A share buffer to store the command result from PF driver */
107 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
109 static int i40evf_dev_configure(struct rte_eth_dev *dev);
110 static int i40evf_dev_start(struct rte_eth_dev *dev);
111 static void i40evf_dev_stop(struct rte_eth_dev *dev);
112 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
113 struct rte_eth_dev_info *dev_info);
114 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
115 __rte_unused int wait_to_complete);
116 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
117 struct rte_eth_stats *stats);
118 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
119 struct rte_eth_xstats *xstats, unsigned n);
120 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
121 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
122 uint16_t vlan_id, int on);
123 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
124 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
126 static void i40evf_dev_close(struct rte_eth_dev *dev);
127 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
128 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
129 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
130 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
131 static int i40evf_get_link_status(struct rte_eth_dev *dev,
132 struct rte_eth_link *link);
133 static int i40evf_init_vlan(struct rte_eth_dev *dev);
134 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
135 uint16_t rx_queue_id);
136 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
137 uint16_t rx_queue_id);
138 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
139 uint16_t tx_queue_id);
140 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
141 uint16_t tx_queue_id);
142 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
143 struct rte_eth_rss_reta_entry64 *reta_conf,
145 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
146 struct rte_eth_rss_reta_entry64 *reta_conf,
148 static int i40evf_config_rss(struct i40e_vf *vf);
149 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
150 struct rte_eth_rss_conf *rss_conf);
151 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
152 struct rte_eth_rss_conf *rss_conf);
154 /* Default hash key buffer for RSS */
155 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
157 struct rte_i40evf_xstats_name_off {
158 char name[RTE_ETH_XSTATS_NAME_SIZE];
162 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
163 {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
164 {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
165 {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
166 {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
167 {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
168 {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
169 rx_unknown_protocol)},
170 {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
171 {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
172 {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
173 {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
174 {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
175 {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
178 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
179 sizeof(rte_i40evf_stats_strings[0]))
181 static const struct eth_dev_ops i40evf_eth_dev_ops = {
182 .dev_configure = i40evf_dev_configure,
183 .dev_start = i40evf_dev_start,
184 .dev_stop = i40evf_dev_stop,
185 .promiscuous_enable = i40evf_dev_promiscuous_enable,
186 .promiscuous_disable = i40evf_dev_promiscuous_disable,
187 .allmulticast_enable = i40evf_dev_allmulticast_enable,
188 .allmulticast_disable = i40evf_dev_allmulticast_disable,
189 .link_update = i40evf_dev_link_update,
190 .stats_get = i40evf_dev_stats_get,
191 .xstats_get = i40evf_dev_xstats_get,
192 .xstats_reset = i40evf_dev_xstats_reset,
193 .dev_close = i40evf_dev_close,
194 .dev_infos_get = i40evf_dev_info_get,
195 .vlan_filter_set = i40evf_vlan_filter_set,
196 .vlan_offload_set = i40evf_vlan_offload_set,
197 .vlan_pvid_set = i40evf_vlan_pvid_set,
198 .rx_queue_start = i40evf_dev_rx_queue_start,
199 .rx_queue_stop = i40evf_dev_rx_queue_stop,
200 .tx_queue_start = i40evf_dev_tx_queue_start,
201 .tx_queue_stop = i40evf_dev_tx_queue_stop,
202 .rx_queue_setup = i40e_dev_rx_queue_setup,
203 .rx_queue_release = i40e_dev_rx_queue_release,
204 .tx_queue_setup = i40e_dev_tx_queue_setup,
205 .tx_queue_release = i40e_dev_tx_queue_release,
206 .reta_update = i40evf_dev_rss_reta_update,
207 .reta_query = i40evf_dev_rss_reta_query,
208 .rss_hash_update = i40evf_dev_rss_hash_update,
209 .rss_hash_conf_get = i40evf_dev_rss_hash_conf_get,
213 i40evf_set_mac_type(struct i40e_hw *hw)
215 int status = I40E_ERR_DEVICE_NOT_SUPPORTED;
217 if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
218 switch (hw->device_id) {
220 case I40E_DEV_ID_VF_HV:
221 hw->mac.type = I40E_MAC_VF;
222 status = I40E_SUCCESS;
233 * Parse admin queue message.
238 * > 0: read cmd result
240 static enum i40evf_aq_result
241 i40evf_parse_pfmsg(struct i40e_vf *vf,
242 struct i40e_arq_event_info *event,
243 struct i40evf_arq_msg_info *data)
245 enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
246 rte_le_to_cpu_32(event->desc.cookie_high);
247 enum i40e_status_code retval = (enum i40e_status_code)\
248 rte_le_to_cpu_32(event->desc.cookie_low);
249 enum i40evf_aq_result ret = I40EVF_MSG_CMD;
252 if (opcode == I40E_VIRTCHNL_OP_EVENT) {
253 struct i40e_virtchnl_pf_event *vpe =
254 (struct i40e_virtchnl_pf_event *)event->msg_buf;
256 /* Initialize ret to sys event */
257 ret = I40EVF_MSG_SYS;
258 switch (vpe->event) {
259 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
261 vpe->event_data.link_event.link_status;
262 vf->pend_msg |= PFMSG_LINK_CHANGE;
263 PMD_DRV_LOG(INFO, "Link status update:%s",
264 vf->link_up ? "up" : "down");
266 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
268 vf->pend_msg |= PFMSG_RESET_IMPENDING;
269 PMD_DRV_LOG(INFO, "vf is reseting");
271 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
272 vf->dev_closed = true;
273 vf->pend_msg |= PFMSG_DRIVER_CLOSE;
274 PMD_DRV_LOG(INFO, "PF driver closed");
277 PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
278 __func__, vpe->event);
281 /* async reply msg on command issued by vf previously */
282 ret = I40EVF_MSG_CMD;
283 /* Actual data length read from PF */
284 data->msg_len = event->msg_len;
286 /* fill the ops and result to notify VF */
287 data->result = retval;
294 * Read data in admin queue to get msg from pf driver
296 static enum i40evf_aq_result
297 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
299 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
300 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
301 struct i40e_arq_event_info event;
303 enum i40evf_aq_result result = I40EVF_MSG_NON;
305 event.buf_len = data->buf_len;
306 event.msg_buf = data->msg;
307 ret = i40e_clean_arq_element(hw, &event, NULL);
308 /* Can't read any msg from adminQ */
310 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
311 result = I40EVF_MSG_NON;
313 result = I40EVF_MSG_ERR;
317 /* Parse the event */
318 result = i40evf_parse_pfmsg(vf, &event, data);
324 * Polling read until command result return from pf driver or meet error.
327 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
328 struct i40evf_arq_msg_info *data)
331 enum i40evf_aq_result ret;
333 #define MAX_TRY_TIMES 20
334 #define ASQ_DELAY_MS 100
336 /* Delay some time first */
337 rte_delay_ms(ASQ_DELAY_MS);
338 ret = i40evf_read_pfmsg(dev, data);
339 if (ret == I40EVF_MSG_CMD)
341 else if (ret == I40EVF_MSG_ERR)
344 /* If don't read msg or read sys event, continue */
345 } while(i++ < MAX_TRY_TIMES);
351 * clear current command. Only call in case execute
352 * _atomic_set_cmd successfully.
355 _clear_cmd(struct i40e_vf *vf)
358 vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
362 * Check there is pending cmd in execution. If none, set new command.
365 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
367 int ret = rte_atomic32_cmpset(&vf->pend_cmd,
368 I40E_VIRTCHNL_OP_UNKNOWN, ops);
371 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
377 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
379 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
380 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
382 struct i40evf_arq_msg_info info;
384 if (_atomic_set_cmd(vf, args->ops))
387 info.msg = args->out_buffer;
388 info.buf_len = args->out_size;
389 info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
390 info.result = I40E_SUCCESS;
392 err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
393 args->in_args, args->in_args_size, NULL);
395 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
400 err = i40evf_wait_cmd_done(dev, &info);
401 /* read message and it's expected one */
402 if (!err && args->ops == info.ops)
405 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
408 else if (args->ops != info.ops)
409 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
410 args->ops, info.ops);
412 return (err | info.result);
416 * Check API version with sync wait until version read or fail from admin queue
419 i40evf_check_api_version(struct rte_eth_dev *dev)
421 struct i40e_virtchnl_version_info version, *pver;
423 struct vf_cmd_info args;
424 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
426 version.major = I40E_VIRTCHNL_VERSION_MAJOR;
427 version.minor = I40E_VIRTCHNL_VERSION_MINOR;
429 args.ops = I40E_VIRTCHNL_OP_VERSION;
430 args.in_args = (uint8_t *)&version;
431 args.in_args_size = sizeof(version);
432 args.out_buffer = cmd_result_buffer;
433 args.out_size = I40E_AQ_BUF_SZ;
435 err = i40evf_execute_vf_cmd(dev, &args);
437 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
441 pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
442 vf->version_major = pver->major;
443 vf->version_minor = pver->minor;
444 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
445 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
446 else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
447 (vf->version_minor <= I40E_VIRTCHNL_VERSION_MINOR))
448 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
450 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
451 vf->version_major, vf->version_minor,
452 I40E_VIRTCHNL_VERSION_MAJOR,
453 I40E_VIRTCHNL_VERSION_MINOR);
461 i40evf_get_vf_resource(struct rte_eth_dev *dev)
463 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
464 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
466 struct vf_cmd_info args;
469 args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
470 args.out_buffer = cmd_result_buffer;
471 args.out_size = I40E_AQ_BUF_SZ;
473 caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
474 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ |
475 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
476 I40E_VIRTCHNL_VF_OFFLOAD_VLAN |
477 I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
478 args.in_args = (uint8_t *)∩︀
479 args.in_args_size = sizeof(caps);
482 args.in_args_size = 0;
484 err = i40evf_execute_vf_cmd(dev, &args);
487 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
491 len = sizeof(struct i40e_virtchnl_vf_resource) +
492 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
494 (void)rte_memcpy(vf->vf_res, args.out_buffer,
495 RTE_MIN(args.out_size, len));
496 i40e_vf_parse_hw_config(hw, vf->vf_res);
502 i40evf_config_promisc(struct rte_eth_dev *dev,
504 bool enable_multicast)
506 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
508 struct vf_cmd_info args;
509 struct i40e_virtchnl_promisc_info promisc;
512 promisc.vsi_id = vf->vsi_res->vsi_id;
515 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
517 if (enable_multicast)
518 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
520 args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
521 args.in_args = (uint8_t *)&promisc;
522 args.in_args_size = sizeof(promisc);
523 args.out_buffer = cmd_result_buffer;
524 args.out_size = I40E_AQ_BUF_SZ;
526 err = i40evf_execute_vf_cmd(dev, &args);
529 PMD_DRV_LOG(ERR, "fail to execute command "
530 "CONFIG_PROMISCUOUS_MODE");
534 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
536 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
537 bool enable_vlan_strip)
539 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
541 struct vf_cmd_info args;
542 struct i40e_virtchnl_vlan_offload_info offload;
544 offload.vsi_id = vf->vsi_res->vsi_id;
545 offload.enable_vlan_strip = enable_vlan_strip;
547 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
548 args.in_args = (uint8_t *)&offload;
549 args.in_args_size = sizeof(offload);
550 args.out_buffer = cmd_result_buffer;
551 args.out_size = I40E_AQ_BUF_SZ;
553 err = i40evf_execute_vf_cmd(dev, &args);
555 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
561 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
562 struct i40e_vsi_vlan_pvid_info *info)
564 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
566 struct vf_cmd_info args;
567 struct i40e_virtchnl_pvid_info tpid_info;
569 if (dev == NULL || info == NULL) {
570 PMD_DRV_LOG(ERR, "invalid parameters");
571 return I40E_ERR_PARAM;
574 memset(&tpid_info, 0, sizeof(tpid_info));
575 tpid_info.vsi_id = vf->vsi_res->vsi_id;
576 (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
578 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
579 args.in_args = (uint8_t *)&tpid_info;
580 args.in_args_size = sizeof(tpid_info);
581 args.out_buffer = cmd_result_buffer;
582 args.out_size = I40E_AQ_BUF_SZ;
584 err = i40evf_execute_vf_cmd(dev, &args);
586 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
592 i40evf_fill_virtchnl_vsi_txq_info(struct i40e_virtchnl_txq_info *txq_info,
596 struct i40e_tx_queue *txq)
598 txq_info->vsi_id = vsi_id;
599 txq_info->queue_id = queue_id;
600 if (queue_id < nb_txq) {
601 txq_info->ring_len = txq->nb_tx_desc;
602 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
607 i40evf_fill_virtchnl_vsi_rxq_info(struct i40e_virtchnl_rxq_info *rxq_info,
611 uint32_t max_pkt_size,
612 struct i40e_rx_queue *rxq)
614 rxq_info->vsi_id = vsi_id;
615 rxq_info->queue_id = queue_id;
616 rxq_info->max_pkt_size = max_pkt_size;
617 if (queue_id < nb_rxq) {
618 rxq_info->ring_len = rxq->nb_rx_desc;
619 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
620 rxq_info->databuffer_size =
621 (rte_pktmbuf_data_room_size(rxq->mp) -
622 RTE_PKTMBUF_HEADROOM);
626 /* It configures VSI queues to co-work with Linux PF host */
628 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
630 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
631 struct i40e_rx_queue **rxq =
632 (struct i40e_rx_queue **)dev->data->rx_queues;
633 struct i40e_tx_queue **txq =
634 (struct i40e_tx_queue **)dev->data->tx_queues;
635 struct i40e_virtchnl_vsi_queue_config_info *vc_vqci;
636 struct i40e_virtchnl_queue_pair_info *vc_qpi;
637 struct vf_cmd_info args;
638 uint16_t i, nb_qp = vf->num_queue_pairs;
639 const uint32_t size =
640 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
644 memset(buff, 0, sizeof(buff));
645 vc_vqci = (struct i40e_virtchnl_vsi_queue_config_info *)buff;
646 vc_vqci->vsi_id = vf->vsi_res->vsi_id;
647 vc_vqci->num_queue_pairs = nb_qp;
649 for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
650 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
651 vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
652 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
653 vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
654 vf->max_pkt_len, rxq[i]);
656 memset(&args, 0, sizeof(args));
657 args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
658 args.in_args = (uint8_t *)vc_vqci;
659 args.in_args_size = size;
660 args.out_buffer = cmd_result_buffer;
661 args.out_size = I40E_AQ_BUF_SZ;
662 ret = i40evf_execute_vf_cmd(dev, &args);
664 PMD_DRV_LOG(ERR, "Failed to execute command of "
665 "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES\n");
670 /* It configures VSI queues to co-work with DPDK PF host */
672 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
674 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
675 struct i40e_rx_queue **rxq =
676 (struct i40e_rx_queue **)dev->data->rx_queues;
677 struct i40e_tx_queue **txq =
678 (struct i40e_tx_queue **)dev->data->tx_queues;
679 struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei;
680 struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
681 struct vf_cmd_info args;
682 uint16_t i, nb_qp = vf->num_queue_pairs;
683 const uint32_t size =
684 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
688 memset(buff, 0, sizeof(buff));
689 vc_vqcei = (struct i40e_virtchnl_vsi_queue_config_ext_info *)buff;
690 vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
691 vc_vqcei->num_queue_pairs = nb_qp;
692 vc_qpei = vc_vqcei->qpair;
693 for (i = 0; i < nb_qp; i++, vc_qpei++) {
694 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
695 vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
696 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
697 vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
698 vf->max_pkt_len, rxq[i]);
699 if (i < dev->data->nb_rx_queues)
701 * It adds extra info for configuring VSI queues, which
702 * is needed to enable the configurable crc stripping
705 vc_qpei->rxq_ext.crcstrip =
706 dev->data->dev_conf.rxmode.hw_strip_crc;
708 memset(&args, 0, sizeof(args));
710 (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
711 args.in_args = (uint8_t *)vc_vqcei;
712 args.in_args_size = size;
713 args.out_buffer = cmd_result_buffer;
714 args.out_size = I40E_AQ_BUF_SZ;
715 ret = i40evf_execute_vf_cmd(dev, &args);
717 PMD_DRV_LOG(ERR, "Failed to execute command of "
718 "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT\n");
724 i40evf_configure_queues(struct rte_eth_dev *dev)
726 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
728 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
729 /* To support DPDK PF host */
730 return i40evf_configure_vsi_queues_ext(dev);
732 /* To support Linux PF host */
733 return i40evf_configure_vsi_queues(dev);
737 i40evf_config_irq_map(struct rte_eth_dev *dev)
739 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
740 struct vf_cmd_info args;
741 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
742 sizeof(struct i40e_virtchnl_vector_map)];
743 struct i40e_virtchnl_irq_map_info *map_info;
745 map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
746 map_info->num_vectors = 1;
747 map_info->vecmap[0].rxitr_idx = I40E_QINT_RQCTL_MSIX_INDX_NOITR;
748 map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
749 /* Alway use default dynamic MSIX interrupt */
750 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
751 map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
753 map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
755 /* Don't map any tx queue */
756 map_info->vecmap[0].txq_map = 0;
757 map_info->vecmap[0].rxq_map = 0;
758 for (i = 0; i < dev->data->nb_rx_queues; i++)
759 map_info->vecmap[0].rxq_map |= 1 << i;
761 args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
762 args.in_args = (u8 *)cmd_buffer;
763 args.in_args_size = sizeof(cmd_buffer);
764 args.out_buffer = cmd_result_buffer;
765 args.out_size = I40E_AQ_BUF_SZ;
766 err = i40evf_execute_vf_cmd(dev, &args);
768 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
774 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
777 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
778 struct i40e_virtchnl_queue_select queue_select;
780 struct vf_cmd_info args;
781 memset(&queue_select, 0, sizeof(queue_select));
782 queue_select.vsi_id = vf->vsi_res->vsi_id;
785 queue_select.rx_queues |= 1 << qid;
787 queue_select.tx_queues |= 1 << qid;
790 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
792 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
793 args.in_args = (u8 *)&queue_select;
794 args.in_args_size = sizeof(queue_select);
795 args.out_buffer = cmd_result_buffer;
796 args.out_size = I40E_AQ_BUF_SZ;
797 err = i40evf_execute_vf_cmd(dev, &args);
799 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
800 isrx ? "RX" : "TX", qid, on ? "on" : "off");
806 i40evf_start_queues(struct rte_eth_dev *dev)
808 struct rte_eth_dev_data *dev_data = dev->data;
810 struct i40e_rx_queue *rxq;
811 struct i40e_tx_queue *txq;
813 for (i = 0; i < dev->data->nb_rx_queues; i++) {
814 rxq = dev_data->rx_queues[i];
815 if (rxq->rx_deferred_start)
817 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
818 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
823 for (i = 0; i < dev->data->nb_tx_queues; i++) {
824 txq = dev_data->tx_queues[i];
825 if (txq->tx_deferred_start)
827 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
828 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
837 i40evf_stop_queues(struct rte_eth_dev *dev)
841 /* Stop TX queues first */
842 for (i = 0; i < dev->data->nb_tx_queues; i++) {
843 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
844 PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
849 /* Then stop RX queues */
850 for (i = 0; i < dev->data->nb_rx_queues; i++) {
851 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
852 PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
861 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
863 struct i40e_virtchnl_ether_addr_list *list;
864 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
865 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
866 sizeof(struct i40e_virtchnl_ether_addr)];
868 struct vf_cmd_info args;
870 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
871 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
872 addr->addr_bytes[0], addr->addr_bytes[1],
873 addr->addr_bytes[2], addr->addr_bytes[3],
874 addr->addr_bytes[4], addr->addr_bytes[5]);
878 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
879 list->vsi_id = vf->vsi_res->vsi_id;
880 list->num_elements = 1;
881 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
882 sizeof(addr->addr_bytes));
884 args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
885 args.in_args = cmd_buffer;
886 args.in_args_size = sizeof(cmd_buffer);
887 args.out_buffer = cmd_result_buffer;
888 args.out_size = I40E_AQ_BUF_SZ;
889 err = i40evf_execute_vf_cmd(dev, &args);
891 PMD_DRV_LOG(ERR, "fail to execute command "
892 "OP_ADD_ETHER_ADDRESS");
898 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
900 struct i40e_virtchnl_ether_addr_list *list;
901 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
902 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
903 sizeof(struct i40e_virtchnl_ether_addr)];
905 struct vf_cmd_info args;
907 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
908 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
909 addr->addr_bytes[0], addr->addr_bytes[1],
910 addr->addr_bytes[2], addr->addr_bytes[3],
911 addr->addr_bytes[4], addr->addr_bytes[5]);
915 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
916 list->vsi_id = vf->vsi_res->vsi_id;
917 list->num_elements = 1;
918 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
919 sizeof(addr->addr_bytes));
921 args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
922 args.in_args = cmd_buffer;
923 args.in_args_size = sizeof(cmd_buffer);
924 args.out_buffer = cmd_result_buffer;
925 args.out_size = I40E_AQ_BUF_SZ;
926 err = i40evf_execute_vf_cmd(dev, &args);
928 PMD_DRV_LOG(ERR, "fail to execute command "
929 "OP_DEL_ETHER_ADDRESS");
935 i40evf_update_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
937 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
938 struct i40e_virtchnl_queue_select q_stats;
940 struct vf_cmd_info args;
942 memset(&q_stats, 0, sizeof(q_stats));
943 q_stats.vsi_id = vf->vsi_res->vsi_id;
944 args.ops = I40E_VIRTCHNL_OP_GET_STATS;
945 args.in_args = (u8 *)&q_stats;
946 args.in_args_size = sizeof(q_stats);
947 args.out_buffer = cmd_result_buffer;
948 args.out_size = I40E_AQ_BUF_SZ;
950 err = i40evf_execute_vf_cmd(dev, &args);
952 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
956 *pstats = (struct i40e_eth_stats *)args.out_buffer;
961 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
964 struct i40e_eth_stats *pstats = NULL;
966 ret = i40evf_update_stats(dev, &pstats);
970 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
971 pstats->rx_broadcast;
972 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
974 stats->ierrors = pstats->rx_discards;
975 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
976 stats->ibytes = pstats->rx_bytes;
977 stats->obytes = pstats->tx_bytes;
983 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
985 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
986 struct i40e_eth_stats *pstats = NULL;
988 /* read stat values to clear hardware registers */
989 i40evf_update_stats(dev, &pstats);
991 /* set stats offset base on current values */
992 vf->vsi.eth_stats_offset = vf->vsi.eth_stats;
995 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
996 struct rte_eth_xstats *xstats, unsigned n)
1000 struct i40e_eth_stats *pstats = NULL;
1002 if (n < I40EVF_NB_XSTATS)
1003 return I40EVF_NB_XSTATS;
1005 ret = i40evf_update_stats(dev, &pstats);
1012 /* loop over xstats array and values from pstats */
1013 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1014 snprintf(xstats[i].name, sizeof(xstats[i].name),
1015 "%s", rte_i40evf_stats_strings[i].name);
1016 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1017 rte_i40evf_stats_strings[i].offset);
1020 return I40EVF_NB_XSTATS;
1024 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1026 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1027 struct i40e_virtchnl_vlan_filter_list *vlan_list;
1028 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
1031 struct vf_cmd_info args;
1033 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
1034 vlan_list->vsi_id = vf->vsi_res->vsi_id;
1035 vlan_list->num_elements = 1;
1036 vlan_list->vlan_id[0] = vlanid;
1038 args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
1039 args.in_args = (u8 *)&cmd_buffer;
1040 args.in_args_size = sizeof(cmd_buffer);
1041 args.out_buffer = cmd_result_buffer;
1042 args.out_size = I40E_AQ_BUF_SZ;
1043 err = i40evf_execute_vf_cmd(dev, &args);
1045 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1051 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1053 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1054 struct i40e_virtchnl_vlan_filter_list *vlan_list;
1055 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
1058 struct vf_cmd_info args;
1060 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
1061 vlan_list->vsi_id = vf->vsi_res->vsi_id;
1062 vlan_list->num_elements = 1;
1063 vlan_list->vlan_id[0] = vlanid;
1065 args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
1066 args.in_args = (u8 *)&cmd_buffer;
1067 args.in_args_size = sizeof(cmd_buffer);
1068 args.out_buffer = cmd_result_buffer;
1069 args.out_size = I40E_AQ_BUF_SZ;
1070 err = i40evf_execute_vf_cmd(dev, &args);
1072 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1078 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
1081 struct vf_cmd_info args;
1082 struct rte_eth_link *new_link;
1084 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
1085 args.in_args = NULL;
1086 args.in_args_size = 0;
1087 args.out_buffer = cmd_result_buffer;
1088 args.out_size = I40E_AQ_BUF_SZ;
1089 err = i40evf_execute_vf_cmd(dev, &args);
1091 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
1095 new_link = (struct rte_eth_link *)args.out_buffer;
1096 (void)rte_memcpy(link, new_link, sizeof(*link));
1101 static const struct rte_pci_id pci_id_i40evf_map[] = {
1102 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
1103 #include "rte_pci_dev_ids.h"
1104 { .vendor_id = 0, /* sentinel */ },
1108 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1109 struct rte_eth_link *link)
1111 struct rte_eth_link *dst = &(dev->data->dev_link);
1112 struct rte_eth_link *src = link;
1114 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1115 *(uint64_t *)src) == 0)
1122 i40evf_reset_vf(struct i40e_hw *hw)
1126 if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1127 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1131 * After issuing vf reset command to pf, pf won't necessarily
1132 * reset vf, it depends on what state it exactly is. If it's not
1133 * initialized yet, it won't have vf reset since it's in a certain
1134 * state. If not, it will try to reset. Even vf is reset, pf will
1135 * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1136 * it to ACTIVE. In this duration, vf may not catch the moment that
1137 * COMPLETE is set. So, for vf, we'll try to wait a long time.
1141 for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1142 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1143 I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1144 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1145 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
1151 if (i >= MAX_RESET_WAIT_CNT) {
1152 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1160 i40evf_init_vf(struct rte_eth_dev *dev)
1163 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1164 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1166 vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1167 vf->dev_data = dev->data;
1168 err = i40evf_set_mac_type(hw);
1170 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1174 i40e_init_adminq_parameter(hw);
1175 err = i40e_init_adminq(hw);
1177 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1182 /* Reset VF and wait until it's complete */
1183 if (i40evf_reset_vf(hw)) {
1184 PMD_INIT_LOG(ERR, "reset NIC failed");
1188 /* VF reset, shutdown admin queue and initialize again */
1189 if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1190 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1194 i40e_init_adminq_parameter(hw);
1195 if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1196 PMD_INIT_LOG(ERR, "init_adminq failed");
1199 if (i40evf_check_api_version(dev) != 0) {
1200 PMD_INIT_LOG(ERR, "check_api version failed");
1203 bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1204 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1205 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1207 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1211 if (i40evf_get_vf_resource(dev) != 0) {
1212 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1216 /* got VF config message back from PF, now we can parse it */
1217 for (i = 0; i < vf->vf_res->num_vsis; i++) {
1218 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1219 vf->vsi_res = &vf->vf_res->vsi_res[i];
1223 PMD_INIT_LOG(ERR, "no LAN VSI found");
1227 vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1228 vf->vsi.type = vf->vsi_res->vsi_type;
1229 vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1231 /* check mac addr, if it's not valid, genrate one */
1232 if (I40E_SUCCESS != i40e_validate_mac_addr(\
1233 vf->vsi_res->default_mac_addr))
1234 eth_random_addr(vf->vsi_res->default_mac_addr);
1236 ether_addr_copy((struct ether_addr *)vf->vsi_res->default_mac_addr,
1237 (struct ether_addr *)hw->mac.addr);
1242 rte_free(vf->vf_res);
1244 i40e_shutdown_adminq(hw); /* ignore error */
1250 i40evf_uninit_vf(struct rte_eth_dev *dev)
1252 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1253 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1255 PMD_INIT_FUNC_TRACE();
1257 if (hw->adapter_stopped == 0)
1258 i40evf_dev_close(dev);
1259 rte_free(vf->vf_res);
1266 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1268 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1269 eth_dev->data->dev_private);
1271 PMD_INIT_FUNC_TRACE();
1273 /* assign ops func pointer */
1274 eth_dev->dev_ops = &i40evf_eth_dev_ops;
1275 eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1276 eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1279 * For secondary processes, we don't initialise any further as primary
1280 * has already done this work.
1282 if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1283 i40e_set_rx_function(eth_dev);
1284 i40e_set_tx_function(eth_dev);
1288 hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1289 hw->device_id = eth_dev->pci_dev->id.device_id;
1290 hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1291 hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1292 hw->bus.device = eth_dev->pci_dev->addr.devid;
1293 hw->bus.func = eth_dev->pci_dev->addr.function;
1294 hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1295 hw->adapter_stopped = 0;
1297 if(i40evf_init_vf(eth_dev) != 0) {
1298 PMD_INIT_LOG(ERR, "Init vf failed");
1303 eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1305 if (eth_dev->data->mac_addrs == NULL) {
1306 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1307 "store MAC addresses", ETHER_ADDR_LEN);
1310 ether_addr_copy((struct ether_addr *)hw->mac.addr,
1311 (struct ether_addr *)eth_dev->data->mac_addrs);
1317 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1319 PMD_INIT_FUNC_TRACE();
1321 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1324 eth_dev->dev_ops = NULL;
1325 eth_dev->rx_pkt_burst = NULL;
1326 eth_dev->tx_pkt_burst = NULL;
1328 if (i40evf_uninit_vf(eth_dev) != 0) {
1329 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1333 rte_free(eth_dev->data->mac_addrs);
1334 eth_dev->data->mac_addrs = NULL;
1339 * virtual function driver struct
1341 static struct eth_driver rte_i40evf_pmd = {
1343 .name = "rte_i40evf_pmd",
1344 .id_table = pci_id_i40evf_map,
1345 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
1347 .eth_dev_init = i40evf_dev_init,
1348 .eth_dev_uninit = i40evf_dev_uninit,
1349 .dev_private_size = sizeof(struct i40e_adapter),
1353 * VF Driver initialization routine.
1354 * Invoked one at EAL init time.
1355 * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1358 rte_i40evf_pmd_init(const char *name __rte_unused,
1359 const char *params __rte_unused)
1361 PMD_INIT_FUNC_TRACE();
1363 rte_eth_driver_register(&rte_i40evf_pmd);
1368 static struct rte_driver rte_i40evf_driver = {
1370 .init = rte_i40evf_pmd_init,
1373 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1376 i40evf_dev_configure(struct rte_eth_dev *dev)
1378 struct i40e_adapter *ad =
1379 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1381 /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1382 * allocation or vector Rx preconditions we will reset it.
1384 ad->rx_bulk_alloc_allowed = true;
1385 ad->rx_vec_allowed = true;
1386 ad->tx_simple_allowed = true;
1387 ad->tx_vec_allowed = true;
1389 return i40evf_init_vlan(dev);
1393 i40evf_init_vlan(struct rte_eth_dev *dev)
1395 struct rte_eth_dev_data *data = dev->data;
1398 /* Apply vlan offload setting */
1399 i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1401 /* Apply pvid setting */
1402 ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1403 data->dev_conf.txmode.hw_vlan_insert_pvid);
1408 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1410 bool enable_vlan_strip = 0;
1411 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1412 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1414 /* Linux pf host doesn't support vlan offload yet */
1415 if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1416 /* Vlan stripping setting */
1417 if (mask & ETH_VLAN_STRIP_MASK) {
1418 /* Enable or disable VLAN stripping */
1419 if (dev_conf->rxmode.hw_vlan_strip)
1420 enable_vlan_strip = 1;
1422 enable_vlan_strip = 0;
1424 i40evf_config_vlan_offload(dev, enable_vlan_strip);
1430 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1432 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1433 struct i40e_vsi_vlan_pvid_info info;
1434 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1436 memset(&info, 0, sizeof(info));
1439 /* Linux pf host don't support vlan offload yet */
1440 if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1442 info.config.pvid = pvid;
1444 info.config.reject.tagged =
1445 dev_conf->txmode.hw_vlan_reject_tagged;
1446 info.config.reject.untagged =
1447 dev_conf->txmode.hw_vlan_reject_untagged;
1449 return i40evf_config_vlan_pvid(dev, &info);
1456 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1458 struct i40e_rx_queue *rxq;
1460 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1462 PMD_INIT_FUNC_TRACE();
1464 if (rx_queue_id < dev->data->nb_rx_queues) {
1465 rxq = dev->data->rx_queues[rx_queue_id];
1467 err = i40e_alloc_rx_queue_mbufs(rxq);
1469 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1475 /* Init the RX tail register. */
1476 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1477 I40EVF_WRITE_FLUSH(hw);
1479 /* Ready to switch the queue on */
1480 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1483 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1491 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1493 struct i40e_rx_queue *rxq;
1496 if (rx_queue_id < dev->data->nb_rx_queues) {
1497 rxq = dev->data->rx_queues[rx_queue_id];
1499 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1502 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1507 i40e_rx_queue_release_mbufs(rxq);
1508 i40e_reset_rx_queue(rxq);
1515 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1519 PMD_INIT_FUNC_TRACE();
1521 if (tx_queue_id < dev->data->nb_tx_queues) {
1523 /* Ready to switch the queue on */
1524 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1527 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1535 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1537 struct i40e_tx_queue *txq;
1540 if (tx_queue_id < dev->data->nb_tx_queues) {
1541 txq = dev->data->tx_queues[tx_queue_id];
1543 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1546 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1551 i40e_tx_queue_release_mbufs(txq);
1552 i40e_reset_tx_queue(txq);
1559 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1564 ret = i40evf_add_vlan(dev, vlan_id);
1566 ret = i40evf_del_vlan(dev,vlan_id);
1572 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1574 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1575 struct rte_eth_dev_data *dev_data = dev->data;
1576 struct rte_pktmbuf_pool_private *mbp_priv;
1577 uint16_t buf_size, len;
1579 rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1580 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1581 I40EVF_WRITE_FLUSH(hw);
1583 /* Calculate the maximum packet length allowed */
1584 mbp_priv = rte_mempool_get_priv(rxq->mp);
1585 buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1586 RTE_PKTMBUF_HEADROOM);
1587 rxq->hs_mode = i40e_header_split_none;
1588 rxq->rx_hdr_len = 0;
1589 rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1590 len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1591 rxq->max_pkt_len = RTE_MIN(len,
1592 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1595 * Check if the jumbo frame and maximum packet length are set correctly
1597 if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1598 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1599 rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1600 PMD_DRV_LOG(ERR, "maximum packet length must be "
1601 "larger than %u and smaller than %u, as jumbo "
1602 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1603 (uint32_t)I40E_FRAME_SIZE_MAX);
1604 return I40E_ERR_CONFIG;
1607 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1608 rxq->max_pkt_len > ETHER_MAX_LEN) {
1609 PMD_DRV_LOG(ERR, "maximum packet length must be "
1610 "larger than %u and smaller than %u, as jumbo "
1611 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1612 (uint32_t)ETHER_MAX_LEN);
1613 return I40E_ERR_CONFIG;
1617 if (dev_data->dev_conf.rxmode.enable_scatter ||
1618 (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1619 dev_data->scattered_rx = 1;
1626 i40evf_rx_init(struct rte_eth_dev *dev)
1628 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1630 int ret = I40E_SUCCESS;
1631 struct i40e_rx_queue **rxq =
1632 (struct i40e_rx_queue **)dev->data->rx_queues;
1634 i40evf_config_rss(vf);
1635 for (i = 0; i < dev->data->nb_rx_queues; i++) {
1636 if (!rxq[i] || !rxq[i]->q_set)
1638 ret = i40evf_rxq_init(dev, rxq[i]);
1639 if (ret != I40E_SUCCESS)
1642 if (ret == I40E_SUCCESS)
1643 i40e_set_rx_function(dev);
1649 i40evf_tx_init(struct rte_eth_dev *dev)
1652 struct i40e_tx_queue **txq =
1653 (struct i40e_tx_queue **)dev->data->tx_queues;
1654 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1656 for (i = 0; i < dev->data->nb_tx_queues; i++)
1657 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1659 i40e_set_tx_function(dev);
1663 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1665 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1666 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1668 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1669 /* To support DPDK PF host */
1671 I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1672 I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1673 I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1675 /* To support Linux PF host */
1676 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1677 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1678 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK);
1682 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1684 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1685 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1687 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1689 I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1692 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1696 i40evf_dev_start(struct rte_eth_dev *dev)
1698 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1699 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1700 struct ether_addr mac_addr;
1702 PMD_INIT_FUNC_TRACE();
1704 hw->adapter_stopped = 0;
1706 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1707 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1708 dev->data->nb_tx_queues);
1710 if (i40evf_rx_init(dev) != 0){
1711 PMD_DRV_LOG(ERR, "failed to do RX init");
1715 i40evf_tx_init(dev);
1717 if (i40evf_configure_queues(dev) != 0) {
1718 PMD_DRV_LOG(ERR, "configure queues failed");
1721 if (i40evf_config_irq_map(dev)) {
1722 PMD_DRV_LOG(ERR, "config_irq_map failed");
1727 (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1728 sizeof(mac_addr.addr_bytes));
1729 if (i40evf_add_mac_addr(dev, &mac_addr)) {
1730 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1734 if (i40evf_start_queues(dev) != 0) {
1735 PMD_DRV_LOG(ERR, "enable queues failed");
1739 i40evf_enable_queues_intr(dev);
1743 i40evf_del_mac_addr(dev, &mac_addr);
1749 i40evf_dev_stop(struct rte_eth_dev *dev)
1751 PMD_INIT_FUNC_TRACE();
1753 i40evf_disable_queues_intr(dev);
1754 i40evf_stop_queues(dev);
1755 i40e_dev_clear_queues(dev);
1759 i40evf_dev_link_update(struct rte_eth_dev *dev,
1760 __rte_unused int wait_to_complete)
1762 struct rte_eth_link new_link;
1763 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1765 * DPDK pf host provide interfacet to acquire link status
1766 * while Linux driver does not
1768 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1769 i40evf_get_link_status(dev, &new_link);
1771 /* Always assume it's up, for Linux driver PF host */
1772 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1773 new_link.link_speed = ETH_LINK_SPEED_10000;
1774 new_link.link_status = 1;
1776 i40evf_dev_atomic_write_link_status(dev, &new_link);
1782 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1784 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1787 /* If enabled, just return */
1788 if (vf->promisc_unicast_enabled)
1791 ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1793 vf->promisc_unicast_enabled = TRUE;
1797 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1799 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1802 /* If disabled, just return */
1803 if (!vf->promisc_unicast_enabled)
1806 ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1808 vf->promisc_unicast_enabled = FALSE;
1812 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1814 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1817 /* If enabled, just return */
1818 if (vf->promisc_multicast_enabled)
1821 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1823 vf->promisc_multicast_enabled = TRUE;
1827 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1829 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1832 /* If enabled, just return */
1833 if (!vf->promisc_multicast_enabled)
1836 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1838 vf->promisc_multicast_enabled = FALSE;
1842 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1844 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1846 memset(dev_info, 0, sizeof(*dev_info));
1847 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1848 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1849 dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1850 dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1851 dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
1852 dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
1853 dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
1854 dev_info->rx_offload_capa =
1855 DEV_RX_OFFLOAD_VLAN_STRIP |
1856 DEV_RX_OFFLOAD_QINQ_STRIP |
1857 DEV_RX_OFFLOAD_IPV4_CKSUM |
1858 DEV_RX_OFFLOAD_UDP_CKSUM |
1859 DEV_RX_OFFLOAD_TCP_CKSUM;
1860 dev_info->tx_offload_capa =
1861 DEV_TX_OFFLOAD_VLAN_INSERT |
1862 DEV_TX_OFFLOAD_QINQ_INSERT |
1863 DEV_TX_OFFLOAD_IPV4_CKSUM |
1864 DEV_TX_OFFLOAD_UDP_CKSUM |
1865 DEV_TX_OFFLOAD_TCP_CKSUM |
1866 DEV_TX_OFFLOAD_SCTP_CKSUM;
1868 dev_info->default_rxconf = (struct rte_eth_rxconf) {
1870 .pthresh = I40E_DEFAULT_RX_PTHRESH,
1871 .hthresh = I40E_DEFAULT_RX_HTHRESH,
1872 .wthresh = I40E_DEFAULT_RX_WTHRESH,
1874 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
1878 dev_info->default_txconf = (struct rte_eth_txconf) {
1880 .pthresh = I40E_DEFAULT_TX_PTHRESH,
1881 .hthresh = I40E_DEFAULT_TX_HTHRESH,
1882 .wthresh = I40E_DEFAULT_TX_WTHRESH,
1884 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
1885 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
1886 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
1887 ETH_TXQ_FLAGS_NOOFFLOADS,
1890 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1891 .nb_max = I40E_MAX_RING_DESC,
1892 .nb_min = I40E_MIN_RING_DESC,
1893 .nb_align = I40E_ALIGN_RING_DESC,
1896 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1897 .nb_max = I40E_MAX_RING_DESC,
1898 .nb_min = I40E_MIN_RING_DESC,
1899 .nb_align = I40E_ALIGN_RING_DESC,
1904 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1906 if (i40evf_get_statics(dev, stats))
1907 PMD_DRV_LOG(ERR, "Get statics failed");
1911 i40evf_dev_close(struct rte_eth_dev *dev)
1913 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1915 i40evf_dev_stop(dev);
1916 hw->adapter_stopped = 1;
1917 i40e_dev_free_queues(dev);
1918 i40evf_reset_vf(hw);
1919 i40e_shutdown_adminq(hw);
1923 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
1924 struct rte_eth_rss_reta_entry64 *reta_conf,
1927 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1930 uint16_t idx, shift;
1933 if (reta_size != ETH_RSS_RETA_SIZE_64) {
1934 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1935 "(%d) doesn't match the number of hardware can "
1936 "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1940 for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1941 idx = i / RTE_RETA_GROUP_SIZE;
1942 shift = i % RTE_RETA_GROUP_SIZE;
1943 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1947 if (mask == I40E_4_BIT_MASK)
1950 l = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1952 for (j = 0, lut = 0; j < I40E_4_BIT_WIDTH; j++) {
1953 if (mask & (0x1 << j))
1954 lut |= reta_conf[idx].reta[shift + j] <<
1957 lut |= l & (I40E_8_BIT_MASK << (CHAR_BIT * j));
1959 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1966 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
1967 struct rte_eth_rss_reta_entry64 *reta_conf,
1970 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1973 uint16_t idx, shift;
1976 if (reta_size != ETH_RSS_RETA_SIZE_64) {
1977 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1978 "(%d) doesn't match the number of hardware can "
1979 "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1983 for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1984 idx = i / RTE_RETA_GROUP_SIZE;
1985 shift = i % RTE_RETA_GROUP_SIZE;
1986 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1991 lut = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1992 for (j = 0; j < I40E_4_BIT_WIDTH; j++) {
1993 if (mask & (0x1 << j))
1994 reta_conf[idx].reta[shift + j] =
1995 ((lut >> (CHAR_BIT * j)) &
2004 i40evf_hw_rss_hash_set(struct i40e_hw *hw, struct rte_eth_rss_conf *rss_conf)
2007 uint8_t hash_key_len;
2008 uint64_t rss_hf, hena;
2010 hash_key = (uint32_t *)(rss_conf->rss_key);
2011 hash_key_len = rss_conf->rss_key_len;
2012 if (hash_key != NULL && hash_key_len >=
2013 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2016 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2017 I40E_WRITE_REG(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2020 rss_hf = rss_conf->rss_hf;
2021 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
2022 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
2023 hena &= ~I40E_RSS_HENA_ALL;
2024 hena |= i40e_config_hena(rss_hf);
2025 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2026 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2027 I40EVF_WRITE_FLUSH(hw);
2033 i40evf_disable_rss(struct i40e_vf *vf)
2035 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2038 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
2039 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
2040 hena &= ~I40E_RSS_HENA_ALL;
2041 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2042 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2043 I40EVF_WRITE_FLUSH(hw);
2047 i40evf_config_rss(struct i40e_vf *vf)
2049 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2050 struct rte_eth_rss_conf rss_conf;
2051 uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2054 if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2055 i40evf_disable_rss(vf);
2056 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
2060 num = i40e_align_floor(vf->dev_data->nb_rx_queues);
2061 /* Fill out the look up table */
2062 for (i = 0, j = 0; i < nb_q; i++, j++) {
2065 lut = (lut << 8) | j;
2067 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2070 rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2071 if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
2072 i40evf_disable_rss(vf);
2073 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
2077 if (rss_conf.rss_key == NULL || rss_conf.rss_key_len < nb_q) {
2078 /* Calculate the default hash key */
2079 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2080 rss_key_default[i] = (uint32_t)rte_rand();
2081 rss_conf.rss_key = (uint8_t *)rss_key_default;
2082 rss_conf.rss_key_len = nb_q;
2085 return i40evf_hw_rss_hash_set(hw, &rss_conf);
2089 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2090 struct rte_eth_rss_conf *rss_conf)
2092 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2093 uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
2096 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
2097 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
2098 if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
2099 if (rss_hf != 0) /* Enable RSS */
2105 if (rss_hf == 0) /* Disable RSS */
2108 return i40evf_hw_rss_hash_set(hw, rss_conf);
2112 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2113 struct rte_eth_rss_conf *rss_conf)
2115 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2116 uint32_t *hash_key = (uint32_t *)(rss_conf->rss_key);
2121 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2122 hash_key[i] = I40E_READ_REG(hw, I40E_VFQF_HKEY(i));
2123 rss_conf->rss_key_len = i * sizeof(uint32_t);
2125 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
2126 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
2127 rss_conf->rss_hf = i40e_parse_hena(hena);