drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  97 static int i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  98 static int i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  99 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 100 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 101                                      uint16_t rx_queue_id);
 102 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 103                                     uint16_t rx_queue_id);
 104 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 105                                      uint16_t tx_queue_id);
 106 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 107                                     uint16_t tx_queue_id);
 108 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 109                                struct rte_ether_addr *addr,
 110                                uint32_t index,
 111                                uint32_t pool);
 112 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 113 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 114                         struct rte_eth_rss_reta_entry64 *reta_conf,
 115                         uint16_t reta_size);
 116 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 117                         struct rte_eth_rss_reta_entry64 *reta_conf,
 118                         uint16_t reta_size);
 119 static int i40evf_config_rss(struct i40e_vf *vf);
 120 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 121                                       struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 123                                         struct rte_eth_rss_conf *rss_conf);
 124 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 125 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 126                                         struct rte_ether_addr *mac_addr);
 127 static int
 128 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static int
 130 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 131 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 132                                    uint8_t *msg,
 133                                    uint16_t msglen);
 134
 135 static int
 136 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 137                         struct rte_ether_addr *mc_addr_set,
 138                         uint32_t nb_mc_addr, bool add);
 139 static int
 140 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 141                         struct rte_ether_addr *mc_addr_set,
 142                         uint32_t nb_mc_addr);
 143 static void
 144 i40evf_dev_alarm_handler(void *param);
 145
 146 /* Default hash key buffer for RSS */
 147 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 148
 149 struct rte_i40evf_xstats_name_off {
 150         char name[RTE_ETH_XSTATS_NAME_SIZE];
 151         unsigned offset;
 152 };
 153
 154 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 155         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 156         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 157         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 158         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 159         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 160         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 161                 rx_unknown_protocol)},
 162         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 163         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 164         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 165         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 166         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 167         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 168 };
 169
 170 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 171                 sizeof(rte_i40evf_stats_strings[0]))
 172
 173 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 174         .dev_configure        = i40evf_dev_configure,
 175         .dev_start            = i40evf_dev_start,
 176         .dev_stop             = i40evf_dev_stop,
 177         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 178         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 179         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 180         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 181         .link_update          = i40evf_dev_link_update,
 182         .stats_get            = i40evf_dev_stats_get,
 183         .stats_reset          = i40evf_dev_xstats_reset,
 184         .xstats_get           = i40evf_dev_xstats_get,
 185         .xstats_get_names     = i40evf_dev_xstats_get_names,
 186         .xstats_reset         = i40evf_dev_xstats_reset,
 187         .dev_close            = i40evf_dev_close,
 188         .dev_reset            = i40evf_dev_reset,
 189         .dev_infos_get        = i40evf_dev_info_get,
 190         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 191         .vlan_filter_set      = i40evf_vlan_filter_set,
 192         .vlan_offload_set     = i40evf_vlan_offload_set,
 193         .rx_queue_start       = i40evf_dev_rx_queue_start,
 194         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 195         .tx_queue_start       = i40evf_dev_tx_queue_start,
 196         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 197         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 198         .rx_queue_release     = i40e_dev_rx_queue_release,
 199         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 200         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 201         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 202         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 203         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 204         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 205         .tx_queue_release     = i40e_dev_tx_queue_release,
 206         .rx_queue_count       = i40e_dev_rx_queue_count,
 207         .rxq_info_get         = i40e_rxq_info_get,
 208         .txq_info_get         = i40e_txq_info_get,
 209         .mac_addr_add         = i40evf_add_mac_addr,
 210         .mac_addr_remove      = i40evf_del_mac_addr,
 211         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 212         .reta_update          = i40evf_dev_rss_reta_update,
 213         .reta_query           = i40evf_dev_rss_reta_query,
 214         .rss_hash_update      = i40evf_dev_rss_hash_update,
 215         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 216         .mtu_set              = i40evf_dev_mtu_set,
 217         .mac_addr_set         = i40evf_set_default_mac_addr,
 218         .tx_done_cleanup      = i40e_tx_done_cleanup,
 219 };
 220
 221 /*
 222  * Read data in admin queue to get msg from pf driver
 223  */
 224 static enum i40evf_aq_result
 225 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 226 {
 227         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 228         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 229         struct i40e_arq_event_info event;
 230         enum virtchnl_ops opcode;
 231         enum i40e_status_code retval;
 232         int ret;
 233         enum i40evf_aq_result result = I40EVF_MSG_NON;
 234
 235         event.buf_len = data->buf_len;
 236         event.msg_buf = data->msg;
 237         ret = i40e_clean_arq_element(hw, &event, NULL);
 238         /* Can't read any msg from adminQ */
 239         if (ret) {
 240                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 241                         result = I40EVF_MSG_ERR;
 242                 return result;
 243         }
 244
 245         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 246         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 247         /* pf sys event */
 248         if (opcode == VIRTCHNL_OP_EVENT) {
 249                 struct virtchnl_pf_event *vpe =
 250                         (struct virtchnl_pf_event *)event.msg_buf;
 251
 252                 result = I40EVF_MSG_SYS;
 253                 switch (vpe->event) {
 254                 case VIRTCHNL_EVENT_LINK_CHANGE:
 255                         vf->link_up =
 256                                 vpe->event_data.link_event.link_status;
 257                         vf->link_speed =
 258                                 vpe->event_data.link_event.link_speed;
 259                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 260                         PMD_DRV_LOG(INFO, "Link status update:%s",
 261                                     vf->link_up ? "up" : "down");
 262                         break;
 263                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 264                         vf->vf_reset = true;
 265                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 266                         PMD_DRV_LOG(INFO, "vf is reseting");
 267                         break;
 268                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 269                         vf->dev_closed = true;
 270                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 271                         PMD_DRV_LOG(INFO, "PF driver closed");
 272                         break;
 273                 default:
 274                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 275                                     __func__, vpe->event);
 276                 }
 277         } else {
 278                 /* async reply msg on command issued by vf previously */
 279                 result = I40EVF_MSG_CMD;
 280                 /* Actual data length read from PF */
 281                 data->msg_len = event.msg_len;
 282         }
 283
 284         data->result = retval;
 285         data->ops = opcode;
 286
 287         return result;
 288 }
 289
 290 /**
 291  * clear current command. Only call in case execute
 292  * _atomic_set_cmd successfully.
 293  */
 294 static inline void
 295 _clear_cmd(struct i40e_vf *vf)
 296 {
 297         rte_wmb();
 298         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 299 }
 300
 301 /*
 302  * Check there is pending cmd in execution. If none, set new command.
 303  */
 304 static inline int
 305 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 306 {
 307         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 308                         VIRTCHNL_OP_UNKNOWN, ops);
 309
 310         if (!ret)
 311                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 312
 313         return !ret;
 314 }
 315
 316 #define MAX_TRY_TIMES 200
 317 #define ASQ_DELAY_MS  10
 318
 319 static int
 320 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 321 {
 322         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 323         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 324         struct i40evf_arq_msg_info info;
 325         enum i40evf_aq_result ret;
 326         int err, i = 0;
 327
 328         if (_atomic_set_cmd(vf, args->ops))
 329                 return -1;
 330
 331         info.msg = args->out_buffer;
 332         info.buf_len = args->out_size;
 333         info.ops = VIRTCHNL_OP_UNKNOWN;
 334         info.result = I40E_SUCCESS;
 335
 336         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 337                      args->in_args, args->in_args_size, NULL);
 338         if (err) {
 339                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 340                 _clear_cmd(vf);
 341                 return err;
 342         }
 343
 344         switch (args->ops) {
 345         case VIRTCHNL_OP_RESET_VF:
 346                 /*no need to process in this function */
 347                 err = 0;
 348                 break;
 349         case VIRTCHNL_OP_VERSION:
 350         case VIRTCHNL_OP_GET_VF_RESOURCES:
 351                 /* for init adminq commands, need to poll the response */
 352                 err = -1;
 353                 do {
 354                         ret = i40evf_read_pfmsg(dev, &info);
 355                         vf->cmd_retval = info.result;
 356                         if (ret == I40EVF_MSG_CMD) {
 357                                 err = 0;
 358                                 break;
 359                         } else if (ret == I40EVF_MSG_ERR)
 360                                 break;
 361                         rte_delay_ms(ASQ_DELAY_MS);
 362                         /* If don't read msg or read sys event, continue */
 363                 } while (i++ < MAX_TRY_TIMES);
 364                 _clear_cmd(vf);
 365                 break;
 366         case VIRTCHNL_OP_REQUEST_QUEUES:
 367                 /**
 368                  * ignore async reply, only wait for system message,
 369                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 370                  * if not, means request queues failed.
 371                  */
 372                 err = -1;
 373                 do {
 374                         ret = i40evf_read_pfmsg(dev, &info);
 375                         vf->cmd_retval = info.result;
 376                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 377                                 err = 0;
 378                                 break;
 379                         } else if (ret == I40EVF_MSG_ERR ||
 380                                            ret == I40EVF_MSG_CMD) {
 381                                 break;
 382                         }
 383                         rte_delay_ms(ASQ_DELAY_MS);
 384                         /* If don't read msg or read sys event, continue */
 385                 } while (i++ < MAX_TRY_TIMES);
 386                 _clear_cmd(vf);
 387                 break;
 388
 389         default:
 390                 /* for other adminq in running time, waiting the cmd done flag */
 391                 err = -1;
 392                 do {
 393                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 394                                 err = 0;
 395                                 break;
 396                         }
 397                         rte_delay_ms(ASQ_DELAY_MS);
 398                         /* If don't read msg or read sys event, continue */
 399                 } while (i++ < MAX_TRY_TIMES);
 400                 /* If there's no response is received, clear command */
 401                 if (i >= MAX_TRY_TIMES) {
 402                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 403                         _clear_cmd(vf);
 404                 }
 405                 break;
 406         }
 407
 408         return err | vf->cmd_retval;
 409 }
 410
 411 /*
 412  * Check API version with sync wait until version read or fail from admin queue
 413  */
 414 static int
 415 i40evf_check_api_version(struct rte_eth_dev *dev)
 416 {
 417         struct virtchnl_version_info version, *pver;
 418         int err;
 419         struct vf_cmd_info args;
 420         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 421
 422         version.major = VIRTCHNL_VERSION_MAJOR;
 423         version.minor = VIRTCHNL_VERSION_MINOR;
 424
 425         args.ops = VIRTCHNL_OP_VERSION;
 426         args.in_args = (uint8_t *)&version;
 427         args.in_args_size = sizeof(version);
 428         args.out_buffer = vf->aq_resp;
 429         args.out_size = I40E_AQ_BUF_SZ;
 430
 431         err = i40evf_execute_vf_cmd(dev, &args);
 432         if (err) {
 433                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 434                 return err;
 435         }
 436
 437         pver = (struct virtchnl_version_info *)args.out_buffer;
 438         vf->version_major = pver->major;
 439         vf->version_minor = pver->minor;
 440         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 441                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 442                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 443         else {
 444                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 445                                         vf->version_major, vf->version_minor,
 446                                                 VIRTCHNL_VERSION_MAJOR,
 447                                                 VIRTCHNL_VERSION_MINOR);
 448                 return -1;
 449         }
 450
 451         return 0;
 452 }
 453
 454 static int
 455 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 456 {
 457         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 458         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 459         int err;
 460         struct vf_cmd_info args;
 461         uint32_t caps, len;
 462
 463         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 464         args.out_buffer = vf->aq_resp;
 465         args.out_size = I40E_AQ_BUF_SZ;
 466         if (PF_IS_V11(vf)) {
 467                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 468                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 469                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 470                        VIRTCHNL_VF_OFFLOAD_VLAN |
 471                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 472                 args.in_args = (uint8_t *)&caps;
 473                 args.in_args_size = sizeof(caps);
 474         } else {
 475                 args.in_args = NULL;
 476                 args.in_args_size = 0;
 477         }
 478         err = i40evf_execute_vf_cmd(dev, &args);
 479
 480         if (err) {
 481                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 482                 return err;
 483         }
 484
 485         len =  sizeof(struct virtchnl_vf_resource) +
 486                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 487
 488         rte_memcpy(vf->vf_res, args.out_buffer,
 489                         RTE_MIN(args.out_size, len));
 490         i40e_vf_parse_hw_config(hw, vf->vf_res);
 491
 492         return 0;
 493 }
 494
 495 static int
 496 i40evf_config_promisc(struct rte_eth_dev *dev,
 497                       bool enable_unicast,
 498                       bool enable_multicast)
 499 {
 500         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 501         int err;
 502         struct vf_cmd_info args;
 503         struct virtchnl_promisc_info promisc;
 504
 505         promisc.flags = 0;
 506         promisc.vsi_id = vf->vsi_res->vsi_id;
 507
 508         if (enable_unicast)
 509                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 510
 511         if (enable_multicast)
 512                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 513
 514         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 515         args.in_args = (uint8_t *)&promisc;
 516         args.in_args_size = sizeof(promisc);
 517         args.out_buffer = vf->aq_resp;
 518         args.out_size = I40E_AQ_BUF_SZ;
 519
 520         err = i40evf_execute_vf_cmd(dev, &args);
 521
 522         if (err)
 523                 PMD_DRV_LOG(ERR, "fail to execute command "
 524                             "CONFIG_PROMISCUOUS_MODE");
 525         return err;
 526 }
 527
 528 static int
 529 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 530 {
 531         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 532         struct vf_cmd_info args;
 533         int ret;
 534
 535         memset(&args, 0, sizeof(args));
 536         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 537         args.in_args = NULL;
 538         args.in_args_size = 0;
 539         args.out_buffer = vf->aq_resp;
 540         args.out_size = I40E_AQ_BUF_SZ;
 541         ret = i40evf_execute_vf_cmd(dev, &args);
 542         if (ret)
 543                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 544                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 545
 546         return ret;
 547 }
 548
 549 static int
 550 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 551 {
 552         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 553         struct vf_cmd_info args;
 554         int ret;
 555
 556         memset(&args, 0, sizeof(args));
 557         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 558         args.in_args = NULL;
 559         args.in_args_size = 0;
 560         args.out_buffer = vf->aq_resp;
 561         args.out_size = I40E_AQ_BUF_SZ;
 562         ret = i40evf_execute_vf_cmd(dev, &args);
 563         if (ret)
 564                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 565                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 566
 567         return ret;
 568 }
 569
 570 static void
 571 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 572                                   uint16_t vsi_id,
 573                                   uint16_t queue_id,
 574                                   uint16_t nb_txq,
 575                                   struct i40e_tx_queue *txq)
 576 {
 577         txq_info->vsi_id = vsi_id;
 578         txq_info->queue_id = queue_id;
 579         if (queue_id < nb_txq && txq) {
 580                 txq_info->ring_len = txq->nb_tx_desc;
 581                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 582         }
 583 }
 584
 585 static void
 586 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 587                                   uint16_t vsi_id,
 588                                   uint16_t queue_id,
 589                                   uint16_t nb_rxq,
 590                                   uint32_t max_pkt_size,
 591                                   struct i40e_rx_queue *rxq)
 592 {
 593         rxq_info->vsi_id = vsi_id;
 594         rxq_info->queue_id = queue_id;
 595         rxq_info->max_pkt_size = max_pkt_size;
 596         if (queue_id < nb_rxq && rxq) {
 597                 rxq_info->ring_len = rxq->nb_rx_desc;
 598                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 599                 rxq_info->databuffer_size =
 600                         (rte_pktmbuf_data_room_size(rxq->mp) -
 601                                 RTE_PKTMBUF_HEADROOM);
 602         }
 603 }
 604
 605 static int
 606 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 607 {
 608         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 609         struct i40e_rx_queue **rxq =
 610                 (struct i40e_rx_queue **)dev->data->rx_queues;
 611         struct i40e_tx_queue **txq =
 612                 (struct i40e_tx_queue **)dev->data->tx_queues;
 613         struct virtchnl_vsi_queue_config_info *vc_vqci;
 614         struct virtchnl_queue_pair_info *vc_qpi;
 615         struct vf_cmd_info args;
 616         uint16_t i, nb_qp = vf->num_queue_pairs;
 617         const uint32_t size =
 618                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 619         uint8_t buff[size];
 620         int ret;
 621
 622         memset(buff, 0, sizeof(buff));
 623         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 624         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 625         vc_vqci->num_queue_pairs = nb_qp;
 626
 627         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 628                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 629                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 630                         txq ? txq[i] : NULL);
 631                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 632                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 633                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 634         }
 635         memset(&args, 0, sizeof(args));
 636         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 637         args.in_args = (uint8_t *)vc_vqci;
 638         args.in_args_size = size;
 639         args.out_buffer = vf->aq_resp;
 640         args.out_size = I40E_AQ_BUF_SZ;
 641         ret = i40evf_execute_vf_cmd(dev, &args);
 642         if (ret)
 643                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 644                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 645
 646         return ret;
 647 }
 648
 649 static int
 650 i40evf_config_irq_map(struct rte_eth_dev *dev)
 651 {
 652         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 653         struct vf_cmd_info args;
 654         uint8_t *cmd_buffer = NULL;
 655         struct virtchnl_irq_map_info *map_info;
 656         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 657         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 658         uint32_t vec, cmd_buffer_size, max_vectors, nb_msix, msix_base, i;
 659         uint16_t rxq_map[vf->vf_res->max_vectors];
 660         int err;
 661
 662         memset(rxq_map, 0, sizeof(rxq_map));
 663         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 664                 rte_intr_allow_others(intr_handle)) {
 665                 msix_base = I40E_RX_VEC_START;
 666                 /* For interrupt mode, available vector id is from 1. */
 667                 max_vectors = vf->vf_res->max_vectors - 1;
 668                 nb_msix = RTE_MIN(max_vectors, intr_handle->nb_efd);
 669
 670                 vec = msix_base;
 671                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 672                         rxq_map[vec] |= 1 << i;
 673                         intr_handle->intr_vec[i] = vec++;
 674                         if (vec >= vf->vf_res->max_vectors)
 675                                 vec = msix_base;
 676                 }
 677         } else {
 678                 msix_base = I40E_MISC_VEC_ID;
 679                 nb_msix = 1;
 680
 681                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 682                         rxq_map[msix_base] |= 1 << i;
 683                         if (rte_intr_dp_is_en(intr_handle))
 684                                 intr_handle->intr_vec[i] = msix_base;
 685                 }
 686         }
 687
 688         cmd_buffer_size = sizeof(struct virtchnl_irq_map_info) +
 689                         sizeof(struct virtchnl_vector_map) * nb_msix;
 690         cmd_buffer = rte_zmalloc("i40e", cmd_buffer_size, 0);
 691         if (!cmd_buffer) {
 692                 PMD_DRV_LOG(ERR, "Failed to allocate memory");
 693                 return I40E_ERR_NO_MEMORY;
 694         }
 695
 696         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 697         map_info->num_vectors = nb_msix;
 698         for (i = 0; i < nb_msix; i++) {
 699                 map_info->vecmap[i].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 700                 map_info->vecmap[i].vsi_id = vf->vsi_res->vsi_id;
 701                 map_info->vecmap[i].vector_id = msix_base + i;
 702                 map_info->vecmap[i].txq_map = 0;
 703                 map_info->vecmap[i].rxq_map = rxq_map[msix_base + i];
 704         }
 705
 706         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 707         args.in_args = (u8 *)cmd_buffer;
 708         args.in_args_size = cmd_buffer_size;
 709         args.out_buffer = vf->aq_resp;
 710         args.out_size = I40E_AQ_BUF_SZ;
 711         err = i40evf_execute_vf_cmd(dev, &args);
 712         if (err)
 713                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 714
 715         rte_free(cmd_buffer);
 716
 717         return err;
 718 }
 719
 720 static int
 721 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 722                                 bool on)
 723 {
 724         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 725         struct virtchnl_queue_select queue_select;
 726         int err;
 727         struct vf_cmd_info args;
 728         memset(&queue_select, 0, sizeof(queue_select));
 729         queue_select.vsi_id = vf->vsi_res->vsi_id;
 730
 731         if (isrx)
 732                 queue_select.rx_queues |= 1 << qid;
 733         else
 734                 queue_select.tx_queues |= 1 << qid;
 735
 736         if (on)
 737                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 738         else
 739                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 740         args.in_args = (u8 *)&queue_select;
 741         args.in_args_size = sizeof(queue_select);
 742         args.out_buffer = vf->aq_resp;
 743         args.out_size = I40E_AQ_BUF_SZ;
 744         err = i40evf_execute_vf_cmd(dev, &args);
 745         if (err)
 746                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 747                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 748
 749         return err;
 750 }
 751
 752 static int
 753 i40evf_start_queues(struct rte_eth_dev *dev)
 754 {
 755         struct rte_eth_dev_data *dev_data = dev->data;
 756         int i;
 757         struct i40e_rx_queue *rxq;
 758         struct i40e_tx_queue *txq;
 759
 760         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 761                 rxq = dev_data->rx_queues[i];
 762                 if (rxq->rx_deferred_start)
 763                         continue;
 764                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 765                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 766                         return -1;
 767                 }
 768         }
 769
 770         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 771                 txq = dev_data->tx_queues[i];
 772                 if (txq->tx_deferred_start)
 773                         continue;
 774                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 775                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 776                         return -1;
 777                 }
 778         }
 779
 780         return 0;
 781 }
 782
 783 static int
 784 i40evf_stop_queues(struct rte_eth_dev *dev)
 785 {
 786         int i;
 787
 788         /* Stop TX queues first */
 789         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 790                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 791                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 792                 }
 793         }
 794
 795         /* Then stop RX queues */
 796         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 797                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 798                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 799                 }
 800         }
 801
 802         return 0;
 803 }
 804
 805 static int
 806 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 807                     struct rte_ether_addr *addr,
 808                     __rte_unused uint32_t index,
 809                     __rte_unused uint32_t pool)
 810 {
 811         struct virtchnl_ether_addr_list *list;
 812         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 813         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 814                         sizeof(struct virtchnl_ether_addr)];
 815         int err;
 816         struct vf_cmd_info args;
 817
 818         if (rte_is_zero_ether_addr(addr)) {
 819                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 820                             addr->addr_bytes[0], addr->addr_bytes[1],
 821                             addr->addr_bytes[2], addr->addr_bytes[3],
 822                             addr->addr_bytes[4], addr->addr_bytes[5]);
 823                 return I40E_ERR_INVALID_MAC_ADDR;
 824         }
 825
 826         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 827         list->vsi_id = vf->vsi_res->vsi_id;
 828         list->num_elements = 1;
 829         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 830                                         sizeof(addr->addr_bytes));
 831
 832         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 833         args.in_args = cmd_buffer;
 834         args.in_args_size = sizeof(cmd_buffer);
 835         args.out_buffer = vf->aq_resp;
 836         args.out_size = I40E_AQ_BUF_SZ;
 837         err = i40evf_execute_vf_cmd(dev, &args);
 838         if (err)
 839                 PMD_DRV_LOG(ERR, "fail to execute command "
 840                             "OP_ADD_ETHER_ADDRESS");
 841         else
 842                 vf->vsi.mac_num++;
 843
 844         return err;
 845 }
 846
 847 static void
 848 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 849                             struct rte_ether_addr *addr)
 850 {
 851         struct virtchnl_ether_addr_list *list;
 852         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 853         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 854                         sizeof(struct virtchnl_ether_addr)];
 855         int err;
 856         struct vf_cmd_info args;
 857
 858         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 859                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 860                             addr->addr_bytes[0], addr->addr_bytes[1],
 861                             addr->addr_bytes[2], addr->addr_bytes[3],
 862                             addr->addr_bytes[4], addr->addr_bytes[5]);
 863                 return;
 864         }
 865
 866         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 867         list->vsi_id = vf->vsi_res->vsi_id;
 868         list->num_elements = 1;
 869         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 870                         sizeof(addr->addr_bytes));
 871
 872         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 873         args.in_args = cmd_buffer;
 874         args.in_args_size = sizeof(cmd_buffer);
 875         args.out_buffer = vf->aq_resp;
 876         args.out_size = I40E_AQ_BUF_SZ;
 877         err = i40evf_execute_vf_cmd(dev, &args);
 878         if (err)
 879                 PMD_DRV_LOG(ERR, "fail to execute command "
 880                             "OP_DEL_ETHER_ADDRESS");
 881         else
 882                 vf->vsi.mac_num--;
 883         return;
 884 }
 885
 886 static void
 887 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 888 {
 889         struct rte_eth_dev_data *data = dev->data;
 890         struct rte_ether_addr *addr;
 891
 892         addr = &data->mac_addrs[index];
 893
 894         i40evf_del_mac_addr_by_addr(dev, addr);
 895 }
 896
 897 static int
 898 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 899 {
 900         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 901         struct virtchnl_queue_select q_stats;
 902         int err;
 903         struct vf_cmd_info args;
 904
 905         memset(&q_stats, 0, sizeof(q_stats));
 906         q_stats.vsi_id = vf->vsi_res->vsi_id;
 907         args.ops = VIRTCHNL_OP_GET_STATS;
 908         args.in_args = (u8 *)&q_stats;
 909         args.in_args_size = sizeof(q_stats);
 910         args.out_buffer = vf->aq_resp;
 911         args.out_size = I40E_AQ_BUF_SZ;
 912
 913         err = i40evf_execute_vf_cmd(dev, &args);
 914         if (err) {
 915                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 916                 *pstats = NULL;
 917                 return err;
 918         }
 919         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 920         return 0;
 921 }
 922
 923 static void
 924 i40evf_stat_update_48(uint64_t *offset,
 925                    uint64_t *stat)
 926 {
 927         if (*stat >= *offset)
 928                 *stat = *stat - *offset;
 929         else
 930                 *stat = (uint64_t)((*stat +
 931                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 932
 933         *stat &= I40E_48_BIT_MASK;
 934 }
 935
 936 static void
 937 i40evf_stat_update_32(uint64_t *offset,
 938                    uint64_t *stat)
 939 {
 940         if (*stat >= *offset)
 941                 *stat = (uint64_t)(*stat - *offset);
 942         else
 943                 *stat = (uint64_t)((*stat +
 944                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 945 }
 946
 947 static void
 948 i40evf_update_stats(struct i40e_vsi *vsi,
 949                                         struct i40e_eth_stats *nes)
 950 {
 951         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 952
 953         i40evf_stat_update_48(&oes->rx_bytes,
 954                             &nes->rx_bytes);
 955         i40evf_stat_update_48(&oes->rx_unicast,
 956                             &nes->rx_unicast);
 957         i40evf_stat_update_48(&oes->rx_multicast,
 958                             &nes->rx_multicast);
 959         i40evf_stat_update_48(&oes->rx_broadcast,
 960                             &nes->rx_broadcast);
 961         i40evf_stat_update_32(&oes->rx_discards,
 962                                 &nes->rx_discards);
 963         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 964                             &nes->rx_unknown_protocol);
 965         i40evf_stat_update_48(&oes->tx_bytes,
 966                             &nes->tx_bytes);
 967         i40evf_stat_update_48(&oes->tx_unicast,
 968                             &nes->tx_unicast);
 969         i40evf_stat_update_48(&oes->tx_multicast,
 970                             &nes->tx_multicast);
 971         i40evf_stat_update_48(&oes->tx_broadcast,
 972                             &nes->tx_broadcast);
 973         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 974         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 975 }
 976
 977 static int
 978 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 979 {
 980         int ret;
 981         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 982         struct i40e_eth_stats *pstats = NULL;
 983
 984         /* read stat values to clear hardware registers */
 985         ret = i40evf_query_stats(dev, &pstats);
 986
 987         /* set stats offset base on current values */
 988         if (ret == 0)
 989                 vf->vsi.eth_stats_offset = *pstats;
 990
 991         return ret;
 992 }
 993
 994 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 995                                       struct rte_eth_xstat_name *xstats_names,
 996                                       __rte_unused unsigned limit)
 997 {
 998         unsigned i;
 999
1000         if (xstats_names != NULL)
1001                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1002                         snprintf(xstats_names[i].name,
1003                                 sizeof(xstats_names[i].name),
1004                                 "%s", rte_i40evf_stats_strings[i].name);
1005                 }
1006         return I40EVF_NB_XSTATS;
1007 }
1008
1009 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1010                                  struct rte_eth_xstat *xstats, unsigned n)
1011 {
1012         int ret;
1013         unsigned i;
1014         struct i40e_eth_stats *pstats = NULL;
1015         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1016         struct i40e_vsi *vsi = &vf->vsi;
1017
1018         if (n < I40EVF_NB_XSTATS)
1019                 return I40EVF_NB_XSTATS;
1020
1021         ret = i40evf_query_stats(dev, &pstats);
1022         if (ret != 0)
1023                 return 0;
1024
1025         if (!xstats)
1026                 return 0;
1027
1028         i40evf_update_stats(vsi, pstats);
1029
1030         /* loop over xstats array and values from pstats */
1031         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1032                 xstats[i].id = i;
1033                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1034                         rte_i40evf_stats_strings[i].offset);
1035         }
1036
1037         return I40EVF_NB_XSTATS;
1038 }
1039
1040 static int
1041 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1042 {
1043         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1044         struct virtchnl_vlan_filter_list *vlan_list;
1045         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1046                                                         sizeof(uint16_t)];
1047         int err;
1048         struct vf_cmd_info args;
1049
1050         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1051         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1052         vlan_list->num_elements = 1;
1053         vlan_list->vlan_id[0] = vlanid;
1054
1055         args.ops = VIRTCHNL_OP_ADD_VLAN;
1056         args.in_args = (u8 *)&cmd_buffer;
1057         args.in_args_size = sizeof(cmd_buffer);
1058         args.out_buffer = vf->aq_resp;
1059         args.out_size = I40E_AQ_BUF_SZ;
1060         err = i40evf_execute_vf_cmd(dev, &args);
1061         if (err)
1062                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1063
1064         return err;
1065 }
1066
1067 static int
1068 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1069 {
1070         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1071         struct virtchnl_vf_res_request vfres;
1072         struct vf_cmd_info args;
1073         int err;
1074
1075         vfres.num_queue_pairs = num;
1076
1077         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1078         args.in_args = (u8 *)&vfres;
1079         args.in_args_size = sizeof(vfres);
1080         args.out_buffer = vf->aq_resp;
1081         args.out_size = I40E_AQ_BUF_SZ;
1082
1083         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1084         err = i40evf_execute_vf_cmd(dev, &args);
1085         if (err)
1086                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1087
1088         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1089                           i40evf_dev_alarm_handler, dev);
1090         return err;
1091 }
1092
1093 static int
1094 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1095 {
1096         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1097         struct virtchnl_vlan_filter_list *vlan_list;
1098         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1099                                                         sizeof(uint16_t)];
1100         int err;
1101         struct vf_cmd_info args;
1102
1103         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1104         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1105         vlan_list->num_elements = 1;
1106         vlan_list->vlan_id[0] = vlanid;
1107
1108         args.ops = VIRTCHNL_OP_DEL_VLAN;
1109         args.in_args = (u8 *)&cmd_buffer;
1110         args.in_args_size = sizeof(cmd_buffer);
1111         args.out_buffer = vf->aq_resp;
1112         args.out_size = I40E_AQ_BUF_SZ;
1113         err = i40evf_execute_vf_cmd(dev, &args);
1114         if (err)
1115                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1116
1117         return err;
1118 }
1119
1120 static const struct rte_pci_id pci_id_i40evf_map[] = {
1121         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1122         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1123         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1124         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1125         { .vendor_id = 0, /* sentinel */ },
1126 };
1127
1128 /* Disable IRQ0 */
1129 static inline void
1130 i40evf_disable_irq0(struct i40e_hw *hw)
1131 {
1132         /* Disable all interrupt types */
1133         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1134         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1135                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1136         I40EVF_WRITE_FLUSH(hw);
1137 }
1138
1139 /* Enable IRQ0 */
1140 static inline void
1141 i40evf_enable_irq0(struct i40e_hw *hw)
1142 {
1143         /* Enable admin queue interrupt trigger */
1144         uint32_t val;
1145
1146         i40evf_disable_irq0(hw);
1147         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1148         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1149                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1150         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1151
1152         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1153                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1154                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1155                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1156
1157         I40EVF_WRITE_FLUSH(hw);
1158 }
1159
1160 static int
1161 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1162 {
1163         int i, reset;
1164         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1165         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1166
1167         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1168                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1169                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1170                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1171                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1172                     reset == VIRTCHNL_VFR_COMPLETED)
1173                         break;
1174                 rte_delay_ms(50);
1175         }
1176
1177         if (i >= MAX_RESET_WAIT_CNT)
1178                 return -1;
1179
1180         vf->vf_reset = false;
1181         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1182
1183         return 0;
1184 }
1185 static int
1186 i40evf_reset_vf(struct rte_eth_dev *dev)
1187 {
1188         int ret;
1189         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1190
1191         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1192                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1193                 return -1;
1194         }
1195         /**
1196           * After issuing vf reset command to pf, pf won't necessarily
1197           * reset vf, it depends on what state it exactly is. If it's not
1198           * initialized yet, it won't have vf reset since it's in a certain
1199           * state. If not, it will try to reset. Even vf is reset, pf will
1200           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1201           * it to ACTIVE. In this duration, vf may not catch the moment that
1202           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1203           */
1204         rte_delay_ms(200);
1205
1206         ret = i40evf_check_vf_reset_done(dev);
1207         if (ret) {
1208                 PMD_INIT_LOG(ERR, "VF is still resetting");
1209                 return ret;
1210         }
1211
1212         return 0;
1213 }
1214
1215 static int
1216 i40evf_init_vf(struct rte_eth_dev *dev)
1217 {
1218         int i, err, bufsz;
1219         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1220         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1221         uint16_t interval =
1222                 i40e_calc_itr_interval(0, 0);
1223
1224         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1225         vf->dev_data = dev->data;
1226         err = i40e_set_mac_type(hw);
1227         if (err) {
1228                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1229                 goto err;
1230         }
1231
1232         err = i40evf_check_vf_reset_done(dev);
1233         if (err)
1234                 goto err;
1235
1236         i40e_init_adminq_parameter(hw);
1237         err = i40e_init_adminq(hw);
1238         if (err) {
1239                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1240                 goto err;
1241         }
1242
1243         /* Reset VF and wait until it's complete */
1244         if (i40evf_reset_vf(dev)) {
1245                 PMD_INIT_LOG(ERR, "reset NIC failed");
1246                 goto err_aq;
1247         }
1248
1249         /* VF reset, shutdown admin queue and initialize again */
1250         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1251                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1252                 goto err;
1253         }
1254
1255         i40e_init_adminq_parameter(hw);
1256         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1257                 PMD_INIT_LOG(ERR, "init_adminq failed");
1258                 goto err;
1259         }
1260
1261         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1262         if (!vf->aq_resp) {
1263                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1264                 goto err_aq;
1265         }
1266         if (i40evf_check_api_version(dev) != 0) {
1267                 PMD_INIT_LOG(ERR, "check_api version failed");
1268                 goto err_api;
1269         }
1270         bufsz = sizeof(struct virtchnl_vf_resource) +
1271                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1272         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1273         if (!vf->vf_res) {
1274                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1275                 goto err_api;
1276         }
1277
1278         if (i40evf_get_vf_resource(dev) != 0) {
1279                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1280                 goto err_alloc;
1281         }
1282
1283         /* got VF config message back from PF, now we can parse it */
1284         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1285                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1286                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1287         }
1288
1289         if (!vf->vsi_res) {
1290                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1291                 goto err_alloc;
1292         }
1293
1294         if (hw->mac.type == I40E_MAC_X722_VF)
1295                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1296         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1297
1298         switch (vf->vsi_res->vsi_type) {
1299         case VIRTCHNL_VSI_SRIOV:
1300                 vf->vsi.type = I40E_VSI_SRIOV;
1301                 break;
1302         default:
1303                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1304                 break;
1305         }
1306         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1307         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1308
1309         /* Store the MAC address configured by host, or generate random one */
1310         if (!rte_is_valid_assigned_ether_addr(
1311                         (struct rte_ether_addr *)hw->mac.addr))
1312                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1313
1314         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1315                        (I40E_ITR_INDEX_DEFAULT <<
1316                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1317                        (interval <<
1318                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1319         I40EVF_WRITE_FLUSH(hw);
1320
1321         return 0;
1322
1323 err_alloc:
1324         rte_free(vf->vf_res);
1325         vf->vsi_res = NULL;
1326 err_api:
1327         rte_free(vf->aq_resp);
1328 err_aq:
1329         i40e_shutdown_adminq(hw); /* ignore error */
1330 err:
1331         return -1;
1332 }
1333
1334 static int
1335 i40evf_uninit_vf(struct rte_eth_dev *dev)
1336 {
1337         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1338
1339         PMD_INIT_FUNC_TRACE();
1340
1341         if (hw->adapter_closed == 0)
1342                 i40evf_dev_close(dev);
1343
1344         return 0;
1345 }
1346
1347 static void
1348 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1349                 __rte_unused uint16_t msglen)
1350 {
1351         struct virtchnl_pf_event *pf_msg =
1352                         (struct virtchnl_pf_event *)msg;
1353         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1354
1355         switch (pf_msg->event) {
1356         case VIRTCHNL_EVENT_RESET_IMPENDING:
1357                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1358                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1359                                               NULL);
1360                 break;
1361         case VIRTCHNL_EVENT_LINK_CHANGE:
1362                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1363                 vf->link_up = pf_msg->event_data.link_event.link_status;
1364                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1365                 break;
1366         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1367                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1368                 break;
1369         default:
1370                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1371                 break;
1372         }
1373 }
1374
1375 static void
1376 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1377 {
1378         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1379         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1380         struct i40e_arq_event_info info;
1381         uint16_t pending, aq_opc;
1382         enum virtchnl_ops msg_opc;
1383         enum i40e_status_code msg_ret;
1384         int ret;
1385
1386         info.buf_len = I40E_AQ_BUF_SZ;
1387         if (!vf->aq_resp) {
1388                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1389                 return;
1390         }
1391         info.msg_buf = vf->aq_resp;
1392
1393         pending = 1;
1394         while (pending) {
1395                 ret = i40e_clean_arq_element(hw, &info, &pending);
1396
1397                 if (ret != I40E_SUCCESS) {
1398                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1399                                     "ret: %d", ret);
1400                         break;
1401                 }
1402                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1403                 /* For the message sent from pf to vf, opcode is stored in
1404                  * cookie_high of struct i40e_aq_desc, while return error code
1405                  * are stored in cookie_low, Which is done by
1406                  * i40e_aq_send_msg_to_vf in PF driver.*/
1407                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1408                                                   info.desc.cookie_high);
1409                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1410                                                   info.desc.cookie_low);
1411                 switch (aq_opc) {
1412                 case i40e_aqc_opc_send_msg_to_vf:
1413                         if (msg_opc == VIRTCHNL_OP_EVENT)
1414                                 /* process event*/
1415                                 i40evf_handle_pf_event(dev, info.msg_buf,
1416                                                        info.msg_len);
1417                         else {
1418                                 /* read message and it's expected one */
1419                                 if (msg_opc == vf->pend_cmd) {
1420                                         vf->cmd_retval = msg_ret;
1421                                         /* prevent compiler reordering */
1422                                         rte_compiler_barrier();
1423                                         _clear_cmd(vf);
1424                                 } else
1425                                         PMD_DRV_LOG(ERR, "command mismatch,"
1426                                                 "expect %u, get %u",
1427                                                 vf->pend_cmd, msg_opc);
1428                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1429                                              " opcode = %d", msg_opc);
1430                         }
1431                         break;
1432                 default:
1433                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1434                                     aq_opc);
1435                         break;
1436                 }
1437         }
1438 }
1439
1440 /**
1441  * Interrupt handler triggered by NIC  for handling
1442  * specific interrupt. Only adminq interrupt is processed in VF.
1443  *
1444  * @param handle
1445  *  Pointer to interrupt handle.
1446  * @param param
1447  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1448  *
1449  * @return
1450  *  void
1451  */
1452 static void
1453 i40evf_dev_alarm_handler(void *param)
1454 {
1455         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1456         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1457         uint32_t icr0;
1458
1459         i40evf_disable_irq0(hw);
1460
1461         /* read out interrupt causes */
1462         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1463
1464         /* No interrupt event indicated */
1465         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1466                 goto done;
1467
1468         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1469                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1470                 i40evf_handle_aq_msg(dev);
1471         }
1472
1473         /* Link Status Change interrupt */
1474         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1475                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1476                                    " do nothing");
1477
1478 done:
1479         i40evf_enable_irq0(hw);
1480         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1481                           i40evf_dev_alarm_handler, dev);
1482 }
1483
1484 static int
1485 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1486 {
1487         struct i40e_hw *hw
1488                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1489         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1490
1491         PMD_INIT_FUNC_TRACE();
1492
1493         /* assign ops func pointer */
1494         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1495         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1496         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1497
1498         /*
1499          * For secondary processes, we don't initialise any further as primary
1500          * has already done this work.
1501          */
1502         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1503                 i40e_set_rx_function(eth_dev);
1504                 i40e_set_tx_function(eth_dev);
1505                 return 0;
1506         }
1507         i40e_set_default_ptype_table(eth_dev);
1508         rte_eth_copy_pci_info(eth_dev, pci_dev);
1509
1510         hw->vendor_id = pci_dev->id.vendor_id;
1511         hw->device_id = pci_dev->id.device_id;
1512         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1513         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1514         hw->bus.device = pci_dev->addr.devid;
1515         hw->bus.func = pci_dev->addr.function;
1516         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1517         hw->adapter_stopped = 0;
1518         hw->adapter_closed = 0;
1519
1520         /* Pass the information to the rte_eth_dev_close() that it should also
1521          * release the private port resources.
1522          */
1523         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1524
1525         if(i40evf_init_vf(eth_dev) != 0) {
1526                 PMD_INIT_LOG(ERR, "Init vf failed");
1527                 return -1;
1528         }
1529
1530         i40e_set_default_pctype_table(eth_dev);
1531         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1532                           i40evf_dev_alarm_handler, eth_dev);
1533
1534         /* configure and enable device interrupt */
1535         i40evf_enable_irq0(hw);
1536
1537         /* copy mac addr */
1538         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1539                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1540                                 0);
1541         if (eth_dev->data->mac_addrs == NULL) {
1542                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1543                                 " store MAC addresses",
1544                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1545                 return -ENOMEM;
1546         }
1547         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1548                         &eth_dev->data->mac_addrs[0]);
1549
1550         return 0;
1551 }
1552
1553 static int
1554 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1555 {
1556         PMD_INIT_FUNC_TRACE();
1557
1558         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1559                 return -EPERM;
1560
1561         if (i40evf_uninit_vf(eth_dev) != 0) {
1562                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1563                 return -1;
1564         }
1565
1566         return 0;
1567 }
1568
1569 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1570         struct rte_pci_device *pci_dev)
1571 {
1572         return rte_eth_dev_pci_generic_probe(pci_dev,
1573                 sizeof(struct i40e_adapter), i40evf_dev_init);
1574 }
1575
1576 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1577 {
1578         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1579 }
1580
1581 /*
1582  * virtual function driver struct
1583  */
1584 static struct rte_pci_driver rte_i40evf_pmd = {
1585         .id_table = pci_id_i40evf_map,
1586         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1587         .probe = eth_i40evf_pci_probe,
1588         .remove = eth_i40evf_pci_remove,
1589 };
1590
1591 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1592 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1593 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1594
1595 static int
1596 i40evf_dev_configure(struct rte_eth_dev *dev)
1597 {
1598         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1599         struct i40e_adapter *ad =
1600                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1601         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1602                                 dev->data->nb_tx_queues);
1603
1604         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1605          * allocation or vector Rx preconditions we will reset it.
1606          */
1607         ad->rx_bulk_alloc_allowed = true;
1608         ad->rx_vec_allowed = true;
1609         ad->tx_simple_allowed = true;
1610         ad->tx_vec_allowed = true;
1611
1612         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1613                 int ret = 0;
1614
1615                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1616                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1617                 ret = i40evf_request_queues(dev, num_queue_pairs);
1618                 if (ret != 0)
1619                         return ret;
1620
1621                 ret = i40evf_dev_reset(dev);
1622                 if (ret != 0)
1623                         return ret;
1624         }
1625
1626         return i40evf_init_vlan(dev);
1627 }
1628
1629 static int
1630 i40evf_init_vlan(struct rte_eth_dev *dev)
1631 {
1632         /* Apply vlan offload setting */
1633         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1634
1635         return 0;
1636 }
1637
1638 static int
1639 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1640 {
1641         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1642         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1643
1644         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1645                 return -ENOTSUP;
1646
1647         /* Vlan stripping setting */
1648         if (mask & ETH_VLAN_STRIP_MASK) {
1649                 /* Enable or disable VLAN stripping */
1650                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1651                         i40evf_enable_vlan_strip(dev);
1652                 else
1653                         i40evf_disable_vlan_strip(dev);
1654         }
1655
1656         return 0;
1657 }
1658
1659 static int
1660 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1661 {
1662         struct i40e_rx_queue *rxq;
1663         int err;
1664         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1665
1666         PMD_INIT_FUNC_TRACE();
1667
1668         rxq = dev->data->rx_queues[rx_queue_id];
1669
1670         err = i40e_alloc_rx_queue_mbufs(rxq);
1671         if (err) {
1672                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1673                 return err;
1674         }
1675
1676         rte_wmb();
1677
1678         /* Init the RX tail register. */
1679         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1680         I40EVF_WRITE_FLUSH(hw);
1681
1682         /* Ready to switch the queue on */
1683         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1684         if (err) {
1685                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1686                             rx_queue_id);
1687                 return err;
1688         }
1689         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1690
1691         return 0;
1692 }
1693
1694 static int
1695 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1696 {
1697         struct i40e_rx_queue *rxq;
1698         int err;
1699
1700         rxq = dev->data->rx_queues[rx_queue_id];
1701
1702         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1703         if (err) {
1704                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1705                             rx_queue_id);
1706                 return err;
1707         }
1708
1709         i40e_rx_queue_release_mbufs(rxq);
1710         i40e_reset_rx_queue(rxq);
1711         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1712
1713         return 0;
1714 }
1715
1716 static int
1717 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1718 {
1719         int err;
1720
1721         PMD_INIT_FUNC_TRACE();
1722
1723         /* Ready to switch the queue on */
1724         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1725         if (err) {
1726                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1727                             tx_queue_id);
1728                 return err;
1729         }
1730         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1731
1732         return 0;
1733 }
1734
1735 static int
1736 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1737 {
1738         struct i40e_tx_queue *txq;
1739         int err;
1740
1741         txq = dev->data->tx_queues[tx_queue_id];
1742
1743         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1744         if (err) {
1745                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1746                             tx_queue_id);
1747                 return err;
1748         }
1749
1750         i40e_tx_queue_release_mbufs(txq);
1751         i40e_reset_tx_queue(txq);
1752         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1753
1754         return 0;
1755 }
1756
1757 static int
1758 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1759 {
1760         int ret;
1761
1762         if (on)
1763                 ret = i40evf_add_vlan(dev, vlan_id);
1764         else
1765                 ret = i40evf_del_vlan(dev,vlan_id);
1766
1767         return ret;
1768 }
1769
1770 static int
1771 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1772 {
1773         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1774         struct rte_eth_dev_data *dev_data = dev->data;
1775         struct rte_pktmbuf_pool_private *mbp_priv;
1776         uint16_t buf_size, len;
1777
1778         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1779         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1780         I40EVF_WRITE_FLUSH(hw);
1781
1782         /* Calculate the maximum packet length allowed */
1783         mbp_priv = rte_mempool_get_priv(rxq->mp);
1784         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1785                                         RTE_PKTMBUF_HEADROOM);
1786         rxq->hs_mode = i40e_header_split_none;
1787         rxq->rx_hdr_len = 0;
1788         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1789         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1790         rxq->max_pkt_len = RTE_MIN(len,
1791                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1792
1793         /**
1794          * Check if the jumbo frame and maximum packet length are set correctly
1795          */
1796         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1797                 if (rxq->max_pkt_len <= RTE_ETHER_MAX_LEN ||
1798                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1799                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1800                                 "larger than %u and smaller than %u, as jumbo "
1801                                 "frame is enabled", (uint32_t)RTE_ETHER_MAX_LEN,
1802                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1803                         return I40E_ERR_CONFIG;
1804                 }
1805         } else {
1806                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1807                     rxq->max_pkt_len > RTE_ETHER_MAX_LEN) {
1808                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1809                                 "larger than %u and smaller than %u, as jumbo "
1810                                 "frame is disabled",
1811                                 (uint32_t)RTE_ETHER_MIN_LEN,
1812                                 (uint32_t)RTE_ETHER_MAX_LEN);
1813                         return I40E_ERR_CONFIG;
1814                 }
1815         }
1816
1817         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1818             rxq->max_pkt_len > buf_size)
1819                 dev_data->scattered_rx = 1;
1820
1821         return 0;
1822 }
1823
1824 static int
1825 i40evf_rx_init(struct rte_eth_dev *dev)
1826 {
1827         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1828         uint16_t i;
1829         int ret = I40E_SUCCESS;
1830         struct i40e_rx_queue **rxq =
1831                 (struct i40e_rx_queue **)dev->data->rx_queues;
1832
1833         i40evf_config_rss(vf);
1834         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1835                 if (!rxq[i] || !rxq[i]->q_set)
1836                         continue;
1837                 ret = i40evf_rxq_init(dev, rxq[i]);
1838                 if (ret != I40E_SUCCESS)
1839                         break;
1840         }
1841         if (ret == I40E_SUCCESS)
1842                 i40e_set_rx_function(dev);
1843
1844         return ret;
1845 }
1846
1847 static void
1848 i40evf_tx_init(struct rte_eth_dev *dev)
1849 {
1850         uint16_t i;
1851         struct i40e_tx_queue **txq =
1852                 (struct i40e_tx_queue **)dev->data->tx_queues;
1853         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1854
1855         for (i = 0; i < dev->data->nb_tx_queues; i++)
1856                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1857
1858         i40e_set_tx_function(dev);
1859 }
1860
1861 static inline void
1862 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1863 {
1864         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1865         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1866         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1867
1868         if (!rte_intr_allow_others(intr_handle)) {
1869                 I40E_WRITE_REG(hw,
1870                                I40E_VFINT_DYN_CTL01,
1871                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1872                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1873                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1874                 I40EVF_WRITE_FLUSH(hw);
1875                 return;
1876         }
1877
1878         I40EVF_WRITE_FLUSH(hw);
1879 }
1880
1881 static inline void
1882 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1883 {
1884         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1885         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1886         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1887
1888         if (!rte_intr_allow_others(intr_handle)) {
1889                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1890                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1891                 I40EVF_WRITE_FLUSH(hw);
1892                 return;
1893         }
1894
1895         I40EVF_WRITE_FLUSH(hw);
1896 }
1897
1898 static int
1899 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1900 {
1901         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1902         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1903         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1904         uint16_t interval =
1905                 i40e_calc_itr_interval(0, 0);
1906         uint16_t msix_intr;
1907
1908         msix_intr = intr_handle->intr_vec[queue_id];
1909         if (msix_intr == I40E_MISC_VEC_ID)
1910                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1911                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1912                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1913                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1914                                (interval <<
1915                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1916         else
1917                 I40E_WRITE_REG(hw,
1918                                I40E_VFINT_DYN_CTLN1(msix_intr -
1919                                                     I40E_RX_VEC_START),
1920                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1921                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1922                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1923                                (interval <<
1924                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1925
1926         I40EVF_WRITE_FLUSH(hw);
1927
1928         return 0;
1929 }
1930
1931 static int
1932 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1933 {
1934         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1935         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1936         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1937         uint16_t msix_intr;
1938
1939         msix_intr = intr_handle->intr_vec[queue_id];
1940         if (msix_intr == I40E_MISC_VEC_ID)
1941                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1942         else
1943                 I40E_WRITE_REG(hw,
1944                                I40E_VFINT_DYN_CTLN1(msix_intr -
1945                                                     I40E_RX_VEC_START),
1946                                0);
1947
1948         I40EVF_WRITE_FLUSH(hw);
1949
1950         return 0;
1951 }
1952
1953 static void
1954 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1955 {
1956         struct virtchnl_ether_addr_list *list;
1957         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1958         int err, i, j;
1959         int next_begin = 0;
1960         int begin = 0;
1961         uint32_t len;
1962         struct rte_ether_addr *addr;
1963         struct vf_cmd_info args;
1964
1965         do {
1966                 j = 0;
1967                 len = sizeof(struct virtchnl_ether_addr_list);
1968                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1969                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
1970                                 continue;
1971                         len += sizeof(struct virtchnl_ether_addr);
1972                         if (len >= I40E_AQ_BUF_SZ) {
1973                                 next_begin = i + 1;
1974                                 break;
1975                         }
1976                 }
1977
1978                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1979                 if (!list) {
1980                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1981                         return;
1982                 }
1983
1984                 for (i = begin; i < next_begin; i++) {
1985                         addr = &dev->data->mac_addrs[i];
1986                         if (rte_is_zero_ether_addr(addr))
1987                                 continue;
1988                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1989                                          sizeof(addr->addr_bytes));
1990                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1991                                     addr->addr_bytes[0], addr->addr_bytes[1],
1992                                     addr->addr_bytes[2], addr->addr_bytes[3],
1993                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1994                         j++;
1995                 }
1996                 list->vsi_id = vf->vsi_res->vsi_id;
1997                 list->num_elements = j;
1998                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1999                            VIRTCHNL_OP_DEL_ETH_ADDR;
2000                 args.in_args = (uint8_t *)list;
2001                 args.in_args_size = len;
2002                 args.out_buffer = vf->aq_resp;
2003                 args.out_size = I40E_AQ_BUF_SZ;
2004                 err = i40evf_execute_vf_cmd(dev, &args);
2005                 if (err) {
2006                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2007                                     add ? "OP_ADD_ETHER_ADDRESS" :
2008                                     "OP_DEL_ETHER_ADDRESS");
2009                 } else {
2010                         if (add)
2011                                 vf->vsi.mac_num++;
2012                         else
2013                                 vf->vsi.mac_num--;
2014                 }
2015                 rte_free(list);
2016                 begin = next_begin;
2017         } while (begin < I40E_NUM_MACADDR_MAX);
2018 }
2019
2020 static int
2021 i40evf_dev_start(struct rte_eth_dev *dev)
2022 {
2023         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2024         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2025         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2026         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2027         uint32_t intr_vector = 0;
2028
2029         PMD_INIT_FUNC_TRACE();
2030
2031         hw->adapter_stopped = 0;
2032
2033         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2034         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2035                                         dev->data->nb_tx_queues);
2036
2037         /* check and configure queue intr-vector mapping */
2038         if (rte_intr_cap_multiple(intr_handle) &&
2039             dev->data->dev_conf.intr_conf.rxq) {
2040                 intr_vector = dev->data->nb_rx_queues;
2041                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2042                         return -1;
2043         }
2044
2045         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2046                 intr_handle->intr_vec =
2047                         rte_zmalloc("intr_vec",
2048                                     dev->data->nb_rx_queues * sizeof(int), 0);
2049                 if (!intr_handle->intr_vec) {
2050                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2051                                      " intr_vec", dev->data->nb_rx_queues);
2052                         return -ENOMEM;
2053                 }
2054         }
2055
2056         if (i40evf_rx_init(dev) != 0){
2057                 PMD_DRV_LOG(ERR, "failed to do RX init");
2058                 return -1;
2059         }
2060
2061         i40evf_tx_init(dev);
2062
2063         if (i40evf_configure_vsi_queues(dev) != 0) {
2064                 PMD_DRV_LOG(ERR, "configure queues failed");
2065                 goto err_queue;
2066         }
2067         if (i40evf_config_irq_map(dev)) {
2068                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2069                 goto err_queue;
2070         }
2071
2072         /* Set all mac addrs */
2073         i40evf_add_del_all_mac_addr(dev, TRUE);
2074         /* Set all multicast addresses */
2075         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2076                                 TRUE);
2077
2078         if (i40evf_start_queues(dev) != 0) {
2079                 PMD_DRV_LOG(ERR, "enable queues failed");
2080                 goto err_mac;
2081         }
2082
2083         /* only enable interrupt in rx interrupt mode */
2084         if (dev->data->dev_conf.intr_conf.rxq != 0)
2085                 rte_intr_enable(intr_handle);
2086
2087         i40evf_enable_queues_intr(dev);
2088
2089         return 0;
2090
2091 err_mac:
2092         i40evf_add_del_all_mac_addr(dev, FALSE);
2093         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2094                                 FALSE);
2095 err_queue:
2096         return -1;
2097 }
2098
2099 static void
2100 i40evf_dev_stop(struct rte_eth_dev *dev)
2101 {
2102         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2103         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2104         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2105         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2106
2107         PMD_INIT_FUNC_TRACE();
2108
2109         if (dev->data->dev_conf.intr_conf.rxq != 0)
2110                 rte_intr_disable(intr_handle);
2111
2112         if (hw->adapter_stopped == 1)
2113                 return;
2114         i40evf_stop_queues(dev);
2115         i40evf_disable_queues_intr(dev);
2116         i40e_dev_clear_queues(dev);
2117
2118         /* Clean datapath event and queue/vec mapping */
2119         rte_intr_efd_disable(intr_handle);
2120         if (intr_handle->intr_vec) {
2121                 rte_free(intr_handle->intr_vec);
2122                 intr_handle->intr_vec = NULL;
2123         }
2124         /* remove all mac addrs */
2125         i40evf_add_del_all_mac_addr(dev, FALSE);
2126         /* remove all multicast addresses */
2127         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2128                                 FALSE);
2129         hw->adapter_stopped = 1;
2130
2131 }
2132
2133 static int
2134 i40evf_dev_link_update(struct rte_eth_dev *dev,
2135                        __rte_unused int wait_to_complete)
2136 {
2137         struct rte_eth_link new_link;
2138         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2139         /*
2140          * DPDK pf host provide interfacet to acquire link status
2141          * while Linux driver does not
2142          */
2143
2144         memset(&new_link, 0, sizeof(new_link));
2145         /* Linux driver PF host */
2146         switch (vf->link_speed) {
2147         case I40E_LINK_SPEED_100MB:
2148                 new_link.link_speed = ETH_SPEED_NUM_100M;
2149                 break;
2150         case I40E_LINK_SPEED_1GB:
2151                 new_link.link_speed = ETH_SPEED_NUM_1G;
2152                 break;
2153         case I40E_LINK_SPEED_10GB:
2154                 new_link.link_speed = ETH_SPEED_NUM_10G;
2155                 break;
2156         case I40E_LINK_SPEED_20GB:
2157                 new_link.link_speed = ETH_SPEED_NUM_20G;
2158                 break;
2159         case I40E_LINK_SPEED_25GB:
2160                 new_link.link_speed = ETH_SPEED_NUM_25G;
2161                 break;
2162         case I40E_LINK_SPEED_40GB:
2163                 new_link.link_speed = ETH_SPEED_NUM_40G;
2164                 break;
2165         default:
2166                 new_link.link_speed = ETH_SPEED_NUM_NONE;
2167                 break;
2168         }
2169         /* full duplex only */
2170         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2171         new_link.link_status = vf->link_up &&
2172                                 new_link.link_speed != ETH_SPEED_NUM_NONE
2173                                 ? ETH_LINK_UP
2174                                 : ETH_LINK_DOWN;
2175         new_link.link_autoneg =
2176                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2177
2178         return rte_eth_linkstatus_set(dev, &new_link);
2179 }
2180
2181 static int
2182 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2183 {
2184         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2185         int ret;
2186
2187         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2188         if (ret == 0)
2189                 vf->promisc_unicast_enabled = TRUE;
2190         else if (ret == I40E_NOT_SUPPORTED)
2191                 ret = -ENOTSUP;
2192         else
2193                 ret = -EAGAIN;
2194
2195         return ret;
2196 }
2197
2198 static int
2199 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2200 {
2201         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2202         int ret;
2203
2204         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2205         if (ret == 0)
2206                 vf->promisc_unicast_enabled = FALSE;
2207         else if (ret == I40E_NOT_SUPPORTED)
2208                 ret = -ENOTSUP;
2209         else
2210                 ret = -EAGAIN;
2211
2212         return ret;
2213 }
2214
2215 static int
2216 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2217 {
2218         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2219         int ret;
2220
2221         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2222         if (ret == 0)
2223                 vf->promisc_multicast_enabled = TRUE;
2224         else if (ret == I40E_NOT_SUPPORTED)
2225                 ret = -ENOTSUP;
2226         else
2227                 ret = -EAGAIN;
2228
2229         return ret;
2230 }
2231
2232 static int
2233 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2234 {
2235         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2236         int ret;
2237
2238         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2239         if (ret == 0)
2240                 vf->promisc_multicast_enabled = FALSE;
2241         else if (ret == I40E_NOT_SUPPORTED)
2242                 ret = -ENOTSUP;
2243         else
2244                 ret = -EAGAIN;
2245
2246         return ret;
2247 }
2248
2249 static int
2250 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2251 {
2252         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2253
2254         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2255         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2256         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2257         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2258         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2259         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2260         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2261         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2262         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2263         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2264         dev_info->rx_queue_offload_capa = 0;
2265         dev_info->rx_offload_capa =
2266                 DEV_RX_OFFLOAD_VLAN_STRIP |
2267                 DEV_RX_OFFLOAD_QINQ_STRIP |
2268                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2269                 DEV_RX_OFFLOAD_UDP_CKSUM |
2270                 DEV_RX_OFFLOAD_TCP_CKSUM |
2271                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2272                 DEV_RX_OFFLOAD_SCATTER |
2273                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2274                 DEV_RX_OFFLOAD_VLAN_FILTER;
2275
2276         dev_info->tx_queue_offload_capa = 0;
2277         dev_info->tx_offload_capa =
2278                 DEV_TX_OFFLOAD_VLAN_INSERT |
2279                 DEV_TX_OFFLOAD_QINQ_INSERT |
2280                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2281                 DEV_TX_OFFLOAD_UDP_CKSUM |
2282                 DEV_TX_OFFLOAD_TCP_CKSUM |
2283                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2284                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2285                 DEV_TX_OFFLOAD_TCP_TSO |
2286                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2287                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2288                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2289                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2290                 DEV_TX_OFFLOAD_MULTI_SEGS;
2291
2292         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2293                 .rx_thresh = {
2294                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2295                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2296                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2297                 },
2298                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2299                 .rx_drop_en = 0,
2300                 .offloads = 0,
2301         };
2302
2303         dev_info->default_txconf = (struct rte_eth_txconf) {
2304                 .tx_thresh = {
2305                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2306                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2307                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2308                 },
2309                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2310                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2311                 .offloads = 0,
2312         };
2313
2314         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2315                 .nb_max = I40E_MAX_RING_DESC,
2316                 .nb_min = I40E_MIN_RING_DESC,
2317                 .nb_align = I40E_ALIGN_RING_DESC,
2318         };
2319
2320         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2321                 .nb_max = I40E_MAX_RING_DESC,
2322                 .nb_min = I40E_MIN_RING_DESC,
2323                 .nb_align = I40E_ALIGN_RING_DESC,
2324         };
2325
2326         return 0;
2327 }
2328
2329 static int
2330 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2331 {
2332         int ret;
2333         struct i40e_eth_stats *pstats = NULL;
2334         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2335         struct i40e_vsi *vsi = &vf->vsi;
2336
2337         ret = i40evf_query_stats(dev, &pstats);
2338         if (ret == 0) {
2339                 i40evf_update_stats(vsi, pstats);
2340
2341                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2342                                                 pstats->rx_broadcast;
2343                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2344                                                 pstats->tx_unicast;
2345                 stats->imissed = pstats->rx_discards;
2346                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2347                 stats->ibytes = pstats->rx_bytes;
2348                 stats->obytes = pstats->tx_bytes;
2349         } else {
2350                 PMD_DRV_LOG(ERR, "Get statistics failed");
2351         }
2352         return ret;
2353 }
2354
2355 static void
2356 i40evf_dev_close(struct rte_eth_dev *dev)
2357 {
2358         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2359         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2360
2361         i40evf_dev_stop(dev);
2362         i40e_dev_free_queues(dev);
2363         /*
2364          * disable promiscuous mode before reset vf
2365          * it is a workaround solution when work with kernel driver
2366          * and it is not the normal way
2367          */
2368         i40evf_dev_promiscuous_disable(dev);
2369         i40evf_dev_allmulticast_disable(dev);
2370         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2371
2372         i40evf_reset_vf(dev);
2373         i40e_shutdown_adminq(hw);
2374         i40evf_disable_irq0(hw);
2375
2376         dev->dev_ops = NULL;
2377         dev->rx_pkt_burst = NULL;
2378         dev->tx_pkt_burst = NULL;
2379
2380         rte_free(vf->vf_res);
2381         vf->vf_res = NULL;
2382         rte_free(vf->aq_resp);
2383         vf->aq_resp = NULL;
2384
2385         hw->adapter_closed = 1;
2386 }
2387
2388 /*
2389  * Reset VF device only to re-initialize resources in PMD layer
2390  */
2391 static int
2392 i40evf_dev_reset(struct rte_eth_dev *dev)
2393 {
2394         int ret;
2395
2396         ret = i40evf_dev_uninit(dev);
2397         if (ret)
2398                 return ret;
2399
2400         ret = i40evf_dev_init(dev);
2401
2402         return ret;
2403 }
2404
2405 static int
2406 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2407 {
2408         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2409         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2410         int ret;
2411
2412         if (!lut)
2413                 return -EINVAL;
2414
2415         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2416                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2417                                           lut, lut_size);
2418                 if (ret) {
2419                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2420                         return ret;
2421                 }
2422         } else {
2423                 uint32_t *lut_dw = (uint32_t *)lut;
2424                 uint16_t i, lut_size_dw = lut_size / 4;
2425
2426                 for (i = 0; i < lut_size_dw; i++)
2427                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2428         }
2429
2430         return 0;
2431 }
2432
2433 static int
2434 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2435 {
2436         struct i40e_vf *vf;
2437         struct i40e_hw *hw;
2438         int ret;
2439
2440         if (!vsi || !lut)
2441                 return -EINVAL;
2442
2443         vf = I40E_VSI_TO_VF(vsi);
2444         hw = I40E_VSI_TO_HW(vsi);
2445
2446         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2447                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2448                                           lut, lut_size);
2449                 if (ret) {
2450                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2451                         return ret;
2452                 }
2453         } else {
2454                 uint32_t *lut_dw = (uint32_t *)lut;
2455                 uint16_t i, lut_size_dw = lut_size / 4;
2456
2457                 for (i = 0; i < lut_size_dw; i++)
2458                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2459                 I40EVF_WRITE_FLUSH(hw);
2460         }
2461
2462         return 0;
2463 }
2464
2465 static int
2466 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2467                            struct rte_eth_rss_reta_entry64 *reta_conf,
2468                            uint16_t reta_size)
2469 {
2470         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2471         uint8_t *lut;
2472         uint16_t i, idx, shift;
2473         int ret;
2474
2475         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2476                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2477                         "(%d) doesn't match the number of hardware can "
2478                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2479                 return -EINVAL;
2480         }
2481
2482         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2483         if (!lut) {
2484                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2485                 return -ENOMEM;
2486         }
2487         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2488         if (ret)
2489                 goto out;
2490         for (i = 0; i < reta_size; i++) {
2491                 idx = i / RTE_RETA_GROUP_SIZE;
2492                 shift = i % RTE_RETA_GROUP_SIZE;
2493                 if (reta_conf[idx].mask & (1ULL << shift))
2494                         lut[i] = reta_conf[idx].reta[shift];
2495         }
2496         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2497
2498 out:
2499         rte_free(lut);
2500
2501         return ret;
2502 }
2503
2504 static int
2505 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2506                           struct rte_eth_rss_reta_entry64 *reta_conf,
2507                           uint16_t reta_size)
2508 {
2509         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2510         uint16_t i, idx, shift;
2511         uint8_t *lut;
2512         int ret;
2513
2514         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2515                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2516                         "(%d) doesn't match the number of hardware can "
2517                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2518                 return -EINVAL;
2519         }
2520
2521         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2522         if (!lut) {
2523                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2524                 return -ENOMEM;
2525         }
2526
2527         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2528         if (ret)
2529                 goto out;
2530         for (i = 0; i < reta_size; i++) {
2531                 idx = i / RTE_RETA_GROUP_SIZE;
2532                 shift = i % RTE_RETA_GROUP_SIZE;
2533                 if (reta_conf[idx].mask & (1ULL << shift))
2534                         reta_conf[idx].reta[shift] = lut[i];
2535         }
2536
2537 out:
2538         rte_free(lut);
2539
2540         return ret;
2541 }
2542
2543 static int
2544 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2545 {
2546         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2547         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2548         int ret = 0;
2549
2550         if (!key || key_len == 0) {
2551                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2552                 return 0;
2553         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2554                 sizeof(uint32_t)) {
2555                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2556                 return -EINVAL;
2557         }
2558
2559         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2560                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2561                         (struct i40e_aqc_get_set_rss_key_data *)key;
2562
2563                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2564                 if (ret)
2565                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2566                                      "via AQ");
2567         } else {
2568                 uint32_t *hash_key = (uint32_t *)key;
2569                 uint16_t i;
2570
2571                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2572                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2573                 I40EVF_WRITE_FLUSH(hw);
2574         }
2575
2576         return ret;
2577 }
2578
2579 static int
2580 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2581 {
2582         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2583         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2584         int ret;
2585
2586         if (!key || !key_len)
2587                 return -EINVAL;
2588
2589         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2590                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2591                         (struct i40e_aqc_get_set_rss_key_data *)key);
2592                 if (ret) {
2593                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2594                         return ret;
2595                 }
2596         } else {
2597                 uint32_t *key_dw = (uint32_t *)key;
2598                 uint16_t i;
2599
2600                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2601                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2602         }
2603         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2604
2605         return 0;
2606 }
2607
2608 static int
2609 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2610 {
2611         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2612         uint64_t hena;
2613         int ret;
2614
2615         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2616                                  rss_conf->rss_key_len);
2617         if (ret)
2618                 return ret;
2619
2620         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2621         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2622         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2623         I40EVF_WRITE_FLUSH(hw);
2624
2625         return 0;
2626 }
2627
2628 static void
2629 i40evf_disable_rss(struct i40e_vf *vf)
2630 {
2631         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2632
2633         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2634         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2635         I40EVF_WRITE_FLUSH(hw);
2636 }
2637
2638 static int
2639 i40evf_config_rss(struct i40e_vf *vf)
2640 {
2641         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2642         struct rte_eth_rss_conf rss_conf;
2643         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2644         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2645         uint16_t num;
2646         uint8_t *lut_info;
2647         int ret;
2648
2649         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2650                 i40evf_disable_rss(vf);
2651                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2652                 return 0;
2653         }
2654
2655         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2656         /* Fill out the look up table */
2657         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2658                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2659                         if (j >= num)
2660                                 j = 0;
2661                         lut = (lut << 8) | j;
2662                         if ((i & 3) == 3)
2663                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2664                 }
2665         } else {
2666                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2667                 if (!lut_info) {
2668                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2669                         return -ENOMEM;
2670                 }
2671
2672                 for (i = 0; i < rss_lut_size; i++)
2673                         lut_info[i] = i % vf->num_queue_pairs;
2674
2675                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2676                                          rss_lut_size);
2677                 rte_free(lut_info);
2678                 if (ret)
2679                         return ret;
2680         }
2681
2682         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2683         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2684                 i40evf_disable_rss(vf);
2685                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2686                 return 0;
2687         }
2688
2689         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2690                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2691                 /* Calculate the default hash key */
2692                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2693                         rss_key_default[i] = (uint32_t)rte_rand();
2694                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2695                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2696                         sizeof(uint32_t);
2697         }
2698
2699         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2700 }
2701
2702 static int
2703 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2704                            struct rte_eth_rss_conf *rss_conf)
2705 {
2706         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2707         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2708         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2709         uint64_t hena;
2710
2711         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2712         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2713
2714         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2715                 if (rss_hf != 0) /* Enable RSS */
2716                         return -EINVAL;
2717                 return 0;
2718         }
2719
2720         /* RSS enabled */
2721         if (rss_hf == 0) /* Disable RSS */
2722                 return -EINVAL;
2723
2724         return i40evf_hw_rss_hash_set(vf, rss_conf);
2725 }
2726
2727 static int
2728 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2729                              struct rte_eth_rss_conf *rss_conf)
2730 {
2731         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2732         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2733         uint64_t hena;
2734
2735         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2736                            &rss_conf->rss_key_len);
2737
2738         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2739         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2740         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2741
2742         return 0;
2743 }
2744
2745 static int
2746 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2747 {
2748         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2749         struct rte_eth_dev_data *dev_data = vf->dev_data;
2750         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2751         int ret = 0;
2752
2753         /* check if mtu is within the allowed range */
2754         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2755                 return -EINVAL;
2756
2757         /* mtu setting is forbidden if port is start */
2758         if (dev_data->dev_started) {
2759                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2760                             dev_data->port_id);
2761                 return -EBUSY;
2762         }
2763
2764         if (frame_size > RTE_ETHER_MAX_LEN)
2765                 dev_data->dev_conf.rxmode.offloads |=
2766                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2767         else
2768                 dev_data->dev_conf.rxmode.offloads &=
2769                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2770         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2771
2772         return ret;
2773 }
2774
2775 static int
2776 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2777                             struct rte_ether_addr *mac_addr)
2778 {
2779         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2780
2781         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2782                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2783                 return -EINVAL;
2784         }
2785
2786         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2787
2788         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2789                 return -EIO;
2790
2791         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2792         return 0;
2793 }
2794
2795 static int
2796 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2797                         struct rte_ether_addr *mc_addrs,
2798                         uint32_t mc_addrs_num, bool add)
2799 {
2800         struct virtchnl_ether_addr_list *list;
2801         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2802         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2803                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2804         uint32_t i;
2805         int err;
2806         struct vf_cmd_info args;
2807
2808         if (mc_addrs == NULL || mc_addrs_num == 0)
2809                 return 0;
2810
2811         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2812                 return -EINVAL;
2813
2814         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2815         list->vsi_id = vf->vsi_res->vsi_id;
2816         list->num_elements = mc_addrs_num;
2817
2818         for (i = 0; i < mc_addrs_num; i++) {
2819                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2820                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2821                                     mc_addrs[i].addr_bytes[0],
2822                                     mc_addrs[i].addr_bytes[1],
2823                                     mc_addrs[i].addr_bytes[2],
2824                                     mc_addrs[i].addr_bytes[3],
2825                                     mc_addrs[i].addr_bytes[4],
2826                                     mc_addrs[i].addr_bytes[5]);
2827                         return -EINVAL;
2828                 }
2829
2830                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2831                         sizeof(list->list[i].addr));
2832         }
2833
2834         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2835         args.in_args = cmd_buffer;
2836         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2837                 i * sizeof(struct virtchnl_ether_addr);
2838         args.out_buffer = vf->aq_resp;
2839         args.out_size = I40E_AQ_BUF_SZ;
2840         err = i40evf_execute_vf_cmd(dev, &args);
2841         if (err) {
2842                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2843                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2844                 return err;
2845         }
2846
2847         return 0;
2848 }
2849
2850 static int
2851 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2852                         struct rte_ether_addr *mc_addrs,
2853                         uint32_t mc_addrs_num)
2854 {
2855         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2856         int err;
2857
2858         /* flush previous addresses */
2859         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2860                                 FALSE);
2861         if (err)
2862                 return err;
2863
2864         vf->mc_addrs_num = 0;
2865
2866         /* add new ones */
2867         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2868                                         TRUE);
2869         if (err)
2870                 return err;
2871
2872         vf->mc_addrs_num = mc_addrs_num;
2873         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2874
2875         return 0;
2876 }
2877
2878 bool
2879 is_i40evf_supported(struct rte_eth_dev *dev)
2880 {
2881         return is_device_supported(dev, &rte_i40evf_pmd);
2882 }