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34 #include <sys/queue.h>
42 #include <rte_byteorder.h>
43 #include <rte_common.h>
44 #include <rte_cycles.h>
46 #include <rte_interrupts.h>
48 #include <rte_debug.h>
50 #include <rte_atomic.h>
51 #include <rte_branch_prediction.h>
52 #include <rte_memory.h>
53 #include <rte_memzone.h>
55 #include <rte_alarm.h>
56 #include <rte_ether.h>
57 #include <rte_ethdev.h>
58 #include <rte_atomic.h>
59 #include <rte_malloc.h>
62 #include "i40e_logs.h"
63 #include "base/i40e_prototype.h"
64 #include "base/i40e_adminq_cmd.h"
65 #include "base/i40e_type.h"
67 #include "i40e_rxtx.h"
68 #include "i40e_ethdev.h"
70 #define I40EVF_VSI_DEFAULT_MSIX_INTR 1
72 /* busy wait delay in msec */
73 #define I40EVF_BUSY_WAIT_DELAY 10
74 #define I40EVF_BUSY_WAIT_COUNT 50
75 #define MAX_RESET_WAIT_CNT 20
77 struct i40evf_arq_msg_info {
78 enum i40e_virtchnl_ops ops;
79 enum i40e_status_code result;
86 enum i40e_virtchnl_ops ops;
88 uint32_t in_args_size;
90 /* Input & output type. pass in buffer size and pass out
91 * actual return result
96 enum i40evf_aq_result {
97 I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
98 I40EVF_MSG_NON, /* Read nothing from admin queue */
99 I40EVF_MSG_SYS, /* Read system msg from admin queue */
100 I40EVF_MSG_CMD, /* Read async command result */
103 /* A share buffer to store the command result from PF driver */
104 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
106 static int i40evf_dev_configure(struct rte_eth_dev *dev);
107 static int i40evf_dev_start(struct rte_eth_dev *dev);
108 static void i40evf_dev_stop(struct rte_eth_dev *dev);
109 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
110 struct rte_eth_dev_info *dev_info);
111 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
112 __rte_unused int wait_to_complete);
113 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
114 struct rte_eth_stats *stats);
115 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
116 uint16_t vlan_id, int on);
117 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
118 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
120 static void i40evf_dev_close(struct rte_eth_dev *dev);
121 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
122 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
123 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
124 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
125 static int i40evf_get_link_status(struct rte_eth_dev *dev,
126 struct rte_eth_link *link);
127 static int i40evf_init_vlan(struct rte_eth_dev *dev);
128 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
129 uint16_t rx_queue_id);
130 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
131 uint16_t rx_queue_id);
132 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
133 uint16_t tx_queue_id);
134 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
135 uint16_t tx_queue_id);
136 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
137 struct rte_eth_rss_reta_entry64 *reta_conf,
139 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
140 struct rte_eth_rss_reta_entry64 *reta_conf,
142 static int i40evf_config_rss(struct i40e_vf *vf);
143 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
144 struct rte_eth_rss_conf *rss_conf);
145 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
146 struct rte_eth_rss_conf *rss_conf);
148 /* Default hash key buffer for RSS */
149 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
151 static const struct eth_dev_ops i40evf_eth_dev_ops = {
152 .dev_configure = i40evf_dev_configure,
153 .dev_start = i40evf_dev_start,
154 .dev_stop = i40evf_dev_stop,
155 .promiscuous_enable = i40evf_dev_promiscuous_enable,
156 .promiscuous_disable = i40evf_dev_promiscuous_disable,
157 .allmulticast_enable = i40evf_dev_allmulticast_enable,
158 .allmulticast_disable = i40evf_dev_allmulticast_disable,
159 .link_update = i40evf_dev_link_update,
160 .stats_get = i40evf_dev_stats_get,
161 .dev_close = i40evf_dev_close,
162 .dev_infos_get = i40evf_dev_info_get,
163 .vlan_filter_set = i40evf_vlan_filter_set,
164 .vlan_offload_set = i40evf_vlan_offload_set,
165 .vlan_pvid_set = i40evf_vlan_pvid_set,
166 .rx_queue_start = i40evf_dev_rx_queue_start,
167 .rx_queue_stop = i40evf_dev_rx_queue_stop,
168 .tx_queue_start = i40evf_dev_tx_queue_start,
169 .tx_queue_stop = i40evf_dev_tx_queue_stop,
170 .rx_queue_setup = i40e_dev_rx_queue_setup,
171 .rx_queue_release = i40e_dev_rx_queue_release,
172 .tx_queue_setup = i40e_dev_tx_queue_setup,
173 .tx_queue_release = i40e_dev_tx_queue_release,
174 .reta_update = i40evf_dev_rss_reta_update,
175 .reta_query = i40evf_dev_rss_reta_query,
176 .rss_hash_update = i40evf_dev_rss_hash_update,
177 .rss_hash_conf_get = i40evf_dev_rss_hash_conf_get,
181 i40evf_set_mac_type(struct i40e_hw *hw)
183 int status = I40E_ERR_DEVICE_NOT_SUPPORTED;
185 if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
186 switch (hw->device_id) {
188 case I40E_DEV_ID_VF_HV:
189 hw->mac.type = I40E_MAC_VF;
190 status = I40E_SUCCESS;
201 * Parse admin queue message.
206 * > 0: read cmd result
208 static enum i40evf_aq_result
209 i40evf_parse_pfmsg(struct i40e_vf *vf,
210 struct i40e_arq_event_info *event,
211 struct i40evf_arq_msg_info *data)
213 enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
214 rte_le_to_cpu_32(event->desc.cookie_high);
215 enum i40e_status_code retval = (enum i40e_status_code)\
216 rte_le_to_cpu_32(event->desc.cookie_low);
217 enum i40evf_aq_result ret = I40EVF_MSG_CMD;
220 if (opcode == I40E_VIRTCHNL_OP_EVENT) {
221 struct i40e_virtchnl_pf_event *vpe =
222 (struct i40e_virtchnl_pf_event *)event->msg_buf;
224 /* Initialize ret to sys event */
225 ret = I40EVF_MSG_SYS;
226 switch (vpe->event) {
227 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
229 vpe->event_data.link_event.link_status;
230 vf->pend_msg |= PFMSG_LINK_CHANGE;
231 PMD_DRV_LOG(INFO, "Link status update:%s",
232 vf->link_up ? "up" : "down");
234 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
236 vf->pend_msg |= PFMSG_RESET_IMPENDING;
237 PMD_DRV_LOG(INFO, "vf is reseting");
239 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
240 vf->dev_closed = true;
241 vf->pend_msg |= PFMSG_DRIVER_CLOSE;
242 PMD_DRV_LOG(INFO, "PF driver closed");
245 PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
246 __func__, vpe->event);
249 /* async reply msg on command issued by vf previously */
250 ret = I40EVF_MSG_CMD;
251 /* Actual data length read from PF */
252 data->msg_len = event->msg_len;
254 /* fill the ops and result to notify VF */
255 data->result = retval;
262 * Read data in admin queue to get msg from pf driver
264 static enum i40evf_aq_result
265 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
267 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
268 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
269 struct i40e_arq_event_info event;
271 enum i40evf_aq_result result = I40EVF_MSG_NON;
273 event.buf_len = data->buf_len;
274 event.msg_buf = data->msg;
275 ret = i40e_clean_arq_element(hw, &event, NULL);
276 /* Can't read any msg from adminQ */
278 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
279 result = I40EVF_MSG_NON;
281 result = I40EVF_MSG_ERR;
285 /* Parse the event */
286 result = i40evf_parse_pfmsg(vf, &event, data);
292 * Polling read until command result return from pf driver or meet error.
295 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
296 struct i40evf_arq_msg_info *data)
299 enum i40evf_aq_result ret;
301 #define MAX_TRY_TIMES 20
302 #define ASQ_DELAY_MS 100
304 /* Delay some time first */
305 rte_delay_ms(ASQ_DELAY_MS);
306 ret = i40evf_read_pfmsg(dev, data);
307 if (ret == I40EVF_MSG_CMD)
309 else if (ret == I40EVF_MSG_ERR)
312 /* If don't read msg or read sys event, continue */
313 } while(i++ < MAX_TRY_TIMES);
319 * clear current command. Only call in case execute
320 * _atomic_set_cmd successfully.
323 _clear_cmd(struct i40e_vf *vf)
326 vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
330 * Check there is pending cmd in execution. If none, set new command.
333 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
335 int ret = rte_atomic32_cmpset(&vf->pend_cmd,
336 I40E_VIRTCHNL_OP_UNKNOWN, ops);
339 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
345 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
347 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
348 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
350 struct i40evf_arq_msg_info info;
352 if (_atomic_set_cmd(vf, args->ops))
355 info.msg = args->out_buffer;
356 info.buf_len = args->out_size;
357 info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
358 info.result = I40E_SUCCESS;
360 err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
361 args->in_args, args->in_args_size, NULL);
363 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
368 err = i40evf_wait_cmd_done(dev, &info);
369 /* read message and it's expected one */
370 if (!err && args->ops == info.ops)
373 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
376 else if (args->ops != info.ops)
377 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
378 args->ops, info.ops);
380 return (err | info.result);
384 * Check API version with sync wait until version read or fail from admin queue
387 i40evf_check_api_version(struct rte_eth_dev *dev)
389 struct i40e_virtchnl_version_info version, *pver;
391 struct vf_cmd_info args;
392 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
394 version.major = I40E_VIRTCHNL_VERSION_MAJOR;
395 version.minor = I40E_VIRTCHNL_VERSION_MINOR;
397 args.ops = I40E_VIRTCHNL_OP_VERSION;
398 args.in_args = (uint8_t *)&version;
399 args.in_args_size = sizeof(version);
400 args.out_buffer = cmd_result_buffer;
401 args.out_size = I40E_AQ_BUF_SZ;
403 err = i40evf_execute_vf_cmd(dev, &args);
405 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
409 pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
410 vf->version_major = pver->major;
411 vf->version_minor = pver->minor;
412 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
413 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
414 else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
415 (vf->version_minor == I40E_VIRTCHNL_VERSION_MINOR))
416 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
418 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
419 vf->version_major, vf->version_minor,
420 I40E_VIRTCHNL_VERSION_MAJOR,
421 I40E_VIRTCHNL_VERSION_MINOR);
429 i40evf_get_vf_resource(struct rte_eth_dev *dev)
431 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
432 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
434 struct vf_cmd_info args;
437 args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
439 args.in_args_size = 0;
440 args.out_buffer = cmd_result_buffer;
441 args.out_size = I40E_AQ_BUF_SZ;
443 err = i40evf_execute_vf_cmd(dev, &args);
446 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
450 len = sizeof(struct i40e_virtchnl_vf_resource) +
451 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
453 (void)rte_memcpy(vf->vf_res, args.out_buffer,
454 RTE_MIN(args.out_size, len));
455 i40e_vf_parse_hw_config(hw, vf->vf_res);
461 i40evf_config_promisc(struct rte_eth_dev *dev,
463 bool enable_multicast)
465 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
467 struct vf_cmd_info args;
468 struct i40e_virtchnl_promisc_info promisc;
471 promisc.vsi_id = vf->vsi_res->vsi_id;
474 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
476 if (enable_multicast)
477 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
479 args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
480 args.in_args = (uint8_t *)&promisc;
481 args.in_args_size = sizeof(promisc);
482 args.out_buffer = cmd_result_buffer;
483 args.out_size = I40E_AQ_BUF_SZ;
485 err = i40evf_execute_vf_cmd(dev, &args);
488 PMD_DRV_LOG(ERR, "fail to execute command "
489 "CONFIG_PROMISCUOUS_MODE");
493 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
495 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
496 bool enable_vlan_strip)
498 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
500 struct vf_cmd_info args;
501 struct i40e_virtchnl_vlan_offload_info offload;
503 offload.vsi_id = vf->vsi_res->vsi_id;
504 offload.enable_vlan_strip = enable_vlan_strip;
506 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
507 args.in_args = (uint8_t *)&offload;
508 args.in_args_size = sizeof(offload);
509 args.out_buffer = cmd_result_buffer;
510 args.out_size = I40E_AQ_BUF_SZ;
512 err = i40evf_execute_vf_cmd(dev, &args);
514 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
520 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
521 struct i40e_vsi_vlan_pvid_info *info)
523 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
525 struct vf_cmd_info args;
526 struct i40e_virtchnl_pvid_info tpid_info;
528 if (dev == NULL || info == NULL) {
529 PMD_DRV_LOG(ERR, "invalid parameters");
530 return I40E_ERR_PARAM;
533 memset(&tpid_info, 0, sizeof(tpid_info));
534 tpid_info.vsi_id = vf->vsi_res->vsi_id;
535 (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
537 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
538 args.in_args = (uint8_t *)&tpid_info;
539 args.in_args_size = sizeof(tpid_info);
540 args.out_buffer = cmd_result_buffer;
541 args.out_size = I40E_AQ_BUF_SZ;
543 err = i40evf_execute_vf_cmd(dev, &args);
545 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
551 i40evf_fill_virtchnl_vsi_txq_info(struct i40e_virtchnl_txq_info *txq_info,
555 struct i40e_tx_queue *txq)
557 txq_info->vsi_id = vsi_id;
558 txq_info->queue_id = queue_id;
559 if (queue_id < nb_txq) {
560 txq_info->ring_len = txq->nb_tx_desc;
561 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
566 i40evf_fill_virtchnl_vsi_rxq_info(struct i40e_virtchnl_rxq_info *rxq_info,
570 uint32_t max_pkt_size,
571 struct i40e_rx_queue *rxq)
573 rxq_info->vsi_id = vsi_id;
574 rxq_info->queue_id = queue_id;
575 rxq_info->max_pkt_size = max_pkt_size;
576 if (queue_id < nb_rxq) {
577 rxq_info->ring_len = rxq->nb_rx_desc;
578 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
579 rxq_info->databuffer_size =
580 (rte_pktmbuf_data_room_size(rxq->mp) -
581 RTE_PKTMBUF_HEADROOM);
585 /* It configures VSI queues to co-work with Linux PF host */
587 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
589 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
590 struct i40e_rx_queue **rxq =
591 (struct i40e_rx_queue **)dev->data->rx_queues;
592 struct i40e_tx_queue **txq =
593 (struct i40e_tx_queue **)dev->data->tx_queues;
594 struct i40e_virtchnl_vsi_queue_config_info *vc_vqci;
595 struct i40e_virtchnl_queue_pair_info *vc_qpi;
596 struct vf_cmd_info args;
597 uint16_t i, nb_qp = vf->num_queue_pairs;
598 const uint32_t size =
599 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
603 memset(buff, 0, sizeof(buff));
604 vc_vqci = (struct i40e_virtchnl_vsi_queue_config_info *)buff;
605 vc_vqci->vsi_id = vf->vsi_res->vsi_id;
606 vc_vqci->num_queue_pairs = nb_qp;
608 for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
609 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
610 vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
611 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
612 vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
613 vf->max_pkt_len, rxq[i]);
615 memset(&args, 0, sizeof(args));
616 args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
617 args.in_args = (uint8_t *)vc_vqci;
618 args.in_args_size = size;
619 args.out_buffer = cmd_result_buffer;
620 args.out_size = I40E_AQ_BUF_SZ;
621 ret = i40evf_execute_vf_cmd(dev, &args);
623 PMD_DRV_LOG(ERR, "Failed to execute command of "
624 "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES\n");
629 /* It configures VSI queues to co-work with DPDK PF host */
631 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
633 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
634 struct i40e_rx_queue **rxq =
635 (struct i40e_rx_queue **)dev->data->rx_queues;
636 struct i40e_tx_queue **txq =
637 (struct i40e_tx_queue **)dev->data->tx_queues;
638 struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei;
639 struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
640 struct vf_cmd_info args;
641 uint16_t i, nb_qp = vf->num_queue_pairs;
642 const uint32_t size =
643 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
647 memset(buff, 0, sizeof(buff));
648 vc_vqcei = (struct i40e_virtchnl_vsi_queue_config_ext_info *)buff;
649 vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
650 vc_vqcei->num_queue_pairs = nb_qp;
651 vc_qpei = vc_vqcei->qpair;
652 for (i = 0; i < nb_qp; i++, vc_qpei++) {
653 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
654 vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
655 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
656 vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
657 vf->max_pkt_len, rxq[i]);
658 if (i < dev->data->nb_rx_queues)
660 * It adds extra info for configuring VSI queues, which
661 * is needed to enable the configurable crc stripping
664 vc_qpei->rxq_ext.crcstrip =
665 dev->data->dev_conf.rxmode.hw_strip_crc;
667 memset(&args, 0, sizeof(args));
669 (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
670 args.in_args = (uint8_t *)vc_vqcei;
671 args.in_args_size = size;
672 args.out_buffer = cmd_result_buffer;
673 args.out_size = I40E_AQ_BUF_SZ;
674 ret = i40evf_execute_vf_cmd(dev, &args);
676 PMD_DRV_LOG(ERR, "Failed to execute command of "
677 "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT\n");
683 i40evf_configure_queues(struct rte_eth_dev *dev)
685 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
687 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
688 /* To support DPDK PF host */
689 return i40evf_configure_vsi_queues_ext(dev);
691 /* To support Linux PF host */
692 return i40evf_configure_vsi_queues(dev);
696 i40evf_config_irq_map(struct rte_eth_dev *dev)
698 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
699 struct vf_cmd_info args;
700 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
701 sizeof(struct i40e_virtchnl_vector_map)];
702 struct i40e_virtchnl_irq_map_info *map_info;
704 map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
705 map_info->num_vectors = 1;
706 map_info->vecmap[0].rxitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
707 map_info->vecmap[0].txitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
708 map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
709 /* Alway use default dynamic MSIX interrupt */
710 map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
711 /* Don't map any tx queue */
712 map_info->vecmap[0].txq_map = 0;
713 map_info->vecmap[0].rxq_map = 0;
714 for (i = 0; i < dev->data->nb_rx_queues; i++)
715 map_info->vecmap[0].rxq_map |= 1 << i;
717 args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
718 args.in_args = (u8 *)cmd_buffer;
719 args.in_args_size = sizeof(cmd_buffer);
720 args.out_buffer = cmd_result_buffer;
721 args.out_size = I40E_AQ_BUF_SZ;
722 err = i40evf_execute_vf_cmd(dev, &args);
724 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
730 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
733 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
734 struct i40e_virtchnl_queue_select queue_select;
736 struct vf_cmd_info args;
737 memset(&queue_select, 0, sizeof(queue_select));
738 queue_select.vsi_id = vf->vsi_res->vsi_id;
741 queue_select.rx_queues |= 1 << qid;
743 queue_select.tx_queues |= 1 << qid;
746 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
748 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
749 args.in_args = (u8 *)&queue_select;
750 args.in_args_size = sizeof(queue_select);
751 args.out_buffer = cmd_result_buffer;
752 args.out_size = I40E_AQ_BUF_SZ;
753 err = i40evf_execute_vf_cmd(dev, &args);
755 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
756 isrx ? "RX" : "TX", qid, on ? "on" : "off");
762 i40evf_start_queues(struct rte_eth_dev *dev)
764 struct rte_eth_dev_data *dev_data = dev->data;
766 struct i40e_rx_queue *rxq;
767 struct i40e_tx_queue *txq;
769 for (i = 0; i < dev->data->nb_rx_queues; i++) {
770 rxq = dev_data->rx_queues[i];
771 if (rxq->rx_deferred_start)
773 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
774 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
779 for (i = 0; i < dev->data->nb_tx_queues; i++) {
780 txq = dev_data->tx_queues[i];
781 if (txq->tx_deferred_start)
783 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
784 PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
793 i40evf_stop_queues(struct rte_eth_dev *dev)
797 /* Stop TX queues first */
798 for (i = 0; i < dev->data->nb_tx_queues; i++) {
799 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
800 PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
805 /* Then stop RX queues */
806 for (i = 0; i < dev->data->nb_rx_queues; i++) {
807 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
808 PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
817 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
819 struct i40e_virtchnl_ether_addr_list *list;
820 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
821 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
822 sizeof(struct i40e_virtchnl_ether_addr)];
824 struct vf_cmd_info args;
826 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
827 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
828 addr->addr_bytes[0], addr->addr_bytes[1],
829 addr->addr_bytes[2], addr->addr_bytes[3],
830 addr->addr_bytes[4], addr->addr_bytes[5]);
834 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
835 list->vsi_id = vf->vsi_res->vsi_id;
836 list->num_elements = 1;
837 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
838 sizeof(addr->addr_bytes));
840 args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
841 args.in_args = cmd_buffer;
842 args.in_args_size = sizeof(cmd_buffer);
843 args.out_buffer = cmd_result_buffer;
844 args.out_size = I40E_AQ_BUF_SZ;
845 err = i40evf_execute_vf_cmd(dev, &args);
847 PMD_DRV_LOG(ERR, "fail to execute command "
848 "OP_ADD_ETHER_ADDRESS");
854 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
856 struct i40e_virtchnl_ether_addr_list *list;
857 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
858 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
859 sizeof(struct i40e_virtchnl_ether_addr)];
861 struct vf_cmd_info args;
863 if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
864 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
865 addr->addr_bytes[0], addr->addr_bytes[1],
866 addr->addr_bytes[2], addr->addr_bytes[3],
867 addr->addr_bytes[4], addr->addr_bytes[5]);
871 list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
872 list->vsi_id = vf->vsi_res->vsi_id;
873 list->num_elements = 1;
874 (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
875 sizeof(addr->addr_bytes));
877 args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
878 args.in_args = cmd_buffer;
879 args.in_args_size = sizeof(cmd_buffer);
880 args.out_buffer = cmd_result_buffer;
881 args.out_size = I40E_AQ_BUF_SZ;
882 err = i40evf_execute_vf_cmd(dev, &args);
884 PMD_DRV_LOG(ERR, "fail to execute command "
885 "OP_DEL_ETHER_ADDRESS");
891 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
893 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
894 struct i40e_virtchnl_queue_select q_stats;
895 struct i40e_eth_stats *pstats;
897 struct vf_cmd_info args;
899 memset(&q_stats, 0, sizeof(q_stats));
900 q_stats.vsi_id = vf->vsi_res->vsi_id;
901 args.ops = I40E_VIRTCHNL_OP_GET_STATS;
902 args.in_args = (u8 *)&q_stats;
903 args.in_args_size = sizeof(q_stats);
904 args.out_buffer = cmd_result_buffer;
905 args.out_size = I40E_AQ_BUF_SZ;
907 err = i40evf_execute_vf_cmd(dev, &args);
909 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
912 pstats = (struct i40e_eth_stats *)args.out_buffer;
913 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
914 pstats->rx_broadcast;
915 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
917 stats->ierrors = pstats->rx_discards;
918 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
919 stats->ibytes = pstats->rx_bytes;
920 stats->obytes = pstats->tx_bytes;
926 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
928 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
929 struct i40e_virtchnl_vlan_filter_list *vlan_list;
930 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
933 struct vf_cmd_info args;
935 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
936 vlan_list->vsi_id = vf->vsi_res->vsi_id;
937 vlan_list->num_elements = 1;
938 vlan_list->vlan_id[0] = vlanid;
940 args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
941 args.in_args = (u8 *)&cmd_buffer;
942 args.in_args_size = sizeof(cmd_buffer);
943 args.out_buffer = cmd_result_buffer;
944 args.out_size = I40E_AQ_BUF_SZ;
945 err = i40evf_execute_vf_cmd(dev, &args);
947 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
953 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
955 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
956 struct i40e_virtchnl_vlan_filter_list *vlan_list;
957 uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
960 struct vf_cmd_info args;
962 vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
963 vlan_list->vsi_id = vf->vsi_res->vsi_id;
964 vlan_list->num_elements = 1;
965 vlan_list->vlan_id[0] = vlanid;
967 args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
968 args.in_args = (u8 *)&cmd_buffer;
969 args.in_args_size = sizeof(cmd_buffer);
970 args.out_buffer = cmd_result_buffer;
971 args.out_size = I40E_AQ_BUF_SZ;
972 err = i40evf_execute_vf_cmd(dev, &args);
974 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
980 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
983 struct vf_cmd_info args;
984 struct rte_eth_link *new_link;
986 args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
988 args.in_args_size = 0;
989 args.out_buffer = cmd_result_buffer;
990 args.out_size = I40E_AQ_BUF_SZ;
991 err = i40evf_execute_vf_cmd(dev, &args);
993 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
997 new_link = (struct rte_eth_link *)args.out_buffer;
998 (void)rte_memcpy(link, new_link, sizeof(*link));
1003 static const struct rte_pci_id pci_id_i40evf_map[] = {
1004 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
1005 #include "rte_pci_dev_ids.h"
1006 { .vendor_id = 0, /* sentinel */ },
1010 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1011 struct rte_eth_link *link)
1013 struct rte_eth_link *dst = &(dev->data->dev_link);
1014 struct rte_eth_link *src = link;
1016 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1017 *(uint64_t *)src) == 0)
1024 i40evf_reset_vf(struct i40e_hw *hw)
1028 if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1029 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1033 * After issuing vf reset command to pf, pf won't necessarily
1034 * reset vf, it depends on what state it exactly is. If it's not
1035 * initialized yet, it won't have vf reset since it's in a certain
1036 * state. If not, it will try to reset. Even vf is reset, pf will
1037 * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1038 * it to ACTIVE. In this duration, vf may not catch the moment that
1039 * COMPLETE is set. So, for vf, we'll try to wait a long time.
1043 for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1044 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1045 I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1046 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1047 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
1053 if (i >= MAX_RESET_WAIT_CNT) {
1054 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1062 i40evf_init_vf(struct rte_eth_dev *dev)
1065 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1066 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1068 vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1069 vf->dev_data = dev->data;
1070 err = i40evf_set_mac_type(hw);
1072 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1076 i40e_init_adminq_parameter(hw);
1077 err = i40e_init_adminq(hw);
1079 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1084 /* Reset VF and wait until it's complete */
1085 if (i40evf_reset_vf(hw)) {
1086 PMD_INIT_LOG(ERR, "reset NIC failed");
1090 /* VF reset, shutdown admin queue and initialize again */
1091 if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1092 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1096 i40e_init_adminq_parameter(hw);
1097 if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1098 PMD_INIT_LOG(ERR, "init_adminq failed");
1101 if (i40evf_check_api_version(dev) != 0) {
1102 PMD_INIT_LOG(ERR, "check_api version failed");
1105 bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1106 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1107 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1109 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1113 if (i40evf_get_vf_resource(dev) != 0) {
1114 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1118 /* got VF config message back from PF, now we can parse it */
1119 for (i = 0; i < vf->vf_res->num_vsis; i++) {
1120 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1121 vf->vsi_res = &vf->vf_res->vsi_res[i];
1125 PMD_INIT_LOG(ERR, "no LAN VSI found");
1129 vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1130 vf->vsi.type = vf->vsi_res->vsi_type;
1131 vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1133 /* check mac addr, if it's not valid, genrate one */
1134 if (I40E_SUCCESS != i40e_validate_mac_addr(\
1135 vf->vsi_res->default_mac_addr))
1136 eth_random_addr(vf->vsi_res->default_mac_addr);
1138 ether_addr_copy((struct ether_addr *)vf->vsi_res->default_mac_addr,
1139 (struct ether_addr *)hw->mac.addr);
1144 rte_free(vf->vf_res);
1146 i40e_shutdown_adminq(hw); /* ignore error */
1152 i40evf_uninit_vf(struct rte_eth_dev *dev)
1154 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1155 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1157 PMD_INIT_FUNC_TRACE();
1159 if (hw->adapter_stopped == 0)
1160 i40evf_dev_close(dev);
1161 rte_free(vf->vf_res);
1168 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1170 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1171 eth_dev->data->dev_private);
1173 PMD_INIT_FUNC_TRACE();
1175 /* assign ops func pointer */
1176 eth_dev->dev_ops = &i40evf_eth_dev_ops;
1177 eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1178 eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1181 * For secondary processes, we don't initialise any further as primary
1182 * has already done this work.
1184 if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1185 if (eth_dev->data->scattered_rx)
1186 eth_dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1190 hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1191 hw->device_id = eth_dev->pci_dev->id.device_id;
1192 hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1193 hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1194 hw->bus.device = eth_dev->pci_dev->addr.devid;
1195 hw->bus.func = eth_dev->pci_dev->addr.function;
1196 hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1197 hw->adapter_stopped = 0;
1199 if(i40evf_init_vf(eth_dev) != 0) {
1200 PMD_INIT_LOG(ERR, "Init vf failed");
1205 eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1207 if (eth_dev->data->mac_addrs == NULL) {
1208 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1209 "store MAC addresses", ETHER_ADDR_LEN);
1212 ether_addr_copy((struct ether_addr *)hw->mac.addr,
1213 (struct ether_addr *)eth_dev->data->mac_addrs);
1219 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1221 PMD_INIT_FUNC_TRACE();
1223 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1226 eth_dev->dev_ops = NULL;
1227 eth_dev->rx_pkt_burst = NULL;
1228 eth_dev->tx_pkt_burst = NULL;
1230 if (i40evf_uninit_vf(eth_dev) != 0) {
1231 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1235 rte_free(eth_dev->data->mac_addrs);
1236 eth_dev->data->mac_addrs = NULL;
1241 * virtual function driver struct
1243 static struct eth_driver rte_i40evf_pmd = {
1245 .name = "rte_i40evf_pmd",
1246 .id_table = pci_id_i40evf_map,
1247 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
1249 .eth_dev_init = i40evf_dev_init,
1250 .eth_dev_uninit = i40evf_dev_uninit,
1251 .dev_private_size = sizeof(struct i40e_vf),
1255 * VF Driver initialization routine.
1256 * Invoked one at EAL init time.
1257 * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1260 rte_i40evf_pmd_init(const char *name __rte_unused,
1261 const char *params __rte_unused)
1263 PMD_INIT_FUNC_TRACE();
1265 rte_eth_driver_register(&rte_i40evf_pmd);
1270 static struct rte_driver rte_i40evf_driver = {
1272 .init = rte_i40evf_pmd_init,
1275 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1278 i40evf_dev_configure(struct rte_eth_dev *dev)
1280 return i40evf_init_vlan(dev);
1284 i40evf_init_vlan(struct rte_eth_dev *dev)
1286 struct rte_eth_dev_data *data = dev->data;
1289 /* Apply vlan offload setting */
1290 i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1292 /* Apply pvid setting */
1293 ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1294 data->dev_conf.txmode.hw_vlan_insert_pvid);
1299 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1301 bool enable_vlan_strip = 0;
1302 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1303 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1305 /* Linux pf host doesn't support vlan offload yet */
1306 if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1307 /* Vlan stripping setting */
1308 if (mask & ETH_VLAN_STRIP_MASK) {
1309 /* Enable or disable VLAN stripping */
1310 if (dev_conf->rxmode.hw_vlan_strip)
1311 enable_vlan_strip = 1;
1313 enable_vlan_strip = 0;
1315 i40evf_config_vlan_offload(dev, enable_vlan_strip);
1321 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1323 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1324 struct i40e_vsi_vlan_pvid_info info;
1325 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1327 memset(&info, 0, sizeof(info));
1330 /* Linux pf host don't support vlan offload yet */
1331 if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1333 info.config.pvid = pvid;
1335 info.config.reject.tagged =
1336 dev_conf->txmode.hw_vlan_reject_tagged;
1337 info.config.reject.untagged =
1338 dev_conf->txmode.hw_vlan_reject_untagged;
1340 return i40evf_config_vlan_pvid(dev, &info);
1347 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1349 struct i40e_rx_queue *rxq;
1351 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1353 PMD_INIT_FUNC_TRACE();
1355 if (rx_queue_id < dev->data->nb_rx_queues) {
1356 rxq = dev->data->rx_queues[rx_queue_id];
1358 err = i40e_alloc_rx_queue_mbufs(rxq);
1360 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1366 /* Init the RX tail register. */
1367 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1368 I40EVF_WRITE_FLUSH(hw);
1370 /* Ready to switch the queue on */
1371 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1374 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1382 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1384 struct i40e_rx_queue *rxq;
1387 if (rx_queue_id < dev->data->nb_rx_queues) {
1388 rxq = dev->data->rx_queues[rx_queue_id];
1390 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1393 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1398 i40e_rx_queue_release_mbufs(rxq);
1399 i40e_reset_rx_queue(rxq);
1406 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1410 PMD_INIT_FUNC_TRACE();
1412 if (tx_queue_id < dev->data->nb_tx_queues) {
1414 /* Ready to switch the queue on */
1415 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1418 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1426 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1428 struct i40e_tx_queue *txq;
1431 if (tx_queue_id < dev->data->nb_tx_queues) {
1432 txq = dev->data->tx_queues[tx_queue_id];
1434 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1437 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1442 i40e_tx_queue_release_mbufs(txq);
1443 i40e_reset_tx_queue(txq);
1450 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1455 ret = i40evf_add_vlan(dev, vlan_id);
1457 ret = i40evf_del_vlan(dev,vlan_id);
1463 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1465 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1466 struct rte_eth_dev_data *dev_data = dev->data;
1467 struct rte_pktmbuf_pool_private *mbp_priv;
1468 uint16_t buf_size, len;
1470 rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1471 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1472 I40EVF_WRITE_FLUSH(hw);
1474 /* Calculate the maximum packet length allowed */
1475 mbp_priv = rte_mempool_get_priv(rxq->mp);
1476 buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1477 RTE_PKTMBUF_HEADROOM);
1478 rxq->hs_mode = i40e_header_split_none;
1479 rxq->rx_hdr_len = 0;
1480 rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1481 len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1482 rxq->max_pkt_len = RTE_MIN(len,
1483 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1486 * Check if the jumbo frame and maximum packet length are set correctly
1488 if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1489 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1490 rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1491 PMD_DRV_LOG(ERR, "maximum packet length must be "
1492 "larger than %u and smaller than %u, as jumbo "
1493 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1494 (uint32_t)I40E_FRAME_SIZE_MAX);
1495 return I40E_ERR_CONFIG;
1498 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1499 rxq->max_pkt_len > ETHER_MAX_LEN) {
1500 PMD_DRV_LOG(ERR, "maximum packet length must be "
1501 "larger than %u and smaller than %u, as jumbo "
1502 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1503 (uint32_t)ETHER_MAX_LEN);
1504 return I40E_ERR_CONFIG;
1508 if (dev_data->dev_conf.rxmode.enable_scatter ||
1509 (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1510 dev_data->scattered_rx = 1;
1511 dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1518 i40evf_rx_init(struct rte_eth_dev *dev)
1520 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1522 struct i40e_rx_queue **rxq =
1523 (struct i40e_rx_queue **)dev->data->rx_queues;
1525 i40evf_config_rss(vf);
1526 for (i = 0; i < dev->data->nb_rx_queues; i++) {
1527 if (i40evf_rxq_init(dev, rxq[i]) < 0)
1535 i40evf_tx_init(struct rte_eth_dev *dev)
1538 struct i40e_tx_queue **txq =
1539 (struct i40e_tx_queue **)dev->data->tx_queues;
1540 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1542 for (i = 0; i < dev->data->nb_tx_queues; i++)
1543 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1547 i40evf_enable_queues_intr(struct i40e_hw *hw)
1549 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1550 I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1551 I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1555 i40evf_disable_queues_intr(struct i40e_hw *hw)
1557 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1562 i40evf_dev_start(struct rte_eth_dev *dev)
1564 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1565 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1566 struct ether_addr mac_addr;
1568 PMD_INIT_FUNC_TRACE();
1570 hw->adapter_stopped = 0;
1572 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1573 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1574 dev->data->nb_tx_queues);
1576 if (i40evf_rx_init(dev) != 0){
1577 PMD_DRV_LOG(ERR, "failed to do RX init");
1581 i40evf_tx_init(dev);
1583 if (i40evf_configure_queues(dev) != 0) {
1584 PMD_DRV_LOG(ERR, "configure queues failed");
1587 if (i40evf_config_irq_map(dev)) {
1588 PMD_DRV_LOG(ERR, "config_irq_map failed");
1593 (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1594 sizeof(mac_addr.addr_bytes));
1595 if (i40evf_add_mac_addr(dev, &mac_addr)) {
1596 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1600 if (i40evf_start_queues(dev) != 0) {
1601 PMD_DRV_LOG(ERR, "enable queues failed");
1605 i40evf_enable_queues_intr(hw);
1609 i40evf_del_mac_addr(dev, &mac_addr);
1615 i40evf_dev_stop(struct rte_eth_dev *dev)
1617 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1619 PMD_INIT_FUNC_TRACE();
1621 i40evf_disable_queues_intr(hw);
1622 i40evf_stop_queues(dev);
1626 i40evf_dev_link_update(struct rte_eth_dev *dev,
1627 __rte_unused int wait_to_complete)
1629 struct rte_eth_link new_link;
1630 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1632 * DPDK pf host provide interfacet to acquire link status
1633 * while Linux driver does not
1635 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1636 i40evf_get_link_status(dev, &new_link);
1638 /* Always assume it's up, for Linux driver PF host */
1639 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1640 new_link.link_speed = ETH_LINK_SPEED_10000;
1641 new_link.link_status = 1;
1643 i40evf_dev_atomic_write_link_status(dev, &new_link);
1649 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1651 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1654 /* If enabled, just return */
1655 if (vf->promisc_unicast_enabled)
1658 ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1660 vf->promisc_unicast_enabled = TRUE;
1664 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1666 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1669 /* If disabled, just return */
1670 if (!vf->promisc_unicast_enabled)
1673 ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1675 vf->promisc_unicast_enabled = FALSE;
1679 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1681 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1684 /* If enabled, just return */
1685 if (vf->promisc_multicast_enabled)
1688 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1690 vf->promisc_multicast_enabled = TRUE;
1694 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1696 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1699 /* If enabled, just return */
1700 if (!vf->promisc_multicast_enabled)
1703 ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1705 vf->promisc_multicast_enabled = FALSE;
1709 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1711 struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1713 memset(dev_info, 0, sizeof(*dev_info));
1714 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1715 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1716 dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1717 dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1718 dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
1719 dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
1720 dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
1721 dev_info->rx_offload_capa =
1722 DEV_RX_OFFLOAD_VLAN_STRIP |
1723 DEV_RX_OFFLOAD_QINQ_STRIP |
1724 DEV_RX_OFFLOAD_IPV4_CKSUM |
1725 DEV_RX_OFFLOAD_UDP_CKSUM |
1726 DEV_RX_OFFLOAD_TCP_CKSUM;
1727 dev_info->tx_offload_capa =
1728 DEV_TX_OFFLOAD_VLAN_INSERT |
1729 DEV_TX_OFFLOAD_QINQ_INSERT |
1730 DEV_TX_OFFLOAD_IPV4_CKSUM |
1731 DEV_TX_OFFLOAD_UDP_CKSUM |
1732 DEV_TX_OFFLOAD_TCP_CKSUM |
1733 DEV_TX_OFFLOAD_SCTP_CKSUM;
1735 dev_info->default_rxconf = (struct rte_eth_rxconf) {
1737 .pthresh = I40E_DEFAULT_RX_PTHRESH,
1738 .hthresh = I40E_DEFAULT_RX_HTHRESH,
1739 .wthresh = I40E_DEFAULT_RX_WTHRESH,
1741 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
1745 dev_info->default_txconf = (struct rte_eth_txconf) {
1747 .pthresh = I40E_DEFAULT_TX_PTHRESH,
1748 .hthresh = I40E_DEFAULT_TX_HTHRESH,
1749 .wthresh = I40E_DEFAULT_TX_WTHRESH,
1751 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
1752 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
1753 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
1754 ETH_TXQ_FLAGS_NOOFFLOADS,
1759 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1761 if (i40evf_get_statics(dev, stats))
1762 PMD_DRV_LOG(ERR, "Get statics failed");
1766 i40evf_dev_close(struct rte_eth_dev *dev)
1768 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1770 i40evf_dev_stop(dev);
1771 hw->adapter_stopped = 1;
1772 i40evf_reset_vf(hw);
1773 i40e_shutdown_adminq(hw);
1777 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
1778 struct rte_eth_rss_reta_entry64 *reta_conf,
1781 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1784 uint16_t idx, shift;
1787 if (reta_size != ETH_RSS_RETA_SIZE_64) {
1788 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1789 "(%d) doesn't match the number of hardware can "
1790 "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1794 for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1795 idx = i / RTE_RETA_GROUP_SIZE;
1796 shift = i % RTE_RETA_GROUP_SIZE;
1797 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1801 if (mask == I40E_4_BIT_MASK)
1804 l = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1806 for (j = 0, lut = 0; j < I40E_4_BIT_WIDTH; j++) {
1807 if (mask & (0x1 << j))
1808 lut |= reta_conf[idx].reta[shift + j] <<
1811 lut |= l & (I40E_8_BIT_MASK << (CHAR_BIT * j));
1813 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1820 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
1821 struct rte_eth_rss_reta_entry64 *reta_conf,
1824 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1827 uint16_t idx, shift;
1830 if (reta_size != ETH_RSS_RETA_SIZE_64) {
1831 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1832 "(%d) doesn't match the number of hardware can "
1833 "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1837 for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1838 idx = i / RTE_RETA_GROUP_SIZE;
1839 shift = i % RTE_RETA_GROUP_SIZE;
1840 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1845 lut = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1846 for (j = 0; j < I40E_4_BIT_WIDTH; j++) {
1847 if (mask & (0x1 << j))
1848 reta_conf[idx].reta[shift + j] =
1849 ((lut >> (CHAR_BIT * j)) &
1858 i40evf_hw_rss_hash_set(struct i40e_hw *hw, struct rte_eth_rss_conf *rss_conf)
1861 uint8_t hash_key_len;
1862 uint64_t rss_hf, hena;
1864 hash_key = (uint32_t *)(rss_conf->rss_key);
1865 hash_key_len = rss_conf->rss_key_len;
1866 if (hash_key != NULL && hash_key_len >=
1867 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
1870 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1871 I40E_WRITE_REG(hw, I40E_VFQF_HKEY(i), hash_key[i]);
1874 rss_hf = rss_conf->rss_hf;
1875 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1876 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1877 hena &= ~I40E_RSS_HENA_ALL;
1878 hena |= i40e_config_hena(rss_hf);
1879 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1880 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1881 I40EVF_WRITE_FLUSH(hw);
1887 i40evf_disable_rss(struct i40e_vf *vf)
1889 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1892 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1893 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1894 hena &= ~I40E_RSS_HENA_ALL;
1895 I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1896 I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1897 I40EVF_WRITE_FLUSH(hw);
1901 i40evf_config_rss(struct i40e_vf *vf)
1903 struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1904 struct rte_eth_rss_conf rss_conf;
1905 uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
1907 if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
1908 i40evf_disable_rss(vf);
1909 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
1913 /* Fill out the look up table */
1914 for (i = 0, j = 0; i < nb_q; i++, j++) {
1915 if (j >= vf->num_queue_pairs)
1917 lut = (lut << 8) | j;
1919 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1922 rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
1923 if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
1924 i40evf_disable_rss(vf);
1925 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
1929 if (rss_conf.rss_key == NULL || rss_conf.rss_key_len < nb_q) {
1930 /* Calculate the default hash key */
1931 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1932 rss_key_default[i] = (uint32_t)rte_rand();
1933 rss_conf.rss_key = (uint8_t *)rss_key_default;
1934 rss_conf.rss_key_len = nb_q;
1937 return i40evf_hw_rss_hash_set(hw, &rss_conf);
1941 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
1942 struct rte_eth_rss_conf *rss_conf)
1944 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1945 uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
1948 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1949 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1950 if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
1951 if (rss_hf != 0) /* Enable RSS */
1957 if (rss_hf == 0) /* Disable RSS */
1960 return i40evf_hw_rss_hash_set(hw, rss_conf);
1964 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1965 struct rte_eth_rss_conf *rss_conf)
1967 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1968 uint32_t *hash_key = (uint32_t *)(rss_conf->rss_key);
1973 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1974 hash_key[i] = I40E_READ_REG(hw, I40E_VFQF_HKEY(i));
1975 rss_conf->rss_key_len = i * sizeof(uint32_t);
1977 hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1978 hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1979 rss_conf->rss_hf = i40e_parse_hena(hena);