drivers/net/i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "base/i40e_prototype.h"
  53 #include "base/i40e_adminq_cmd.h"
  54 #include "base/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58
  59 #define I40E_CFG_CRCSTRIP_DEFAULT 1
  60
  61 static int
  62 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  63                            struct i40e_virtchnl_queue_select *qsel,
  64                            bool on);
  65
  66 /**
  67  * Bind PF queues with VSI and VF.
  68  **/
  69 static int
  70 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  71 {
  72         int i;
  73         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  74         uint16_t vsi_id = vf->vsi->vsi_id;
  75         uint16_t vf_id  = vf->vf_idx;
  76         uint16_t nb_qps = vf->vsi->nb_qps;
  77         uint16_t qbase  = vf->vsi->base_queue;
  78         uint16_t q1, q2;
  79         uint32_t val;
  80
  81         /*
  82          * VF should use scatter range queues. So, it needn't
  83          * to set QBASE in this register.
  84          */
  85         i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vsi_id),
  86                           I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  87
  88         /* Set to enable VFLAN_QTABLE[] registers valid */
  89         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  90                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  91
  92         /* map PF queues to VF */
  93         for (i = 0; i < nb_qps; i++) {
  94                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  95                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  96         }
  97
  98         /* map PF queues to VSI */
  99         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
 100                 if (2 * i > nb_qps - 1)
 101                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 102                 else
 103                         q1 = qbase + 2 * i;
 104
 105                 if (2 * i + 1 > nb_qps - 1)
 106                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 107                 else
 108                         q2 = qbase + 2 * i + 1;
 109
 110                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 111                 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 112         }
 113         I40E_WRITE_FLUSH(hw);
 114
 115         return I40E_SUCCESS;
 116 }
 117
 118
 119 /**
 120  * Proceed VF reset operation.
 121  */
 122 int
 123 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 124 {
 125         uint32_t val, i;
 126         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 127         uint16_t vf_id, abs_vf_id, vf_msix_num;
 128         int ret;
 129         struct i40e_virtchnl_queue_select qsel;
 130
 131         if (vf == NULL)
 132                 return -EINVAL;
 133
 134         vf_id = vf->vf_idx;
 135         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 136
 137         /* Notify VF that we are in VFR progress */
 138         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_INPROGRESS);
 139
 140         /*
 141          * If require a SW VF reset, a VFLR interrupt will be generated,
 142          * this function will be called again. To avoid it,
 143          * disable interrupt first.
 144          */
 145         if (do_hw_reset) {
 146                 vf->state = I40E_VF_INRESET;
 147                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 148                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 149                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 150                 I40E_WRITE_FLUSH(hw);
 151         }
 152
 153 #define VFRESET_MAX_WAIT_CNT 100
 154         /* Wait until VF reset is done */
 155         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 156                 rte_delay_us(10);
 157                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 158                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 159                         break;
 160         }
 161
 162         if (i >= VFRESET_MAX_WAIT_CNT) {
 163                 PMD_DRV_LOG(ERR, "VF reset timeout");
 164                 return -ETIMEDOUT;
 165         }
 166
 167         /* This is not first time to do reset, do cleanup job first */
 168         if (vf->vsi) {
 169                 /* Disable queues */
 170                 memset(&qsel, 0, sizeof(qsel));
 171                 for (i = 0; i < vf->vsi->nb_qps; i++)
 172                         qsel.rx_queues |= 1 << i;
 173                 qsel.tx_queues = qsel.rx_queues;
 174                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 175                 if (ret != I40E_SUCCESS) {
 176                         PMD_DRV_LOG(ERR, "Disable VF queues failed");
 177                         return -EFAULT;
 178                 }
 179
 180                 /* Disable VF interrupt setting */
 181                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 182                 for (i = 0; i < vf_msix_num; i++) {
 183                         if (!i)
 184                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 185                         else
 186                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 187                                                         (vf_id)) + (i - 1));
 188                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 189                 }
 190                 I40E_WRITE_FLUSH(hw);
 191
 192                 /* remove VSI */
 193                 ret = i40e_vsi_release(vf->vsi);
 194                 if (ret != I40E_SUCCESS) {
 195                         PMD_DRV_LOG(ERR, "Release VSI failed");
 196                         return -EFAULT;
 197                 }
 198         }
 199
 200 #define I40E_VF_PCI_ADDR  0xAA
 201 #define I40E_VF_PEND_MASK 0x20
 202         /* Check the pending transactions of this VF */
 203         /* Use absolute VF id, refer to datasheet for details */
 204         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 205                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 206         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 207                 rte_delay_us(1);
 208                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 209                 if ((val & I40E_VF_PEND_MASK) == 0)
 210                         break;
 211         }
 212
 213         if (i >= VFRESET_MAX_WAIT_CNT) {
 214                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout");
 215                 return -ETIMEDOUT;
 216         }
 217
 218         /* Reset done, Set COMPLETE flag and clear reset bit */
 219         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_COMPLETED);
 220         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 221         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 222         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 223         vf->reset_cnt++;
 224         I40E_WRITE_FLUSH(hw);
 225
 226         /* Allocate resource again */
 227         vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 228                         vf->pf->main_vsi, vf->vf_idx);
 229         if (vf->vsi == NULL) {
 230                 PMD_DRV_LOG(ERR, "Add vsi failed");
 231                 return -EFAULT;
 232         }
 233
 234         ret = i40e_pf_vf_queues_mapping(vf);
 235         if (ret != I40E_SUCCESS) {
 236                 PMD_DRV_LOG(ERR, "queue mapping error");
 237                 i40e_vsi_release(vf->vsi);
 238                 return -EFAULT;
 239         }
 240
 241         return ret;
 242 }
 243
 244 static int
 245 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 246                             uint32_t opcode,
 247                             uint32_t retval,
 248                             uint8_t *msg,
 249                             uint16_t msglen)
 250 {
 251         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 252         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 253         int ret;
 254
 255         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 256                                                 msg, msglen, NULL);
 257         if (ret) {
 258                 PMD_INIT_LOG(ERR, "Fail to send message to VF, err %u",
 259                              hw->aq.asq_last_status);
 260         }
 261
 262         return ret;
 263 }
 264
 265 static void
 266 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf)
 267 {
 268         struct i40e_virtchnl_version_info info;
 269
 270         info.major = I40E_DPDK_VERSION_MAJOR;
 271         info.minor = I40E_DPDK_VERSION_MINOR;
 272         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 273                 I40E_SUCCESS, (uint8_t *)&info, sizeof(info));
 274 }
 275
 276 static int
 277 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 278 {
 279         i40e_pf_host_vf_reset(vf, 1);
 280
 281         /* No feedback will be sent to VF for VFLR */
 282         return I40E_SUCCESS;
 283 }
 284
 285 static int
 286 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf)
 287 {
 288         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 289         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 290         uint32_t len = 0;
 291         int ret = I40E_SUCCESS;
 292
 293         /* only have 1 VSI by default */
 294         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 295                                 I40E_DEFAULT_VF_VSI_NUM *
 296                 sizeof(struct i40e_virtchnl_vsi_resource);
 297
 298         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 299         if (vf_res == NULL) {
 300                 PMD_DRV_LOG(ERR, "failed to allocate mem");
 301                 ret = I40E_ERR_NO_MEMORY;
 302                 vf_res = NULL;
 303                 len = 0;
 304                 goto send_msg;
 305         }
 306
 307         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 308                                 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
 309         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 310         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 311         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 312
 313         /* Change below setting if PF host can support more VSIs for VF */
 314         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 315         /* As assume Vf only has single VSI now, always return 0 */
 316         vf_res->vsi_res[0].vsi_id = 0;
 317         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 318         ether_addr_copy(&vf->mac_addr,
 319                 (struct ether_addr *)vf_res->vsi_res[0].default_mac_addr);
 320
 321 send_msg:
 322         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 323                                         ret, (uint8_t *)vf_res, len);
 324         rte_free(vf_res);
 325
 326         return ret;
 327 }
 328
 329 static int
 330 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 331                             struct i40e_pf_vf *vf,
 332                             struct i40e_virtchnl_rxq_info *rxq,
 333                             uint8_t crcstrip)
 334 {
 335         int err = I40E_SUCCESS;
 336         struct i40e_hmc_obj_rxq rx_ctx;
 337         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 338
 339         /* Clear the context structure first */
 340         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 341         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 342         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 343         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 344         rx_ctx.qlen = rxq->ring_len;
 345 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 346         rx_ctx.dsize = 1;
 347 #endif
 348
 349         if (rxq->splithdr_enabled) {
 350                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 351                 rx_ctx.dtype = i40e_header_split_enabled;
 352         } else {
 353                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 354                 rx_ctx.dtype = i40e_header_split_none;
 355         }
 356         rx_ctx.rxmax = rxq->max_pkt_size;
 357         rx_ctx.tphrdesc_ena = 1;
 358         rx_ctx.tphwdesc_ena = 1;
 359         rx_ctx.tphdata_ena = 1;
 360         rx_ctx.tphhead_ena = 1;
 361         rx_ctx.lrxqthresh = 2;
 362         rx_ctx.crcstrip = crcstrip;
 363         rx_ctx.l2tsel = 1;
 364         rx_ctx.prefena = 1;
 365
 366         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 367         if (err != I40E_SUCCESS)
 368                 return err;
 369         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 370
 371         return err;
 372 }
 373
 374 static int
 375 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 376                             struct i40e_pf_vf *vf,
 377                             struct i40e_virtchnl_txq_info *txq)
 378 {
 379         int err = I40E_SUCCESS;
 380         struct i40e_hmc_obj_txq tx_ctx;
 381         uint32_t qtx_ctl;
 382         uint16_t abs_queue_id = vf->vsi->base_queue + txq->queue_id;
 383
 384
 385         /* clear the context structure first */
 386         memset(&tx_ctx, 0, sizeof(tx_ctx));
 387         tx_ctx.new_context = 1;
 388         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 389         tx_ctx.qlen = txq->ring_len;
 390         tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]);
 391         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 392         if (err != I40E_SUCCESS)
 393                 return err;
 394
 395         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 396         if (err != I40E_SUCCESS)
 397                 return err;
 398
 399         /* bind queue with VF function, since TX/QX will appear in pair,
 400          * so only has QTX_CTL to set.
 401          */
 402         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 403                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 404                                 I40E_QTX_CTL_PF_INDX_MASK) |
 405                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 406                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 407                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 408         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 409         I40E_WRITE_FLUSH(hw);
 410
 411         return I40E_SUCCESS;
 412 }
 413
 414 static int
 415 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 416                                            uint8_t *msg,
 417                                            uint16_t msglen)
 418 {
 419         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 420         struct i40e_vsi *vsi = vf->vsi;
 421         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci =
 422                 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 423         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 424         int i, ret = I40E_SUCCESS;
 425
 426         if (!msg || vc_vqci->num_queue_pairs > vsi->nb_qps ||
 427                 vc_vqci->num_queue_pairs > I40E_MAX_VSI_QP ||
 428                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci,
 429                                         vc_vqci->num_queue_pairs)) {
 430                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong\n");
 431                 ret = I40E_ERR_PARAM;
 432                 goto send_msg;
 433         }
 434
 435         vc_qpi = vc_vqci->qpair;
 436         for (i = 0; i < vc_vqci->num_queue_pairs; i++) {
 437                 if (vc_qpi[i].rxq.queue_id > vsi->nb_qps - 1 ||
 438                         vc_qpi[i].txq.queue_id > vsi->nb_qps - 1) {
 439                         ret = I40E_ERR_PARAM;
 440                         goto send_msg;
 441                 }
 442
 443                 /*
 444                  * Apply VF RX queue setting to HMC.
 445                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 446                  * then the extra information of
 447                  * 'struct i40e_virtchnl_queue_pair_extra_info' is needed,
 448                  * otherwise set the last parameter to NULL.
 449                  */
 450                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpi[i].rxq,
 451                         I40E_CFG_CRCSTRIP_DEFAULT) != I40E_SUCCESS) {
 452                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 453                         ret = I40E_ERR_PARAM;
 454                         goto send_msg;
 455                 }
 456
 457                 /* Apply VF TX queue setting to HMC */
 458                 if (i40e_pf_host_hmc_config_txq(hw, vf,
 459                         &vc_qpi[i].txq) != I40E_SUCCESS) {
 460                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 461                         ret = I40E_ERR_PARAM;
 462                         goto send_msg;
 463                 }
 464         }
 465
 466 send_msg:
 467         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 468                                                         ret, NULL, 0);
 469
 470         return ret;
 471 }
 472
 473 static int
 474 i40e_pf_host_process_cmd_config_vsi_queues_ext(struct i40e_pf_vf *vf,
 475                                                uint8_t *msg,
 476                                                uint16_t msglen)
 477 {
 478         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 479         struct i40e_vsi *vsi = vf->vsi;
 480         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei =
 481                 (struct i40e_virtchnl_vsi_queue_config_ext_info *)msg;
 482         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 483         int i, ret = I40E_SUCCESS;
 484
 485         if (!msg || vc_vqcei->num_queue_pairs > vsi->nb_qps ||
 486                 vc_vqcei->num_queue_pairs > I40E_MAX_VSI_QP ||
 487                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei,
 488                                         vc_vqcei->num_queue_pairs)) {
 489                 PMD_DRV_LOG(ERR, "vsi_queue_config_ext_info argument wrong\n");
 490                 ret = I40E_ERR_PARAM;
 491                 goto send_msg;
 492         }
 493
 494         vc_qpei = vc_vqcei->qpair;
 495         for (i = 0; i < vc_vqcei->num_queue_pairs; i++) {
 496                 if (vc_qpei[i].rxq.queue_id > vsi->nb_qps - 1 ||
 497                         vc_qpei[i].txq.queue_id > vsi->nb_qps - 1) {
 498                         ret = I40E_ERR_PARAM;
 499                         goto send_msg;
 500                 }
 501                 /*
 502                  * Apply VF RX queue setting to HMC.
 503                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 504                  * then the extra information of
 505                  * 'struct i40e_virtchnl_queue_pair_ext_info' is needed,
 506                  * otherwise set the last parameter to NULL.
 507                  */
 508                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpei[i].rxq,
 509                         vc_qpei[i].rxq_ext.crcstrip) != I40E_SUCCESS) {
 510                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 511                         ret = I40E_ERR_PARAM;
 512                         goto send_msg;
 513                 }
 514
 515                 /* Apply VF TX queue setting to HMC */
 516                 if (i40e_pf_host_hmc_config_txq(hw, vf, &vc_qpei[i].txq) !=
 517                                                         I40E_SUCCESS) {
 518                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 519                         ret = I40E_ERR_PARAM;
 520                         goto send_msg;
 521                 }
 522         }
 523
 524 send_msg:
 525         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 526                                                                 ret, NULL, 0);
 527
 528         return ret;
 529 }
 530
 531 static int
 532 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 533                                         uint8_t *msg, uint16_t msglen)
 534 {
 535         int ret = I40E_SUCCESS;
 536         struct i40e_virtchnl_irq_map_info *irqmap =
 537             (struct i40e_virtchnl_irq_map_info *)msg;
 538
 539         if (msg == NULL || msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 540                 PMD_DRV_LOG(ERR, "buffer too short");
 541                 ret = I40E_ERR_PARAM;
 542                 goto send_msg;
 543         }
 544
 545         /* Assume VF only have 1 vector to bind all queues */
 546         if (irqmap->num_vectors != 1) {
 547                 PMD_DRV_LOG(ERR, "DKDK host only support 1 vector");
 548                 ret = I40E_ERR_PARAM;
 549                 goto send_msg;
 550         }
 551
 552         /* This MSIX intr store the intr in VF range */
 553         vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 554         vf->vsi->nb_msix = irqmap->num_vectors;
 555         vf->vsi->nb_used_qps = vf->vsi->nb_qps;
 556
 557         /* Don't care how the TX/RX queue mapping with this vector.
 558          * Link all VF RX queues together. Only did mapping work.
 559          * VF can disable/enable the intr by itself.
 560          */
 561         i40e_vsi_queues_bind_intr(vf->vsi);
 562 send_msg:
 563         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 564                                                         ret, NULL, 0);
 565
 566         return ret;
 567 }
 568
 569 static int
 570 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 571                            struct i40e_virtchnl_queue_select *qsel,
 572                            bool on)
 573 {
 574         int ret = I40E_SUCCESS;
 575         int i;
 576         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 577         uint16_t baseq = vf->vsi->base_queue;
 578
 579         if (qsel->rx_queues + qsel->tx_queues == 0)
 580                 return I40E_ERR_PARAM;
 581
 582         /* always enable RX first and disable last */
 583         /* Enable RX if it's enable */
 584         if (on) {
 585                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 586                         if (qsel->rx_queues & (1 << i)) {
 587                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 588                                 if (ret != I40E_SUCCESS)
 589                                         return ret;
 590                         }
 591         }
 592
 593         /* Enable/Disable TX */
 594         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 595                 if (qsel->tx_queues & (1 << i)) {
 596                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 597                         if (ret != I40E_SUCCESS)
 598                                 return ret;
 599                 }
 600
 601         /* disable RX last if it's disable */
 602         if (!on) {
 603                 /* disable RX */
 604                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 605                         if (qsel->rx_queues & (1 << i)) {
 606                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 607                                 if (ret != I40E_SUCCESS)
 608                                         return ret;
 609                         }
 610         }
 611
 612         return ret;
 613 }
 614
 615 static int
 616 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 617                                        uint8_t *msg,
 618                                        uint16_t msglen)
 619 {
 620         int ret = I40E_SUCCESS;
 621         struct i40e_virtchnl_queue_select *q_sel =
 622                 (struct i40e_virtchnl_queue_select *)msg;
 623
 624         if (msg == NULL || msglen != sizeof(*q_sel)) {
 625                 ret = I40E_ERR_PARAM;
 626                 goto send_msg;
 627         }
 628         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 629
 630 send_msg:
 631         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 632                                                         ret, NULL, 0);
 633
 634         return ret;
 635 }
 636
 637 static int
 638 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 639                                         uint8_t *msg,
 640                                         uint16_t msglen)
 641 {
 642         int ret = I40E_SUCCESS;
 643         struct i40e_virtchnl_queue_select *q_sel =
 644                 (struct i40e_virtchnl_queue_select *)msg;
 645
 646         if (msg == NULL || msglen != sizeof(*q_sel)) {
 647                 ret = I40E_ERR_PARAM;
 648                 goto send_msg;
 649         }
 650         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 651
 652 send_msg:
 653         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 654                                                         ret, NULL, 0);
 655
 656         return ret;
 657 }
 658
 659
 660 static int
 661 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 662                                            uint8_t *msg,
 663                                            uint16_t msglen)
 664 {
 665         int ret = I40E_SUCCESS;
 666         struct i40e_virtchnl_ether_addr_list *addr_list =
 667                         (struct i40e_virtchnl_ether_addr_list *)msg;
 668         struct i40e_mac_filter_info filter;
 669         int i;
 670         struct ether_addr *mac;
 671
 672         memset(&filter, 0 , sizeof(struct i40e_mac_filter_info));
 673
 674         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 675                 PMD_DRV_LOG(ERR, "add_ether_address argument too short");
 676                 ret = I40E_ERR_PARAM;
 677                 goto send_msg;
 678         }
 679
 680         for (i = 0; i < addr_list->num_elements; i++) {
 681                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 682                 (void)rte_memcpy(&filter.mac_addr, mac, ETHER_ADDR_LEN);
 683                 filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
 684                 if(!is_valid_assigned_ether_addr(mac) ||
 685                         i40e_vsi_add_mac(vf->vsi, &filter)) {
 686                         ret = I40E_ERR_INVALID_MAC_ADDR;
 687                         goto send_msg;
 688                 }
 689         }
 690
 691 send_msg:
 692         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 693                                                         ret, NULL, 0);
 694
 695         return ret;
 696 }
 697
 698 static int
 699 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 700                                            uint8_t *msg,
 701                                            uint16_t msglen)
 702 {
 703         int ret = I40E_SUCCESS;
 704         struct i40e_virtchnl_ether_addr_list *addr_list =
 705                 (struct i40e_virtchnl_ether_addr_list *)msg;
 706         int i;
 707         struct ether_addr *mac;
 708
 709         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 710                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short");
 711                 ret = I40E_ERR_PARAM;
 712                 goto send_msg;
 713         }
 714
 715         for (i = 0; i < addr_list->num_elements; i++) {
 716                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 717                 if(!is_valid_assigned_ether_addr(mac) ||
 718                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 719                         ret = I40E_ERR_INVALID_MAC_ADDR;
 720                         goto send_msg;
 721                 }
 722         }
 723
 724 send_msg:
 725         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 726                                                         ret, NULL, 0);
 727
 728         return ret;
 729 }
 730
 731 static int
 732 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 733                                 uint8_t *msg, uint16_t msglen)
 734 {
 735         int ret = I40E_SUCCESS;
 736         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 737                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 738         int i;
 739         uint16_t *vid;
 740
 741         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 742                 PMD_DRV_LOG(ERR, "add_vlan argument too short");
 743                 ret = I40E_ERR_PARAM;
 744                 goto send_msg;
 745         }
 746
 747         vid = vlan_filter_list->vlan_id;
 748
 749         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 750                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 751                 if(ret != I40E_SUCCESS)
 752                         goto send_msg;
 753         }
 754
 755 send_msg:
 756         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
 757                                                 ret, NULL, 0);
 758
 759         return ret;
 760 }
 761
 762 static int
 763 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 764                                   uint8_t *msg,
 765                                   uint16_t msglen)
 766 {
 767         int ret = I40E_SUCCESS;
 768         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 769                         (struct i40e_virtchnl_vlan_filter_list *)msg;
 770         int i;
 771         uint16_t *vid;
 772
 773         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 774                 PMD_DRV_LOG(ERR, "delete_vlan argument too short");
 775                 ret = I40E_ERR_PARAM;
 776                 goto send_msg;
 777         }
 778
 779         vid = vlan_filter_list->vlan_id;
 780         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 781                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
 782                 if(ret != I40E_SUCCESS)
 783                         goto send_msg;
 784         }
 785
 786 send_msg:
 787         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
 788                                                 ret, NULL, 0);
 789
 790         return ret;
 791 }
 792
 793 static int
 794 i40e_pf_host_process_cmd_config_promisc_mode(
 795                                         struct i40e_pf_vf *vf,
 796                                         uint8_t *msg,
 797                                         uint16_t msglen)
 798 {
 799         int ret = I40E_SUCCESS;
 800         struct i40e_virtchnl_promisc_info *promisc =
 801                                 (struct i40e_virtchnl_promisc_info *)msg;
 802         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 803         bool unicast = FALSE, multicast = FALSE;
 804
 805         if (msg == NULL || msglen != sizeof(*promisc)) {
 806                 ret = I40E_ERR_PARAM;
 807                 goto send_msg;
 808         }
 809
 810         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
 811                 unicast = TRUE;
 812         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
 813                         vf->vsi->seid, unicast, NULL);
 814         if (ret != I40E_SUCCESS)
 815                 goto send_msg;
 816
 817         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
 818                 multicast = TRUE;
 819         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
 820                                                 multicast, NULL);
 821
 822 send_msg:
 823         i40e_pf_host_send_msg_to_vf(vf,
 824                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
 825
 826         return ret;
 827 }
 828
 829 static int
 830 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf)
 831 {
 832         i40e_update_vsi_stats(vf->vsi);
 833
 834         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
 835                 I40E_SUCCESS, (uint8_t *)&vf->vsi->eth_stats,
 836                                 sizeof(vf->vsi->eth_stats));
 837
 838         return I40E_SUCCESS;
 839 }
 840
 841 static void
 842 i40e_pf_host_process_cmd_get_link_status(struct i40e_pf_vf *vf)
 843 {
 844         struct rte_eth_dev *dev = I40E_VSI_TO_ETH_DEV(vf->pf->main_vsi);
 845
 846         /* Update link status first to acquire latest link change */
 847         i40e_dev_link_update(dev, 1);
 848         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_LINK_STAT,
 849                 I40E_SUCCESS, (uint8_t *)&dev->data->dev_link,
 850                                 sizeof(struct rte_eth_link));
 851 }
 852
 853 static int
 854 i40e_pf_host_process_cmd_cfg_vlan_offload(
 855                                         struct i40e_pf_vf *vf,
 856                                         uint8_t *msg,
 857                                         uint16_t msglen)
 858 {
 859         int ret = I40E_SUCCESS;
 860         struct i40e_virtchnl_vlan_offload_info *offload =
 861                         (struct i40e_virtchnl_vlan_offload_info *)msg;
 862
 863         if (msg == NULL || msglen != sizeof(*offload)) {
 864                 ret = I40E_ERR_PARAM;
 865                 goto send_msg;
 866         }
 867
 868         ret = i40e_vsi_config_vlan_stripping(vf->vsi,
 869                                                 !!offload->enable_vlan_strip);
 870         if (ret != 0)
 871                 PMD_DRV_LOG(ERR, "Failed to configure vlan stripping");
 872
 873 send_msg:
 874         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
 875                                         ret, NULL, 0);
 876
 877         return ret;
 878 }
 879
 880 static int
 881 i40e_pf_host_process_cmd_cfg_pvid(struct i40e_pf_vf *vf,
 882                                         uint8_t *msg,
 883                                         uint16_t msglen)
 884 {
 885         int ret = I40E_SUCCESS;
 886         struct i40e_virtchnl_pvid_info  *tpid_info =
 887                         (struct i40e_virtchnl_pvid_info *)msg;
 888
 889         if (msg == NULL || msglen != sizeof(*tpid_info)) {
 890                 ret = I40E_ERR_PARAM;
 891                 goto send_msg;
 892         }
 893
 894         ret = i40e_vsi_vlan_pvid_set(vf->vsi, &tpid_info->info);
 895
 896 send_msg:
 897         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
 898                                         ret, NULL, 0);
 899
 900         return ret;
 901 }
 902
 903 void
 904 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
 905                            uint16_t abs_vf_id, uint32_t opcode,
 906                            __rte_unused uint32_t retval,
 907                            uint8_t *msg,
 908                            uint16_t msglen)
 909 {
 910         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 911         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 912         struct i40e_pf_vf *vf;
 913         /* AdminQ will pass absolute VF id, transfer to internal vf id */
 914         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
 915
 916         if (!dev || vf_id > pf->vf_num - 1 || !pf->vfs) {
 917                 PMD_DRV_LOG(ERR, "invalid argument");
 918                 return;
 919         }
 920
 921         vf = &pf->vfs[vf_id];
 922         if (!vf->vsi) {
 923                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found");
 924                 i40e_pf_host_send_msg_to_vf(vf, opcode,
 925                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
 926                 return;
 927         }
 928
 929         switch (opcode) {
 930         case I40E_VIRTCHNL_OP_VERSION :
 931                 PMD_DRV_LOG(INFO, "OP_VERSION received");
 932                 i40e_pf_host_process_cmd_version(vf);
 933                 break;
 934         case I40E_VIRTCHNL_OP_RESET_VF :
 935                 PMD_DRV_LOG(INFO, "OP_RESET_VF received");
 936                 i40e_pf_host_process_cmd_reset_vf(vf);
 937                 break;
 938         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
 939                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received");
 940                 i40e_pf_host_process_cmd_get_vf_resource(vf);
 941                 break;
 942         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
 943                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received");
 944                 i40e_pf_host_process_cmd_config_vsi_queues(vf, msg, msglen);
 945                 break;
 946         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT:
 947                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES_EXT received");
 948                 i40e_pf_host_process_cmd_config_vsi_queues_ext(vf, msg,
 949                                                                 msglen);
 950                 break;
 951         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
 952                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received");
 953                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen);
 954                 break;
 955         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
 956                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received");
 957                 i40e_pf_host_process_cmd_enable_queues(vf, msg, msglen);
 958                 break;
 959         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
 960                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received");
 961                 i40e_pf_host_process_cmd_disable_queues(vf, msg, msglen);
 962                 break;
 963         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
 964                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received");
 965                 i40e_pf_host_process_cmd_add_ether_address(vf, msg, msglen);
 966                 break;
 967         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
 968                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received");
 969                 i40e_pf_host_process_cmd_del_ether_address(vf, msg, msglen);
 970                 break;
 971         case I40E_VIRTCHNL_OP_ADD_VLAN:
 972                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received");
 973                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen);
 974                 break;
 975         case I40E_VIRTCHNL_OP_DEL_VLAN:
 976                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received");
 977                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen);
 978                 break;
 979         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
 980                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received");
 981                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg, msglen);
 982                 break;
 983         case I40E_VIRTCHNL_OP_GET_STATS:
 984                 PMD_DRV_LOG(INFO, "OP_GET_STATS received");
 985                 i40e_pf_host_process_cmd_get_stats(vf);
 986                 break;
 987         case I40E_VIRTCHNL_OP_GET_LINK_STAT:
 988                 PMD_DRV_LOG(INFO, "OP_GET_LINK_STAT received");
 989                 i40e_pf_host_process_cmd_get_link_status(vf);
 990                 break;
 991         case I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD:
 992                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_OFFLOAD received");
 993                 i40e_pf_host_process_cmd_cfg_vlan_offload(vf, msg, msglen);
 994                 break;
 995         case I40E_VIRTCHNL_OP_CFG_VLAN_PVID:
 996                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_PVID received");
 997                 i40e_pf_host_process_cmd_cfg_pvid(vf, msg, msglen);
 998                 break;
 999          /* Don't add command supported below, which will
1000          *  return an error code.
1001          */
1002         case I40E_VIRTCHNL_OP_FCOE:
1003                 PMD_DRV_LOG(ERR, "OP_FCOE received, not supported");
1004         default:
1005                 PMD_DRV_LOG(ERR, "%u received, not supported", opcode);
1006                 i40e_pf_host_send_msg_to_vf(vf, opcode, I40E_ERR_PARAM,
1007                                                                 NULL, 0);
1008                 break;
1009         }
1010 }
1011
1012 int
1013 i40e_pf_host_init(struct rte_eth_dev *dev)
1014 {
1015         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1016         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1017         int ret, i;
1018         uint32_t val;
1019
1020         PMD_INIT_FUNC_TRACE();
1021
1022         /**
1023          * return if SRIOV not enabled, VF number not configured or
1024          * no queue assigned.
1025          */
1026         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
1027                 return I40E_SUCCESS;
1028
1029         /* Allocate memory to store VF structure */
1030         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
1031         if(pf->vfs == NULL)
1032                 return -ENOMEM;
1033
1034         /* Disable irq0 for VFR event */
1035         i40e_pf_disable_irq0(hw);
1036
1037         /* Disable VF link status interrupt */
1038         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1039         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1040         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1041         I40E_WRITE_FLUSH(hw);
1042
1043         for (i = 0; i < pf->vf_num; i++) {
1044                 pf->vfs[i].pf = pf;
1045                 pf->vfs[i].state = I40E_VF_INACTIVE;
1046                 pf->vfs[i].vf_idx = i;
1047                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
1048                 if (ret != I40E_SUCCESS)
1049                         goto fail;
1050                 eth_random_addr(pf->vfs[i].mac_addr.addr_bytes);
1051         }
1052
1053         /* restore irq0 */
1054         i40e_pf_enable_irq0(hw);
1055
1056         return I40E_SUCCESS;
1057
1058 fail:
1059         rte_free(pf->vfs);
1060         i40e_pf_enable_irq0(hw);
1061
1062         return ret;
1063 }
1064
1065 int
1066 i40e_pf_host_uninit(struct rte_eth_dev *dev)
1067 {
1068         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1069         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1070         uint32_t val;
1071
1072         PMD_INIT_FUNC_TRACE();
1073
1074         /**
1075          * return if SRIOV not enabled, VF number not configured or
1076          * no queue assigned.
1077          */
1078         if ((!hw->func_caps.sr_iov_1_1) ||
1079                 (pf->vf_num == 0) ||
1080                 (pf->vf_nb_qps == 0))
1081                 return I40E_SUCCESS;
1082
1083         /* free memory to store VF structure */
1084         rte_free(pf->vfs);
1085         pf->vfs = NULL;
1086
1087         /* Disable irq0 for VFR event */
1088         i40e_pf_disable_irq0(hw);
1089
1090         /* Disable VF link status interrupt */
1091         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1092         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1093         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1094         I40E_WRITE_FLUSH(hw);
1095
1096         return I40E_SUCCESS;
1097 }