drivers/net/i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "base/i40e_prototype.h"
  53 #include "base/i40e_adminq_cmd.h"
  54 #include "base/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58 #include "rte_pmd_i40e.h"
  59
  60 #define I40E_CFG_CRCSTRIP_DEFAULT 1
  61
  62 static int
  63 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  64                            struct i40e_virtchnl_queue_select *qsel,
  65                            bool on);
  66
  67 /**
  68  * Bind PF queues with VSI and VF.
  69  **/
  70 static int
  71 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  72 {
  73         int i;
  74         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  75         uint16_t vsi_id = vf->vsi->vsi_id;
  76         uint16_t vf_id  = vf->vf_idx;
  77         uint16_t nb_qps = vf->vsi->nb_qps;
  78         uint16_t qbase  = vf->vsi->base_queue;
  79         uint16_t q1, q2;
  80         uint32_t val;
  81
  82         /*
  83          * VF should use scatter range queues. So, it needn't
  84          * to set QBASE in this register.
  85          */
  86         i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vsi_id),
  87                           I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  88
  89         /* Set to enable VFLAN_QTABLE[] registers valid */
  90         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  91                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  92
  93         /* map PF queues to VF */
  94         for (i = 0; i < nb_qps; i++) {
  95                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  96                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  97         }
  98
  99         /* map PF queues to VSI */
 100         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
 101                 if (2 * i > nb_qps - 1)
 102                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 103                 else
 104                         q1 = qbase + 2 * i;
 105
 106                 if (2 * i + 1 > nb_qps - 1)
 107                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 108                 else
 109                         q2 = qbase + 2 * i + 1;
 110
 111                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 112                 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 113         }
 114         I40E_WRITE_FLUSH(hw);
 115
 116         return I40E_SUCCESS;
 117 }
 118
 119
 120 /**
 121  * Proceed VF reset operation.
 122  */
 123 int
 124 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 125 {
 126         uint32_t val, i;
 127         struct i40e_hw *hw;
 128         struct i40e_pf *pf;
 129         uint16_t vf_id, abs_vf_id, vf_msix_num;
 130         int ret;
 131         struct i40e_virtchnl_queue_select qsel;
 132
 133         if (vf == NULL)
 134                 return -EINVAL;
 135
 136         pf = vf->pf;
 137         hw = I40E_PF_TO_HW(vf->pf);
 138         vf_id = vf->vf_idx;
 139         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 140
 141         /* Notify VF that we are in VFR progress */
 142         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_INPROGRESS);
 143
 144         /*
 145          * If require a SW VF reset, a VFLR interrupt will be generated,
 146          * this function will be called again. To avoid it,
 147          * disable interrupt first.
 148          */
 149         if (do_hw_reset) {
 150                 vf->state = I40E_VF_INRESET;
 151                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 152                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 153                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 154                 I40E_WRITE_FLUSH(hw);
 155         }
 156
 157 #define VFRESET_MAX_WAIT_CNT 100
 158         /* Wait until VF reset is done */
 159         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 160                 rte_delay_us(10);
 161                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 162                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 163                         break;
 164         }
 165
 166         if (i >= VFRESET_MAX_WAIT_CNT) {
 167                 PMD_DRV_LOG(ERR, "VF reset timeout");
 168                 return -ETIMEDOUT;
 169         }
 170
 171         /* This is not first time to do reset, do cleanup job first */
 172         if (vf->vsi) {
 173                 /* Disable queues */
 174                 memset(&qsel, 0, sizeof(qsel));
 175                 for (i = 0; i < vf->vsi->nb_qps; i++)
 176                         qsel.rx_queues |= 1 << i;
 177                 qsel.tx_queues = qsel.rx_queues;
 178                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 179                 if (ret != I40E_SUCCESS) {
 180                         PMD_DRV_LOG(ERR, "Disable VF queues failed");
 181                         return -EFAULT;
 182                 }
 183
 184                 /* Disable VF interrupt setting */
 185                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 186                 for (i = 0; i < vf_msix_num; i++) {
 187                         if (!i)
 188                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 189                         else
 190                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 191                                                         (vf_id)) + (i - 1));
 192                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 193                 }
 194                 I40E_WRITE_FLUSH(hw);
 195
 196                 /* remove VSI */
 197                 ret = i40e_vsi_release(vf->vsi);
 198                 if (ret != I40E_SUCCESS) {
 199                         PMD_DRV_LOG(ERR, "Release VSI failed");
 200                         return -EFAULT;
 201                 }
 202         }
 203
 204 #define I40E_VF_PCI_ADDR  0xAA
 205 #define I40E_VF_PEND_MASK 0x20
 206         /* Check the pending transactions of this VF */
 207         /* Use absolute VF id, refer to datasheet for details */
 208         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 209                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 210         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 211                 rte_delay_us(1);
 212                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 213                 if ((val & I40E_VF_PEND_MASK) == 0)
 214                         break;
 215         }
 216
 217         if (i >= VFRESET_MAX_WAIT_CNT) {
 218                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout");
 219                 return -ETIMEDOUT;
 220         }
 221
 222         /* Reset done, Set COMPLETE flag and clear reset bit */
 223         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_PF_VFR_COMPLETED);
 224         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 225         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 226         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 227         vf->reset_cnt++;
 228         I40E_WRITE_FLUSH(hw);
 229
 230         /* Allocate resource again */
 231         if (pf->floating_veb && pf->floating_veb_list[vf_id]) {
 232                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 233                                          NULL, vf->vf_idx);
 234         } else {
 235                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 236                                          vf->pf->main_vsi, vf->vf_idx);
 237         }
 238
 239         if (vf->vsi == NULL) {
 240                 PMD_DRV_LOG(ERR, "Add vsi failed");
 241                 return -EFAULT;
 242         }
 243
 244         ret = i40e_pf_vf_queues_mapping(vf);
 245         if (ret != I40E_SUCCESS) {
 246                 PMD_DRV_LOG(ERR, "queue mapping error");
 247                 i40e_vsi_release(vf->vsi);
 248                 return -EFAULT;
 249         }
 250
 251         return ret;
 252 }
 253
 254 int
 255 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 256                             uint32_t opcode,
 257                             uint32_t retval,
 258                             uint8_t *msg,
 259                             uint16_t msglen)
 260 {
 261         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 262         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 263         int ret;
 264
 265         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 266                                                 msg, msglen, NULL);
 267         if (ret) {
 268                 PMD_INIT_LOG(ERR, "Fail to send message to VF, err %u",
 269                              hw->aq.asq_last_status);
 270         }
 271
 272         return ret;
 273 }
 274
 275 static void
 276 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf, bool b_op)
 277 {
 278         struct i40e_virtchnl_version_info info;
 279
 280         info.major = I40E_DPDK_VERSION_MAJOR;
 281         info.minor = I40E_DPDK_VERSION_MINOR;
 282
 283         if (b_op)
 284                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 285                                             I40E_SUCCESS,
 286                                             (uint8_t *)&info,
 287                                             sizeof(info));
 288         else
 289                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 290                                             I40E_NOT_SUPPORTED,
 291                                             (uint8_t *)&info,
 292                                             sizeof(info));
 293 }
 294
 295 static int
 296 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 297 {
 298         i40e_pf_host_vf_reset(vf, 1);
 299
 300         /* No feedback will be sent to VF for VFLR */
 301         return I40E_SUCCESS;
 302 }
 303
 304 static int
 305 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf, bool b_op)
 306 {
 307         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 308         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 309         uint32_t len = 0;
 310         int ret = I40E_SUCCESS;
 311
 312         if (!b_op) {
 313                 i40e_pf_host_send_msg_to_vf(vf,
 314                                             I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 315                                             I40E_NOT_SUPPORTED, NULL, 0);
 316                 return ret;
 317         }
 318
 319         /* only have 1 VSI by default */
 320         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 321                                 I40E_DEFAULT_VF_VSI_NUM *
 322                 sizeof(struct i40e_virtchnl_vsi_resource);
 323
 324         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 325         if (vf_res == NULL) {
 326                 PMD_DRV_LOG(ERR, "failed to allocate mem");
 327                 ret = I40E_ERR_NO_MEMORY;
 328                 vf_res = NULL;
 329                 len = 0;
 330                 goto send_msg;
 331         }
 332
 333         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 334                                 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
 335         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 336         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 337         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 338
 339         /* Change below setting if PF host can support more VSIs for VF */
 340         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 341         /* As assume Vf only has single VSI now, always return 0 */
 342         vf_res->vsi_res[0].vsi_id = 0;
 343         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 344         ether_addr_copy(&vf->mac_addr,
 345                 (struct ether_addr *)vf_res->vsi_res[0].default_mac_addr);
 346
 347 send_msg:
 348         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 349                                         ret, (uint8_t *)vf_res, len);
 350         rte_free(vf_res);
 351
 352         return ret;
 353 }
 354
 355 static int
 356 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 357                             struct i40e_pf_vf *vf,
 358                             struct i40e_virtchnl_rxq_info *rxq,
 359                             uint8_t crcstrip)
 360 {
 361         int err = I40E_SUCCESS;
 362         struct i40e_hmc_obj_rxq rx_ctx;
 363         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 364
 365         /* Clear the context structure first */
 366         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 367         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 368         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 369         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 370         rx_ctx.qlen = rxq->ring_len;
 371 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 372         rx_ctx.dsize = 1;
 373 #endif
 374
 375         if (rxq->splithdr_enabled) {
 376                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 377                 rx_ctx.dtype = i40e_header_split_enabled;
 378         } else {
 379                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 380                 rx_ctx.dtype = i40e_header_split_none;
 381         }
 382         rx_ctx.rxmax = rxq->max_pkt_size;
 383         rx_ctx.tphrdesc_ena = 1;
 384         rx_ctx.tphwdesc_ena = 1;
 385         rx_ctx.tphdata_ena = 1;
 386         rx_ctx.tphhead_ena = 1;
 387         rx_ctx.lrxqthresh = 2;
 388         rx_ctx.crcstrip = crcstrip;
 389         rx_ctx.l2tsel = 1;
 390         rx_ctx.prefena = 1;
 391
 392         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 393         if (err != I40E_SUCCESS)
 394                 return err;
 395         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 396
 397         return err;
 398 }
 399
 400 static int
 401 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 402                             struct i40e_pf_vf *vf,
 403                             struct i40e_virtchnl_txq_info *txq)
 404 {
 405         int err = I40E_SUCCESS;
 406         struct i40e_hmc_obj_txq tx_ctx;
 407         uint32_t qtx_ctl;
 408         uint16_t abs_queue_id = vf->vsi->base_queue + txq->queue_id;
 409
 410
 411         /* clear the context structure first */
 412         memset(&tx_ctx, 0, sizeof(tx_ctx));
 413         tx_ctx.new_context = 1;
 414         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 415         tx_ctx.qlen = txq->ring_len;
 416         tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]);
 417         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 418         if (err != I40E_SUCCESS)
 419                 return err;
 420
 421         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 422         if (err != I40E_SUCCESS)
 423                 return err;
 424
 425         /* bind queue with VF function, since TX/QX will appear in pair,
 426          * so only has QTX_CTL to set.
 427          */
 428         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 429                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 430                                 I40E_QTX_CTL_PF_INDX_MASK) |
 431                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 432                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 433                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 434         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 435         I40E_WRITE_FLUSH(hw);
 436
 437         return I40E_SUCCESS;
 438 }
 439
 440 static int
 441 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 442                                            uint8_t *msg,
 443                                            uint16_t msglen,
 444                                            bool b_op)
 445 {
 446         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 447         struct i40e_vsi *vsi = vf->vsi;
 448         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci =
 449                 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 450         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 451         int i, ret = I40E_SUCCESS;
 452
 453         if (!b_op) {
 454                 i40e_pf_host_send_msg_to_vf(vf,
 455                                             I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 456                                             I40E_NOT_SUPPORTED, NULL, 0);
 457                 return ret;
 458         }
 459
 460         if (!msg || vc_vqci->num_queue_pairs > vsi->nb_qps ||
 461                 vc_vqci->num_queue_pairs > I40E_MAX_VSI_QP ||
 462                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci,
 463                                         vc_vqci->num_queue_pairs)) {
 464                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong\n");
 465                 ret = I40E_ERR_PARAM;
 466                 goto send_msg;
 467         }
 468
 469         vc_qpi = vc_vqci->qpair;
 470         for (i = 0; i < vc_vqci->num_queue_pairs; i++) {
 471                 if (vc_qpi[i].rxq.queue_id > vsi->nb_qps - 1 ||
 472                         vc_qpi[i].txq.queue_id > vsi->nb_qps - 1) {
 473                         ret = I40E_ERR_PARAM;
 474                         goto send_msg;
 475                 }
 476
 477                 /*
 478                  * Apply VF RX queue setting to HMC.
 479                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 480                  * then the extra information of
 481                  * 'struct i40e_virtchnl_queue_pair_extra_info' is needed,
 482                  * otherwise set the last parameter to NULL.
 483                  */
 484                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpi[i].rxq,
 485                         I40E_CFG_CRCSTRIP_DEFAULT) != I40E_SUCCESS) {
 486                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 487                         ret = I40E_ERR_PARAM;
 488                         goto send_msg;
 489                 }
 490
 491                 /* Apply VF TX queue setting to HMC */
 492                 if (i40e_pf_host_hmc_config_txq(hw, vf,
 493                         &vc_qpi[i].txq) != I40E_SUCCESS) {
 494                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 495                         ret = I40E_ERR_PARAM;
 496                         goto send_msg;
 497                 }
 498         }
 499
 500 send_msg:
 501         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 502                                                         ret, NULL, 0);
 503
 504         return ret;
 505 }
 506
 507 static int
 508 i40e_pf_host_process_cmd_config_vsi_queues_ext(struct i40e_pf_vf *vf,
 509                                                uint8_t *msg,
 510                                                uint16_t msglen,
 511                                                bool b_op)
 512 {
 513         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 514         struct i40e_vsi *vsi = vf->vsi;
 515         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei =
 516                 (struct i40e_virtchnl_vsi_queue_config_ext_info *)msg;
 517         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 518         int i, ret = I40E_SUCCESS;
 519
 520         if (!b_op) {
 521                 i40e_pf_host_send_msg_to_vf(
 522                         vf,
 523                         I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 524                         I40E_NOT_SUPPORTED, NULL, 0);
 525                 return ret;
 526         }
 527
 528         if (!msg || vc_vqcei->num_queue_pairs > vsi->nb_qps ||
 529                 vc_vqcei->num_queue_pairs > I40E_MAX_VSI_QP ||
 530                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei,
 531                                         vc_vqcei->num_queue_pairs)) {
 532                 PMD_DRV_LOG(ERR, "vsi_queue_config_ext_info argument wrong\n");
 533                 ret = I40E_ERR_PARAM;
 534                 goto send_msg;
 535         }
 536
 537         vc_qpei = vc_vqcei->qpair;
 538         for (i = 0; i < vc_vqcei->num_queue_pairs; i++) {
 539                 if (vc_qpei[i].rxq.queue_id > vsi->nb_qps - 1 ||
 540                         vc_qpei[i].txq.queue_id > vsi->nb_qps - 1) {
 541                         ret = I40E_ERR_PARAM;
 542                         goto send_msg;
 543                 }
 544                 /*
 545                  * Apply VF RX queue setting to HMC.
 546                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 547                  * then the extra information of
 548                  * 'struct i40e_virtchnl_queue_pair_ext_info' is needed,
 549                  * otherwise set the last parameter to NULL.
 550                  */
 551                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpei[i].rxq,
 552                         vc_qpei[i].rxq_ext.crcstrip) != I40E_SUCCESS) {
 553                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 554                         ret = I40E_ERR_PARAM;
 555                         goto send_msg;
 556                 }
 557
 558                 /* Apply VF TX queue setting to HMC */
 559                 if (i40e_pf_host_hmc_config_txq(hw, vf, &vc_qpei[i].txq) !=
 560                                                         I40E_SUCCESS) {
 561                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 562                         ret = I40E_ERR_PARAM;
 563                         goto send_msg;
 564                 }
 565         }
 566
 567 send_msg:
 568         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 569                                                                 ret, NULL, 0);
 570
 571         return ret;
 572 }
 573
 574 static int
 575 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 576                                         uint8_t *msg, uint16_t msglen,
 577                                         bool b_op)
 578 {
 579         int ret = I40E_SUCCESS;
 580         struct i40e_virtchnl_irq_map_info *irqmap =
 581             (struct i40e_virtchnl_irq_map_info *)msg;
 582
 583         if (!b_op) {
 584                 i40e_pf_host_send_msg_to_vf(
 585                         vf,
 586                         I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 587                         I40E_NOT_SUPPORTED, NULL, 0);
 588                 return ret;
 589         }
 590
 591         if (msg == NULL || msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 592                 PMD_DRV_LOG(ERR, "buffer too short");
 593                 ret = I40E_ERR_PARAM;
 594                 goto send_msg;
 595         }
 596
 597         /* Assume VF only have 1 vector to bind all queues */
 598         if (irqmap->num_vectors != 1) {
 599                 PMD_DRV_LOG(ERR, "DKDK host only support 1 vector");
 600                 ret = I40E_ERR_PARAM;
 601                 goto send_msg;
 602         }
 603
 604         /* This MSIX intr store the intr in VF range */
 605         vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 606         vf->vsi->nb_msix = irqmap->num_vectors;
 607         vf->vsi->nb_used_qps = vf->vsi->nb_qps;
 608
 609         /* Don't care how the TX/RX queue mapping with this vector.
 610          * Link all VF RX queues together. Only did mapping work.
 611          * VF can disable/enable the intr by itself.
 612          */
 613         i40e_vsi_queues_bind_intr(vf->vsi);
 614 send_msg:
 615         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 616                                                         ret, NULL, 0);
 617
 618         return ret;
 619 }
 620
 621 static int
 622 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 623                            struct i40e_virtchnl_queue_select *qsel,
 624                            bool on)
 625 {
 626         int ret = I40E_SUCCESS;
 627         int i;
 628         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 629         uint16_t baseq = vf->vsi->base_queue;
 630
 631         if (qsel->rx_queues + qsel->tx_queues == 0)
 632                 return I40E_ERR_PARAM;
 633
 634         /* always enable RX first and disable last */
 635         /* Enable RX if it's enable */
 636         if (on) {
 637                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 638                         if (qsel->rx_queues & (1 << i)) {
 639                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 640                                 if (ret != I40E_SUCCESS)
 641                                         return ret;
 642                         }
 643         }
 644
 645         /* Enable/Disable TX */
 646         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 647                 if (qsel->tx_queues & (1 << i)) {
 648                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 649                         if (ret != I40E_SUCCESS)
 650                                 return ret;
 651                 }
 652
 653         /* disable RX last if it's disable */
 654         if (!on) {
 655                 /* disable RX */
 656                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 657                         if (qsel->rx_queues & (1 << i)) {
 658                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 659                                 if (ret != I40E_SUCCESS)
 660                                         return ret;
 661                         }
 662         }
 663
 664         return ret;
 665 }
 666
 667 static int
 668 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 669                                        uint8_t *msg,
 670                                        uint16_t msglen)
 671 {
 672         int ret = I40E_SUCCESS;
 673         struct i40e_virtchnl_queue_select *q_sel =
 674                 (struct i40e_virtchnl_queue_select *)msg;
 675
 676         if (msg == NULL || msglen != sizeof(*q_sel)) {
 677                 ret = I40E_ERR_PARAM;
 678                 goto send_msg;
 679         }
 680         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 681
 682 send_msg:
 683         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 684                                                         ret, NULL, 0);
 685
 686         return ret;
 687 }
 688
 689 static int
 690 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 691                                         uint8_t *msg,
 692                                         uint16_t msglen,
 693                                         bool b_op)
 694 {
 695         int ret = I40E_SUCCESS;
 696         struct i40e_virtchnl_queue_select *q_sel =
 697                 (struct i40e_virtchnl_queue_select *)msg;
 698
 699         if (!b_op) {
 700                 i40e_pf_host_send_msg_to_vf(
 701                         vf,
 702                         I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 703                         I40E_NOT_SUPPORTED, NULL, 0);
 704                 return ret;
 705         }
 706
 707         if (msg == NULL || msglen != sizeof(*q_sel)) {
 708                 ret = I40E_ERR_PARAM;
 709                 goto send_msg;
 710         }
 711         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 712
 713 send_msg:
 714         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 715                                                         ret, NULL, 0);
 716
 717         return ret;
 718 }
 719
 720
 721 static int
 722 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 723                                            uint8_t *msg,
 724                                            uint16_t msglen,
 725                                            bool b_op)
 726 {
 727         int ret = I40E_SUCCESS;
 728         struct i40e_virtchnl_ether_addr_list *addr_list =
 729                         (struct i40e_virtchnl_ether_addr_list *)msg;
 730         struct i40e_mac_filter_info filter;
 731         int i;
 732         struct ether_addr *mac;
 733
 734         if (!b_op) {
 735                 i40e_pf_host_send_msg_to_vf(
 736                         vf,
 737                         I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 738                         I40E_NOT_SUPPORTED, NULL, 0);
 739                 return ret;
 740         }
 741
 742         memset(&filter, 0 , sizeof(struct i40e_mac_filter_info));
 743
 744         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 745                 PMD_DRV_LOG(ERR, "add_ether_address argument too short");
 746                 ret = I40E_ERR_PARAM;
 747                 goto send_msg;
 748         }
 749
 750         for (i = 0; i < addr_list->num_elements; i++) {
 751                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 752                 (void)rte_memcpy(&filter.mac_addr, mac, ETHER_ADDR_LEN);
 753                 filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
 754                 if(!is_valid_assigned_ether_addr(mac) ||
 755                         i40e_vsi_add_mac(vf->vsi, &filter)) {
 756                         ret = I40E_ERR_INVALID_MAC_ADDR;
 757                         goto send_msg;
 758                 }
 759         }
 760
 761 send_msg:
 762         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 763                                                         ret, NULL, 0);
 764
 765         return ret;
 766 }
 767
 768 static int
 769 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 770                                            uint8_t *msg,
 771                                            uint16_t msglen,
 772                                            bool b_op)
 773 {
 774         int ret = I40E_SUCCESS;
 775         struct i40e_virtchnl_ether_addr_list *addr_list =
 776                 (struct i40e_virtchnl_ether_addr_list *)msg;
 777         int i;
 778         struct ether_addr *mac;
 779
 780         if (!b_op) {
 781                 i40e_pf_host_send_msg_to_vf(
 782                         vf,
 783                         I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 784                         I40E_NOT_SUPPORTED, NULL, 0);
 785                 return ret;
 786         }
 787
 788         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 789                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short");
 790                 ret = I40E_ERR_PARAM;
 791                 goto send_msg;
 792         }
 793
 794         for (i = 0; i < addr_list->num_elements; i++) {
 795                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 796                 if(!is_valid_assigned_ether_addr(mac) ||
 797                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 798                         ret = I40E_ERR_INVALID_MAC_ADDR;
 799                         goto send_msg;
 800                 }
 801         }
 802
 803 send_msg:
 804         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 805                                                         ret, NULL, 0);
 806
 807         return ret;
 808 }
 809
 810 static int
 811 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 812                                 uint8_t *msg, uint16_t msglen,
 813                                 bool b_op)
 814 {
 815         int ret = I40E_SUCCESS;
 816         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 817                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 818         int i;
 819         uint16_t *vid;
 820
 821         if (!b_op) {
 822                 i40e_pf_host_send_msg_to_vf(
 823                         vf,
 824                         I40E_VIRTCHNL_OP_ADD_VLAN,
 825                         I40E_NOT_SUPPORTED, NULL, 0);
 826                 return ret;
 827         }
 828
 829         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 830                 PMD_DRV_LOG(ERR, "add_vlan argument too short");
 831                 ret = I40E_ERR_PARAM;
 832                 goto send_msg;
 833         }
 834
 835         vid = vlan_filter_list->vlan_id;
 836
 837         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 838                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 839                 if(ret != I40E_SUCCESS)
 840                         goto send_msg;
 841         }
 842
 843 send_msg:
 844         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
 845                                                 ret, NULL, 0);
 846
 847         return ret;
 848 }
 849
 850 static int
 851 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 852                                   uint8_t *msg,
 853                                   uint16_t msglen,
 854                                   bool b_op)
 855 {
 856         int ret = I40E_SUCCESS;
 857         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 858                         (struct i40e_virtchnl_vlan_filter_list *)msg;
 859         int i;
 860         uint16_t *vid;
 861
 862         if (!b_op) {
 863                 i40e_pf_host_send_msg_to_vf(
 864                         vf,
 865                         I40E_VIRTCHNL_OP_DEL_VLAN,
 866                         I40E_NOT_SUPPORTED, NULL, 0);
 867                 return ret;
 868         }
 869
 870         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 871                 PMD_DRV_LOG(ERR, "delete_vlan argument too short");
 872                 ret = I40E_ERR_PARAM;
 873                 goto send_msg;
 874         }
 875
 876         vid = vlan_filter_list->vlan_id;
 877         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 878                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
 879                 if(ret != I40E_SUCCESS)
 880                         goto send_msg;
 881         }
 882
 883 send_msg:
 884         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
 885                                                 ret, NULL, 0);
 886
 887         return ret;
 888 }
 889
 890 static int
 891 i40e_pf_host_process_cmd_config_promisc_mode(
 892                                         struct i40e_pf_vf *vf,
 893                                         uint8_t *msg,
 894                                         uint16_t msglen,
 895                                         bool b_op)
 896 {
 897         int ret = I40E_SUCCESS;
 898         struct i40e_virtchnl_promisc_info *promisc =
 899                                 (struct i40e_virtchnl_promisc_info *)msg;
 900         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 901         bool unicast = FALSE, multicast = FALSE;
 902
 903         if (!b_op) {
 904                 i40e_pf_host_send_msg_to_vf(
 905                         vf,
 906                         I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
 907                         I40E_NOT_SUPPORTED, NULL, 0);
 908                 return ret;
 909         }
 910
 911         if (msg == NULL || msglen != sizeof(*promisc)) {
 912                 ret = I40E_ERR_PARAM;
 913                 goto send_msg;
 914         }
 915
 916         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
 917                 unicast = TRUE;
 918         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
 919                         vf->vsi->seid, unicast, NULL, true);
 920         if (ret != I40E_SUCCESS)
 921                 goto send_msg;
 922
 923         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
 924                 multicast = TRUE;
 925         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
 926                                                 multicast, NULL);
 927
 928 send_msg:
 929         i40e_pf_host_send_msg_to_vf(vf,
 930                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
 931
 932         return ret;
 933 }
 934
 935 static int
 936 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf, bool b_op)
 937 {
 938         i40e_update_vsi_stats(vf->vsi);
 939
 940         if (b_op)
 941                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
 942                                             I40E_SUCCESS,
 943                                             (uint8_t *)&vf->vsi->eth_stats,
 944                                             sizeof(vf->vsi->eth_stats));
 945         else
 946                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
 947                                             I40E_NOT_SUPPORTED,
 948                                             (uint8_t *)&vf->vsi->eth_stats,
 949                                             sizeof(vf->vsi->eth_stats));
 950
 951         return I40E_SUCCESS;
 952 }
 953
 954 static int
 955 i40e_pf_host_process_cmd_cfg_vlan_offload(
 956                                         struct i40e_pf_vf *vf,
 957                                         uint8_t *msg,
 958                                         uint16_t msglen,
 959                                         bool b_op)
 960 {
 961         int ret = I40E_SUCCESS;
 962         struct i40e_virtchnl_vlan_offload_info *offload =
 963                         (struct i40e_virtchnl_vlan_offload_info *)msg;
 964
 965         if (!b_op) {
 966                 i40e_pf_host_send_msg_to_vf(
 967                         vf,
 968                         I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
 969                         I40E_NOT_SUPPORTED, NULL, 0);
 970                 return ret;
 971         }
 972
 973         if (msg == NULL || msglen != sizeof(*offload)) {
 974                 ret = I40E_ERR_PARAM;
 975                 goto send_msg;
 976         }
 977
 978         ret = i40e_vsi_config_vlan_stripping(vf->vsi,
 979                                                 !!offload->enable_vlan_strip);
 980         if (ret != 0)
 981                 PMD_DRV_LOG(ERR, "Failed to configure vlan stripping");
 982
 983 send_msg:
 984         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
 985                                         ret, NULL, 0);
 986
 987         return ret;
 988 }
 989
 990 static int
 991 i40e_pf_host_process_cmd_cfg_pvid(struct i40e_pf_vf *vf,
 992                                         uint8_t *msg,
 993                                         uint16_t msglen,
 994                                         bool b_op)
 995 {
 996         int ret = I40E_SUCCESS;
 997         struct i40e_virtchnl_pvid_info  *tpid_info =
 998                         (struct i40e_virtchnl_pvid_info *)msg;
 999
1000         if (!b_op) {
1001                 i40e_pf_host_send_msg_to_vf(
1002                         vf,
1003                         I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
1004                         I40E_NOT_SUPPORTED, NULL, 0);
1005                 return ret;
1006         }
1007
1008         if (msg == NULL || msglen != sizeof(*tpid_info)) {
1009                 ret = I40E_ERR_PARAM;
1010                 goto send_msg;
1011         }
1012
1013         ret = i40e_vsi_vlan_pvid_set(vf->vsi, &tpid_info->info);
1014
1015 send_msg:
1016         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
1017                                         ret, NULL, 0);
1018
1019         return ret;
1020 }
1021
1022 void
1023 i40e_notify_vf_link_status(struct rte_eth_dev *dev, struct i40e_pf_vf *vf)
1024 {
1025         struct i40e_virtchnl_pf_event event;
1026
1027         event.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
1028         event.event_data.link_event.link_status =
1029                 dev->data->dev_link.link_status;
1030         event.event_data.link_event.link_speed =
1031                 (enum i40e_aq_link_speed)dev->data->dev_link.link_speed;
1032         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_EVENT,
1033                 I40E_SUCCESS, (uint8_t *)&event, sizeof(event));
1034 }
1035
1036 void
1037 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
1038                            uint16_t abs_vf_id, uint32_t opcode,
1039                            __rte_unused uint32_t retval,
1040                            uint8_t *msg,
1041                            uint16_t msglen)
1042 {
1043         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1044         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1045         struct i40e_pf_vf *vf;
1046         /* AdminQ will pass absolute VF id, transfer to internal vf id */
1047         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
1048         struct rte_pmd_i40e_mb_event_param cb_param;
1049         bool b_op = TRUE;
1050
1051         if (vf_id > pf->vf_num - 1 || !pf->vfs) {
1052                 PMD_DRV_LOG(ERR, "invalid argument");
1053                 return;
1054         }
1055
1056         vf = &pf->vfs[vf_id];
1057         if (!vf->vsi) {
1058                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found");
1059                 i40e_pf_host_send_msg_to_vf(vf, opcode,
1060                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
1061                 return;
1062         }
1063
1064         /**
1065          * initialise structure to send to user application
1066          * will return response from user in retval field
1067          */
1068         cb_param.retval = RTE_PMD_I40E_MB_EVENT_PROCEED;
1069         cb_param.vfid = vf_id;
1070         cb_param.msg_type = opcode;
1071         cb_param.msg = (void *)msg;
1072         cb_param.msglen = msglen;
1073
1074         /**
1075          * Ask user application if we're allowed to perform those functions.
1076          * If we get cb_param.retval == RTE_PMD_I40E_MB_EVENT_PROCEED,
1077          * then business as usual.
1078          * If RTE_PMD_I40E_MB_EVENT_NOOP_ACK or RTE_PMD_I40E_MB_EVENT_NOOP_NACK,
1079          * do nothing and send not_supported to VF. As PF must send a response
1080          * to VF and ACK/NACK is not defined.
1081          */
1082         _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_VF_MBOX, &cb_param);
1083         if (cb_param.retval != RTE_PMD_I40E_MB_EVENT_PROCEED) {
1084                 PMD_DRV_LOG(WARNING, "VF to PF message(%d) is not permitted!",
1085                             opcode);
1086                 b_op = FALSE;
1087         }
1088
1089         switch (opcode) {
1090         case I40E_VIRTCHNL_OP_VERSION :
1091                 PMD_DRV_LOG(INFO, "OP_VERSION received");
1092                 i40e_pf_host_process_cmd_version(vf, b_op);
1093                 break;
1094         case I40E_VIRTCHNL_OP_RESET_VF :
1095                 PMD_DRV_LOG(INFO, "OP_RESET_VF received");
1096                 i40e_pf_host_process_cmd_reset_vf(vf);
1097                 break;
1098         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1099                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received");
1100                 i40e_pf_host_process_cmd_get_vf_resource(vf, b_op);
1101                 break;
1102         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1103                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received");
1104                 i40e_pf_host_process_cmd_config_vsi_queues(vf, msg,
1105                                                            msglen, b_op);
1106                 break;
1107         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT:
1108                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES_EXT received");
1109                 i40e_pf_host_process_cmd_config_vsi_queues_ext(vf, msg,
1110                                                                msglen, b_op);
1111                 break;
1112         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1113                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received");
1114                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen, b_op);
1115                 break;
1116         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1117                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received");
1118                 if (b_op) {
1119                         i40e_pf_host_process_cmd_enable_queues(vf, msg, msglen);
1120                         i40e_notify_vf_link_status(dev, vf);
1121                 } else {
1122                         i40e_pf_host_send_msg_to_vf(
1123                                 vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1124                                 I40E_NOT_SUPPORTED, NULL, 0);
1125                 }
1126                 break;
1127         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1128                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received");
1129                 i40e_pf_host_process_cmd_disable_queues(vf, msg, msglen, b_op);
1130                 break;
1131         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1132                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received");
1133                 i40e_pf_host_process_cmd_add_ether_address(vf, msg,
1134                                                            msglen, b_op);
1135                 break;
1136         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1137                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received");
1138                 i40e_pf_host_process_cmd_del_ether_address(vf, msg,
1139                                                            msglen, b_op);
1140                 break;
1141         case I40E_VIRTCHNL_OP_ADD_VLAN:
1142                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received");
1143                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen, b_op);
1144                 break;
1145         case I40E_VIRTCHNL_OP_DEL_VLAN:
1146                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received");
1147                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen, b_op);
1148                 break;
1149         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1150                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received");
1151                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg,
1152                                                              msglen, b_op);
1153                 break;
1154         case I40E_VIRTCHNL_OP_GET_STATS:
1155                 PMD_DRV_LOG(INFO, "OP_GET_STATS received");
1156                 i40e_pf_host_process_cmd_get_stats(vf, b_op);
1157                 break;
1158         case I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD:
1159                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_OFFLOAD received");
1160                 i40e_pf_host_process_cmd_cfg_vlan_offload(vf, msg,
1161                                                           msglen, b_op);
1162                 break;
1163         case I40E_VIRTCHNL_OP_CFG_VLAN_PVID:
1164                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_PVID received");
1165                 i40e_pf_host_process_cmd_cfg_pvid(vf, msg, msglen, b_op);
1166                 break;
1167         /* Don't add command supported below, which will
1168          * return an error code.
1169          */
1170         default:
1171                 PMD_DRV_LOG(ERR, "%u received, not supported", opcode);
1172                 i40e_pf_host_send_msg_to_vf(vf, opcode, I40E_ERR_PARAM,
1173                                                                 NULL, 0);
1174                 break;
1175         }
1176 }
1177
1178 int
1179 i40e_pf_host_init(struct rte_eth_dev *dev)
1180 {
1181         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1182         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1183         int ret, i;
1184         uint32_t val;
1185
1186         PMD_INIT_FUNC_TRACE();
1187
1188         /**
1189          * return if SRIOV not enabled, VF number not configured or
1190          * no queue assigned.
1191          */
1192         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
1193                 return I40E_SUCCESS;
1194
1195         /* Allocate memory to store VF structure */
1196         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
1197         if(pf->vfs == NULL)
1198                 return -ENOMEM;
1199
1200         /* Disable irq0 for VFR event */
1201         i40e_pf_disable_irq0(hw);
1202
1203         /* Disable VF link status interrupt */
1204         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1205         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1206         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1207         I40E_WRITE_FLUSH(hw);
1208
1209         for (i = 0; i < pf->vf_num; i++) {
1210                 pf->vfs[i].pf = pf;
1211                 pf->vfs[i].state = I40E_VF_INACTIVE;
1212                 pf->vfs[i].vf_idx = i;
1213                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
1214                 if (ret != I40E_SUCCESS)
1215                         goto fail;
1216                 eth_random_addr(pf->vfs[i].mac_addr.addr_bytes);
1217         }
1218
1219         /* restore irq0 */
1220         i40e_pf_enable_irq0(hw);
1221
1222         return I40E_SUCCESS;
1223
1224 fail:
1225         rte_free(pf->vfs);
1226         i40e_pf_enable_irq0(hw);
1227
1228         return ret;
1229 }
1230
1231 int
1232 i40e_pf_host_uninit(struct rte_eth_dev *dev)
1233 {
1234         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1235         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1236         uint32_t val;
1237
1238         PMD_INIT_FUNC_TRACE();
1239
1240         /**
1241          * return if SRIOV not enabled, VF number not configured or
1242          * no queue assigned.
1243          */
1244         if ((!hw->func_caps.sr_iov_1_1) ||
1245                 (pf->vf_num == 0) ||
1246                 (pf->vf_nb_qps == 0))
1247                 return I40E_SUCCESS;
1248
1249         /* free memory to store VF structure */
1250         rte_free(pf->vfs);
1251         pf->vfs = NULL;
1252
1253         /* Disable irq0 for VFR event */
1254         i40e_pf_disable_irq0(hw);
1255
1256         /* Disable VF link status interrupt */
1257         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1258         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1259         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1260         I40E_WRITE_FLUSH(hw);
1261
1262         return I40E_SUCCESS;
1263 }