1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
8 #define RTE_PMD_I40E_RX_MAX_BURST 32
9 #define RTE_PMD_I40E_TX_MAX_BURST 32
11 #define RTE_I40E_VPMD_RX_BURST 32
12 #define RTE_I40E_VPMD_TX_BURST 32
13 #define RTE_I40E_RXQ_REARM_THRESH 32
14 #define RTE_I40E_MAX_RX_BURST RTE_I40E_RXQ_REARM_THRESH
15 #define RTE_I40E_TX_MAX_FREE_BUF_SZ 64
16 #define RTE_I40E_DESCS_PER_LOOP 4
18 #define I40E_RXBUF_SZ_1024 1024
19 #define I40E_RXBUF_SZ_2048 2048
21 /* In none-PXE mode QLEN must be whole number of 32 descriptors. */
22 #define I40E_ALIGN_RING_DESC 32
24 #define I40E_MIN_RING_DESC 64
25 #define I40E_MAX_RING_DESC 4096
27 #define I40E_MIN_TSO_MSS 256
28 #define I40E_MAX_TSO_MSS 9674
30 #define I40E_TX_MAX_SEG UINT8_MAX
31 #define I40E_TX_MAX_MTU_SEG 8
33 #define I40E_TX_MIN_PKT_LEN 17
35 /* Shared FDIR masks between scalar / vector drivers */
36 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_MASK 0x03
37 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FD_ID 0x01
38 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FLEX 0x02
39 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_MASK 0x03
40 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_FLEX 0x01
43 #define container_of(ptr, type, member) ({ \
44 typeof(((type *)0)->member)(*__mptr) = (ptr); \
45 (type *)((char *)__mptr - offsetof(type, member)); })
47 #define I40E_TD_CMD (I40E_TX_DESC_CMD_ICRC |\
50 enum i40e_header_split_mode {
51 i40e_header_split_none = 0,
52 i40e_header_split_enabled = 1,
53 i40e_header_split_always = 2,
54 i40e_header_split_reserved
57 #define I40E_HEADER_SPLIT_NONE ((uint8_t)0)
58 #define I40E_HEADER_SPLIT_L2 ((uint8_t)(1 << 0))
59 #define I40E_HEADER_SPLIT_IP ((uint8_t)(1 << 1))
60 #define I40E_HEADER_SPLIT_UDP_TCP ((uint8_t)(1 << 2))
61 #define I40E_HEADER_SPLIT_SCTP ((uint8_t)(1 << 3))
62 #define I40E_HEADER_SPLIT_ALL (I40E_HEADER_SPLIT_L2 | \
63 I40E_HEADER_SPLIT_IP | \
64 I40E_HEADER_SPLIT_UDP_TCP | \
65 I40E_HEADER_SPLIT_SCTP)
67 /* HW desc structure, both 16-byte and 32-byte types are supported */
68 #ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC
69 #define i40e_rx_desc i40e_16byte_rx_desc
71 #define i40e_rx_desc i40e_32byte_rx_desc
74 struct i40e_rx_entry {
75 struct rte_mbuf *mbuf;
79 * Structure associated with each RX queue.
81 struct i40e_rx_queue {
82 struct rte_mempool *mp; /**< mbuf pool to populate RX ring */
83 volatile union i40e_rx_desc *rx_ring;/**< RX ring virtual address */
84 uint64_t rx_ring_phys_addr; /**< RX ring DMA address */
85 struct i40e_rx_entry *sw_ring; /**< address of RX soft ring */
86 uint16_t nb_rx_desc; /**< number of RX descriptors */
87 uint16_t rx_free_thresh; /**< max free RX desc to hold */
88 uint16_t rx_tail; /**< current value of tail */
89 uint16_t nb_rx_hold; /**< number of held free RX desc */
90 struct rte_mbuf *pkt_first_seg; /**< first segment of current packet */
91 struct rte_mbuf *pkt_last_seg; /**< last segment of current packet */
92 struct rte_mbuf fake_mbuf; /**< dummy mbuf */
93 #ifdef RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC
94 uint16_t rx_nb_avail; /**< number of staged packets ready */
95 uint16_t rx_next_avail; /**< index of next staged packets */
96 uint16_t rx_free_trigger; /**< triggers rx buffer allocation */
97 struct rte_mbuf *rx_stage[RTE_PMD_I40E_RX_MAX_BURST * 2];
100 uint16_t rxrearm_nb; /**< number of remaining to be re-armed */
101 uint16_t rxrearm_start; /**< the idx we start the re-arming from */
102 uint64_t mbuf_initializer; /**< value to init mbufs */
104 uint16_t port_id; /**< device port ID */
105 uint8_t crc_len; /**< 0 if CRC stripped, 4 otherwise */
106 uint8_t fdir_enabled; /**< 0 if FDIR disabled, 1 when enabled */
107 uint16_t queue_id; /**< RX queue index */
108 uint16_t reg_idx; /**< RX queue register index */
109 uint8_t drop_en; /**< if not 0, set register bit */
110 volatile uint8_t *qrx_tail; /**< register address of tail */
111 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
112 uint16_t rx_buf_len; /* The packet buffer size */
113 uint16_t rx_hdr_len; /* The header buffer size */
114 uint16_t max_pkt_len; /* Maximum packet length */
115 uint8_t hs_mode; /* Header Split mode */
116 bool q_set; /**< indicate if rx queue has been configured */
117 bool rx_deferred_start; /**< don't start this queue in dev start */
118 uint16_t rx_using_sse; /**<flag indicate the usage of vPMD for rx */
119 uint8_t dcb_tc; /**< Traffic class of rx queue */
120 uint64_t offloads; /**< Rx offload flags of DEV_RX_OFFLOAD_* */
123 struct i40e_tx_entry {
124 struct rte_mbuf *mbuf;
130 * Structure associated with each TX queue.
132 struct i40e_tx_queue {
133 uint16_t nb_tx_desc; /**< number of TX descriptors */
134 uint64_t tx_ring_phys_addr; /**< TX ring DMA address */
135 volatile struct i40e_tx_desc *tx_ring; /**< TX ring virtual address */
136 struct i40e_tx_entry *sw_ring; /**< virtual address of SW ring */
137 uint16_t tx_tail; /**< current value of tail register */
138 volatile uint8_t *qtx_tail; /**< register address of tail */
139 uint16_t nb_tx_used; /**< number of TX desc used since RS bit set */
140 /**< index to last TX descriptor to have been cleaned */
141 uint16_t last_desc_cleaned;
142 /**< Total number of TX descriptors ready to be allocated. */
144 /**< Start freeing TX buffers if there are less free descriptors than
146 uint16_t tx_free_thresh;
147 /** Number of TX descriptors to use before RS bit is set. */
148 uint16_t tx_rs_thresh;
149 uint8_t pthresh; /**< Prefetch threshold register. */
150 uint8_t hthresh; /**< Host threshold register. */
151 uint8_t wthresh; /**< Write-back threshold reg. */
152 uint16_t port_id; /**< Device port identifier. */
153 uint16_t queue_id; /**< TX queue index. */
155 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
158 bool q_set; /**< indicate if tx queue has been configured */
159 bool tx_deferred_start; /**< don't start this queue in dev start */
160 uint8_t dcb_tc; /**< Traffic class of tx queue */
161 uint64_t offloads; /**< Tx offload flags of DEV_RX_OFFLOAD_* */
164 /** Offload features */
165 union i40e_tx_offload {
168 uint64_t l2_len:7; /**< L2 (MAC) Header Length. */
169 uint64_t l3_len:9; /**< L3 (IP) Header Length. */
170 uint64_t l4_len:8; /**< L4 Header Length. */
171 uint64_t tso_segsz:16; /**< TCP TSO segment size */
172 uint64_t outer_l2_len:8; /**< outer L2 Header Length */
173 uint64_t outer_l3_len:16; /**< outer L3 Header Length */
177 int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
178 int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
179 int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
180 int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
181 const uint32_t *i40e_dev_supported_ptypes_get(struct rte_eth_dev *dev);
182 int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
185 unsigned int socket_id,
186 const struct rte_eth_rxconf *rx_conf,
187 struct rte_mempool *mp);
188 int i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
191 unsigned int socket_id,
192 const struct rte_eth_txconf *tx_conf);
193 void i40e_dev_rx_queue_release(void *rxq);
194 void i40e_dev_tx_queue_release(void *txq);
195 uint16_t i40e_recv_pkts(void *rx_queue,
196 struct rte_mbuf **rx_pkts,
198 uint16_t i40e_recv_scattered_pkts(void *rx_queue,
199 struct rte_mbuf **rx_pkts,
201 uint16_t i40e_xmit_pkts(void *tx_queue,
202 struct rte_mbuf **tx_pkts,
204 uint16_t i40e_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
206 int i40e_tx_queue_init(struct i40e_tx_queue *txq);
207 int i40e_rx_queue_init(struct i40e_rx_queue *rxq);
208 void i40e_free_tx_resources(struct i40e_tx_queue *txq);
209 void i40e_free_rx_resources(struct i40e_rx_queue *rxq);
210 void i40e_dev_clear_queues(struct rte_eth_dev *dev);
211 void i40e_dev_free_queues(struct rte_eth_dev *dev);
212 void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
213 void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
214 void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
215 int i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq);
216 void i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq);
218 uint32_t i40e_dev_rx_queue_count(struct rte_eth_dev *dev,
219 uint16_t rx_queue_id);
220 int i40e_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);
221 int i40e_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
222 int i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
224 uint16_t i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
226 uint16_t i40e_recv_scattered_pkts_vec(void *rx_queue,
227 struct rte_mbuf **rx_pkts,
229 int i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev);
230 int i40e_rxq_vec_setup(struct i40e_rx_queue *rxq);
231 int i40e_txq_vec_setup(struct i40e_tx_queue *txq);
232 void i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq);
233 uint16_t i40e_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
235 void i40e_set_rx_function(struct rte_eth_dev *dev);
236 void i40e_set_tx_function_flag(struct rte_eth_dev *dev,
237 struct i40e_tx_queue *txq);
238 void i40e_set_tx_function(struct rte_eth_dev *dev);
239 void i40e_set_default_ptype_table(struct rte_eth_dev *dev);
240 void i40e_set_default_pctype_table(struct rte_eth_dev *dev);
241 uint16_t i40e_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
243 uint16_t i40e_recv_scattered_pkts_vec_avx2(void *rx_queue,
244 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
245 uint16_t i40e_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
248 /* For each value it means, datasheet of hardware can tell more details
250 * @note: fix i40e_dev_supported_ptypes_get() if any change here.
252 static inline uint32_t
253 i40e_get_default_pkt_type(uint8_t ptype)
255 static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
258 [1] = RTE_PTYPE_L2_ETHER,
259 [2] = RTE_PTYPE_L2_ETHER_TIMESYNC,
260 /* [3] - [5] reserved */
261 [6] = RTE_PTYPE_L2_ETHER_LLDP,
262 /* [7] - [10] reserved */
263 [11] = RTE_PTYPE_L2_ETHER_ARP,
264 /* [12] - [21] reserved */
266 /* Non tunneled IPv4 */
267 [22] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
269 [23] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
270 RTE_PTYPE_L4_NONFRAG,
271 [24] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
274 [26] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
276 [27] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
278 [28] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
282 [29] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
283 RTE_PTYPE_TUNNEL_IP |
284 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
285 RTE_PTYPE_INNER_L4_FRAG,
286 [30] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
287 RTE_PTYPE_TUNNEL_IP |
288 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
289 RTE_PTYPE_INNER_L4_NONFRAG,
290 [31] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
291 RTE_PTYPE_TUNNEL_IP |
292 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
293 RTE_PTYPE_INNER_L4_UDP,
295 [33] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
296 RTE_PTYPE_TUNNEL_IP |
297 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
298 RTE_PTYPE_INNER_L4_TCP,
299 [34] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
300 RTE_PTYPE_TUNNEL_IP |
301 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
302 RTE_PTYPE_INNER_L4_SCTP,
303 [35] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
304 RTE_PTYPE_TUNNEL_IP |
305 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
306 RTE_PTYPE_INNER_L4_ICMP,
309 [36] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
310 RTE_PTYPE_TUNNEL_IP |
311 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
312 RTE_PTYPE_INNER_L4_FRAG,
313 [37] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
314 RTE_PTYPE_TUNNEL_IP |
315 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
316 RTE_PTYPE_INNER_L4_NONFRAG,
317 [38] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
318 RTE_PTYPE_TUNNEL_IP |
319 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
320 RTE_PTYPE_INNER_L4_UDP,
322 [40] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
323 RTE_PTYPE_TUNNEL_IP |
324 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
325 RTE_PTYPE_INNER_L4_TCP,
326 [41] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
327 RTE_PTYPE_TUNNEL_IP |
328 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
329 RTE_PTYPE_INNER_L4_SCTP,
330 [42] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
331 RTE_PTYPE_TUNNEL_IP |
332 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
333 RTE_PTYPE_INNER_L4_ICMP,
335 /* IPv4 --> GRE/Teredo/VXLAN */
336 [43] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
337 RTE_PTYPE_TUNNEL_GRENAT,
339 /* IPv4 --> GRE/Teredo/VXLAN --> IPv4 */
340 [44] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
341 RTE_PTYPE_TUNNEL_GRENAT |
342 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
343 RTE_PTYPE_INNER_L4_FRAG,
344 [45] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
345 RTE_PTYPE_TUNNEL_GRENAT |
346 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
347 RTE_PTYPE_INNER_L4_NONFRAG,
348 [46] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
349 RTE_PTYPE_TUNNEL_GRENAT |
350 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
351 RTE_PTYPE_INNER_L4_UDP,
353 [48] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
354 RTE_PTYPE_TUNNEL_GRENAT |
355 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
356 RTE_PTYPE_INNER_L4_TCP,
357 [49] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
358 RTE_PTYPE_TUNNEL_GRENAT |
359 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
360 RTE_PTYPE_INNER_L4_SCTP,
361 [50] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
362 RTE_PTYPE_TUNNEL_GRENAT |
363 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
364 RTE_PTYPE_INNER_L4_ICMP,
366 /* IPv4 --> GRE/Teredo/VXLAN --> IPv6 */
367 [51] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
368 RTE_PTYPE_TUNNEL_GRENAT |
369 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
370 RTE_PTYPE_INNER_L4_FRAG,
371 [52] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
372 RTE_PTYPE_TUNNEL_GRENAT |
373 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
374 RTE_PTYPE_INNER_L4_NONFRAG,
375 [53] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
376 RTE_PTYPE_TUNNEL_GRENAT |
377 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
378 RTE_PTYPE_INNER_L4_UDP,
380 [55] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
381 RTE_PTYPE_TUNNEL_GRENAT |
382 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
383 RTE_PTYPE_INNER_L4_TCP,
384 [56] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
385 RTE_PTYPE_TUNNEL_GRENAT |
386 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
387 RTE_PTYPE_INNER_L4_SCTP,
388 [57] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
389 RTE_PTYPE_TUNNEL_GRENAT |
390 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
391 RTE_PTYPE_INNER_L4_ICMP,
393 /* IPv4 --> GRE/Teredo/VXLAN --> MAC */
394 [58] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
395 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
397 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
398 [59] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
399 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
400 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
401 RTE_PTYPE_INNER_L4_FRAG,
402 [60] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
403 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
404 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
405 RTE_PTYPE_INNER_L4_NONFRAG,
406 [61] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
407 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
408 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
409 RTE_PTYPE_INNER_L4_UDP,
411 [63] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
412 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
413 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
414 RTE_PTYPE_INNER_L4_TCP,
415 [64] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
416 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
417 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
418 RTE_PTYPE_INNER_L4_SCTP,
419 [65] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
420 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
421 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
422 RTE_PTYPE_INNER_L4_ICMP,
424 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
425 [66] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
426 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
427 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
428 RTE_PTYPE_INNER_L4_FRAG,
429 [67] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
430 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
431 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
432 RTE_PTYPE_INNER_L4_NONFRAG,
433 [68] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
434 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
435 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
436 RTE_PTYPE_INNER_L4_UDP,
438 [70] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
439 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
440 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
441 RTE_PTYPE_INNER_L4_TCP,
442 [71] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
443 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
444 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
445 RTE_PTYPE_INNER_L4_SCTP,
446 [72] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
447 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
448 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
449 RTE_PTYPE_INNER_L4_ICMP,
451 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN */
452 [73] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
453 RTE_PTYPE_TUNNEL_GRENAT |
454 RTE_PTYPE_INNER_L2_ETHER_VLAN,
456 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
457 [74] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
458 RTE_PTYPE_TUNNEL_GRENAT |
459 RTE_PTYPE_INNER_L2_ETHER_VLAN |
460 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
461 RTE_PTYPE_INNER_L4_FRAG,
462 [75] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
463 RTE_PTYPE_TUNNEL_GRENAT |
464 RTE_PTYPE_INNER_L2_ETHER_VLAN |
465 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
466 RTE_PTYPE_INNER_L4_NONFRAG,
467 [76] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
468 RTE_PTYPE_TUNNEL_GRENAT |
469 RTE_PTYPE_INNER_L2_ETHER_VLAN |
470 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
471 RTE_PTYPE_INNER_L4_UDP,
473 [78] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
474 RTE_PTYPE_TUNNEL_GRENAT |
475 RTE_PTYPE_INNER_L2_ETHER_VLAN |
476 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
477 RTE_PTYPE_INNER_L4_TCP,
478 [79] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
479 RTE_PTYPE_TUNNEL_GRENAT |
480 RTE_PTYPE_INNER_L2_ETHER_VLAN |
481 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
482 RTE_PTYPE_INNER_L4_SCTP,
483 [80] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
484 RTE_PTYPE_TUNNEL_GRENAT |
485 RTE_PTYPE_INNER_L2_ETHER_VLAN |
486 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
487 RTE_PTYPE_INNER_L4_ICMP,
489 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
490 [81] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
491 RTE_PTYPE_TUNNEL_GRENAT |
492 RTE_PTYPE_INNER_L2_ETHER_VLAN |
493 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
494 RTE_PTYPE_INNER_L4_FRAG,
495 [82] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
496 RTE_PTYPE_TUNNEL_GRENAT |
497 RTE_PTYPE_INNER_L2_ETHER_VLAN |
498 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
499 RTE_PTYPE_INNER_L4_NONFRAG,
500 [83] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
501 RTE_PTYPE_TUNNEL_GRENAT |
502 RTE_PTYPE_INNER_L2_ETHER_VLAN |
503 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
504 RTE_PTYPE_INNER_L4_UDP,
506 [85] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
507 RTE_PTYPE_TUNNEL_GRENAT |
508 RTE_PTYPE_INNER_L2_ETHER_VLAN |
509 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
510 RTE_PTYPE_INNER_L4_TCP,
511 [86] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
512 RTE_PTYPE_TUNNEL_GRENAT |
513 RTE_PTYPE_INNER_L2_ETHER_VLAN |
514 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
515 RTE_PTYPE_INNER_L4_SCTP,
516 [87] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
517 RTE_PTYPE_TUNNEL_GRENAT |
518 RTE_PTYPE_INNER_L2_ETHER_VLAN |
519 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
520 RTE_PTYPE_INNER_L4_ICMP,
522 /* Non tunneled IPv6 */
523 [88] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
525 [89] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
526 RTE_PTYPE_L4_NONFRAG,
527 [90] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
530 [92] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
532 [93] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
534 [94] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
538 [95] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
539 RTE_PTYPE_TUNNEL_IP |
540 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
541 RTE_PTYPE_INNER_L4_FRAG,
542 [96] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
543 RTE_PTYPE_TUNNEL_IP |
544 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
545 RTE_PTYPE_INNER_L4_NONFRAG,
546 [97] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
547 RTE_PTYPE_TUNNEL_IP |
548 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
549 RTE_PTYPE_INNER_L4_UDP,
551 [99] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
552 RTE_PTYPE_TUNNEL_IP |
553 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
554 RTE_PTYPE_INNER_L4_TCP,
555 [100] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
556 RTE_PTYPE_TUNNEL_IP |
557 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
558 RTE_PTYPE_INNER_L4_SCTP,
559 [101] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
560 RTE_PTYPE_TUNNEL_IP |
561 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
562 RTE_PTYPE_INNER_L4_ICMP,
565 [102] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
566 RTE_PTYPE_TUNNEL_IP |
567 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
568 RTE_PTYPE_INNER_L4_FRAG,
569 [103] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
570 RTE_PTYPE_TUNNEL_IP |
571 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
572 RTE_PTYPE_INNER_L4_NONFRAG,
573 [104] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
574 RTE_PTYPE_TUNNEL_IP |
575 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
576 RTE_PTYPE_INNER_L4_UDP,
578 [106] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
579 RTE_PTYPE_TUNNEL_IP |
580 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
581 RTE_PTYPE_INNER_L4_TCP,
582 [107] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
583 RTE_PTYPE_TUNNEL_IP |
584 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
585 RTE_PTYPE_INNER_L4_SCTP,
586 [108] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
587 RTE_PTYPE_TUNNEL_IP |
588 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
589 RTE_PTYPE_INNER_L4_ICMP,
591 /* IPv6 --> GRE/Teredo/VXLAN */
592 [109] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
593 RTE_PTYPE_TUNNEL_GRENAT,
595 /* IPv6 --> GRE/Teredo/VXLAN --> IPv4 */
596 [110] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
597 RTE_PTYPE_TUNNEL_GRENAT |
598 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
599 RTE_PTYPE_INNER_L4_FRAG,
600 [111] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
601 RTE_PTYPE_TUNNEL_GRENAT |
602 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
603 RTE_PTYPE_INNER_L4_NONFRAG,
604 [112] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
605 RTE_PTYPE_TUNNEL_GRENAT |
606 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
607 RTE_PTYPE_INNER_L4_UDP,
609 [114] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
610 RTE_PTYPE_TUNNEL_GRENAT |
611 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
612 RTE_PTYPE_INNER_L4_TCP,
613 [115] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
614 RTE_PTYPE_TUNNEL_GRENAT |
615 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
616 RTE_PTYPE_INNER_L4_SCTP,
617 [116] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
618 RTE_PTYPE_TUNNEL_GRENAT |
619 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
620 RTE_PTYPE_INNER_L4_ICMP,
622 /* IPv6 --> GRE/Teredo/VXLAN --> IPv6 */
623 [117] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
624 RTE_PTYPE_TUNNEL_GRENAT |
625 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
626 RTE_PTYPE_INNER_L4_FRAG,
627 [118] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
628 RTE_PTYPE_TUNNEL_GRENAT |
629 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
630 RTE_PTYPE_INNER_L4_NONFRAG,
631 [119] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
632 RTE_PTYPE_TUNNEL_GRENAT |
633 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
634 RTE_PTYPE_INNER_L4_UDP,
636 [121] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
637 RTE_PTYPE_TUNNEL_GRENAT |
638 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
639 RTE_PTYPE_INNER_L4_TCP,
640 [122] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
641 RTE_PTYPE_TUNNEL_GRENAT |
642 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
643 RTE_PTYPE_INNER_L4_SCTP,
644 [123] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
645 RTE_PTYPE_TUNNEL_GRENAT |
646 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
647 RTE_PTYPE_INNER_L4_ICMP,
649 /* IPv6 --> GRE/Teredo/VXLAN --> MAC */
650 [124] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
651 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
653 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
654 [125] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
655 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
656 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
657 RTE_PTYPE_INNER_L4_FRAG,
658 [126] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
659 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
660 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
661 RTE_PTYPE_INNER_L4_NONFRAG,
662 [127] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
663 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
664 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
665 RTE_PTYPE_INNER_L4_UDP,
667 [129] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
668 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
669 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
670 RTE_PTYPE_INNER_L4_TCP,
671 [130] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
672 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
673 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
674 RTE_PTYPE_INNER_L4_SCTP,
675 [131] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
676 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
677 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
678 RTE_PTYPE_INNER_L4_ICMP,
680 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
681 [132] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
682 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
683 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
684 RTE_PTYPE_INNER_L4_FRAG,
685 [133] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
686 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
687 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
688 RTE_PTYPE_INNER_L4_NONFRAG,
689 [134] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
690 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
691 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
692 RTE_PTYPE_INNER_L4_UDP,
694 [136] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
695 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
696 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
697 RTE_PTYPE_INNER_L4_TCP,
698 [137] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
699 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
700 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
701 RTE_PTYPE_INNER_L4_SCTP,
702 [138] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
703 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
704 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
705 RTE_PTYPE_INNER_L4_ICMP,
707 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN */
708 [139] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
709 RTE_PTYPE_TUNNEL_GRENAT |
710 RTE_PTYPE_INNER_L2_ETHER_VLAN,
712 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
713 [140] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
714 RTE_PTYPE_TUNNEL_GRENAT |
715 RTE_PTYPE_INNER_L2_ETHER_VLAN |
716 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
717 RTE_PTYPE_INNER_L4_FRAG,
718 [141] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
719 RTE_PTYPE_TUNNEL_GRENAT |
720 RTE_PTYPE_INNER_L2_ETHER_VLAN |
721 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
722 RTE_PTYPE_INNER_L4_NONFRAG,
723 [142] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
724 RTE_PTYPE_TUNNEL_GRENAT |
725 RTE_PTYPE_INNER_L2_ETHER_VLAN |
726 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
727 RTE_PTYPE_INNER_L4_UDP,
729 [144] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
730 RTE_PTYPE_TUNNEL_GRENAT |
731 RTE_PTYPE_INNER_L2_ETHER_VLAN |
732 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
733 RTE_PTYPE_INNER_L4_TCP,
734 [145] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
735 RTE_PTYPE_TUNNEL_GRENAT |
736 RTE_PTYPE_INNER_L2_ETHER_VLAN |
737 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
738 RTE_PTYPE_INNER_L4_SCTP,
739 [146] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
740 RTE_PTYPE_TUNNEL_GRENAT |
741 RTE_PTYPE_INNER_L2_ETHER_VLAN |
742 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
743 RTE_PTYPE_INNER_L4_ICMP,
745 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
746 [147] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
747 RTE_PTYPE_TUNNEL_GRENAT |
748 RTE_PTYPE_INNER_L2_ETHER_VLAN |
749 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
750 RTE_PTYPE_INNER_L4_FRAG,
751 [148] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
752 RTE_PTYPE_TUNNEL_GRENAT |
753 RTE_PTYPE_INNER_L2_ETHER_VLAN |
754 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
755 RTE_PTYPE_INNER_L4_NONFRAG,
756 [149] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
757 RTE_PTYPE_TUNNEL_GRENAT |
758 RTE_PTYPE_INNER_L2_ETHER_VLAN |
759 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
760 RTE_PTYPE_INNER_L4_UDP,
762 [151] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
763 RTE_PTYPE_TUNNEL_GRENAT |
764 RTE_PTYPE_INNER_L2_ETHER_VLAN |
765 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
766 RTE_PTYPE_INNER_L4_TCP,
767 [152] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
768 RTE_PTYPE_TUNNEL_GRENAT |
769 RTE_PTYPE_INNER_L2_ETHER_VLAN |
770 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
771 RTE_PTYPE_INNER_L4_SCTP,
772 [153] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
773 RTE_PTYPE_TUNNEL_GRENAT |
774 RTE_PTYPE_INNER_L2_ETHER_VLAN |
775 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
776 RTE_PTYPE_INNER_L4_ICMP,
778 /* L2 NSH packet type */
779 [154] = RTE_PTYPE_L2_ETHER_NSH,
780 [155] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
782 [156] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
783 RTE_PTYPE_L4_NONFRAG,
784 [157] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
786 [158] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
788 [159] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
790 [160] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
792 [161] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
794 [162] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
795 RTE_PTYPE_L4_NONFRAG,
796 [163] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
798 [164] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
800 [165] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
802 [166] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
805 /* All others reserved */
808 return type_table[ptype];
811 #endif /* _I40E_RXTX_H_ */