1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
8 #define RTE_PMD_I40E_RX_MAX_BURST 32
9 #define RTE_PMD_I40E_TX_MAX_BURST 32
11 #define RTE_I40E_VPMD_RX_BURST 32
12 #define RTE_I40E_VPMD_TX_BURST 32
13 #define RTE_I40E_RXQ_REARM_THRESH 32
14 #define RTE_I40E_MAX_RX_BURST RTE_I40E_RXQ_REARM_THRESH
15 #define RTE_I40E_TX_MAX_FREE_BUF_SZ 64
16 #define RTE_I40E_DESCS_PER_LOOP 4
18 #define I40E_RXBUF_SZ_1024 1024
19 #define I40E_RXBUF_SZ_2048 2048
21 /* In none-PXE mode QLEN must be whole number of 32 descriptors. */
22 #define I40E_ALIGN_RING_DESC 32
24 #define I40E_MIN_RING_DESC 64
25 #define I40E_MAX_RING_DESC 4096
27 #define I40E_FDIR_NUM_TX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
28 #define I40E_FDIR_NUM_RX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
30 #define I40E_MIN_TSO_MSS 256
31 #define I40E_MAX_TSO_MSS 9674
33 #define I40E_TX_MAX_SEG UINT8_MAX
34 #define I40E_TX_MAX_MTU_SEG 8
36 #define I40E_TX_MIN_PKT_LEN 17
38 /* Shared FDIR masks between scalar / vector drivers */
39 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_MASK 0x03
40 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FD_ID 0x01
41 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FLEX 0x02
42 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_MASK 0x03
43 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_FLEX 0x01
46 #define container_of(ptr, type, member) ({ \
47 typeof(((type *)0)->member)(*__mptr) = (ptr); \
48 (type *)((char *)__mptr - offsetof(type, member)); })
50 #define I40E_TD_CMD (I40E_TX_DESC_CMD_ICRC |\
53 enum i40e_header_split_mode {
54 i40e_header_split_none = 0,
55 i40e_header_split_enabled = 1,
56 i40e_header_split_always = 2,
57 i40e_header_split_reserved
60 #define I40E_HEADER_SPLIT_NONE ((uint8_t)0)
61 #define I40E_HEADER_SPLIT_L2 ((uint8_t)(1 << 0))
62 #define I40E_HEADER_SPLIT_IP ((uint8_t)(1 << 1))
63 #define I40E_HEADER_SPLIT_UDP_TCP ((uint8_t)(1 << 2))
64 #define I40E_HEADER_SPLIT_SCTP ((uint8_t)(1 << 3))
65 #define I40E_HEADER_SPLIT_ALL (I40E_HEADER_SPLIT_L2 | \
66 I40E_HEADER_SPLIT_IP | \
67 I40E_HEADER_SPLIT_UDP_TCP | \
68 I40E_HEADER_SPLIT_SCTP)
70 /* HW desc structure, both 16-byte and 32-byte types are supported */
71 #ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC
72 #define i40e_rx_desc i40e_16byte_rx_desc
74 #define i40e_rx_desc i40e_32byte_rx_desc
77 struct i40e_rx_entry {
78 struct rte_mbuf *mbuf;
82 * Structure associated with each RX queue.
84 struct i40e_rx_queue {
85 struct rte_mempool *mp; /**< mbuf pool to populate RX ring */
86 volatile union i40e_rx_desc *rx_ring;/**< RX ring virtual address */
87 uint64_t rx_ring_phys_addr; /**< RX ring DMA address */
88 struct i40e_rx_entry *sw_ring; /**< address of RX soft ring */
89 uint16_t nb_rx_desc; /**< number of RX descriptors */
90 uint16_t rx_free_thresh; /**< max free RX desc to hold */
91 uint16_t rx_tail; /**< current value of tail */
92 uint16_t nb_rx_hold; /**< number of held free RX desc */
93 struct rte_mbuf *pkt_first_seg; /**< first segment of current packet */
94 struct rte_mbuf *pkt_last_seg; /**< last segment of current packet */
95 struct rte_mbuf fake_mbuf; /**< dummy mbuf */
96 #ifdef RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC
97 uint16_t rx_nb_avail; /**< number of staged packets ready */
98 uint16_t rx_next_avail; /**< index of next staged packets */
99 uint16_t rx_free_trigger; /**< triggers rx buffer allocation */
100 struct rte_mbuf *rx_stage[RTE_PMD_I40E_RX_MAX_BURST * 2];
103 uint16_t rxrearm_nb; /**< number of remaining to be re-armed */
104 uint16_t rxrearm_start; /**< the idx we start the re-arming from */
105 uint64_t mbuf_initializer; /**< value to init mbufs */
107 uint16_t port_id; /**< device port ID */
108 uint8_t crc_len; /**< 0 if CRC stripped, 4 otherwise */
109 uint8_t fdir_enabled; /**< 0 if FDIR disabled, 1 when enabled */
110 uint16_t queue_id; /**< RX queue index */
111 uint16_t reg_idx; /**< RX queue register index */
112 uint8_t drop_en; /**< if not 0, set register bit */
113 volatile uint8_t *qrx_tail; /**< register address of tail */
114 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
115 uint16_t rx_buf_len; /* The packet buffer size */
116 uint16_t rx_hdr_len; /* The header buffer size */
117 uint16_t max_pkt_len; /* Maximum packet length */
118 uint8_t hs_mode; /* Header Split mode */
119 bool q_set; /**< indicate if rx queue has been configured */
120 bool rx_deferred_start; /**< don't start this queue in dev start */
121 uint16_t rx_using_sse; /**<flag indicate the usage of vPMD for rx */
122 uint8_t dcb_tc; /**< Traffic class of rx queue */
123 uint64_t offloads; /**< Rx offload flags of DEV_RX_OFFLOAD_* */
126 struct i40e_tx_entry {
127 struct rte_mbuf *mbuf;
132 struct i40e_vec_tx_entry {
133 struct rte_mbuf *mbuf;
137 * Structure associated with each TX queue.
139 struct i40e_tx_queue {
140 uint16_t nb_tx_desc; /**< number of TX descriptors */
141 uint64_t tx_ring_phys_addr; /**< TX ring DMA address */
142 volatile struct i40e_tx_desc *tx_ring; /**< TX ring virtual address */
143 struct i40e_tx_entry *sw_ring; /**< virtual address of SW ring */
144 uint16_t tx_tail; /**< current value of tail register */
145 volatile uint8_t *qtx_tail; /**< register address of tail */
146 uint16_t nb_tx_used; /**< number of TX desc used since RS bit set */
147 /**< index to last TX descriptor to have been cleaned */
148 uint16_t last_desc_cleaned;
149 /**< Total number of TX descriptors ready to be allocated. */
151 /**< Start freeing TX buffers if there are less free descriptors than
153 uint16_t tx_free_thresh;
154 /** Number of TX descriptors to use before RS bit is set. */
155 uint16_t tx_rs_thresh;
156 uint8_t pthresh; /**< Prefetch threshold register. */
157 uint8_t hthresh; /**< Host threshold register. */
158 uint8_t wthresh; /**< Write-back threshold reg. */
159 uint16_t port_id; /**< Device port identifier. */
160 uint16_t queue_id; /**< TX queue index. */
162 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
165 bool q_set; /**< indicate if tx queue has been configured */
166 bool tx_deferred_start; /**< don't start this queue in dev start */
167 uint8_t dcb_tc; /**< Traffic class of tx queue */
168 uint64_t offloads; /**< Tx offload flags of DEV_RX_OFFLOAD_* */
171 /** Offload features */
172 union i40e_tx_offload {
175 uint64_t l2_len:7; /**< L2 (MAC) Header Length. */
176 uint64_t l3_len:9; /**< L3 (IP) Header Length. */
177 uint64_t l4_len:8; /**< L4 Header Length. */
178 uint64_t tso_segsz:16; /**< TCP TSO segment size */
179 uint64_t outer_l2_len:8; /**< outer L2 Header Length */
180 uint64_t outer_l3_len:16; /**< outer L3 Header Length */
184 int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
185 int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
186 int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
187 int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
188 const uint32_t *i40e_dev_supported_ptypes_get(struct rte_eth_dev *dev);
189 int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
192 unsigned int socket_id,
193 const struct rte_eth_rxconf *rx_conf,
194 struct rte_mempool *mp);
195 int i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
198 unsigned int socket_id,
199 const struct rte_eth_txconf *tx_conf);
200 void i40e_dev_rx_queue_release(void *rxq);
201 void i40e_dev_tx_queue_release(void *txq);
202 uint16_t i40e_recv_pkts(void *rx_queue,
203 struct rte_mbuf **rx_pkts,
205 uint16_t i40e_recv_scattered_pkts(void *rx_queue,
206 struct rte_mbuf **rx_pkts,
208 uint16_t i40e_xmit_pkts(void *tx_queue,
209 struct rte_mbuf **tx_pkts,
211 uint16_t i40e_simple_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
213 uint16_t i40e_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
215 int i40e_tx_queue_init(struct i40e_tx_queue *txq);
216 int i40e_rx_queue_init(struct i40e_rx_queue *rxq);
217 void i40e_free_tx_resources(struct i40e_tx_queue *txq);
218 void i40e_free_rx_resources(struct i40e_rx_queue *rxq);
219 void i40e_dev_clear_queues(struct rte_eth_dev *dev);
220 void i40e_dev_free_queues(struct rte_eth_dev *dev);
221 void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
222 void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
223 void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
224 int i40e_tx_done_cleanup(void *txq, uint32_t free_cnt);
225 int i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq);
226 void i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq);
228 uint32_t i40e_dev_rx_queue_count(struct rte_eth_dev *dev,
229 uint16_t rx_queue_id);
230 int i40e_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);
231 int i40e_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
232 int i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
234 uint16_t i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
236 uint16_t i40e_recv_scattered_pkts_vec(void *rx_queue,
237 struct rte_mbuf **rx_pkts,
239 int i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev);
240 int i40e_rxq_vec_setup(struct i40e_rx_queue *rxq);
241 int i40e_txq_vec_setup(struct i40e_tx_queue *txq);
242 void i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq);
243 uint16_t i40e_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
245 void i40e_set_rx_function(struct rte_eth_dev *dev);
246 void i40e_set_tx_function_flag(struct rte_eth_dev *dev,
247 struct i40e_tx_queue *txq);
248 void i40e_set_tx_function(struct rte_eth_dev *dev);
249 void i40e_set_default_ptype_table(struct rte_eth_dev *dev);
250 void i40e_set_default_pctype_table(struct rte_eth_dev *dev);
251 uint16_t i40e_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
253 uint16_t i40e_recv_scattered_pkts_vec_avx2(void *rx_queue,
254 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
255 uint16_t i40e_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
257 int i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
258 uint16_t i40e_recv_pkts_vec_avx512(void *rx_queue,
259 struct rte_mbuf **rx_pkts,
261 uint16_t i40e_recv_scattered_pkts_vec_avx512(void *rx_queue,
262 struct rte_mbuf **rx_pkts,
264 uint16_t i40e_xmit_pkts_vec_avx512(void *tx_queue,
265 struct rte_mbuf **tx_pkts,
268 /* For each value it means, datasheet of hardware can tell more details
270 * @note: fix i40e_dev_supported_ptypes_get() if any change here.
272 static inline uint32_t
273 i40e_get_default_pkt_type(uint8_t ptype)
275 static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
278 [1] = RTE_PTYPE_L2_ETHER,
279 [2] = RTE_PTYPE_L2_ETHER_TIMESYNC,
280 /* [3] - [5] reserved */
281 [6] = RTE_PTYPE_L2_ETHER_LLDP,
282 /* [7] - [10] reserved */
283 [11] = RTE_PTYPE_L2_ETHER_ARP,
284 /* [12] - [21] reserved */
286 /* Non tunneled IPv4 */
287 [22] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
289 [23] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
290 RTE_PTYPE_L4_NONFRAG,
291 [24] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
294 [26] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
296 [27] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
298 [28] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
302 [29] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
303 RTE_PTYPE_TUNNEL_IP |
304 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
305 RTE_PTYPE_INNER_L4_FRAG,
306 [30] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
307 RTE_PTYPE_TUNNEL_IP |
308 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
309 RTE_PTYPE_INNER_L4_NONFRAG,
310 [31] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
311 RTE_PTYPE_TUNNEL_IP |
312 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
313 RTE_PTYPE_INNER_L4_UDP,
315 [33] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
316 RTE_PTYPE_TUNNEL_IP |
317 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
318 RTE_PTYPE_INNER_L4_TCP,
319 [34] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
320 RTE_PTYPE_TUNNEL_IP |
321 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
322 RTE_PTYPE_INNER_L4_SCTP,
323 [35] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
324 RTE_PTYPE_TUNNEL_IP |
325 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
326 RTE_PTYPE_INNER_L4_ICMP,
329 [36] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
330 RTE_PTYPE_TUNNEL_IP |
331 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
332 RTE_PTYPE_INNER_L4_FRAG,
333 [37] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
334 RTE_PTYPE_TUNNEL_IP |
335 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
336 RTE_PTYPE_INNER_L4_NONFRAG,
337 [38] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
338 RTE_PTYPE_TUNNEL_IP |
339 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
340 RTE_PTYPE_INNER_L4_UDP,
342 [40] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
343 RTE_PTYPE_TUNNEL_IP |
344 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
345 RTE_PTYPE_INNER_L4_TCP,
346 [41] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
347 RTE_PTYPE_TUNNEL_IP |
348 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
349 RTE_PTYPE_INNER_L4_SCTP,
350 [42] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
351 RTE_PTYPE_TUNNEL_IP |
352 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
353 RTE_PTYPE_INNER_L4_ICMP,
355 /* IPv4 --> GRE/Teredo/VXLAN */
356 [43] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
357 RTE_PTYPE_TUNNEL_GRENAT,
359 /* IPv4 --> GRE/Teredo/VXLAN --> IPv4 */
360 [44] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
361 RTE_PTYPE_TUNNEL_GRENAT |
362 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
363 RTE_PTYPE_INNER_L4_FRAG,
364 [45] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
365 RTE_PTYPE_TUNNEL_GRENAT |
366 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
367 RTE_PTYPE_INNER_L4_NONFRAG,
368 [46] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
369 RTE_PTYPE_TUNNEL_GRENAT |
370 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
371 RTE_PTYPE_INNER_L4_UDP,
373 [48] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
374 RTE_PTYPE_TUNNEL_GRENAT |
375 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
376 RTE_PTYPE_INNER_L4_TCP,
377 [49] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
378 RTE_PTYPE_TUNNEL_GRENAT |
379 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
380 RTE_PTYPE_INNER_L4_SCTP,
381 [50] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
382 RTE_PTYPE_TUNNEL_GRENAT |
383 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
384 RTE_PTYPE_INNER_L4_ICMP,
386 /* IPv4 --> GRE/Teredo/VXLAN --> IPv6 */
387 [51] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
388 RTE_PTYPE_TUNNEL_GRENAT |
389 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
390 RTE_PTYPE_INNER_L4_FRAG,
391 [52] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
392 RTE_PTYPE_TUNNEL_GRENAT |
393 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
394 RTE_PTYPE_INNER_L4_NONFRAG,
395 [53] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
396 RTE_PTYPE_TUNNEL_GRENAT |
397 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
398 RTE_PTYPE_INNER_L4_UDP,
400 [55] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
401 RTE_PTYPE_TUNNEL_GRENAT |
402 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
403 RTE_PTYPE_INNER_L4_TCP,
404 [56] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
405 RTE_PTYPE_TUNNEL_GRENAT |
406 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
407 RTE_PTYPE_INNER_L4_SCTP,
408 [57] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
409 RTE_PTYPE_TUNNEL_GRENAT |
410 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
411 RTE_PTYPE_INNER_L4_ICMP,
413 /* IPv4 --> GRE/Teredo/VXLAN --> MAC */
414 [58] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
415 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
417 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
418 [59] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
419 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
420 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
421 RTE_PTYPE_INNER_L4_FRAG,
422 [60] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
423 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
424 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
425 RTE_PTYPE_INNER_L4_NONFRAG,
426 [61] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
427 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
428 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
429 RTE_PTYPE_INNER_L4_UDP,
431 [63] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
432 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
433 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
434 RTE_PTYPE_INNER_L4_TCP,
435 [64] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
436 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
437 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
438 RTE_PTYPE_INNER_L4_SCTP,
439 [65] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
440 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
441 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
442 RTE_PTYPE_INNER_L4_ICMP,
444 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
445 [66] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
446 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
447 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
448 RTE_PTYPE_INNER_L4_FRAG,
449 [67] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
450 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
451 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
452 RTE_PTYPE_INNER_L4_NONFRAG,
453 [68] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
454 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
455 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
456 RTE_PTYPE_INNER_L4_UDP,
458 [70] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
459 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
460 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
461 RTE_PTYPE_INNER_L4_TCP,
462 [71] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
463 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
464 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
465 RTE_PTYPE_INNER_L4_SCTP,
466 [72] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
467 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
468 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
469 RTE_PTYPE_INNER_L4_ICMP,
471 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN */
472 [73] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
473 RTE_PTYPE_TUNNEL_GRENAT |
474 RTE_PTYPE_INNER_L2_ETHER_VLAN,
476 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
477 [74] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
478 RTE_PTYPE_TUNNEL_GRENAT |
479 RTE_PTYPE_INNER_L2_ETHER_VLAN |
480 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
481 RTE_PTYPE_INNER_L4_FRAG,
482 [75] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
483 RTE_PTYPE_TUNNEL_GRENAT |
484 RTE_PTYPE_INNER_L2_ETHER_VLAN |
485 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
486 RTE_PTYPE_INNER_L4_NONFRAG,
487 [76] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
488 RTE_PTYPE_TUNNEL_GRENAT |
489 RTE_PTYPE_INNER_L2_ETHER_VLAN |
490 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
491 RTE_PTYPE_INNER_L4_UDP,
493 [78] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
494 RTE_PTYPE_TUNNEL_GRENAT |
495 RTE_PTYPE_INNER_L2_ETHER_VLAN |
496 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
497 RTE_PTYPE_INNER_L4_TCP,
498 [79] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
499 RTE_PTYPE_TUNNEL_GRENAT |
500 RTE_PTYPE_INNER_L2_ETHER_VLAN |
501 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
502 RTE_PTYPE_INNER_L4_SCTP,
503 [80] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
504 RTE_PTYPE_TUNNEL_GRENAT |
505 RTE_PTYPE_INNER_L2_ETHER_VLAN |
506 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
507 RTE_PTYPE_INNER_L4_ICMP,
509 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
510 [81] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
511 RTE_PTYPE_TUNNEL_GRENAT |
512 RTE_PTYPE_INNER_L2_ETHER_VLAN |
513 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
514 RTE_PTYPE_INNER_L4_FRAG,
515 [82] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
516 RTE_PTYPE_TUNNEL_GRENAT |
517 RTE_PTYPE_INNER_L2_ETHER_VLAN |
518 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
519 RTE_PTYPE_INNER_L4_NONFRAG,
520 [83] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
521 RTE_PTYPE_TUNNEL_GRENAT |
522 RTE_PTYPE_INNER_L2_ETHER_VLAN |
523 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
524 RTE_PTYPE_INNER_L4_UDP,
526 [85] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
527 RTE_PTYPE_TUNNEL_GRENAT |
528 RTE_PTYPE_INNER_L2_ETHER_VLAN |
529 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
530 RTE_PTYPE_INNER_L4_TCP,
531 [86] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
532 RTE_PTYPE_TUNNEL_GRENAT |
533 RTE_PTYPE_INNER_L2_ETHER_VLAN |
534 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
535 RTE_PTYPE_INNER_L4_SCTP,
536 [87] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
537 RTE_PTYPE_TUNNEL_GRENAT |
538 RTE_PTYPE_INNER_L2_ETHER_VLAN |
539 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
540 RTE_PTYPE_INNER_L4_ICMP,
542 /* Non tunneled IPv6 */
543 [88] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
545 [89] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
546 RTE_PTYPE_L4_NONFRAG,
547 [90] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
550 [92] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
552 [93] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
554 [94] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
558 [95] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
559 RTE_PTYPE_TUNNEL_IP |
560 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
561 RTE_PTYPE_INNER_L4_FRAG,
562 [96] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
563 RTE_PTYPE_TUNNEL_IP |
564 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
565 RTE_PTYPE_INNER_L4_NONFRAG,
566 [97] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
567 RTE_PTYPE_TUNNEL_IP |
568 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
569 RTE_PTYPE_INNER_L4_UDP,
571 [99] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
572 RTE_PTYPE_TUNNEL_IP |
573 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
574 RTE_PTYPE_INNER_L4_TCP,
575 [100] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
576 RTE_PTYPE_TUNNEL_IP |
577 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
578 RTE_PTYPE_INNER_L4_SCTP,
579 [101] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
580 RTE_PTYPE_TUNNEL_IP |
581 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
582 RTE_PTYPE_INNER_L4_ICMP,
585 [102] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
586 RTE_PTYPE_TUNNEL_IP |
587 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
588 RTE_PTYPE_INNER_L4_FRAG,
589 [103] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
590 RTE_PTYPE_TUNNEL_IP |
591 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
592 RTE_PTYPE_INNER_L4_NONFRAG,
593 [104] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
594 RTE_PTYPE_TUNNEL_IP |
595 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
596 RTE_PTYPE_INNER_L4_UDP,
598 [106] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
599 RTE_PTYPE_TUNNEL_IP |
600 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
601 RTE_PTYPE_INNER_L4_TCP,
602 [107] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
603 RTE_PTYPE_TUNNEL_IP |
604 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
605 RTE_PTYPE_INNER_L4_SCTP,
606 [108] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
607 RTE_PTYPE_TUNNEL_IP |
608 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
609 RTE_PTYPE_INNER_L4_ICMP,
611 /* IPv6 --> GRE/Teredo/VXLAN */
612 [109] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
613 RTE_PTYPE_TUNNEL_GRENAT,
615 /* IPv6 --> GRE/Teredo/VXLAN --> IPv4 */
616 [110] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
617 RTE_PTYPE_TUNNEL_GRENAT |
618 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
619 RTE_PTYPE_INNER_L4_FRAG,
620 [111] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
621 RTE_PTYPE_TUNNEL_GRENAT |
622 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
623 RTE_PTYPE_INNER_L4_NONFRAG,
624 [112] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
625 RTE_PTYPE_TUNNEL_GRENAT |
626 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
627 RTE_PTYPE_INNER_L4_UDP,
629 [114] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
630 RTE_PTYPE_TUNNEL_GRENAT |
631 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
632 RTE_PTYPE_INNER_L4_TCP,
633 [115] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
634 RTE_PTYPE_TUNNEL_GRENAT |
635 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
636 RTE_PTYPE_INNER_L4_SCTP,
637 [116] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
638 RTE_PTYPE_TUNNEL_GRENAT |
639 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
640 RTE_PTYPE_INNER_L4_ICMP,
642 /* IPv6 --> GRE/Teredo/VXLAN --> IPv6 */
643 [117] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
644 RTE_PTYPE_TUNNEL_GRENAT |
645 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
646 RTE_PTYPE_INNER_L4_FRAG,
647 [118] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
648 RTE_PTYPE_TUNNEL_GRENAT |
649 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
650 RTE_PTYPE_INNER_L4_NONFRAG,
651 [119] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
652 RTE_PTYPE_TUNNEL_GRENAT |
653 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
654 RTE_PTYPE_INNER_L4_UDP,
656 [121] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
657 RTE_PTYPE_TUNNEL_GRENAT |
658 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
659 RTE_PTYPE_INNER_L4_TCP,
660 [122] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
661 RTE_PTYPE_TUNNEL_GRENAT |
662 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
663 RTE_PTYPE_INNER_L4_SCTP,
664 [123] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
665 RTE_PTYPE_TUNNEL_GRENAT |
666 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
667 RTE_PTYPE_INNER_L4_ICMP,
669 /* IPv6 --> GRE/Teredo/VXLAN --> MAC */
670 [124] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
671 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
673 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
674 [125] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
675 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
676 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
677 RTE_PTYPE_INNER_L4_FRAG,
678 [126] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
679 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
680 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
681 RTE_PTYPE_INNER_L4_NONFRAG,
682 [127] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
683 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
684 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
685 RTE_PTYPE_INNER_L4_UDP,
687 [129] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
688 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
689 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
690 RTE_PTYPE_INNER_L4_TCP,
691 [130] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
692 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
693 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
694 RTE_PTYPE_INNER_L4_SCTP,
695 [131] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
696 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
697 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
698 RTE_PTYPE_INNER_L4_ICMP,
700 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
701 [132] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
702 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
703 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
704 RTE_PTYPE_INNER_L4_FRAG,
705 [133] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
706 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
707 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
708 RTE_PTYPE_INNER_L4_NONFRAG,
709 [134] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
710 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
711 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
712 RTE_PTYPE_INNER_L4_UDP,
714 [136] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
715 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
716 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
717 RTE_PTYPE_INNER_L4_TCP,
718 [137] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
719 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
720 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
721 RTE_PTYPE_INNER_L4_SCTP,
722 [138] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
723 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
724 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
725 RTE_PTYPE_INNER_L4_ICMP,
727 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN */
728 [139] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
729 RTE_PTYPE_TUNNEL_GRENAT |
730 RTE_PTYPE_INNER_L2_ETHER_VLAN,
732 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
733 [140] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
734 RTE_PTYPE_TUNNEL_GRENAT |
735 RTE_PTYPE_INNER_L2_ETHER_VLAN |
736 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
737 RTE_PTYPE_INNER_L4_FRAG,
738 [141] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
739 RTE_PTYPE_TUNNEL_GRENAT |
740 RTE_PTYPE_INNER_L2_ETHER_VLAN |
741 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
742 RTE_PTYPE_INNER_L4_NONFRAG,
743 [142] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
744 RTE_PTYPE_TUNNEL_GRENAT |
745 RTE_PTYPE_INNER_L2_ETHER_VLAN |
746 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
747 RTE_PTYPE_INNER_L4_UDP,
749 [144] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
750 RTE_PTYPE_TUNNEL_GRENAT |
751 RTE_PTYPE_INNER_L2_ETHER_VLAN |
752 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
753 RTE_PTYPE_INNER_L4_TCP,
754 [145] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
755 RTE_PTYPE_TUNNEL_GRENAT |
756 RTE_PTYPE_INNER_L2_ETHER_VLAN |
757 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
758 RTE_PTYPE_INNER_L4_SCTP,
759 [146] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
760 RTE_PTYPE_TUNNEL_GRENAT |
761 RTE_PTYPE_INNER_L2_ETHER_VLAN |
762 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
763 RTE_PTYPE_INNER_L4_ICMP,
765 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
766 [147] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
767 RTE_PTYPE_TUNNEL_GRENAT |
768 RTE_PTYPE_INNER_L2_ETHER_VLAN |
769 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
770 RTE_PTYPE_INNER_L4_FRAG,
771 [148] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
772 RTE_PTYPE_TUNNEL_GRENAT |
773 RTE_PTYPE_INNER_L2_ETHER_VLAN |
774 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
775 RTE_PTYPE_INNER_L4_NONFRAG,
776 [149] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
777 RTE_PTYPE_TUNNEL_GRENAT |
778 RTE_PTYPE_INNER_L2_ETHER_VLAN |
779 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
780 RTE_PTYPE_INNER_L4_UDP,
782 [151] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
783 RTE_PTYPE_TUNNEL_GRENAT |
784 RTE_PTYPE_INNER_L2_ETHER_VLAN |
785 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
786 RTE_PTYPE_INNER_L4_TCP,
787 [152] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
788 RTE_PTYPE_TUNNEL_GRENAT |
789 RTE_PTYPE_INNER_L2_ETHER_VLAN |
790 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
791 RTE_PTYPE_INNER_L4_SCTP,
792 [153] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
793 RTE_PTYPE_TUNNEL_GRENAT |
794 RTE_PTYPE_INNER_L2_ETHER_VLAN |
795 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
796 RTE_PTYPE_INNER_L4_ICMP,
798 /* L2 NSH packet type */
799 [154] = RTE_PTYPE_L2_ETHER_NSH,
800 [155] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
802 [156] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
803 RTE_PTYPE_L4_NONFRAG,
804 [157] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
806 [158] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
808 [159] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
810 [160] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
812 [161] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
814 [162] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
815 RTE_PTYPE_L4_NONFRAG,
816 [163] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
818 [164] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
820 [165] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
822 [166] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
825 /* All others reserved */
828 return type_table[ptype];
831 #endif /* _I40E_RXTX_H_ */