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34 #include <rte_malloc.h>
36 #include "base/i40e_prototype.h"
37 #include "i40e_ethdev.h"
39 static int i40e_tm_capabilities_get(struct rte_eth_dev *dev,
40 struct rte_tm_capabilities *cap,
41 struct rte_tm_error *error);
42 static int i40e_shaper_profile_add(struct rte_eth_dev *dev,
43 uint32_t shaper_profile_id,
44 struct rte_tm_shaper_params *profile,
45 struct rte_tm_error *error);
46 static int i40e_shaper_profile_del(struct rte_eth_dev *dev,
47 uint32_t shaper_profile_id,
48 struct rte_tm_error *error);
49 static int i40e_node_add(struct rte_eth_dev *dev, uint32_t node_id,
50 uint32_t parent_node_id, uint32_t priority,
51 uint32_t weight, uint32_t level_id,
52 struct rte_tm_node_params *params,
53 struct rte_tm_error *error);
54 static int i40e_node_delete(struct rte_eth_dev *dev, uint32_t node_id,
55 struct rte_tm_error *error);
56 static int i40e_node_type_get(struct rte_eth_dev *dev, uint32_t node_id,
57 int *is_leaf, struct rte_tm_error *error);
58 static int i40e_level_capabilities_get(struct rte_eth_dev *dev,
60 struct rte_tm_level_capabilities *cap,
61 struct rte_tm_error *error);
62 static int i40e_node_capabilities_get(struct rte_eth_dev *dev,
64 struct rte_tm_node_capabilities *cap,
65 struct rte_tm_error *error);
66 static int i40e_hierarchy_commit(struct rte_eth_dev *dev,
68 struct rte_tm_error *error);
70 const struct rte_tm_ops i40e_tm_ops = {
71 .capabilities_get = i40e_tm_capabilities_get,
72 .shaper_profile_add = i40e_shaper_profile_add,
73 .shaper_profile_delete = i40e_shaper_profile_del,
74 .node_add = i40e_node_add,
75 .node_delete = i40e_node_delete,
76 .node_type_get = i40e_node_type_get,
77 .level_capabilities_get = i40e_level_capabilities_get,
78 .node_capabilities_get = i40e_node_capabilities_get,
79 .hierarchy_commit = i40e_hierarchy_commit,
83 i40e_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
89 *(const void **)arg = &i40e_tm_ops;
95 i40e_tm_conf_init(struct rte_eth_dev *dev)
97 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
99 /* initialize shaper profile list */
100 TAILQ_INIT(&pf->tm_conf.shaper_profile_list);
102 /* initialize node configuration */
103 pf->tm_conf.root = NULL;
104 TAILQ_INIT(&pf->tm_conf.tc_list);
105 TAILQ_INIT(&pf->tm_conf.queue_list);
106 pf->tm_conf.nb_tc_node = 0;
107 pf->tm_conf.nb_queue_node = 0;
108 pf->tm_conf.committed = false;
112 i40e_tm_conf_uninit(struct rte_eth_dev *dev)
114 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
115 struct i40e_tm_shaper_profile *shaper_profile;
116 struct i40e_tm_node *tm_node;
118 /* clear node configuration */
119 while ((tm_node = TAILQ_FIRST(&pf->tm_conf.queue_list))) {
120 TAILQ_REMOVE(&pf->tm_conf.queue_list, tm_node, node);
123 pf->tm_conf.nb_queue_node = 0;
124 while ((tm_node = TAILQ_FIRST(&pf->tm_conf.tc_list))) {
125 TAILQ_REMOVE(&pf->tm_conf.tc_list, tm_node, node);
128 pf->tm_conf.nb_tc_node = 0;
129 if (pf->tm_conf.root) {
130 rte_free(pf->tm_conf.root);
131 pf->tm_conf.root = NULL;
134 /* Remove all shaper profiles */
135 while ((shaper_profile =
136 TAILQ_FIRST(&pf->tm_conf.shaper_profile_list))) {
137 TAILQ_REMOVE(&pf->tm_conf.shaper_profile_list,
138 shaper_profile, node);
139 rte_free(shaper_profile);
143 static inline uint16_t
144 i40e_tc_nb_get(struct rte_eth_dev *dev)
146 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
147 struct i40e_vsi *main_vsi = pf->main_vsi;
151 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
152 if (main_vsi->enabled_tc & BIT_ULL(i))
160 i40e_tm_capabilities_get(struct rte_eth_dev *dev,
161 struct rte_tm_capabilities *cap,
162 struct rte_tm_error *error)
164 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
165 uint16_t tc_nb = i40e_tc_nb_get(dev);
170 if (tc_nb > hw->func_caps.num_tx_qp)
173 error->type = RTE_TM_ERROR_TYPE_NONE;
175 /* set all the parameters to 0 first. */
176 memset(cap, 0, sizeof(struct rte_tm_capabilities));
179 * support port + TCs + queues
180 * here shows the max capability not the current configuration.
182 cap->n_nodes_max = 1 + I40E_MAX_TRAFFIC_CLASS + hw->func_caps.num_tx_qp;
183 cap->n_levels_max = 3; /* port, TC, queue */
184 cap->non_leaf_nodes_identical = 1;
185 cap->leaf_nodes_identical = 1;
186 cap->shaper_n_max = cap->n_nodes_max;
187 cap->shaper_private_n_max = cap->n_nodes_max;
188 cap->shaper_private_dual_rate_n_max = 0;
189 cap->shaper_private_rate_min = 0;
190 /* 40Gbps -> 5GBps */
191 cap->shaper_private_rate_max = 5000000000ull;
192 cap->shaper_shared_n_max = 0;
193 cap->shaper_shared_n_nodes_per_shaper_max = 0;
194 cap->shaper_shared_n_shapers_per_node_max = 0;
195 cap->shaper_shared_dual_rate_n_max = 0;
196 cap->shaper_shared_rate_min = 0;
197 cap->shaper_shared_rate_max = 0;
198 cap->sched_n_children_max = hw->func_caps.num_tx_qp;
200 * HW supports SP. But no plan to support it now.
201 * So, all the nodes should have the same priority.
203 cap->sched_sp_n_priorities_max = 1;
204 cap->sched_wfq_n_children_per_group_max = 0;
205 cap->sched_wfq_n_groups_max = 0;
207 * SW only supports fair round robin now.
208 * So, all the nodes should have the same weight.
210 cap->sched_wfq_weight_max = 1;
211 cap->cman_head_drop_supported = 0;
212 cap->dynamic_update_mask = 0;
213 cap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD;
214 cap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;
215 cap->cman_wred_context_n_max = 0;
216 cap->cman_wred_context_private_n_max = 0;
217 cap->cman_wred_context_shared_n_max = 0;
218 cap->cman_wred_context_shared_n_nodes_per_context_max = 0;
219 cap->cman_wred_context_shared_n_contexts_per_node_max = 0;
225 static inline struct i40e_tm_shaper_profile *
226 i40e_shaper_profile_search(struct rte_eth_dev *dev,
227 uint32_t shaper_profile_id)
229 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
230 struct i40e_shaper_profile_list *shaper_profile_list =
231 &pf->tm_conf.shaper_profile_list;
232 struct i40e_tm_shaper_profile *shaper_profile;
234 TAILQ_FOREACH(shaper_profile, shaper_profile_list, node) {
235 if (shaper_profile_id == shaper_profile->shaper_profile_id)
236 return shaper_profile;
243 i40e_shaper_profile_param_check(struct rte_tm_shaper_params *profile,
244 struct rte_tm_error *error)
246 /* min rate not supported */
247 if (profile->committed.rate) {
248 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_RATE;
249 error->message = "committed rate not supported";
252 /* min bucket size not supported */
253 if (profile->committed.size) {
254 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_SIZE;
255 error->message = "committed bucket size not supported";
258 /* max bucket size not supported */
259 if (profile->peak.size) {
260 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_SIZE;
261 error->message = "peak bucket size not supported";
264 /* length adjustment not supported */
265 if (profile->pkt_length_adjust) {
266 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN;
267 error->message = "packet length adjustment not supported";
275 i40e_shaper_profile_add(struct rte_eth_dev *dev,
276 uint32_t shaper_profile_id,
277 struct rte_tm_shaper_params *profile,
278 struct rte_tm_error *error)
280 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
281 struct i40e_tm_shaper_profile *shaper_profile;
284 if (!profile || !error)
287 ret = i40e_shaper_profile_param_check(profile, error);
291 shaper_profile = i40e_shaper_profile_search(dev, shaper_profile_id);
293 if (shaper_profile) {
294 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
295 error->message = "profile ID exist";
299 shaper_profile = rte_zmalloc("i40e_tm_shaper_profile",
300 sizeof(struct i40e_tm_shaper_profile),
304 shaper_profile->shaper_profile_id = shaper_profile_id;
305 rte_memcpy(&shaper_profile->profile, profile,
306 sizeof(struct rte_tm_shaper_params));
307 TAILQ_INSERT_TAIL(&pf->tm_conf.shaper_profile_list,
308 shaper_profile, node);
314 i40e_shaper_profile_del(struct rte_eth_dev *dev,
315 uint32_t shaper_profile_id,
316 struct rte_tm_error *error)
318 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
319 struct i40e_tm_shaper_profile *shaper_profile;
324 shaper_profile = i40e_shaper_profile_search(dev, shaper_profile_id);
326 if (!shaper_profile) {
327 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
328 error->message = "profile ID not exist";
332 /* don't delete a profile if it's used by one or several nodes */
333 if (shaper_profile->reference_count) {
334 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
335 error->message = "profile in use";
339 TAILQ_REMOVE(&pf->tm_conf.shaper_profile_list, shaper_profile, node);
340 rte_free(shaper_profile);
345 static inline struct i40e_tm_node *
346 i40e_tm_node_search(struct rte_eth_dev *dev,
347 uint32_t node_id, enum i40e_tm_node_type *node_type)
349 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
350 struct i40e_tm_node_list *queue_list = &pf->tm_conf.queue_list;
351 struct i40e_tm_node_list *tc_list = &pf->tm_conf.tc_list;
352 struct i40e_tm_node *tm_node;
354 if (pf->tm_conf.root && pf->tm_conf.root->id == node_id) {
355 *node_type = I40E_TM_NODE_TYPE_PORT;
356 return pf->tm_conf.root;
359 TAILQ_FOREACH(tm_node, tc_list, node) {
360 if (tm_node->id == node_id) {
361 *node_type = I40E_TM_NODE_TYPE_TC;
366 TAILQ_FOREACH(tm_node, queue_list, node) {
367 if (tm_node->id == node_id) {
368 *node_type = I40E_TM_NODE_TYPE_QUEUE;
377 i40e_node_param_check(struct rte_eth_dev *dev, uint32_t node_id,
378 uint32_t priority, uint32_t weight,
379 struct rte_tm_node_params *params,
380 struct rte_tm_error *error)
382 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
384 if (node_id == RTE_TM_NODE_ID_NULL) {
385 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
386 error->message = "invalid node id";
391 error->type = RTE_TM_ERROR_TYPE_NODE_PRIORITY;
392 error->message = "priority should be 0";
397 error->type = RTE_TM_ERROR_TYPE_NODE_WEIGHT;
398 error->message = "weight must be 1";
402 /* not support shared shaper */
403 if (params->shared_shaper_id) {
404 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_SHAPER_ID;
405 error->message = "shared shaper not supported";
408 if (params->n_shared_shapers) {
409 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_SHAPERS;
410 error->message = "shared shaper not supported";
414 /* for non-leaf node */
415 if (node_id >= hw->func_caps.num_tx_qp) {
416 if (params->nonleaf.wfq_weight_mode) {
418 RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
419 error->message = "WFQ not supported";
422 if (params->nonleaf.n_sp_priorities != 1) {
424 RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SP_PRIORITIES;
425 error->message = "SP priority not supported";
427 } else if (params->nonleaf.wfq_weight_mode &&
428 !(*params->nonleaf.wfq_weight_mode)) {
430 RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
431 error->message = "WFP should be byte mode";
439 if (params->leaf.cman) {
440 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_CMAN;
441 error->message = "Congestion management not supported";
444 if (params->leaf.wred.wred_profile_id !=
445 RTE_TM_WRED_PROFILE_ID_NONE) {
447 RTE_TM_ERROR_TYPE_NODE_PARAMS_WRED_PROFILE_ID;
448 error->message = "WRED not supported";
451 if (params->leaf.wred.shared_wred_context_id) {
453 RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_WRED_CONTEXT_ID;
454 error->message = "WRED not supported";
457 if (params->leaf.wred.n_shared_wred_contexts) {
459 RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_WRED_CONTEXTS;
460 error->message = "WRED not supported";
468 * Now the TC and queue configuration is controlled by DCB.
469 * We need check if the node configuration follows the DCB configuration.
470 * In the future, we may use TM to cover DCB.
473 i40e_node_add(struct rte_eth_dev *dev, uint32_t node_id,
474 uint32_t parent_node_id, uint32_t priority,
475 uint32_t weight, uint32_t level_id,
476 struct rte_tm_node_params *params,
477 struct rte_tm_error *error)
479 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
480 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
481 enum i40e_tm_node_type node_type = I40E_TM_NODE_TYPE_MAX;
482 enum i40e_tm_node_type parent_node_type = I40E_TM_NODE_TYPE_MAX;
483 struct i40e_tm_shaper_profile *shaper_profile = NULL;
484 struct i40e_tm_node *tm_node;
485 struct i40e_tm_node *parent_node;
489 if (!params || !error)
492 /* if already committed */
493 if (pf->tm_conf.committed) {
494 error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
495 error->message = "already committed";
499 ret = i40e_node_param_check(dev, node_id, priority, weight,
504 /* check if the node ID is already used */
505 if (i40e_tm_node_search(dev, node_id, &node_type)) {
506 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
507 error->message = "node id already used";
511 /* check the shaper profile id */
512 if (params->shaper_profile_id != RTE_TM_SHAPER_PROFILE_ID_NONE) {
513 shaper_profile = i40e_shaper_profile_search(
514 dev, params->shaper_profile_id);
515 if (!shaper_profile) {
517 RTE_TM_ERROR_TYPE_NODE_PARAMS_SHAPER_PROFILE_ID;
518 error->message = "shaper profile not exist";
523 /* root node if not have a parent */
524 if (parent_node_id == RTE_TM_NODE_ID_NULL) {
526 if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
527 level_id > I40E_TM_NODE_TYPE_PORT) {
528 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
529 error->message = "Wrong level";
533 /* obviously no more than one root */
534 if (pf->tm_conf.root) {
535 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
536 error->message = "already have a root";
540 /* add the root node */
541 tm_node = rte_zmalloc("i40e_tm_node",
542 sizeof(struct i40e_tm_node),
546 tm_node->id = node_id;
547 tm_node->priority = priority;
548 tm_node->weight = weight;
549 tm_node->reference_count = 0;
550 tm_node->parent = NULL;
551 tm_node->shaper_profile = shaper_profile;
552 rte_memcpy(&tm_node->params, params,
553 sizeof(struct rte_tm_node_params));
554 pf->tm_conf.root = tm_node;
556 /* increase the reference counter of the shaper profile */
558 shaper_profile->reference_count++;
563 /* TC or queue node */
564 /* check the parent node */
565 parent_node = i40e_tm_node_search(dev, parent_node_id,
568 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
569 error->message = "parent not exist";
572 if (parent_node_type != I40E_TM_NODE_TYPE_PORT &&
573 parent_node_type != I40E_TM_NODE_TYPE_TC) {
574 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
575 error->message = "parent is not port or TC";
579 if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
580 level_id != parent_node_type + 1) {
581 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
582 error->message = "Wrong level";
586 /* check the node number */
587 if (parent_node_type == I40E_TM_NODE_TYPE_PORT) {
588 /* check the TC number */
589 tc_nb = i40e_tc_nb_get(dev);
590 if (pf->tm_conf.nb_tc_node >= tc_nb) {
591 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
592 error->message = "too many TCs";
596 /* check the queue number */
597 if (pf->tm_conf.nb_queue_node >= hw->func_caps.num_tx_qp) {
598 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
599 error->message = "too many queues";
605 * For queue, the node id means queue id.
607 if (node_id >= hw->func_caps.num_tx_qp) {
608 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
609 error->message = "too large queue id";
614 /* add the TC or queue node */
615 tm_node = rte_zmalloc("i40e_tm_node",
616 sizeof(struct i40e_tm_node),
620 tm_node->id = node_id;
621 tm_node->priority = priority;
622 tm_node->weight = weight;
623 tm_node->reference_count = 0;
624 tm_node->parent = parent_node;
625 tm_node->shaper_profile = shaper_profile;
626 rte_memcpy(&tm_node->params, params,
627 sizeof(struct rte_tm_node_params));
628 if (parent_node_type == I40E_TM_NODE_TYPE_PORT) {
629 TAILQ_INSERT_TAIL(&pf->tm_conf.tc_list,
631 pf->tm_conf.nb_tc_node++;
633 TAILQ_INSERT_TAIL(&pf->tm_conf.queue_list,
635 pf->tm_conf.nb_queue_node++;
637 tm_node->parent->reference_count++;
639 /* increase the reference counter of the shaper profile */
641 shaper_profile->reference_count++;
647 i40e_node_delete(struct rte_eth_dev *dev, uint32_t node_id,
648 struct rte_tm_error *error)
650 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
651 enum i40e_tm_node_type node_type = I40E_TM_NODE_TYPE_MAX;
652 struct i40e_tm_node *tm_node;
657 /* if already committed */
658 if (pf->tm_conf.committed) {
659 error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
660 error->message = "already committed";
664 if (node_id == RTE_TM_NODE_ID_NULL) {
665 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
666 error->message = "invalid node id";
670 /* check if the node id exists */
671 tm_node = i40e_tm_node_search(dev, node_id, &node_type);
673 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
674 error->message = "no such node";
678 /* the node should have no child */
679 if (tm_node->reference_count) {
680 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
682 "cannot delete a node which has children";
687 if (node_type == I40E_TM_NODE_TYPE_PORT) {
688 if (tm_node->shaper_profile)
689 tm_node->shaper_profile->reference_count--;
691 pf->tm_conf.root = NULL;
695 /* TC or queue node */
696 if (tm_node->shaper_profile)
697 tm_node->shaper_profile->reference_count--;
698 tm_node->parent->reference_count--;
699 if (node_type == I40E_TM_NODE_TYPE_TC) {
700 TAILQ_REMOVE(&pf->tm_conf.tc_list, tm_node, node);
701 pf->tm_conf.nb_tc_node--;
703 TAILQ_REMOVE(&pf->tm_conf.queue_list, tm_node, node);
704 pf->tm_conf.nb_queue_node--;
712 i40e_node_type_get(struct rte_eth_dev *dev, uint32_t node_id,
713 int *is_leaf, struct rte_tm_error *error)
715 enum i40e_tm_node_type node_type = I40E_TM_NODE_TYPE_MAX;
716 struct i40e_tm_node *tm_node;
718 if (!is_leaf || !error)
721 if (node_id == RTE_TM_NODE_ID_NULL) {
722 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
723 error->message = "invalid node id";
727 /* check if the node id exists */
728 tm_node = i40e_tm_node_search(dev, node_id, &node_type);
730 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
731 error->message = "no such node";
735 if (node_type == I40E_TM_NODE_TYPE_QUEUE)
744 i40e_level_capabilities_get(struct rte_eth_dev *dev,
746 struct rte_tm_level_capabilities *cap,
747 struct rte_tm_error *error)
749 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
754 if (level_id >= I40E_TM_NODE_TYPE_MAX) {
755 error->type = RTE_TM_ERROR_TYPE_LEVEL_ID;
756 error->message = "too deep level";
761 if (level_id == I40E_TM_NODE_TYPE_PORT) {
762 cap->n_nodes_max = 1;
763 cap->n_nodes_nonleaf_max = 1;
764 cap->n_nodes_leaf_max = 0;
765 } else if (level_id == I40E_TM_NODE_TYPE_TC) {
767 cap->n_nodes_max = I40E_MAX_TRAFFIC_CLASS;
768 cap->n_nodes_nonleaf_max = I40E_MAX_TRAFFIC_CLASS;
769 cap->n_nodes_leaf_max = 0;
772 cap->n_nodes_max = hw->func_caps.num_tx_qp;
773 cap->n_nodes_nonleaf_max = 0;
774 cap->n_nodes_leaf_max = hw->func_caps.num_tx_qp;
777 cap->non_leaf_nodes_identical = true;
778 cap->leaf_nodes_identical = true;
780 if (level_id != I40E_TM_NODE_TYPE_QUEUE) {
781 cap->nonleaf.shaper_private_supported = true;
782 cap->nonleaf.shaper_private_dual_rate_supported = false;
783 cap->nonleaf.shaper_private_rate_min = 0;
784 /* 40Gbps -> 5GBps */
785 cap->nonleaf.shaper_private_rate_max = 5000000000ull;
786 cap->nonleaf.shaper_shared_n_max = 0;
787 if (level_id == I40E_TM_NODE_TYPE_PORT)
788 cap->nonleaf.sched_n_children_max =
789 I40E_MAX_TRAFFIC_CLASS;
791 cap->nonleaf.sched_n_children_max =
792 hw->func_caps.num_tx_qp;
793 cap->nonleaf.sched_sp_n_priorities_max = 1;
794 cap->nonleaf.sched_wfq_n_children_per_group_max = 0;
795 cap->nonleaf.sched_wfq_n_groups_max = 0;
796 cap->nonleaf.sched_wfq_weight_max = 1;
797 cap->nonleaf.stats_mask = 0;
803 cap->leaf.shaper_private_supported = true;
804 cap->leaf.shaper_private_dual_rate_supported = false;
805 cap->leaf.shaper_private_rate_min = 0;
806 /* 40Gbps -> 5GBps */
807 cap->leaf.shaper_private_rate_max = 5000000000ull;
808 cap->leaf.shaper_shared_n_max = 0;
809 cap->leaf.cman_head_drop_supported = false;
810 cap->leaf.cman_wred_context_private_supported = true;
811 cap->leaf.cman_wred_context_shared_n_max = 0;
812 cap->leaf.stats_mask = 0;
818 i40e_node_capabilities_get(struct rte_eth_dev *dev,
820 struct rte_tm_node_capabilities *cap,
821 struct rte_tm_error *error)
823 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
824 enum i40e_tm_node_type node_type;
825 struct i40e_tm_node *tm_node;
830 if (node_id == RTE_TM_NODE_ID_NULL) {
831 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
832 error->message = "invalid node id";
836 /* check if the node id exists */
837 tm_node = i40e_tm_node_search(dev, node_id, &node_type);
839 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
840 error->message = "no such node";
844 cap->shaper_private_supported = true;
845 cap->shaper_private_dual_rate_supported = false;
846 cap->shaper_private_rate_min = 0;
847 /* 40Gbps -> 5GBps */
848 cap->shaper_private_rate_max = 5000000000ull;
849 cap->shaper_shared_n_max = 0;
851 if (node_type == I40E_TM_NODE_TYPE_QUEUE) {
852 cap->leaf.cman_head_drop_supported = false;
853 cap->leaf.cman_wred_context_private_supported = true;
854 cap->leaf.cman_wred_context_shared_n_max = 0;
856 if (node_type == I40E_TM_NODE_TYPE_PORT)
857 cap->nonleaf.sched_n_children_max =
858 I40E_MAX_TRAFFIC_CLASS;
860 cap->nonleaf.sched_n_children_max =
861 hw->func_caps.num_tx_qp;
862 cap->nonleaf.sched_sp_n_priorities_max = 1;
863 cap->nonleaf.sched_wfq_n_children_per_group_max = 0;
864 cap->nonleaf.sched_wfq_n_groups_max = 0;
865 cap->nonleaf.sched_wfq_weight_max = 1;
874 i40e_hierarchy_commit(struct rte_eth_dev *dev,
876 struct rte_tm_error *error)
878 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
879 struct i40e_tm_node_list *tc_list = &pf->tm_conf.tc_list;
880 struct i40e_tm_node_list *queue_list = &pf->tm_conf.queue_list;
881 struct i40e_tm_node *tm_node;
882 struct i40e_vsi *vsi;
884 struct i40e_aqc_configure_vsi_ets_sla_bw_data tc_bw;
893 /* check the setting */
894 if (!pf->tm_conf.root)
898 hw = I40E_VSI_TO_HW(vsi);
901 * Don't support bandwidth control for port and TCs in parallel.
902 * If the port has a max bandwidth, the TCs should have none.
905 if (pf->tm_conf.root->shaper_profile)
906 bw = pf->tm_conf.root->shaper_profile->profile.peak.rate;
910 /* check if any TC has a max bandwidth */
911 TAILQ_FOREACH(tm_node, tc_list, node) {
912 if (tm_node->shaper_profile &&
913 tm_node->shaper_profile->profile.peak.rate) {
914 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
915 error->message = "no port and TC max bandwidth"
921 /* interpret Bps to 50Mbps */
922 bw = bw * 8 / 1000 / 1000 / I40E_QOS_BW_GRANULARITY;
924 /* set the max bandwidth */
925 ret = i40e_aq_config_vsi_bw_limit(hw, vsi->seid,
926 (uint16_t)bw, 0, NULL);
928 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
929 error->message = "fail to set port max bandwidth";
937 memset(&tc_bw, 0, sizeof(tc_bw));
938 tc_bw.tc_valid_bits = vsi->enabled_tc;
939 tc_map = vsi->enabled_tc;
940 TAILQ_FOREACH(tm_node, tc_list, node) {
941 if (!tm_node->reference_count) {
942 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
943 error->message = "TC without queue assigned";
948 while (i < I40E_MAX_TRAFFIC_CLASS && !(tc_map & BIT_ULL(i)))
950 if (i >= I40E_MAX_TRAFFIC_CLASS) {
951 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
952 error->message = "cannot find the TC";
955 tc_map &= ~BIT_ULL(i);
957 if (tm_node->shaper_profile)
958 bw = tm_node->shaper_profile->profile.peak.rate;
964 /* interpret Bps to 50Mbps */
965 bw = bw * 8 / 1000 / 1000 / I40E_QOS_BW_GRANULARITY;
967 tc_bw.tc_bw_credits[i] = rte_cpu_to_le_16((uint16_t)bw);
970 TAILQ_FOREACH(tm_node, queue_list, node) {
971 if (tm_node->shaper_profile)
972 bw = tm_node->shaper_profile->profile.peak.rate;
976 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
977 error->message = "not support queue QoS";
982 ret = i40e_aq_config_vsi_ets_sla_bw_limit(hw, vsi->seid, &tc_bw, NULL);
984 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
985 error->message = "fail to set TC max bandwidth";
990 pf->tm_conf.committed = true;
994 /* clear all the traffic manager configuration */
996 i40e_tm_conf_uninit(dev);
997 i40e_tm_conf_init(dev);