drivers/net/i40e/i40e_tm.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include "base/i40e_prototype.h"
  35 #include "i40e_ethdev.h"
  36
  37 static int i40e_tm_capabilities_get(struct rte_eth_dev *dev,
  38                                     struct rte_tm_capabilities *cap,
  39                                     struct rte_tm_error *error);
  40
  41 const struct rte_tm_ops i40e_tm_ops = {
  42         .capabilities_get = i40e_tm_capabilities_get,
  43 };
  44
  45 int
  46 i40e_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
  47                 void *arg)
  48 {
  49         if (!arg)
  50                 return -EINVAL;
  51
  52         *(const void **)arg = &i40e_tm_ops;
  53
  54         return 0;
  55 }
  56
  57 static inline uint16_t
  58 i40e_tc_nb_get(struct rte_eth_dev *dev)
  59 {
  60         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
  61         struct i40e_vsi *main_vsi = pf->main_vsi;
  62         uint16_t sum = 0;
  63         int i;
  64
  65         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
  66                 if (main_vsi->enabled_tc & BIT_ULL(i))
  67                         sum++;
  68         }
  69
  70         return sum;
  71 }
  72
  73 static int
  74 i40e_tm_capabilities_get(struct rte_eth_dev *dev,
  75                          struct rte_tm_capabilities *cap,
  76                          struct rte_tm_error *error)
  77 {
  78         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  79         uint16_t tc_nb = i40e_tc_nb_get(dev);
  80
  81         if (!cap || !error)
  82                 return -EINVAL;
  83
  84         if (tc_nb > hw->func_caps.num_tx_qp)
  85                 return -EINVAL;
  86
  87         error->type = RTE_TM_ERROR_TYPE_NONE;
  88
  89         /* set all the parameters to 0 first. */
  90         memset(cap, 0, sizeof(struct rte_tm_capabilities));
  91
  92         /**
  93          * support port + TCs + queues
  94          * here shows the max capability not the current configuration.
  95          */
  96         cap->n_nodes_max = 1 + I40E_MAX_TRAFFIC_CLASS + hw->func_caps.num_tx_qp;
  97         cap->n_levels_max = 3; /* port, TC, queue */
  98         cap->non_leaf_nodes_identical = 1;
  99         cap->leaf_nodes_identical = 1;
 100         cap->shaper_n_max = cap->n_nodes_max;
 101         cap->shaper_private_n_max = cap->n_nodes_max;
 102         cap->shaper_private_dual_rate_n_max = 0;
 103         cap->shaper_private_rate_min = 0;
 104         /* 40Gbps -> 5GBps */
 105         cap->shaper_private_rate_max = 5000000000ull;
 106         cap->shaper_shared_n_max = 0;
 107         cap->shaper_shared_n_nodes_per_shaper_max = 0;
 108         cap->shaper_shared_n_shapers_per_node_max = 0;
 109         cap->shaper_shared_dual_rate_n_max = 0;
 110         cap->shaper_shared_rate_min = 0;
 111         cap->shaper_shared_rate_max = 0;
 112         cap->sched_n_children_max = hw->func_caps.num_tx_qp;
 113         /**
 114          * HW supports SP. But no plan to support it now.
 115          * So, all the nodes should have the same priority.
 116          */
 117         cap->sched_sp_n_priorities_max = 1;
 118         cap->sched_wfq_n_children_per_group_max = 0;
 119         cap->sched_wfq_n_groups_max = 0;
 120         /**
 121          * SW only supports fair round robin now.
 122          * So, all the nodes should have the same weight.
 123          */
 124         cap->sched_wfq_weight_max = 1;
 125         cap->cman_head_drop_supported = 0;
 126         cap->dynamic_update_mask = 0;
 127         cap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD;
 128         cap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;
 129         cap->cman_wred_context_n_max = 0;
 130         cap->cman_wred_context_private_n_max = 0;
 131         cap->cman_wred_context_shared_n_max = 0;
 132         cap->cman_wred_context_shared_n_nodes_per_context_max = 0;
 133         cap->cman_wred_context_shared_n_contexts_per_node_max = 0;
 134         cap->stats_mask = 0;
 135
 136         return 0;
 137 }