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34 #include <rte_malloc.h>
36 #include "base/i40e_prototype.h"
37 #include "i40e_ethdev.h"
39 static int i40e_tm_capabilities_get(struct rte_eth_dev *dev,
40 struct rte_tm_capabilities *cap,
41 struct rte_tm_error *error);
42 static int i40e_shaper_profile_add(struct rte_eth_dev *dev,
43 uint32_t shaper_profile_id,
44 struct rte_tm_shaper_params *profile,
45 struct rte_tm_error *error);
46 static int i40e_shaper_profile_del(struct rte_eth_dev *dev,
47 uint32_t shaper_profile_id,
48 struct rte_tm_error *error);
49 static int i40e_node_add(struct rte_eth_dev *dev, uint32_t node_id,
50 uint32_t parent_node_id, uint32_t priority,
51 uint32_t weight, uint32_t level_id,
52 struct rte_tm_node_params *params,
53 struct rte_tm_error *error);
54 static int i40e_node_delete(struct rte_eth_dev *dev, uint32_t node_id,
55 struct rte_tm_error *error);
56 static int i40e_node_type_get(struct rte_eth_dev *dev, uint32_t node_id,
57 int *is_leaf, struct rte_tm_error *error);
58 static int i40e_level_capabilities_get(struct rte_eth_dev *dev,
60 struct rte_tm_level_capabilities *cap,
61 struct rte_tm_error *error);
63 const struct rte_tm_ops i40e_tm_ops = {
64 .capabilities_get = i40e_tm_capabilities_get,
65 .shaper_profile_add = i40e_shaper_profile_add,
66 .shaper_profile_delete = i40e_shaper_profile_del,
67 .node_add = i40e_node_add,
68 .node_delete = i40e_node_delete,
69 .node_type_get = i40e_node_type_get,
70 .level_capabilities_get = i40e_level_capabilities_get,
74 i40e_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
80 *(const void **)arg = &i40e_tm_ops;
86 i40e_tm_conf_init(struct rte_eth_dev *dev)
88 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
90 /* initialize shaper profile list */
91 TAILQ_INIT(&pf->tm_conf.shaper_profile_list);
93 /* initialize node configuration */
94 pf->tm_conf.root = NULL;
95 TAILQ_INIT(&pf->tm_conf.tc_list);
96 TAILQ_INIT(&pf->tm_conf.queue_list);
97 pf->tm_conf.nb_tc_node = 0;
98 pf->tm_conf.nb_queue_node = 0;
99 pf->tm_conf.committed = false;
103 i40e_tm_conf_uninit(struct rte_eth_dev *dev)
105 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
106 struct i40e_tm_shaper_profile *shaper_profile;
107 struct i40e_tm_node *tm_node;
109 /* clear node configuration */
110 while ((tm_node = TAILQ_FIRST(&pf->tm_conf.queue_list))) {
111 TAILQ_REMOVE(&pf->tm_conf.queue_list, tm_node, node);
114 pf->tm_conf.nb_queue_node = 0;
115 while ((tm_node = TAILQ_FIRST(&pf->tm_conf.tc_list))) {
116 TAILQ_REMOVE(&pf->tm_conf.tc_list, tm_node, node);
119 pf->tm_conf.nb_tc_node = 0;
120 if (pf->tm_conf.root) {
121 rte_free(pf->tm_conf.root);
122 pf->tm_conf.root = NULL;
125 /* Remove all shaper profiles */
126 while ((shaper_profile =
127 TAILQ_FIRST(&pf->tm_conf.shaper_profile_list))) {
128 TAILQ_REMOVE(&pf->tm_conf.shaper_profile_list,
129 shaper_profile, node);
130 rte_free(shaper_profile);
134 static inline uint16_t
135 i40e_tc_nb_get(struct rte_eth_dev *dev)
137 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
138 struct i40e_vsi *main_vsi = pf->main_vsi;
142 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
143 if (main_vsi->enabled_tc & BIT_ULL(i))
151 i40e_tm_capabilities_get(struct rte_eth_dev *dev,
152 struct rte_tm_capabilities *cap,
153 struct rte_tm_error *error)
155 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
156 uint16_t tc_nb = i40e_tc_nb_get(dev);
161 if (tc_nb > hw->func_caps.num_tx_qp)
164 error->type = RTE_TM_ERROR_TYPE_NONE;
166 /* set all the parameters to 0 first. */
167 memset(cap, 0, sizeof(struct rte_tm_capabilities));
170 * support port + TCs + queues
171 * here shows the max capability not the current configuration.
173 cap->n_nodes_max = 1 + I40E_MAX_TRAFFIC_CLASS + hw->func_caps.num_tx_qp;
174 cap->n_levels_max = 3; /* port, TC, queue */
175 cap->non_leaf_nodes_identical = 1;
176 cap->leaf_nodes_identical = 1;
177 cap->shaper_n_max = cap->n_nodes_max;
178 cap->shaper_private_n_max = cap->n_nodes_max;
179 cap->shaper_private_dual_rate_n_max = 0;
180 cap->shaper_private_rate_min = 0;
181 /* 40Gbps -> 5GBps */
182 cap->shaper_private_rate_max = 5000000000ull;
183 cap->shaper_shared_n_max = 0;
184 cap->shaper_shared_n_nodes_per_shaper_max = 0;
185 cap->shaper_shared_n_shapers_per_node_max = 0;
186 cap->shaper_shared_dual_rate_n_max = 0;
187 cap->shaper_shared_rate_min = 0;
188 cap->shaper_shared_rate_max = 0;
189 cap->sched_n_children_max = hw->func_caps.num_tx_qp;
191 * HW supports SP. But no plan to support it now.
192 * So, all the nodes should have the same priority.
194 cap->sched_sp_n_priorities_max = 1;
195 cap->sched_wfq_n_children_per_group_max = 0;
196 cap->sched_wfq_n_groups_max = 0;
198 * SW only supports fair round robin now.
199 * So, all the nodes should have the same weight.
201 cap->sched_wfq_weight_max = 1;
202 cap->cman_head_drop_supported = 0;
203 cap->dynamic_update_mask = 0;
204 cap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD;
205 cap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;
206 cap->cman_wred_context_n_max = 0;
207 cap->cman_wred_context_private_n_max = 0;
208 cap->cman_wred_context_shared_n_max = 0;
209 cap->cman_wred_context_shared_n_nodes_per_context_max = 0;
210 cap->cman_wred_context_shared_n_contexts_per_node_max = 0;
216 static inline struct i40e_tm_shaper_profile *
217 i40e_shaper_profile_search(struct rte_eth_dev *dev,
218 uint32_t shaper_profile_id)
220 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
221 struct i40e_shaper_profile_list *shaper_profile_list =
222 &pf->tm_conf.shaper_profile_list;
223 struct i40e_tm_shaper_profile *shaper_profile;
225 TAILQ_FOREACH(shaper_profile, shaper_profile_list, node) {
226 if (shaper_profile_id == shaper_profile->shaper_profile_id)
227 return shaper_profile;
234 i40e_shaper_profile_param_check(struct rte_tm_shaper_params *profile,
235 struct rte_tm_error *error)
237 /* min rate not supported */
238 if (profile->committed.rate) {
239 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_RATE;
240 error->message = "committed rate not supported";
243 /* min bucket size not supported */
244 if (profile->committed.size) {
245 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_SIZE;
246 error->message = "committed bucket size not supported";
249 /* max bucket size not supported */
250 if (profile->peak.size) {
251 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_SIZE;
252 error->message = "peak bucket size not supported";
255 /* length adjustment not supported */
256 if (profile->pkt_length_adjust) {
257 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN;
258 error->message = "packet length adjustment not supported";
266 i40e_shaper_profile_add(struct rte_eth_dev *dev,
267 uint32_t shaper_profile_id,
268 struct rte_tm_shaper_params *profile,
269 struct rte_tm_error *error)
271 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
272 struct i40e_tm_shaper_profile *shaper_profile;
275 if (!profile || !error)
278 ret = i40e_shaper_profile_param_check(profile, error);
282 shaper_profile = i40e_shaper_profile_search(dev, shaper_profile_id);
284 if (shaper_profile) {
285 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
286 error->message = "profile ID exist";
290 shaper_profile = rte_zmalloc("i40e_tm_shaper_profile",
291 sizeof(struct i40e_tm_shaper_profile),
295 shaper_profile->shaper_profile_id = shaper_profile_id;
296 (void)rte_memcpy(&shaper_profile->profile, profile,
297 sizeof(struct rte_tm_shaper_params));
298 TAILQ_INSERT_TAIL(&pf->tm_conf.shaper_profile_list,
299 shaper_profile, node);
305 i40e_shaper_profile_del(struct rte_eth_dev *dev,
306 uint32_t shaper_profile_id,
307 struct rte_tm_error *error)
309 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
310 struct i40e_tm_shaper_profile *shaper_profile;
315 shaper_profile = i40e_shaper_profile_search(dev, shaper_profile_id);
317 if (!shaper_profile) {
318 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
319 error->message = "profile ID not exist";
323 /* don't delete a profile if it's used by one or several nodes */
324 if (shaper_profile->reference_count) {
325 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
326 error->message = "profile in use";
330 TAILQ_REMOVE(&pf->tm_conf.shaper_profile_list, shaper_profile, node);
331 rte_free(shaper_profile);
336 static inline struct i40e_tm_node *
337 i40e_tm_node_search(struct rte_eth_dev *dev,
338 uint32_t node_id, enum i40e_tm_node_type *node_type)
340 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
341 struct i40e_tm_node_list *queue_list = &pf->tm_conf.queue_list;
342 struct i40e_tm_node_list *tc_list = &pf->tm_conf.tc_list;
343 struct i40e_tm_node *tm_node;
345 if (pf->tm_conf.root && pf->tm_conf.root->id == node_id) {
346 *node_type = I40E_TM_NODE_TYPE_PORT;
347 return pf->tm_conf.root;
350 TAILQ_FOREACH(tm_node, tc_list, node) {
351 if (tm_node->id == node_id) {
352 *node_type = I40E_TM_NODE_TYPE_TC;
357 TAILQ_FOREACH(tm_node, queue_list, node) {
358 if (tm_node->id == node_id) {
359 *node_type = I40E_TM_NODE_TYPE_QUEUE;
368 i40e_node_param_check(uint32_t node_id, uint32_t parent_node_id,
369 uint32_t priority, uint32_t weight,
370 struct rte_tm_node_params *params,
371 struct rte_tm_error *error)
373 if (node_id == RTE_TM_NODE_ID_NULL) {
374 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
375 error->message = "invalid node id";
380 error->type = RTE_TM_ERROR_TYPE_NODE_PRIORITY;
381 error->message = "priority should be 0";
386 error->type = RTE_TM_ERROR_TYPE_NODE_WEIGHT;
387 error->message = "weight must be 1";
391 /* not support shared shaper */
392 if (params->shared_shaper_id) {
393 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_SHAPER_ID;
394 error->message = "shared shaper not supported";
397 if (params->n_shared_shapers) {
398 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_SHAPERS;
399 error->message = "shared shaper not supported";
404 if (parent_node_id == RTE_TM_NODE_ID_NULL) {
405 if (params->nonleaf.wfq_weight_mode) {
407 RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
408 error->message = "WFQ not supported";
411 if (params->nonleaf.n_sp_priorities != 1) {
413 RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SP_PRIORITIES;
414 error->message = "SP priority not supported";
416 } else if (params->nonleaf.wfq_weight_mode &&
417 !(*params->nonleaf.wfq_weight_mode)) {
419 RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
420 error->message = "WFP should be byte mode";
427 /* for TC or queue node */
428 if (params->leaf.cman) {
429 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_CMAN;
430 error->message = "Congestion management not supported";
433 if (params->leaf.wred.wred_profile_id !=
434 RTE_TM_WRED_PROFILE_ID_NONE) {
436 RTE_TM_ERROR_TYPE_NODE_PARAMS_WRED_PROFILE_ID;
437 error->message = "WRED not supported";
440 if (params->leaf.wred.shared_wred_context_id) {
442 RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_WRED_CONTEXT_ID;
443 error->message = "WRED not supported";
446 if (params->leaf.wred.n_shared_wred_contexts) {
448 RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_WRED_CONTEXTS;
449 error->message = "WRED not supported";
457 * Now the TC and queue configuration is controlled by DCB.
458 * We need check if the node configuration follows the DCB configuration.
459 * In the future, we may use TM to cover DCB.
462 i40e_node_add(struct rte_eth_dev *dev, uint32_t node_id,
463 uint32_t parent_node_id, uint32_t priority,
464 uint32_t weight, uint32_t level_id,
465 struct rte_tm_node_params *params,
466 struct rte_tm_error *error)
468 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
469 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
470 enum i40e_tm_node_type node_type = I40E_TM_NODE_TYPE_MAX;
471 enum i40e_tm_node_type parent_node_type = I40E_TM_NODE_TYPE_MAX;
472 struct i40e_tm_shaper_profile *shaper_profile;
473 struct i40e_tm_node *tm_node;
474 struct i40e_tm_node *parent_node;
478 if (!params || !error)
481 /* if already committed */
482 if (pf->tm_conf.committed) {
483 error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
484 error->message = "already committed";
488 ret = i40e_node_param_check(node_id, parent_node_id, priority, weight,
493 /* check if the node ID is already used */
494 if (i40e_tm_node_search(dev, node_id, &node_type)) {
495 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
496 error->message = "node id already used";
500 /* check the shaper profile id */
501 shaper_profile = i40e_shaper_profile_search(dev,
502 params->shaper_profile_id);
503 if (!shaper_profile) {
504 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_SHAPER_PROFILE_ID;
505 error->message = "shaper profile not exist";
509 /* root node if not have a parent */
510 if (parent_node_id == RTE_TM_NODE_ID_NULL) {
512 if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
513 level_id > I40E_TM_NODE_TYPE_PORT) {
514 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
515 error->message = "Wrong level";
519 /* obviously no more than one root */
520 if (pf->tm_conf.root) {
521 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
522 error->message = "already have a root";
526 /* add the root node */
527 tm_node = rte_zmalloc("i40e_tm_node",
528 sizeof(struct i40e_tm_node),
532 tm_node->id = node_id;
533 tm_node->priority = priority;
534 tm_node->weight = weight;
535 tm_node->reference_count = 0;
536 tm_node->parent = NULL;
537 tm_node->shaper_profile = shaper_profile;
538 (void)rte_memcpy(&tm_node->params, params,
539 sizeof(struct rte_tm_node_params));
540 pf->tm_conf.root = tm_node;
542 /* increase the reference counter of the shaper profile */
543 shaper_profile->reference_count++;
548 /* TC or queue node */
549 /* check the parent node */
550 parent_node = i40e_tm_node_search(dev, parent_node_id,
553 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
554 error->message = "parent not exist";
557 if (parent_node_type != I40E_TM_NODE_TYPE_PORT &&
558 parent_node_type != I40E_TM_NODE_TYPE_TC) {
559 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
560 error->message = "parent is not port or TC";
564 if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
565 level_id != parent_node_type + 1) {
566 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
567 error->message = "Wrong level";
571 /* check the node number */
572 if (parent_node_type == I40E_TM_NODE_TYPE_PORT) {
573 /* check the TC number */
574 tc_nb = i40e_tc_nb_get(dev);
575 if (pf->tm_conf.nb_tc_node >= tc_nb) {
576 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
577 error->message = "too many TCs";
581 /* check the queue number */
582 if (pf->tm_conf.nb_queue_node >= hw->func_caps.num_tx_qp) {
583 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
584 error->message = "too many queues";
590 * For queue, the node id means queue id.
592 if (node_id >= hw->func_caps.num_tx_qp) {
593 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
594 error->message = "too large queue id";
599 /* add the TC or queue node */
600 tm_node = rte_zmalloc("i40e_tm_node",
601 sizeof(struct i40e_tm_node),
605 tm_node->id = node_id;
606 tm_node->priority = priority;
607 tm_node->weight = weight;
608 tm_node->reference_count = 0;
609 tm_node->parent = pf->tm_conf.root;
610 tm_node->shaper_profile = shaper_profile;
611 (void)rte_memcpy(&tm_node->params, params,
612 sizeof(struct rte_tm_node_params));
613 if (parent_node_type == I40E_TM_NODE_TYPE_PORT) {
614 TAILQ_INSERT_TAIL(&pf->tm_conf.tc_list,
616 pf->tm_conf.nb_tc_node++;
618 TAILQ_INSERT_TAIL(&pf->tm_conf.queue_list,
620 pf->tm_conf.nb_queue_node++;
622 tm_node->parent->reference_count++;
624 /* increase the reference counter of the shaper profile */
625 shaper_profile->reference_count++;
631 i40e_node_delete(struct rte_eth_dev *dev, uint32_t node_id,
632 struct rte_tm_error *error)
634 struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
635 enum i40e_tm_node_type node_type = I40E_TM_NODE_TYPE_MAX;
636 struct i40e_tm_node *tm_node;
641 /* if already committed */
642 if (pf->tm_conf.committed) {
643 error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
644 error->message = "already committed";
648 if (node_id == RTE_TM_NODE_ID_NULL) {
649 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
650 error->message = "invalid node id";
654 /* check if the node id exists */
655 tm_node = i40e_tm_node_search(dev, node_id, &node_type);
657 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
658 error->message = "no such node";
662 /* the node should have no child */
663 if (tm_node->reference_count) {
664 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
666 "cannot delete a node which has children";
671 if (node_type == I40E_TM_NODE_TYPE_PORT) {
672 tm_node->shaper_profile->reference_count--;
674 pf->tm_conf.root = NULL;
678 /* TC or queue node */
679 tm_node->shaper_profile->reference_count--;
680 tm_node->parent->reference_count--;
681 if (node_type == I40E_TM_NODE_TYPE_TC) {
682 TAILQ_REMOVE(&pf->tm_conf.tc_list, tm_node, node);
683 pf->tm_conf.nb_tc_node--;
685 TAILQ_REMOVE(&pf->tm_conf.queue_list, tm_node, node);
686 pf->tm_conf.nb_queue_node--;
694 i40e_node_type_get(struct rte_eth_dev *dev, uint32_t node_id,
695 int *is_leaf, struct rte_tm_error *error)
697 enum i40e_tm_node_type node_type = I40E_TM_NODE_TYPE_MAX;
698 struct i40e_tm_node *tm_node;
700 if (!is_leaf || !error)
703 if (node_id == RTE_TM_NODE_ID_NULL) {
704 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
705 error->message = "invalid node id";
709 /* check if the node id exists */
710 tm_node = i40e_tm_node_search(dev, node_id, &node_type);
712 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
713 error->message = "no such node";
717 if (node_type == I40E_TM_NODE_TYPE_QUEUE)
726 i40e_level_capabilities_get(struct rte_eth_dev *dev,
728 struct rte_tm_level_capabilities *cap,
729 struct rte_tm_error *error)
731 struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
736 if (level_id >= I40E_TM_NODE_TYPE_MAX) {
737 error->type = RTE_TM_ERROR_TYPE_LEVEL_ID;
738 error->message = "too deep level";
743 if (level_id == I40E_TM_NODE_TYPE_PORT) {
744 cap->n_nodes_max = 1;
745 cap->n_nodes_nonleaf_max = 1;
746 cap->n_nodes_leaf_max = 0;
747 cap->non_leaf_nodes_identical = true;
748 cap->leaf_nodes_identical = true;
749 cap->nonleaf.shaper_private_supported = true;
750 cap->nonleaf.shaper_private_dual_rate_supported = false;
751 cap->nonleaf.shaper_private_rate_min = 0;
752 /* 40Gbps -> 5GBps */
753 cap->nonleaf.shaper_private_rate_max = 5000000000ull;
754 cap->nonleaf.shaper_shared_n_max = 0;
755 cap->nonleaf.sched_n_children_max = I40E_MAX_TRAFFIC_CLASS;
756 cap->nonleaf.sched_sp_n_priorities_max = 1;
757 cap->nonleaf.sched_wfq_n_children_per_group_max = 0;
758 cap->nonleaf.sched_wfq_n_groups_max = 0;
759 cap->nonleaf.sched_wfq_weight_max = 1;
760 cap->nonleaf.stats_mask = 0;
765 /* TC or queue node */
766 if (level_id == I40E_TM_NODE_TYPE_TC) {
768 cap->n_nodes_max = I40E_MAX_TRAFFIC_CLASS;
769 cap->n_nodes_nonleaf_max = I40E_MAX_TRAFFIC_CLASS;
770 cap->n_nodes_leaf_max = 0;
771 cap->non_leaf_nodes_identical = true;
774 cap->n_nodes_max = hw->func_caps.num_tx_qp;
775 cap->n_nodes_nonleaf_max = 0;
776 cap->n_nodes_leaf_max = hw->func_caps.num_tx_qp;
777 cap->non_leaf_nodes_identical = true;
779 cap->leaf_nodes_identical = true;
780 cap->leaf.shaper_private_supported = true;
781 cap->leaf.shaper_private_dual_rate_supported = false;
782 cap->leaf.shaper_private_rate_min = 0;
783 /* 40Gbps -> 5GBps */
784 cap->leaf.shaper_private_rate_max = 5000000000ull;
785 cap->leaf.shaper_shared_n_max = 0;
786 cap->leaf.cman_head_drop_supported = false;
787 cap->leaf.cman_wred_context_private_supported = true;
788 cap->leaf.cman_wred_context_shared_n_max = 0;
789 cap->leaf.stats_mask = 0;