drivers/net/iavf/iavf_fdir.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2020 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12
  13 #include <rte_ether.h>
  14 #include <rte_ethdev_driver.h>
  15 #include <rte_malloc.h>
  16 #include <rte_tailq.h>
  17
  18 #include "iavf.h"
  19 #include "iavf_generic_flow.h"
  20 #include "virtchnl.h"
  21 #include "iavf_rxtx.h"
  22
  23 #define IAVF_FDIR_MAX_QREGION_SIZE 128
  24
  25 #define IAVF_FDIR_IPV6_TC_OFFSET 20
  26 #define IAVF_IPV6_TC_MASK  (0xFF << IAVF_FDIR_IPV6_TC_OFFSET)
  27
  28 #define IAVF_GTPU_EH_DWLINK 0
  29 #define IAVF_GTPU_EH_UPLINK 1
  30
  31 #define IAVF_FDIR_INSET_ETH (\
  32         IAVF_INSET_ETHERTYPE)
  33
  34 #define IAVF_FDIR_INSET_ETH_IPV4 (\
  35         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
  36         IAVF_INSET_IPV4_PROTO | IAVF_INSET_IPV4_TOS | \
  37         IAVF_INSET_IPV4_TTL)
  38
  39 #define IAVF_FDIR_INSET_ETH_IPV4_UDP (\
  40         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
  41         IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
  42         IAVF_INSET_UDP_SRC_PORT | IAVF_INSET_UDP_DST_PORT)
  43
  44 #define IAVF_FDIR_INSET_ETH_IPV4_TCP (\
  45         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
  46         IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
  47         IAVF_INSET_TCP_SRC_PORT | IAVF_INSET_TCP_DST_PORT)
  48
  49 #define IAVF_FDIR_INSET_ETH_IPV4_SCTP (\
  50         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
  51         IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
  52         IAVF_INSET_SCTP_SRC_PORT | IAVF_INSET_SCTP_DST_PORT)
  53
  54 #define IAVF_FDIR_INSET_ETH_IPV6 (\
  55         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
  56         IAVF_INSET_IPV6_NEXT_HDR | IAVF_INSET_IPV6_TC | \
  57         IAVF_INSET_IPV6_HOP_LIMIT)
  58
  59 #define IAVF_FDIR_INSET_ETH_IPV6_UDP (\
  60         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
  61         IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
  62         IAVF_INSET_UDP_SRC_PORT | IAVF_INSET_UDP_DST_PORT)
  63
  64 #define IAVF_FDIR_INSET_ETH_IPV6_TCP (\
  65         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
  66         IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
  67         IAVF_INSET_TCP_SRC_PORT | IAVF_INSET_TCP_DST_PORT)
  68
  69 #define IAVF_FDIR_INSET_ETH_IPV6_SCTP (\
  70         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
  71         IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
  72         IAVF_INSET_SCTP_SRC_PORT | IAVF_INSET_SCTP_DST_PORT)
  73
  74 #define IAVF_FDIR_INSET_IPV4_GTPU (\
  75         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
  76         IAVF_INSET_GTPU_TEID)
  77
  78 #define IAVF_FDIR_INSET_IPV4_GTPU_EH (\
  79         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
  80         IAVF_INSET_GTPU_TEID | IAVF_INSET_GTPU_QFI)
  81
  82 #define IAVF_FDIR_INSET_IPV6_GTPU (\
  83         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
  84         IAVF_INSET_GTPU_TEID)
  85
  86 #define IAVF_FDIR_INSET_IPV6_GTPU_EH (\
  87         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
  88         IAVF_INSET_GTPU_TEID | IAVF_INSET_GTPU_QFI)
  89
  90 #define IAVF_FDIR_INSET_L2TPV3OIP (\
  91         IAVF_L2TPV3OIP_SESSION_ID)
  92
  93 #define IAVF_FDIR_INSET_ESP (\
  94         IAVF_INSET_ESP_SPI)
  95
  96 #define IAVF_FDIR_INSET_AH (\
  97         IAVF_INSET_AH_SPI)
  98
  99 #define IAVF_FDIR_INSET_IPV4_NATT_ESP (\
 100         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
 101         IAVF_INSET_ESP_SPI)
 102
 103 #define IAVF_FDIR_INSET_IPV6_NATT_ESP (\
 104         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
 105         IAVF_INSET_ESP_SPI)
 106
 107 #define IAVF_FDIR_INSET_PFCP (\
 108         IAVF_INSET_PFCP_S_FIELD)
 109
 110 #define IAVF_FDIR_INSET_ECPRI (\
 111         IAVF_INSET_ECPRI)
 112
 113 static struct iavf_pattern_match_item iavf_fdir_pattern[] = {
 114         {iavf_pattern_ethertype,                IAVF_FDIR_INSET_ETH,                    IAVF_INSET_NONE},
 115         {iavf_pattern_eth_ipv4,                 IAVF_FDIR_INSET_ETH_IPV4,               IAVF_INSET_NONE},
 116         {iavf_pattern_eth_ipv4_udp,             IAVF_FDIR_INSET_ETH_IPV4_UDP,           IAVF_INSET_NONE},
 117         {iavf_pattern_eth_ipv4_tcp,             IAVF_FDIR_INSET_ETH_IPV4_TCP,           IAVF_INSET_NONE},
 118         {iavf_pattern_eth_ipv4_sctp,            IAVF_FDIR_INSET_ETH_IPV4_SCTP,          IAVF_INSET_NONE},
 119         {iavf_pattern_eth_ipv6,                 IAVF_FDIR_INSET_ETH_IPV6,               IAVF_INSET_NONE},
 120         {iavf_pattern_eth_ipv6_udp,             IAVF_FDIR_INSET_ETH_IPV6_UDP,           IAVF_INSET_NONE},
 121         {iavf_pattern_eth_ipv6_tcp,             IAVF_FDIR_INSET_ETH_IPV6_TCP,           IAVF_INSET_NONE},
 122         {iavf_pattern_eth_ipv6_sctp,            IAVF_FDIR_INSET_ETH_IPV6_SCTP,          IAVF_INSET_NONE},
 123         {iavf_pattern_eth_ipv4_gtpu,            IAVF_FDIR_INSET_IPV4_GTPU,              IAVF_INSET_NONE},
 124         {iavf_pattern_eth_ipv4_gtpu_eh,         IAVF_FDIR_INSET_IPV4_GTPU_EH,           IAVF_INSET_NONE},
 125         {iavf_pattern_eth_ipv6_gtpu,            IAVF_FDIR_INSET_IPV6_GTPU,              IAVF_INSET_NONE},
 126         {iavf_pattern_eth_ipv6_gtpu_eh,         IAVF_FDIR_INSET_IPV6_GTPU_EH,           IAVF_INSET_NONE},
 127         {iavf_pattern_eth_ipv4_l2tpv3,          IAVF_FDIR_INSET_L2TPV3OIP,              IAVF_INSET_NONE},
 128         {iavf_pattern_eth_ipv6_l2tpv3,          IAVF_FDIR_INSET_L2TPV3OIP,              IAVF_INSET_NONE},
 129         {iavf_pattern_eth_ipv4_esp,             IAVF_FDIR_INSET_ESP,                    IAVF_INSET_NONE},
 130         {iavf_pattern_eth_ipv6_esp,             IAVF_FDIR_INSET_ESP,                    IAVF_INSET_NONE},
 131         {iavf_pattern_eth_ipv4_ah,              IAVF_FDIR_INSET_AH,                     IAVF_INSET_NONE},
 132         {iavf_pattern_eth_ipv6_ah,              IAVF_FDIR_INSET_AH,                     IAVF_INSET_NONE},
 133         {iavf_pattern_eth_ipv4_udp_esp,         IAVF_FDIR_INSET_IPV4_NATT_ESP,          IAVF_INSET_NONE},
 134         {iavf_pattern_eth_ipv6_udp_esp,         IAVF_FDIR_INSET_IPV6_NATT_ESP,          IAVF_INSET_NONE},
 135         {iavf_pattern_eth_ipv4_pfcp,            IAVF_FDIR_INSET_PFCP,                   IAVF_INSET_NONE},
 136         {iavf_pattern_eth_ipv6_pfcp,            IAVF_FDIR_INSET_PFCP,                   IAVF_INSET_NONE},
 137         {iavf_pattern_eth_ecpri,                IAVF_FDIR_INSET_ECPRI,                  IAVF_INSET_NONE},
 138         {iavf_pattern_eth_ipv4_ecpri,           IAVF_FDIR_INSET_ECPRI,                  IAVF_INSET_NONE},
 139 };
 140
 141 static struct iavf_flow_parser iavf_fdir_parser;
 142
 143 static int
 144 iavf_fdir_init(struct iavf_adapter *ad)
 145 {
 146         struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
 147         struct iavf_flow_parser *parser;
 148
 149         if (!vf->vf_res)
 150                 return -EINVAL;
 151
 152         if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_FDIR_PF)
 153                 parser = &iavf_fdir_parser;
 154         else
 155                 return -ENOTSUP;
 156
 157         return iavf_register_parser(parser, ad);
 158 }
 159
 160 static void
 161 iavf_fdir_uninit(struct iavf_adapter *ad)
 162 {
 163         iavf_unregister_parser(&iavf_fdir_parser, ad);
 164 }
 165
 166 static int
 167 iavf_fdir_create(struct iavf_adapter *ad,
 168                 struct rte_flow *flow,
 169                 void *meta,
 170                 struct rte_flow_error *error)
 171 {
 172         struct iavf_fdir_conf *filter = meta;
 173         struct iavf_fdir_conf *rule;
 174         int ret;
 175
 176         rule = rte_zmalloc("fdir_entry", sizeof(*rule), 0);
 177         if (!rule) {
 178                 rte_flow_error_set(error, ENOMEM,
 179                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 180                                 "Failed to allocate memory for fdir rule");
 181                 return -rte_errno;
 182         }
 183
 184         ret = iavf_fdir_add(ad, filter);
 185         if (ret) {
 186                 rte_flow_error_set(error, -ret,
 187                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 188                                 "Failed to add filter rule.");
 189                 goto free_entry;
 190         }
 191
 192         if (filter->mark_flag == 1)
 193                 iavf_fdir_rx_proc_enable(ad, 1);
 194
 195         rte_memcpy(rule, filter, sizeof(*rule));
 196         flow->rule = rule;
 197
 198         return 0;
 199
 200 free_entry:
 201         rte_free(rule);
 202         return -rte_errno;
 203 }
 204
 205 static int
 206 iavf_fdir_destroy(struct iavf_adapter *ad,
 207                 struct rte_flow *flow,
 208                 struct rte_flow_error *error)
 209 {
 210         struct iavf_fdir_conf *filter;
 211         int ret;
 212
 213         filter = (struct iavf_fdir_conf *)flow->rule;
 214
 215         ret = iavf_fdir_del(ad, filter);
 216         if (ret) {
 217                 rte_flow_error_set(error, -ret,
 218                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 219                                 "Failed to delete filter rule.");
 220                 return -rte_errno;
 221         }
 222
 223         if (filter->mark_flag == 1)
 224                 iavf_fdir_rx_proc_enable(ad, 0);
 225
 226         flow->rule = NULL;
 227         rte_free(filter);
 228
 229         return 0;
 230 }
 231
 232 static int
 233 iavf_fdir_validation(struct iavf_adapter *ad,
 234                 __rte_unused struct rte_flow *flow,
 235                 void *meta,
 236                 struct rte_flow_error *error)
 237 {
 238         struct iavf_fdir_conf *filter = meta;
 239         int ret;
 240
 241         ret = iavf_fdir_check(ad, filter);
 242         if (ret) {
 243                 rte_flow_error_set(error, -ret,
 244                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 245                                 "Failed to validate filter rule.");
 246                 return -rte_errno;
 247         }
 248
 249         return 0;
 250 };
 251
 252 static struct iavf_flow_engine iavf_fdir_engine = {
 253         .init = iavf_fdir_init,
 254         .uninit = iavf_fdir_uninit,
 255         .create = iavf_fdir_create,
 256         .destroy = iavf_fdir_destroy,
 257         .validation = iavf_fdir_validation,
 258         .type = IAVF_FLOW_ENGINE_FDIR,
 259 };
 260
 261 static int
 262 iavf_fdir_parse_action_qregion(struct iavf_adapter *ad,
 263                         struct rte_flow_error *error,
 264                         const struct rte_flow_action *act,
 265                         struct virtchnl_filter_action *filter_action)
 266 {
 267         struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
 268         const struct rte_flow_action_rss *rss = act->conf;
 269         uint32_t i;
 270
 271         if (act->type != RTE_FLOW_ACTION_TYPE_RSS) {
 272                 rte_flow_error_set(error, EINVAL,
 273                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
 274                                 "Invalid action.");
 275                 return -rte_errno;
 276         }
 277
 278         if (rss->queue_num <= 1) {
 279                 rte_flow_error_set(error, EINVAL,
 280                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
 281                                 "Queue region size can't be 0 or 1.");
 282                 return -rte_errno;
 283         }
 284
 285         /* check if queue index for queue region is continuous */
 286         for (i = 0; i < rss->queue_num - 1; i++) {
 287                 if (rss->queue[i + 1] != rss->queue[i] + 1) {
 288                         rte_flow_error_set(error, EINVAL,
 289                                         RTE_FLOW_ERROR_TYPE_ACTION, act,
 290                                         "Discontinuous queue region");
 291                         return -rte_errno;
 292                 }
 293         }
 294
 295         if (rss->queue[rss->queue_num - 1] >= ad->eth_dev->data->nb_rx_queues) {
 296                 rte_flow_error_set(error, EINVAL,
 297                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
 298                                 "Invalid queue region indexes.");
 299                 return -rte_errno;
 300         }
 301
 302         if (!(rte_is_power_of_2(rss->queue_num) &&
 303                 rss->queue_num <= IAVF_FDIR_MAX_QREGION_SIZE)) {
 304                 rte_flow_error_set(error, EINVAL,
 305                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
 306                                 "The region size should be any of the following values:"
 307                                 "1, 2, 4, 8, 16, 32, 64, 128 as long as the total number "
 308                                 "of queues do not exceed the VSI allocation.");
 309                 return -rte_errno;
 310         }
 311
 312         if (rss->queue_num > vf->max_rss_qregion) {
 313                 rte_flow_error_set(error, EINVAL,
 314                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
 315                                 "The region size cannot be large than the supported max RSS queue region");
 316                 return -rte_errno;
 317         }
 318
 319         filter_action->act_conf.queue.index = rss->queue[0];
 320         filter_action->act_conf.queue.region = rte_fls_u32(rss->queue_num) - 1;
 321
 322         return 0;
 323 }
 324
 325 static int
 326 iavf_fdir_parse_action(struct iavf_adapter *ad,
 327                         const struct rte_flow_action actions[],
 328                         struct rte_flow_error *error,
 329                         struct iavf_fdir_conf *filter)
 330 {
 331         const struct rte_flow_action_queue *act_q;
 332         const struct rte_flow_action_mark *mark_spec = NULL;
 333         uint32_t dest_num = 0;
 334         uint32_t mark_num = 0;
 335         int ret;
 336
 337         int number = 0;
 338         struct virtchnl_filter_action *filter_action;
 339
 340         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
 341                 switch (actions->type) {
 342                 case RTE_FLOW_ACTION_TYPE_VOID:
 343                         break;
 344
 345                 case RTE_FLOW_ACTION_TYPE_PASSTHRU:
 346                         dest_num++;
 347
 348                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
 349
 350                         filter_action->type = VIRTCHNL_ACTION_PASSTHRU;
 351
 352                         filter->add_fltr.rule_cfg.action_set.count = ++number;
 353                         break;
 354
 355                 case RTE_FLOW_ACTION_TYPE_DROP:
 356                         dest_num++;
 357
 358                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
 359
 360                         filter_action->type = VIRTCHNL_ACTION_DROP;
 361
 362                         filter->add_fltr.rule_cfg.action_set.count = ++number;
 363                         break;
 364
 365                 case RTE_FLOW_ACTION_TYPE_QUEUE:
 366                         dest_num++;
 367
 368                         act_q = actions->conf;
 369                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
 370
 371                         filter_action->type = VIRTCHNL_ACTION_QUEUE;
 372                         filter_action->act_conf.queue.index = act_q->index;
 373
 374                         if (filter_action->act_conf.queue.index >=
 375                                 ad->eth_dev->data->nb_rx_queues) {
 376                                 rte_flow_error_set(error, EINVAL,
 377                                         RTE_FLOW_ERROR_TYPE_ACTION,
 378                                         actions, "Invalid queue for FDIR.");
 379                                 return -rte_errno;
 380                         }
 381
 382                         filter->add_fltr.rule_cfg.action_set.count = ++number;
 383                         break;
 384
 385                 case RTE_FLOW_ACTION_TYPE_RSS:
 386                         dest_num++;
 387
 388                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
 389
 390                         filter_action->type = VIRTCHNL_ACTION_Q_REGION;
 391
 392                         ret = iavf_fdir_parse_action_qregion(ad,
 393                                                 error, actions, filter_action);
 394                         if (ret)
 395                                 return ret;
 396
 397                         filter->add_fltr.rule_cfg.action_set.count = ++number;
 398                         break;
 399
 400                 case RTE_FLOW_ACTION_TYPE_MARK:
 401                         mark_num++;
 402
 403                         filter->mark_flag = 1;
 404                         mark_spec = actions->conf;
 405                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
 406
 407                         filter_action->type = VIRTCHNL_ACTION_MARK;
 408                         filter_action->act_conf.mark_id = mark_spec->id;
 409
 410                         filter->add_fltr.rule_cfg.action_set.count = ++number;
 411                         break;
 412
 413                 default:
 414                         rte_flow_error_set(error, EINVAL,
 415                                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
 416                                         "Invalid action.");
 417                         return -rte_errno;
 418                 }
 419         }
 420
 421         if (number > VIRTCHNL_MAX_NUM_ACTIONS) {
 422                 rte_flow_error_set(error, EINVAL,
 423                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
 424                         "Action numbers exceed the maximum value");
 425                 return -rte_errno;
 426         }
 427
 428         if (dest_num >= 2) {
 429                 rte_flow_error_set(error, EINVAL,
 430                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
 431                         "Unsupported action combination");
 432                 return -rte_errno;
 433         }
 434
 435         if (mark_num >= 2) {
 436                 rte_flow_error_set(error, EINVAL,
 437                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
 438                         "Too many mark actions");
 439                 return -rte_errno;
 440         }
 441
 442         if (dest_num + mark_num == 0) {
 443                 rte_flow_error_set(error, EINVAL,
 444                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
 445                         "Empty action");
 446                 return -rte_errno;
 447         }
 448
 449         /* Mark only is equal to mark + passthru. */
 450         if (dest_num == 0) {
 451                 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
 452                 filter_action->type = VIRTCHNL_ACTION_PASSTHRU;
 453                 filter->add_fltr.rule_cfg.action_set.count = ++number;
 454         }
 455
 456         return 0;
 457 }
 458
 459 static int
 460 iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
 461                         const struct rte_flow_item pattern[],
 462                         struct rte_flow_error *error,
 463                         struct iavf_fdir_conf *filter)
 464 {
 465         const struct rte_flow_item *item = pattern;
 466         enum rte_flow_item_type item_type;
 467         enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;
 468         const struct rte_flow_item_eth *eth_spec, *eth_mask;
 469         const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask;
 470         const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;
 471         const struct rte_flow_item_udp *udp_spec, *udp_mask;
 472         const struct rte_flow_item_tcp *tcp_spec, *tcp_mask;
 473         const struct rte_flow_item_sctp *sctp_spec, *sctp_mask;
 474         const struct rte_flow_item_gtp *gtp_spec, *gtp_mask;
 475         const struct rte_flow_item_gtp_psc *gtp_psc_spec, *gtp_psc_mask;
 476         const struct rte_flow_item_l2tpv3oip *l2tpv3oip_spec, *l2tpv3oip_mask;
 477         const struct rte_flow_item_esp *esp_spec, *esp_mask;
 478         const struct rte_flow_item_ah *ah_spec, *ah_mask;
 479         const struct rte_flow_item_pfcp *pfcp_spec, *pfcp_mask;
 480         const struct rte_flow_item_ecpri *ecpri_spec, *ecpri_mask;
 481         struct rte_ecpri_common_hdr ecpri_common;
 482         uint64_t input_set = IAVF_INSET_NONE;
 483
 484         enum rte_flow_item_type next_type;
 485         uint16_t ether_type;
 486
 487         int layer = 0;
 488         struct virtchnl_proto_hdr *hdr;
 489
 490         uint8_t  ipv6_addr_mask[16] = {
 491                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
 492                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
 493         };
 494
 495         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 496                 if (item->last) {
 497                         rte_flow_error_set(error, EINVAL,
 498                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
 499                                         "Not support range");
 500                 }
 501
 502                 item_type = item->type;
 503
 504                 switch (item_type) {
 505                 case RTE_FLOW_ITEM_TYPE_ETH:
 506                         eth_spec = item->spec;
 507                         eth_mask = item->mask;
 508                         next_type = (item + 1)->type;
 509
 510                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 511
 512                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ETH);
 513
 514                         if (next_type == RTE_FLOW_ITEM_TYPE_END &&
 515                                 (!eth_spec || !eth_mask)) {
 516                                 rte_flow_error_set(error, EINVAL,
 517                                                 RTE_FLOW_ERROR_TYPE_ITEM,
 518                                                 item, "NULL eth spec/mask.");
 519                                 return -rte_errno;
 520                         }
 521
 522                         if (eth_spec && eth_mask) {
 523                                 if (!rte_is_zero_ether_addr(&eth_mask->src) ||
 524                                     !rte_is_zero_ether_addr(&eth_mask->dst)) {
 525                                         rte_flow_error_set(error, EINVAL,
 526                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
 527                                                 "Invalid MAC_addr mask.");
 528                                         return -rte_errno;
 529                                 }
 530                         }
 531
 532                         if (eth_spec && eth_mask && eth_mask->type) {
 533                                 if (eth_mask->type != RTE_BE16(0xffff)) {
 534                                         rte_flow_error_set(error, EINVAL,
 535                                                 RTE_FLOW_ERROR_TYPE_ITEM,
 536                                                 item, "Invalid type mask.");
 537                                         return -rte_errno;
 538                                 }
 539
 540                                 ether_type = rte_be_to_cpu_16(eth_spec->type);
 541                                 if (ether_type == RTE_ETHER_TYPE_IPV4 ||
 542                                         ether_type == RTE_ETHER_TYPE_IPV6) {
 543                                         rte_flow_error_set(error, EINVAL,
 544                                                 RTE_FLOW_ERROR_TYPE_ITEM,
 545                                                 item,
 546                                                 "Unsupported ether_type.");
 547                                         return -rte_errno;
 548                                 }
 549
 550                                 input_set |= IAVF_INSET_ETHERTYPE;
 551                                 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ETH, ETHERTYPE);
 552
 553                                 rte_memcpy(hdr->buffer,
 554                                         eth_spec, sizeof(struct rte_ether_hdr));
 555                         }
 556
 557                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 558                         break;
 559
 560                 case RTE_FLOW_ITEM_TYPE_IPV4:
 561                         l3 = RTE_FLOW_ITEM_TYPE_IPV4;
 562                         ipv4_spec = item->spec;
 563                         ipv4_mask = item->mask;
 564
 565                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 566
 567                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, IPV4);
 568
 569                         if (ipv4_spec && ipv4_mask) {
 570                                 if (ipv4_mask->hdr.version_ihl ||
 571                                         ipv4_mask->hdr.total_length ||
 572                                         ipv4_mask->hdr.packet_id ||
 573                                         ipv4_mask->hdr.fragment_offset ||
 574                                         ipv4_mask->hdr.hdr_checksum) {
 575                                         rte_flow_error_set(error, EINVAL,
 576                                                 RTE_FLOW_ERROR_TYPE_ITEM,
 577                                                 item, "Invalid IPv4 mask.");
 578                                         return -rte_errno;
 579                                 }
 580
 581                                 if (ipv4_mask->hdr.type_of_service ==
 582                                                                 UINT8_MAX) {
 583                                         input_set |= IAVF_INSET_IPV4_TOS;
 584                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, DSCP);
 585                                 }
 586                                 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX) {
 587                                         input_set |= IAVF_INSET_IPV4_PROTO;
 588                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, PROT);
 589                                 }
 590                                 if (ipv4_mask->hdr.time_to_live == UINT8_MAX) {
 591                                         input_set |= IAVF_INSET_IPV4_TTL;
 592                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, TTL);
 593                                 }
 594                                 if (ipv4_mask->hdr.src_addr == UINT32_MAX) {
 595                                         input_set |= IAVF_INSET_IPV4_SRC;
 596                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, SRC);
 597                                 }
 598                                 if (ipv4_mask->hdr.dst_addr == UINT32_MAX) {
 599                                         input_set |= IAVF_INSET_IPV4_DST;
 600                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, DST);
 601                                 }
 602
 603                                 rte_memcpy(hdr->buffer,
 604                                         &ipv4_spec->hdr,
 605                                         sizeof(ipv4_spec->hdr));
 606                         }
 607
 608                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 609                         break;
 610
 611                 case RTE_FLOW_ITEM_TYPE_IPV6:
 612                         l3 = RTE_FLOW_ITEM_TYPE_IPV6;
 613                         ipv6_spec = item->spec;
 614                         ipv6_mask = item->mask;
 615
 616                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 617
 618                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, IPV6);
 619
 620                         if (ipv6_spec && ipv6_mask) {
 621                                 if (ipv6_mask->hdr.payload_len) {
 622                                         rte_flow_error_set(error, EINVAL,
 623                                                 RTE_FLOW_ERROR_TYPE_ITEM,
 624                                                 item, "Invalid IPv6 mask");
 625                                         return -rte_errno;
 626                                 }
 627
 628                                 if ((ipv6_mask->hdr.vtc_flow &
 629                                         rte_cpu_to_be_32(IAVF_IPV6_TC_MASK))
 630                                         == rte_cpu_to_be_32(IAVF_IPV6_TC_MASK)) {
 631                                         input_set |= IAVF_INSET_IPV6_TC;
 632                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, TC);
 633                                 }
 634                                 if (ipv6_mask->hdr.proto == UINT8_MAX) {
 635                                         input_set |= IAVF_INSET_IPV6_NEXT_HDR;
 636                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, PROT);
 637                                 }
 638                                 if (ipv6_mask->hdr.hop_limits == UINT8_MAX) {
 639                                         input_set |= IAVF_INSET_IPV6_HOP_LIMIT;
 640                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, HOP_LIMIT);
 641                                 }
 642                                 if (!memcmp(ipv6_mask->hdr.src_addr,
 643                                         ipv6_addr_mask,
 644                                         RTE_DIM(ipv6_mask->hdr.src_addr))) {
 645                                         input_set |= IAVF_INSET_IPV6_SRC;
 646                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, SRC);
 647                                 }
 648                                 if (!memcmp(ipv6_mask->hdr.dst_addr,
 649                                         ipv6_addr_mask,
 650                                         RTE_DIM(ipv6_mask->hdr.dst_addr))) {
 651                                         input_set |= IAVF_INSET_IPV6_DST;
 652                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, DST);
 653                                 }
 654
 655                                 rte_memcpy(hdr->buffer,
 656                                         &ipv6_spec->hdr,
 657                                         sizeof(ipv6_spec->hdr));
 658                         }
 659
 660                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 661                         break;
 662
 663                 case RTE_FLOW_ITEM_TYPE_UDP:
 664                         udp_spec = item->spec;
 665                         udp_mask = item->mask;
 666
 667                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 668
 669                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, UDP);
 670
 671                         if (udp_spec && udp_mask) {
 672                                 if (udp_mask->hdr.dgram_len ||
 673                                         udp_mask->hdr.dgram_cksum) {
 674                                         rte_flow_error_set(error, EINVAL,
 675                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
 676                                                 "Invalid UDP mask");
 677                                         return -rte_errno;
 678                                 }
 679
 680                                 if (udp_mask->hdr.src_port == UINT16_MAX) {
 681                                         input_set |= IAVF_INSET_UDP_SRC_PORT;
 682                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, UDP, SRC_PORT);
 683                                 }
 684                                 if (udp_mask->hdr.dst_port == UINT16_MAX) {
 685                                         input_set |= IAVF_INSET_UDP_DST_PORT;
 686                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, UDP, DST_PORT);
 687                                 }
 688
 689                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
 690                                         rte_memcpy(hdr->buffer,
 691                                                 &udp_spec->hdr,
 692                                                 sizeof(udp_spec->hdr));
 693                                 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
 694                                         rte_memcpy(hdr->buffer,
 695                                                 &udp_spec->hdr,
 696                                                 sizeof(udp_spec->hdr));
 697                         }
 698
 699                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 700                         break;
 701
 702                 case RTE_FLOW_ITEM_TYPE_TCP:
 703                         tcp_spec = item->spec;
 704                         tcp_mask = item->mask;
 705
 706                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 707
 708                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, TCP);
 709
 710                         if (tcp_spec && tcp_mask) {
 711                                 if (tcp_mask->hdr.sent_seq ||
 712                                         tcp_mask->hdr.recv_ack ||
 713                                         tcp_mask->hdr.data_off ||
 714                                         tcp_mask->hdr.tcp_flags ||
 715                                         tcp_mask->hdr.rx_win ||
 716                                         tcp_mask->hdr.cksum ||
 717                                         tcp_mask->hdr.tcp_urp) {
 718                                         rte_flow_error_set(error, EINVAL,
 719                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
 720                                                 "Invalid TCP mask");
 721                                         return -rte_errno;
 722                                 }
 723
 724                                 if (tcp_mask->hdr.src_port == UINT16_MAX) {
 725                                         input_set |= IAVF_INSET_TCP_SRC_PORT;
 726                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, TCP, SRC_PORT);
 727                                 }
 728                                 if (tcp_mask->hdr.dst_port == UINT16_MAX) {
 729                                         input_set |= IAVF_INSET_TCP_DST_PORT;
 730                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, TCP, DST_PORT);
 731                                 }
 732
 733                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
 734                                         rte_memcpy(hdr->buffer,
 735                                                 &tcp_spec->hdr,
 736                                                 sizeof(tcp_spec->hdr));
 737                                 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
 738                                         rte_memcpy(hdr->buffer,
 739                                                 &tcp_spec->hdr,
 740                                                 sizeof(tcp_spec->hdr));
 741                         }
 742
 743                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 744                         break;
 745
 746                 case RTE_FLOW_ITEM_TYPE_SCTP:
 747                         sctp_spec = item->spec;
 748                         sctp_mask = item->mask;
 749
 750                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 751
 752                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, SCTP);
 753
 754                         if (sctp_spec && sctp_mask) {
 755                                 if (sctp_mask->hdr.cksum) {
 756                                         rte_flow_error_set(error, EINVAL,
 757                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
 758                                                 "Invalid UDP mask");
 759                                         return -rte_errno;
 760                                 }
 761
 762                                 if (sctp_mask->hdr.src_port == UINT16_MAX) {
 763                                         input_set |= IAVF_INSET_SCTP_SRC_PORT;
 764                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, SCTP, SRC_PORT);
 765                                 }
 766                                 if (sctp_mask->hdr.dst_port == UINT16_MAX) {
 767                                         input_set |= IAVF_INSET_SCTP_DST_PORT;
 768                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, SCTP, DST_PORT);
 769                                 }
 770
 771                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
 772                                         rte_memcpy(hdr->buffer,
 773                                                 &sctp_spec->hdr,
 774                                                 sizeof(sctp_spec->hdr));
 775                                 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
 776                                         rte_memcpy(hdr->buffer,
 777                                                 &sctp_spec->hdr,
 778                                                 sizeof(sctp_spec->hdr));
 779                         }
 780
 781                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 782                         break;
 783
 784                 case RTE_FLOW_ITEM_TYPE_GTPU:
 785                         gtp_spec = item->spec;
 786                         gtp_mask = item->mask;
 787
 788                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 789
 790                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_IP);
 791
 792                         if (gtp_spec && gtp_mask) {
 793                                 if (gtp_mask->v_pt_rsv_flags ||
 794                                         gtp_mask->msg_type ||
 795                                         gtp_mask->msg_len) {
 796                                         rte_flow_error_set(error, EINVAL,
 797                                                 RTE_FLOW_ERROR_TYPE_ITEM,
 798                                                 item, "Invalid GTP mask");
 799                                         return -rte_errno;
 800                                 }
 801
 802                                 if (gtp_mask->teid == UINT32_MAX) {
 803                                         input_set |= IAVF_INSET_GTPU_TEID;
 804                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_IP, TEID);
 805                                 }
 806
 807                                 rte_memcpy(hdr->buffer,
 808                                         gtp_spec, sizeof(*gtp_spec));
 809                         }
 810
 811                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 812                         break;
 813
 814                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
 815                         gtp_psc_spec = item->spec;
 816                         gtp_psc_mask = item->mask;
 817
 818                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 819
 820                         if (!gtp_psc_spec)
 821                                 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);
 822                         else if ((gtp_psc_mask->qfi) && !(gtp_psc_mask->pdu_type))
 823                                 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);
 824                         else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_UPLINK)
 825                                 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_UP);
 826                         else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_DWLINK)
 827                                 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_DWN);
 828
 829                         if (gtp_psc_spec && gtp_psc_mask) {
 830                                 if (gtp_psc_mask->qfi == UINT8_MAX) {
 831                                         input_set |= IAVF_INSET_GTPU_QFI;
 832                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_EH, QFI);
 833                                 }
 834
 835                                 rte_memcpy(hdr->buffer, gtp_psc_spec,
 836                                         sizeof(*gtp_psc_spec));
 837                         }
 838
 839                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 840                         break;
 841
 842                 case RTE_FLOW_ITEM_TYPE_L2TPV3OIP:
 843                         l2tpv3oip_spec = item->spec;
 844                         l2tpv3oip_mask = item->mask;
 845
 846                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 847
 848                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, L2TPV3);
 849
 850                         if (l2tpv3oip_spec && l2tpv3oip_mask) {
 851                                 if (l2tpv3oip_mask->session_id == UINT32_MAX) {
 852                                         input_set |= IAVF_L2TPV3OIP_SESSION_ID;
 853                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, L2TPV3, SESS_ID);
 854                                 }
 855
 856                                 rte_memcpy(hdr->buffer, l2tpv3oip_spec,
 857                                         sizeof(*l2tpv3oip_spec));
 858                         }
 859
 860                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 861                         break;
 862
 863                 case RTE_FLOW_ITEM_TYPE_ESP:
 864                         esp_spec = item->spec;
 865                         esp_mask = item->mask;
 866
 867                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 868
 869                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ESP);
 870
 871                         if (esp_spec && esp_mask) {
 872                                 if (esp_mask->hdr.spi == UINT32_MAX) {
 873                                         input_set |= IAVF_INSET_ESP_SPI;
 874                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ESP, SPI);
 875                                 }
 876
 877                                 rte_memcpy(hdr->buffer, &esp_spec->hdr,
 878                                         sizeof(esp_spec->hdr));
 879                         }
 880
 881                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 882                         break;
 883
 884                 case RTE_FLOW_ITEM_TYPE_AH:
 885                         ah_spec = item->spec;
 886                         ah_mask = item->mask;
 887
 888                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 889
 890                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, AH);
 891
 892                         if (ah_spec && ah_mask) {
 893                                 if (ah_mask->spi == UINT32_MAX) {
 894                                         input_set |= IAVF_INSET_AH_SPI;
 895                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, AH, SPI);
 896                                 }
 897
 898                                 rte_memcpy(hdr->buffer, ah_spec,
 899                                         sizeof(*ah_spec));
 900                         }
 901
 902                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 903                         break;
 904
 905                 case RTE_FLOW_ITEM_TYPE_PFCP:
 906                         pfcp_spec = item->spec;
 907                         pfcp_mask = item->mask;
 908
 909                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 910
 911                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, PFCP);
 912
 913                         if (pfcp_spec && pfcp_mask) {
 914                                 if (pfcp_mask->s_field == UINT8_MAX) {
 915                                         input_set |= IAVF_INSET_PFCP_S_FIELD;
 916                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, PFCP, S_FIELD);
 917                                 }
 918
 919                                 rte_memcpy(hdr->buffer, pfcp_spec,
 920                                         sizeof(*pfcp_spec));
 921                         }
 922
 923                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 924                         break;
 925
 926                 case RTE_FLOW_ITEM_TYPE_ECPRI:
 927                         ecpri_spec = item->spec;
 928                         ecpri_mask = item->mask;
 929
 930                         ecpri_common.u32 = rte_be_to_cpu_32(ecpri_spec->hdr.common.u32);
 931
 932                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
 933
 934                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ECPRI);
 935
 936                         if (ecpri_spec && ecpri_mask) {
 937                                 if (ecpri_common.type == RTE_ECPRI_MSG_TYPE_IQ_DATA &&
 938                                                 ecpri_mask->hdr.type0.pc_id == UINT16_MAX) {
 939                                         input_set |= IAVF_ECPRI_PC_RTC_ID;
 940                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ECPRI,
 941                                                                          PC_RTC_ID);
 942                                 }
 943
 944                                 rte_memcpy(hdr->buffer, ecpri_spec,
 945                                         sizeof(*ecpri_spec));
 946                         }
 947
 948                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
 949                         break;
 950
 951                 case RTE_FLOW_ITEM_TYPE_VOID:
 952                         break;
 953
 954                 default:
 955                         rte_flow_error_set(error, EINVAL,
 956                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
 957                                         "Invalid pattern item.");
 958                         return -rte_errno;
 959                 }
 960         }
 961
 962         if (layer > VIRTCHNL_MAX_NUM_PROTO_HDRS) {
 963                 rte_flow_error_set(error, EINVAL,
 964                         RTE_FLOW_ERROR_TYPE_ITEM, item,
 965                         "Protocol header layers exceed the maximum value");
 966                 return -rte_errno;
 967         }
 968
 969         filter->input_set = input_set;
 970
 971         return 0;
 972 }
 973
 974 static int
 975 iavf_fdir_parse(struct iavf_adapter *ad,
 976                 struct iavf_pattern_match_item *array,
 977                 uint32_t array_len,
 978                 const struct rte_flow_item pattern[],
 979                 const struct rte_flow_action actions[],
 980                 void **meta,
 981                 struct rte_flow_error *error)
 982 {
 983         struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
 984         struct iavf_fdir_conf *filter = &vf->fdir.conf;
 985         struct iavf_pattern_match_item *item = NULL;
 986         uint64_t input_set;
 987         int ret;
 988
 989         memset(filter, 0, sizeof(*filter));
 990
 991         item = iavf_search_pattern_match_item(pattern, array, array_len, error);
 992         if (!item)
 993                 return -rte_errno;
 994
 995         ret = iavf_fdir_parse_pattern(ad, pattern, error, filter);
 996         if (ret)
 997                 goto error;
 998
 999         input_set = filter->input_set;
1000         if (!input_set || input_set & ~item->input_set_mask) {
1001                 rte_flow_error_set(error, EINVAL,
1002                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, pattern,
1003                                 "Invalid input set");
1004                 ret = -rte_errno;
1005                 goto error;
1006         }
1007
1008         ret = iavf_fdir_parse_action(ad, actions, error, filter);
1009         if (ret)
1010                 goto error;
1011
1012         if (meta)
1013                 *meta = filter;
1014
1015 error:
1016         rte_free(item);
1017         return ret;
1018 }
1019
1020 static struct iavf_flow_parser iavf_fdir_parser = {
1021         .engine = &iavf_fdir_engine,
1022         .array = iavf_fdir_pattern,
1023         .array_len = RTE_DIM(iavf_fdir_pattern),
1024         .parse_pattern_action = iavf_fdir_parse,
1025         .stage = IAVF_FLOW_STAGE_DISTRIBUTOR,
1026 };
1027
1028 RTE_INIT(iavf_fdir_engine_register)
1029 {
1030         iavf_register_flow_engine(&iavf_fdir_engine);
1031 }