net/iavf: support eCPRI message type 0 for flow director
[dpdk.git] / drivers / net / iavf / iavf_fdir.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2020 Intel Corporation
3  */
4
5 #include <sys/queue.h>
6 #include <stdio.h>
7 #include <errno.h>
8 #include <stdint.h>
9 #include <string.h>
10 #include <unistd.h>
11 #include <stdarg.h>
12
13 #include <rte_ether.h>
14 #include <rte_ethdev_driver.h>
15 #include <rte_malloc.h>
16 #include <rte_tailq.h>
17
18 #include "iavf.h"
19 #include "iavf_generic_flow.h"
20 #include "virtchnl.h"
21 #include "iavf_rxtx.h"
22
23 #define IAVF_FDIR_MAX_QREGION_SIZE 128
24
25 #define IAVF_FDIR_IPV6_TC_OFFSET 20
26 #define IAVF_IPV6_TC_MASK  (0xFF << IAVF_FDIR_IPV6_TC_OFFSET)
27
28 #define IAVF_FDIR_INSET_ETH (\
29         IAVF_INSET_ETHERTYPE)
30
31 #define IAVF_FDIR_INSET_ETH_IPV4 (\
32         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
33         IAVF_INSET_IPV4_PROTO | IAVF_INSET_IPV4_TOS | \
34         IAVF_INSET_IPV4_TTL)
35
36 #define IAVF_FDIR_INSET_ETH_IPV4_UDP (\
37         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
38         IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
39         IAVF_INSET_UDP_SRC_PORT | IAVF_INSET_UDP_DST_PORT)
40
41 #define IAVF_FDIR_INSET_ETH_IPV4_TCP (\
42         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
43         IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
44         IAVF_INSET_TCP_SRC_PORT | IAVF_INSET_TCP_DST_PORT)
45
46 #define IAVF_FDIR_INSET_ETH_IPV4_SCTP (\
47         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
48         IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
49         IAVF_INSET_SCTP_SRC_PORT | IAVF_INSET_SCTP_DST_PORT)
50
51 #define IAVF_FDIR_INSET_ETH_IPV6 (\
52         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
53         IAVF_INSET_IPV6_NEXT_HDR | IAVF_INSET_IPV6_TC | \
54         IAVF_INSET_IPV6_HOP_LIMIT)
55
56 #define IAVF_FDIR_INSET_ETH_IPV6_UDP (\
57         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
58         IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
59         IAVF_INSET_UDP_SRC_PORT | IAVF_INSET_UDP_DST_PORT)
60
61 #define IAVF_FDIR_INSET_ETH_IPV6_TCP (\
62         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
63         IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
64         IAVF_INSET_TCP_SRC_PORT | IAVF_INSET_TCP_DST_PORT)
65
66 #define IAVF_FDIR_INSET_ETH_IPV6_SCTP (\
67         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
68         IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
69         IAVF_INSET_SCTP_SRC_PORT | IAVF_INSET_SCTP_DST_PORT)
70
71 #define IAVF_FDIR_INSET_IPV4_GTPU (\
72         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
73         IAVF_INSET_GTPU_TEID)
74
75 #define IAVF_FDIR_INSET_IPV4_GTPU_EH (\
76         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
77         IAVF_INSET_GTPU_TEID | IAVF_INSET_GTPU_QFI)
78
79 #define IAVF_FDIR_INSET_IPV6_GTPU (\
80         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
81         IAVF_INSET_GTPU_TEID)
82
83 #define IAVF_FDIR_INSET_IPV6_GTPU_EH (\
84         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
85         IAVF_INSET_GTPU_TEID | IAVF_INSET_GTPU_QFI)
86
87 #define IAVF_FDIR_INSET_L2TPV3OIP (\
88         IAVF_L2TPV3OIP_SESSION_ID)
89
90 #define IAVF_FDIR_INSET_ESP (\
91         IAVF_INSET_ESP_SPI)
92
93 #define IAVF_FDIR_INSET_AH (\
94         IAVF_INSET_AH_SPI)
95
96 #define IAVF_FDIR_INSET_IPV4_NATT_ESP (\
97         IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
98         IAVF_INSET_ESP_SPI)
99
100 #define IAVF_FDIR_INSET_IPV6_NATT_ESP (\
101         IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
102         IAVF_INSET_ESP_SPI)
103
104 #define IAVF_FDIR_INSET_PFCP (\
105         IAVF_INSET_PFCP_S_FIELD)
106
107 #define IAVF_FDIR_INSET_ECPRI (\
108         IAVF_INSET_ECPRI)
109
110 static struct iavf_pattern_match_item iavf_fdir_pattern[] = {
111         {iavf_pattern_ethertype,                IAVF_FDIR_INSET_ETH,                    IAVF_INSET_NONE},
112         {iavf_pattern_eth_ipv4,                 IAVF_FDIR_INSET_ETH_IPV4,               IAVF_INSET_NONE},
113         {iavf_pattern_eth_ipv4_udp,             IAVF_FDIR_INSET_ETH_IPV4_UDP,           IAVF_INSET_NONE},
114         {iavf_pattern_eth_ipv4_tcp,             IAVF_FDIR_INSET_ETH_IPV4_TCP,           IAVF_INSET_NONE},
115         {iavf_pattern_eth_ipv4_sctp,            IAVF_FDIR_INSET_ETH_IPV4_SCTP,          IAVF_INSET_NONE},
116         {iavf_pattern_eth_ipv6,                 IAVF_FDIR_INSET_ETH_IPV6,               IAVF_INSET_NONE},
117         {iavf_pattern_eth_ipv6_udp,             IAVF_FDIR_INSET_ETH_IPV6_UDP,           IAVF_INSET_NONE},
118         {iavf_pattern_eth_ipv6_tcp,             IAVF_FDIR_INSET_ETH_IPV6_TCP,           IAVF_INSET_NONE},
119         {iavf_pattern_eth_ipv6_sctp,            IAVF_FDIR_INSET_ETH_IPV6_SCTP,          IAVF_INSET_NONE},
120         {iavf_pattern_eth_ipv4_gtpu,            IAVF_FDIR_INSET_IPV4_GTPU,              IAVF_INSET_NONE},
121         {iavf_pattern_eth_ipv4_gtpu_eh,         IAVF_FDIR_INSET_IPV4_GTPU_EH,           IAVF_INSET_NONE},
122         {iavf_pattern_eth_ipv6_gtpu,            IAVF_FDIR_INSET_IPV6_GTPU,              IAVF_INSET_NONE},
123         {iavf_pattern_eth_ipv6_gtpu_eh,         IAVF_FDIR_INSET_IPV6_GTPU_EH,           IAVF_INSET_NONE},
124         {iavf_pattern_eth_ipv4_l2tpv3,          IAVF_FDIR_INSET_L2TPV3OIP,              IAVF_INSET_NONE},
125         {iavf_pattern_eth_ipv6_l2tpv3,          IAVF_FDIR_INSET_L2TPV3OIP,              IAVF_INSET_NONE},
126         {iavf_pattern_eth_ipv4_esp,             IAVF_FDIR_INSET_ESP,                    IAVF_INSET_NONE},
127         {iavf_pattern_eth_ipv6_esp,             IAVF_FDIR_INSET_ESP,                    IAVF_INSET_NONE},
128         {iavf_pattern_eth_ipv4_ah,              IAVF_FDIR_INSET_AH,                     IAVF_INSET_NONE},
129         {iavf_pattern_eth_ipv6_ah,              IAVF_FDIR_INSET_AH,                     IAVF_INSET_NONE},
130         {iavf_pattern_eth_ipv4_udp_esp,         IAVF_FDIR_INSET_IPV4_NATT_ESP,          IAVF_INSET_NONE},
131         {iavf_pattern_eth_ipv6_udp_esp,         IAVF_FDIR_INSET_IPV6_NATT_ESP,          IAVF_INSET_NONE},
132         {iavf_pattern_eth_ipv4_pfcp,            IAVF_FDIR_INSET_PFCP,                   IAVF_INSET_NONE},
133         {iavf_pattern_eth_ipv6_pfcp,            IAVF_FDIR_INSET_PFCP,                   IAVF_INSET_NONE},
134         {iavf_pattern_eth_ecpri,                IAVF_FDIR_INSET_ECPRI,                  IAVF_INSET_NONE},
135         {iavf_pattern_eth_ipv4_ecpri,           IAVF_FDIR_INSET_ECPRI,                  IAVF_INSET_NONE},
136 };
137
138 static struct iavf_flow_parser iavf_fdir_parser;
139
140 static int
141 iavf_fdir_init(struct iavf_adapter *ad)
142 {
143         struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
144         struct iavf_flow_parser *parser;
145
146         if (!vf->vf_res)
147                 return -EINVAL;
148
149         if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_FDIR_PF)
150                 parser = &iavf_fdir_parser;
151         else
152                 return -ENOTSUP;
153
154         return iavf_register_parser(parser, ad);
155 }
156
157 static void
158 iavf_fdir_uninit(struct iavf_adapter *ad)
159 {
160         iavf_unregister_parser(&iavf_fdir_parser, ad);
161 }
162
163 static int
164 iavf_fdir_create(struct iavf_adapter *ad,
165                 struct rte_flow *flow,
166                 void *meta,
167                 struct rte_flow_error *error)
168 {
169         struct iavf_fdir_conf *filter = meta;
170         struct iavf_fdir_conf *rule;
171         int ret;
172
173         rule = rte_zmalloc("fdir_entry", sizeof(*rule), 0);
174         if (!rule) {
175                 rte_flow_error_set(error, ENOMEM,
176                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
177                                 "Failed to allocate memory for fdir rule");
178                 return -rte_errno;
179         }
180
181         ret = iavf_fdir_add(ad, filter);
182         if (ret) {
183                 rte_flow_error_set(error, -ret,
184                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
185                                 "Failed to add filter rule.");
186                 goto free_entry;
187         }
188
189         if (filter->mark_flag == 1)
190                 iavf_fdir_rx_proc_enable(ad, 1);
191
192         rte_memcpy(rule, filter, sizeof(*rule));
193         flow->rule = rule;
194
195         return 0;
196
197 free_entry:
198         rte_free(rule);
199         return -rte_errno;
200 }
201
202 static int
203 iavf_fdir_destroy(struct iavf_adapter *ad,
204                 struct rte_flow *flow,
205                 struct rte_flow_error *error)
206 {
207         struct iavf_fdir_conf *filter;
208         int ret;
209
210         filter = (struct iavf_fdir_conf *)flow->rule;
211
212         ret = iavf_fdir_del(ad, filter);
213         if (ret) {
214                 rte_flow_error_set(error, -ret,
215                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
216                                 "Failed to delete filter rule.");
217                 return -rte_errno;
218         }
219
220         if (filter->mark_flag == 1)
221                 iavf_fdir_rx_proc_enable(ad, 0);
222
223         flow->rule = NULL;
224         rte_free(filter);
225
226         return 0;
227 }
228
229 static int
230 iavf_fdir_validation(struct iavf_adapter *ad,
231                 __rte_unused struct rte_flow *flow,
232                 void *meta,
233                 struct rte_flow_error *error)
234 {
235         struct iavf_fdir_conf *filter = meta;
236         int ret;
237
238         ret = iavf_fdir_check(ad, filter);
239         if (ret) {
240                 rte_flow_error_set(error, -ret,
241                                 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
242                                 "Failed to validate filter rule.");
243                 return -rte_errno;
244         }
245
246         return 0;
247 };
248
249 static struct iavf_flow_engine iavf_fdir_engine = {
250         .init = iavf_fdir_init,
251         .uninit = iavf_fdir_uninit,
252         .create = iavf_fdir_create,
253         .destroy = iavf_fdir_destroy,
254         .validation = iavf_fdir_validation,
255         .type = IAVF_FLOW_ENGINE_FDIR,
256 };
257
258 static int
259 iavf_fdir_parse_action_qregion(struct iavf_adapter *ad,
260                         struct rte_flow_error *error,
261                         const struct rte_flow_action *act,
262                         struct virtchnl_filter_action *filter_action)
263 {
264         struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
265         const struct rte_flow_action_rss *rss = act->conf;
266         uint32_t i;
267
268         if (act->type != RTE_FLOW_ACTION_TYPE_RSS) {
269                 rte_flow_error_set(error, EINVAL,
270                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
271                                 "Invalid action.");
272                 return -rte_errno;
273         }
274
275         if (rss->queue_num <= 1) {
276                 rte_flow_error_set(error, EINVAL,
277                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
278                                 "Queue region size can't be 0 or 1.");
279                 return -rte_errno;
280         }
281
282         /* check if queue index for queue region is continuous */
283         for (i = 0; i < rss->queue_num - 1; i++) {
284                 if (rss->queue[i + 1] != rss->queue[i] + 1) {
285                         rte_flow_error_set(error, EINVAL,
286                                         RTE_FLOW_ERROR_TYPE_ACTION, act,
287                                         "Discontinuous queue region");
288                         return -rte_errno;
289                 }
290         }
291
292         if (rss->queue[rss->queue_num - 1] >= ad->eth_dev->data->nb_rx_queues) {
293                 rte_flow_error_set(error, EINVAL,
294                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
295                                 "Invalid queue region indexes.");
296                 return -rte_errno;
297         }
298
299         if (!(rte_is_power_of_2(rss->queue_num) &&
300                 rss->queue_num <= IAVF_FDIR_MAX_QREGION_SIZE)) {
301                 rte_flow_error_set(error, EINVAL,
302                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
303                                 "The region size should be any of the following values:"
304                                 "1, 2, 4, 8, 16, 32, 64, 128 as long as the total number "
305                                 "of queues do not exceed the VSI allocation.");
306                 return -rte_errno;
307         }
308
309         if (rss->queue_num > vf->max_rss_qregion) {
310                 rte_flow_error_set(error, EINVAL,
311                                 RTE_FLOW_ERROR_TYPE_ACTION, act,
312                                 "The region size cannot be large than the supported max RSS queue region");
313                 return -rte_errno;
314         }
315
316         filter_action->act_conf.queue.index = rss->queue[0];
317         filter_action->act_conf.queue.region = rte_fls_u32(rss->queue_num) - 1;
318
319         return 0;
320 }
321
322 static int
323 iavf_fdir_parse_action(struct iavf_adapter *ad,
324                         const struct rte_flow_action actions[],
325                         struct rte_flow_error *error,
326                         struct iavf_fdir_conf *filter)
327 {
328         const struct rte_flow_action_queue *act_q;
329         const struct rte_flow_action_mark *mark_spec = NULL;
330         uint32_t dest_num = 0;
331         uint32_t mark_num = 0;
332         int ret;
333
334         int number = 0;
335         struct virtchnl_filter_action *filter_action;
336
337         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
338                 switch (actions->type) {
339                 case RTE_FLOW_ACTION_TYPE_VOID:
340                         break;
341
342                 case RTE_FLOW_ACTION_TYPE_PASSTHRU:
343                         dest_num++;
344
345                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
346
347                         filter_action->type = VIRTCHNL_ACTION_PASSTHRU;
348
349                         filter->add_fltr.rule_cfg.action_set.count = ++number;
350                         break;
351
352                 case RTE_FLOW_ACTION_TYPE_DROP:
353                         dest_num++;
354
355                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
356
357                         filter_action->type = VIRTCHNL_ACTION_DROP;
358
359                         filter->add_fltr.rule_cfg.action_set.count = ++number;
360                         break;
361
362                 case RTE_FLOW_ACTION_TYPE_QUEUE:
363                         dest_num++;
364
365                         act_q = actions->conf;
366                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
367
368                         filter_action->type = VIRTCHNL_ACTION_QUEUE;
369                         filter_action->act_conf.queue.index = act_q->index;
370
371                         if (filter_action->act_conf.queue.index >=
372                                 ad->eth_dev->data->nb_rx_queues) {
373                                 rte_flow_error_set(error, EINVAL,
374                                         RTE_FLOW_ERROR_TYPE_ACTION,
375                                         actions, "Invalid queue for FDIR.");
376                                 return -rte_errno;
377                         }
378
379                         filter->add_fltr.rule_cfg.action_set.count = ++number;
380                         break;
381
382                 case RTE_FLOW_ACTION_TYPE_RSS:
383                         dest_num++;
384
385                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
386
387                         filter_action->type = VIRTCHNL_ACTION_Q_REGION;
388
389                         ret = iavf_fdir_parse_action_qregion(ad,
390                                                 error, actions, filter_action);
391                         if (ret)
392                                 return ret;
393
394                         filter->add_fltr.rule_cfg.action_set.count = ++number;
395                         break;
396
397                 case RTE_FLOW_ACTION_TYPE_MARK:
398                         mark_num++;
399
400                         filter->mark_flag = 1;
401                         mark_spec = actions->conf;
402                         filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
403
404                         filter_action->type = VIRTCHNL_ACTION_MARK;
405                         filter_action->act_conf.mark_id = mark_spec->id;
406
407                         filter->add_fltr.rule_cfg.action_set.count = ++number;
408                         break;
409
410                 default:
411                         rte_flow_error_set(error, EINVAL,
412                                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
413                                         "Invalid action.");
414                         return -rte_errno;
415                 }
416         }
417
418         if (number > VIRTCHNL_MAX_NUM_ACTIONS) {
419                 rte_flow_error_set(error, EINVAL,
420                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
421                         "Action numbers exceed the maximum value");
422                 return -rte_errno;
423         }
424
425         if (dest_num >= 2) {
426                 rte_flow_error_set(error, EINVAL,
427                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
428                         "Unsupported action combination");
429                 return -rte_errno;
430         }
431
432         if (mark_num >= 2) {
433                 rte_flow_error_set(error, EINVAL,
434                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
435                         "Too many mark actions");
436                 return -rte_errno;
437         }
438
439         if (dest_num + mark_num == 0) {
440                 rte_flow_error_set(error, EINVAL,
441                         RTE_FLOW_ERROR_TYPE_ACTION, actions,
442                         "Empty action");
443                 return -rte_errno;
444         }
445
446         /* Mark only is equal to mark + passthru. */
447         if (dest_num == 0) {
448                 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
449                 filter_action->type = VIRTCHNL_ACTION_PASSTHRU;
450                 filter->add_fltr.rule_cfg.action_set.count = ++number;
451         }
452
453         return 0;
454 }
455
456 static int
457 iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
458                         const struct rte_flow_item pattern[],
459                         struct rte_flow_error *error,
460                         struct iavf_fdir_conf *filter)
461 {
462         const struct rte_flow_item *item = pattern;
463         enum rte_flow_item_type item_type;
464         enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;
465         const struct rte_flow_item_eth *eth_spec, *eth_mask;
466         const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask;
467         const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;
468         const struct rte_flow_item_udp *udp_spec, *udp_mask;
469         const struct rte_flow_item_tcp *tcp_spec, *tcp_mask;
470         const struct rte_flow_item_sctp *sctp_spec, *sctp_mask;
471         const struct rte_flow_item_gtp *gtp_spec, *gtp_mask;
472         const struct rte_flow_item_gtp_psc *gtp_psc_spec, *gtp_psc_mask;
473         const struct rte_flow_item_l2tpv3oip *l2tpv3oip_spec, *l2tpv3oip_mask;
474         const struct rte_flow_item_esp *esp_spec, *esp_mask;
475         const struct rte_flow_item_ah *ah_spec, *ah_mask;
476         const struct rte_flow_item_pfcp *pfcp_spec, *pfcp_mask;
477         const struct rte_flow_item_ecpri *ecpri_spec, *ecpri_mask;
478         struct rte_ecpri_common_hdr ecpri_common;
479         uint64_t input_set = IAVF_INSET_NONE;
480
481         enum rte_flow_item_type next_type;
482         uint16_t ether_type;
483
484         int layer = 0;
485         struct virtchnl_proto_hdr *hdr;
486
487         uint8_t  ipv6_addr_mask[16] = {
488                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
489                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
490         };
491
492         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
493                 if (item->last) {
494                         rte_flow_error_set(error, EINVAL,
495                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
496                                         "Not support range");
497                 }
498
499                 item_type = item->type;
500
501                 switch (item_type) {
502                 case RTE_FLOW_ITEM_TYPE_ETH:
503                         eth_spec = item->spec;
504                         eth_mask = item->mask;
505                         next_type = (item + 1)->type;
506
507                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
508
509                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ETH);
510
511                         if (next_type == RTE_FLOW_ITEM_TYPE_END &&
512                                 (!eth_spec || !eth_mask)) {
513                                 rte_flow_error_set(error, EINVAL,
514                                                 RTE_FLOW_ERROR_TYPE_ITEM,
515                                                 item, "NULL eth spec/mask.");
516                                 return -rte_errno;
517                         }
518
519                         if (eth_spec && eth_mask) {
520                                 if (!rte_is_zero_ether_addr(&eth_mask->src) ||
521                                     !rte_is_zero_ether_addr(&eth_mask->dst)) {
522                                         rte_flow_error_set(error, EINVAL,
523                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
524                                                 "Invalid MAC_addr mask.");
525                                         return -rte_errno;
526                                 }
527                         }
528
529                         if (eth_spec && eth_mask && eth_mask->type) {
530                                 if (eth_mask->type != RTE_BE16(0xffff)) {
531                                         rte_flow_error_set(error, EINVAL,
532                                                 RTE_FLOW_ERROR_TYPE_ITEM,
533                                                 item, "Invalid type mask.");
534                                         return -rte_errno;
535                                 }
536
537                                 ether_type = rte_be_to_cpu_16(eth_spec->type);
538                                 if (ether_type == RTE_ETHER_TYPE_IPV4 ||
539                                         ether_type == RTE_ETHER_TYPE_IPV6) {
540                                         rte_flow_error_set(error, EINVAL,
541                                                 RTE_FLOW_ERROR_TYPE_ITEM,
542                                                 item,
543                                                 "Unsupported ether_type.");
544                                         return -rte_errno;
545                                 }
546
547                                 input_set |= IAVF_INSET_ETHERTYPE;
548                                 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ETH, ETHERTYPE);
549
550                                 rte_memcpy(hdr->buffer,
551                                         eth_spec, sizeof(struct rte_ether_hdr));
552                         }
553
554                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
555                         break;
556
557                 case RTE_FLOW_ITEM_TYPE_IPV4:
558                         l3 = RTE_FLOW_ITEM_TYPE_IPV4;
559                         ipv4_spec = item->spec;
560                         ipv4_mask = item->mask;
561
562                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
563
564                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, IPV4);
565
566                         if (ipv4_spec && ipv4_mask) {
567                                 if (ipv4_mask->hdr.version_ihl ||
568                                         ipv4_mask->hdr.total_length ||
569                                         ipv4_mask->hdr.packet_id ||
570                                         ipv4_mask->hdr.fragment_offset ||
571                                         ipv4_mask->hdr.hdr_checksum) {
572                                         rte_flow_error_set(error, EINVAL,
573                                                 RTE_FLOW_ERROR_TYPE_ITEM,
574                                                 item, "Invalid IPv4 mask.");
575                                         return -rte_errno;
576                                 }
577
578                                 if (ipv4_mask->hdr.type_of_service ==
579                                                                 UINT8_MAX) {
580                                         input_set |= IAVF_INSET_IPV4_TOS;
581                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, DSCP);
582                                 }
583                                 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX) {
584                                         input_set |= IAVF_INSET_IPV4_PROTO;
585                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, PROT);
586                                 }
587                                 if (ipv4_mask->hdr.time_to_live == UINT8_MAX) {
588                                         input_set |= IAVF_INSET_IPV4_TTL;
589                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, TTL);
590                                 }
591                                 if (ipv4_mask->hdr.src_addr == UINT32_MAX) {
592                                         input_set |= IAVF_INSET_IPV4_SRC;
593                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, SRC);
594                                 }
595                                 if (ipv4_mask->hdr.dst_addr == UINT32_MAX) {
596                                         input_set |= IAVF_INSET_IPV4_DST;
597                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, DST);
598                                 }
599
600                                 rte_memcpy(hdr->buffer,
601                                         &ipv4_spec->hdr,
602                                         sizeof(ipv4_spec->hdr));
603                         }
604
605                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
606                         break;
607
608                 case RTE_FLOW_ITEM_TYPE_IPV6:
609                         l3 = RTE_FLOW_ITEM_TYPE_IPV6;
610                         ipv6_spec = item->spec;
611                         ipv6_mask = item->mask;
612
613                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
614
615                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, IPV6);
616
617                         if (ipv6_spec && ipv6_mask) {
618                                 if (ipv6_mask->hdr.payload_len) {
619                                         rte_flow_error_set(error, EINVAL,
620                                                 RTE_FLOW_ERROR_TYPE_ITEM,
621                                                 item, "Invalid IPv6 mask");
622                                         return -rte_errno;
623                                 }
624
625                                 if ((ipv6_mask->hdr.vtc_flow &
626                                         rte_cpu_to_be_32(IAVF_IPV6_TC_MASK))
627                                         == rte_cpu_to_be_32(IAVF_IPV6_TC_MASK)) {
628                                         input_set |= IAVF_INSET_IPV6_TC;
629                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, TC);
630                                 }
631                                 if (ipv6_mask->hdr.proto == UINT8_MAX) {
632                                         input_set |= IAVF_INSET_IPV6_NEXT_HDR;
633                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, PROT);
634                                 }
635                                 if (ipv6_mask->hdr.hop_limits == UINT8_MAX) {
636                                         input_set |= IAVF_INSET_IPV6_HOP_LIMIT;
637                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, HOP_LIMIT);
638                                 }
639                                 if (!memcmp(ipv6_mask->hdr.src_addr,
640                                         ipv6_addr_mask,
641                                         RTE_DIM(ipv6_mask->hdr.src_addr))) {
642                                         input_set |= IAVF_INSET_IPV6_SRC;
643                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, SRC);
644                                 }
645                                 if (!memcmp(ipv6_mask->hdr.dst_addr,
646                                         ipv6_addr_mask,
647                                         RTE_DIM(ipv6_mask->hdr.dst_addr))) {
648                                         input_set |= IAVF_INSET_IPV6_DST;
649                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, DST);
650                                 }
651
652                                 rte_memcpy(hdr->buffer,
653                                         &ipv6_spec->hdr,
654                                         sizeof(ipv6_spec->hdr));
655                         }
656
657                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
658                         break;
659
660                 case RTE_FLOW_ITEM_TYPE_UDP:
661                         udp_spec = item->spec;
662                         udp_mask = item->mask;
663
664                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
665
666                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, UDP);
667
668                         if (udp_spec && udp_mask) {
669                                 if (udp_mask->hdr.dgram_len ||
670                                         udp_mask->hdr.dgram_cksum) {
671                                         rte_flow_error_set(error, EINVAL,
672                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
673                                                 "Invalid UDP mask");
674                                         return -rte_errno;
675                                 }
676
677                                 if (udp_mask->hdr.src_port == UINT16_MAX) {
678                                         input_set |= IAVF_INSET_UDP_SRC_PORT;
679                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, UDP, SRC_PORT);
680                                 }
681                                 if (udp_mask->hdr.dst_port == UINT16_MAX) {
682                                         input_set |= IAVF_INSET_UDP_DST_PORT;
683                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, UDP, DST_PORT);
684                                 }
685
686                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
687                                         rte_memcpy(hdr->buffer,
688                                                 &udp_spec->hdr,
689                                                 sizeof(udp_spec->hdr));
690                                 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
691                                         rte_memcpy(hdr->buffer,
692                                                 &udp_spec->hdr,
693                                                 sizeof(udp_spec->hdr));
694                         }
695
696                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
697                         break;
698
699                 case RTE_FLOW_ITEM_TYPE_TCP:
700                         tcp_spec = item->spec;
701                         tcp_mask = item->mask;
702
703                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
704
705                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, TCP);
706
707                         if (tcp_spec && tcp_mask) {
708                                 if (tcp_mask->hdr.sent_seq ||
709                                         tcp_mask->hdr.recv_ack ||
710                                         tcp_mask->hdr.data_off ||
711                                         tcp_mask->hdr.tcp_flags ||
712                                         tcp_mask->hdr.rx_win ||
713                                         tcp_mask->hdr.cksum ||
714                                         tcp_mask->hdr.tcp_urp) {
715                                         rte_flow_error_set(error, EINVAL,
716                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
717                                                 "Invalid TCP mask");
718                                         return -rte_errno;
719                                 }
720
721                                 if (tcp_mask->hdr.src_port == UINT16_MAX) {
722                                         input_set |= IAVF_INSET_TCP_SRC_PORT;
723                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, TCP, SRC_PORT);
724                                 }
725                                 if (tcp_mask->hdr.dst_port == UINT16_MAX) {
726                                         input_set |= IAVF_INSET_TCP_DST_PORT;
727                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, TCP, DST_PORT);
728                                 }
729
730                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
731                                         rte_memcpy(hdr->buffer,
732                                                 &tcp_spec->hdr,
733                                                 sizeof(tcp_spec->hdr));
734                                 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
735                                         rte_memcpy(hdr->buffer,
736                                                 &tcp_spec->hdr,
737                                                 sizeof(tcp_spec->hdr));
738                         }
739
740                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
741                         break;
742
743                 case RTE_FLOW_ITEM_TYPE_SCTP:
744                         sctp_spec = item->spec;
745                         sctp_mask = item->mask;
746
747                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
748
749                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, SCTP);
750
751                         if (sctp_spec && sctp_mask) {
752                                 if (sctp_mask->hdr.cksum) {
753                                         rte_flow_error_set(error, EINVAL,
754                                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
755                                                 "Invalid UDP mask");
756                                         return -rte_errno;
757                                 }
758
759                                 if (sctp_mask->hdr.src_port == UINT16_MAX) {
760                                         input_set |= IAVF_INSET_SCTP_SRC_PORT;
761                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, SCTP, SRC_PORT);
762                                 }
763                                 if (sctp_mask->hdr.dst_port == UINT16_MAX) {
764                                         input_set |= IAVF_INSET_SCTP_DST_PORT;
765                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, SCTP, DST_PORT);
766                                 }
767
768                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
769                                         rte_memcpy(hdr->buffer,
770                                                 &sctp_spec->hdr,
771                                                 sizeof(sctp_spec->hdr));
772                                 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
773                                         rte_memcpy(hdr->buffer,
774                                                 &sctp_spec->hdr,
775                                                 sizeof(sctp_spec->hdr));
776                         }
777
778                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
779                         break;
780
781                 case RTE_FLOW_ITEM_TYPE_GTPU:
782                         gtp_spec = item->spec;
783                         gtp_mask = item->mask;
784
785                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
786
787                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_IP);
788
789                         if (gtp_spec && gtp_mask) {
790                                 if (gtp_mask->v_pt_rsv_flags ||
791                                         gtp_mask->msg_type ||
792                                         gtp_mask->msg_len) {
793                                         rte_flow_error_set(error, EINVAL,
794                                                 RTE_FLOW_ERROR_TYPE_ITEM,
795                                                 item, "Invalid GTP mask");
796                                         return -rte_errno;
797                                 }
798
799                                 if (gtp_mask->teid == UINT32_MAX) {
800                                         input_set |= IAVF_INSET_GTPU_TEID;
801                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_IP, TEID);
802                                 }
803
804                                 rte_memcpy(hdr->buffer,
805                                         gtp_spec, sizeof(*gtp_spec));
806                         }
807
808                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
809                         break;
810
811                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
812                         gtp_psc_spec = item->spec;
813                         gtp_psc_mask = item->mask;
814
815                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
816
817                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);
818
819                         if (gtp_psc_spec && gtp_psc_mask) {
820                                 if (gtp_psc_mask->qfi == UINT8_MAX) {
821                                         input_set |= IAVF_INSET_GTPU_QFI;
822                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_EH, QFI);
823                                 }
824
825                                 rte_memcpy(hdr->buffer, gtp_psc_spec,
826                                         sizeof(*gtp_psc_spec));
827                         }
828
829                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
830                         break;
831
832                 case RTE_FLOW_ITEM_TYPE_L2TPV3OIP:
833                         l2tpv3oip_spec = item->spec;
834                         l2tpv3oip_mask = item->mask;
835
836                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
837
838                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, L2TPV3);
839
840                         if (l2tpv3oip_spec && l2tpv3oip_mask) {
841                                 if (l2tpv3oip_mask->session_id == UINT32_MAX) {
842                                         input_set |= IAVF_L2TPV3OIP_SESSION_ID;
843                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, L2TPV3, SESS_ID);
844                                 }
845
846                                 rte_memcpy(hdr->buffer, l2tpv3oip_spec,
847                                         sizeof(*l2tpv3oip_spec));
848                         }
849
850                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
851                         break;
852
853                 case RTE_FLOW_ITEM_TYPE_ESP:
854                         esp_spec = item->spec;
855                         esp_mask = item->mask;
856
857                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
858
859                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ESP);
860
861                         if (esp_spec && esp_mask) {
862                                 if (esp_mask->hdr.spi == UINT32_MAX) {
863                                         input_set |= IAVF_INSET_ESP_SPI;
864                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ESP, SPI);
865                                 }
866
867                                 rte_memcpy(hdr->buffer, &esp_spec->hdr,
868                                         sizeof(esp_spec->hdr));
869                         }
870
871                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
872                         break;
873
874                 case RTE_FLOW_ITEM_TYPE_AH:
875                         ah_spec = item->spec;
876                         ah_mask = item->mask;
877
878                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
879
880                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, AH);
881
882                         if (ah_spec && ah_mask) {
883                                 if (ah_mask->spi == UINT32_MAX) {
884                                         input_set |= IAVF_INSET_AH_SPI;
885                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, AH, SPI);
886                                 }
887
888                                 rte_memcpy(hdr->buffer, ah_spec,
889                                         sizeof(*ah_spec));
890                         }
891
892                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
893                         break;
894
895                 case RTE_FLOW_ITEM_TYPE_PFCP:
896                         pfcp_spec = item->spec;
897                         pfcp_mask = item->mask;
898
899                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
900
901                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, PFCP);
902
903                         if (pfcp_spec && pfcp_mask) {
904                                 if (pfcp_mask->s_field == UINT8_MAX) {
905                                         input_set |= IAVF_INSET_PFCP_S_FIELD;
906                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, PFCP, S_FIELD);
907                                 }
908
909                                 rte_memcpy(hdr->buffer, pfcp_spec,
910                                         sizeof(*pfcp_spec));
911                         }
912
913                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
914                         break;
915
916                 case RTE_FLOW_ITEM_TYPE_ECPRI:
917                         ecpri_spec = item->spec;
918                         ecpri_mask = item->mask;
919
920                         ecpri_common.u32 = rte_be_to_cpu_32(ecpri_spec->hdr.common.u32);
921
922                         hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
923
924                         VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ECPRI);
925
926                         if (ecpri_spec && ecpri_mask) {
927                                 if (ecpri_common.type == RTE_ECPRI_MSG_TYPE_IQ_DATA &&
928                                                 ecpri_mask->hdr.type0.pc_id == UINT16_MAX) {
929                                         input_set |= IAVF_ECPRI_PC_RTC_ID;
930                                         VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ECPRI,
931                                                                          PC_RTC_ID);
932                                 }
933
934                                 rte_memcpy(hdr->buffer, ecpri_spec,
935                                         sizeof(*ecpri_spec));
936                         }
937
938                         filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
939                         break;
940
941                 case RTE_FLOW_ITEM_TYPE_VOID:
942                         break;
943
944                 default:
945                         rte_flow_error_set(error, EINVAL,
946                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
947                                         "Invalid pattern item.");
948                         return -rte_errno;
949                 }
950         }
951
952         if (layer > VIRTCHNL_MAX_NUM_PROTO_HDRS) {
953                 rte_flow_error_set(error, EINVAL,
954                         RTE_FLOW_ERROR_TYPE_ITEM, item,
955                         "Protocol header layers exceed the maximum value");
956                 return -rte_errno;
957         }
958
959         filter->input_set = input_set;
960
961         return 0;
962 }
963
964 static int
965 iavf_fdir_parse(struct iavf_adapter *ad,
966                 struct iavf_pattern_match_item *array,
967                 uint32_t array_len,
968                 const struct rte_flow_item pattern[],
969                 const struct rte_flow_action actions[],
970                 void **meta,
971                 struct rte_flow_error *error)
972 {
973         struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
974         struct iavf_fdir_conf *filter = &vf->fdir.conf;
975         struct iavf_pattern_match_item *item = NULL;
976         uint64_t input_set;
977         int ret;
978
979         memset(filter, 0, sizeof(*filter));
980
981         item = iavf_search_pattern_match_item(pattern, array, array_len, error);
982         if (!item)
983                 return -rte_errno;
984
985         ret = iavf_fdir_parse_pattern(ad, pattern, error, filter);
986         if (ret)
987                 goto error;
988
989         input_set = filter->input_set;
990         if (!input_set || input_set & ~item->input_set_mask) {
991                 rte_flow_error_set(error, EINVAL,
992                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, pattern,
993                                 "Invalid input set");
994                 ret = -rte_errno;
995                 goto error;
996         }
997
998         ret = iavf_fdir_parse_action(ad, actions, error, filter);
999         if (ret)
1000                 goto error;
1001
1002         if (meta)
1003                 *meta = filter;
1004
1005 error:
1006         rte_free(item);
1007         return ret;
1008 }
1009
1010 static struct iavf_flow_parser iavf_fdir_parser = {
1011         .engine = &iavf_fdir_engine,
1012         .array = iavf_fdir_pattern,
1013         .array_len = RTE_DIM(iavf_fdir_pattern),
1014         .parse_pattern_action = iavf_fdir_parse,
1015         .stage = IAVF_FLOW_STAGE_DISTRIBUTOR,
1016 };
1017
1018 RTE_INIT(iavf_fdir_engine_register)
1019 {
1020         iavf_register_flow_engine(&iavf_fdir_engine);
1021 }