1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Intel Corporation
5 #ifndef _IAVF_RXTX_VEC_COMMON_H_
6 #define _IAVF_RXTX_VEC_COMMON_H_
8 #include <rte_ethdev_driver.h>
9 #include <rte_malloc.h>
12 #include "iavf_rxtx.h"
14 static inline uint16_t
15 reassemble_packets(struct iavf_rx_queue *rxq, struct rte_mbuf **rx_bufs,
16 uint16_t nb_bufs, uint8_t *split_flags)
18 struct rte_mbuf *pkts[IAVF_VPMD_RX_MAX_BURST];
19 struct rte_mbuf *start = rxq->pkt_first_seg;
20 struct rte_mbuf *end = rxq->pkt_last_seg;
21 unsigned int pkt_idx, buf_idx;
23 for (buf_idx = 0, pkt_idx = 0; buf_idx < nb_bufs; buf_idx++) {
25 /* processing a split packet */
26 end->next = rx_bufs[buf_idx];
27 rx_bufs[buf_idx]->data_len += rxq->crc_len;
30 start->pkt_len += rx_bufs[buf_idx]->data_len;
33 if (!split_flags[buf_idx]) {
34 /* it's the last packet of the set */
35 start->hash = end->hash;
36 start->vlan_tci = end->vlan_tci;
37 start->ol_flags = end->ol_flags;
38 /* we need to strip crc for the whole packet */
39 start->pkt_len -= rxq->crc_len;
40 if (end->data_len > rxq->crc_len) {
41 end->data_len -= rxq->crc_len;
43 /* free up last mbuf */
44 struct rte_mbuf *secondlast = start;
47 while (secondlast->next != end)
48 secondlast = secondlast->next;
49 secondlast->data_len -= (rxq->crc_len -
51 secondlast->next = NULL;
52 rte_pktmbuf_free_seg(end);
54 pkts[pkt_idx++] = start;
59 /* not processing a split packet */
60 if (!split_flags[buf_idx]) {
61 /* not a split packet, save and skip */
62 pkts[pkt_idx++] = rx_bufs[buf_idx];
65 end = start = rx_bufs[buf_idx];
66 rx_bufs[buf_idx]->data_len += rxq->crc_len;
67 rx_bufs[buf_idx]->pkt_len += rxq->crc_len;
71 /* save the partial packet for next time */
72 rxq->pkt_first_seg = start;
73 rxq->pkt_last_seg = end;
74 memcpy(rx_bufs, pkts, pkt_idx * (sizeof(*pkts)));
78 static __rte_always_inline int
79 iavf_tx_free_bufs(struct iavf_tx_queue *txq)
81 struct iavf_tx_entry *txep;
85 struct rte_mbuf *m, *free[IAVF_VPMD_TX_MAX_FREE_BUF];
87 /* check DD bits on threshold descriptor */
88 if ((txq->tx_ring[txq->next_dd].cmd_type_offset_bsz &
89 rte_cpu_to_le_64(IAVF_TXD_QW1_DTYPE_MASK)) !=
90 rte_cpu_to_le_64(IAVF_TX_DESC_DTYPE_DESC_DONE))
95 /* first buffer to free from S/W ring is at index
96 * tx_next_dd - (tx_rs_thresh-1)
98 txep = &txq->sw_ring[txq->next_dd - (n - 1)];
99 m = rte_pktmbuf_prefree_seg(txep[0].mbuf);
100 if (likely(m != NULL)) {
103 for (i = 1; i < n; i++) {
104 m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
105 if (likely(m != NULL)) {
106 if (likely(m->pool == free[0]->pool)) {
109 rte_mempool_put_bulk(free[0]->pool,
117 rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
119 for (i = 1; i < n; i++) {
120 m = rte_pktmbuf_prefree_seg(txep[i].mbuf);
122 rte_mempool_put(m->pool, m);
126 /* buffers were freed, update counters */
127 txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
128 txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
129 if (txq->next_dd >= txq->nb_tx_desc)
130 txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
132 return txq->rs_thresh;
135 static __rte_always_inline void
136 tx_backlog_entry(struct iavf_tx_entry *txep,
137 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
141 for (i = 0; i < (int)nb_pkts; ++i)
142 txep[i].mbuf = tx_pkts[i];
146 _iavf_rx_queue_release_mbufs_vec(struct iavf_rx_queue *rxq)
148 const unsigned int mask = rxq->nb_rx_desc - 1;
151 if (!rxq->sw_ring || rxq->rxrearm_nb >= rxq->nb_rx_desc)
154 /* free all mbufs that are valid in the ring */
155 if (rxq->rxrearm_nb == 0) {
156 for (i = 0; i < rxq->nb_rx_desc; i++) {
158 rte_pktmbuf_free_seg(rxq->sw_ring[i]);
161 for (i = rxq->rx_tail;
162 i != rxq->rxrearm_start;
163 i = (i + 1) & mask) {
165 rte_pktmbuf_free_seg(rxq->sw_ring[i]);
169 rxq->rxrearm_nb = rxq->nb_rx_desc;
171 /* set all entries to NULL */
172 memset(rxq->sw_ring, 0, sizeof(rxq->sw_ring[0]) * rxq->nb_rx_desc);
176 _iavf_tx_queue_release_mbufs_vec(struct iavf_tx_queue *txq)
179 const uint16_t max_desc = (uint16_t)(txq->nb_tx_desc - 1);
181 if (!txq->sw_ring || txq->nb_free == max_desc)
184 i = txq->next_dd - txq->rs_thresh + 1;
185 if (txq->tx_tail < i) {
186 for (; i < txq->nb_tx_desc; i++) {
187 rte_pktmbuf_free_seg(txq->sw_ring[i].mbuf);
188 txq->sw_ring[i].mbuf = NULL;
195 iavf_rxq_vec_setup_default(struct iavf_rx_queue *rxq)
198 struct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */
201 mb_def.data_off = RTE_PKTMBUF_HEADROOM;
202 mb_def.port = rxq->port_id;
203 rte_mbuf_refcnt_set(&mb_def, 1);
205 /* prevent compiler reordering: rearm_data covers previous fields */
206 rte_compiler_barrier();
207 p = (uintptr_t)&mb_def.rearm_data;
208 rxq->mbuf_initializer = *(uint64_t *)p;
213 iavf_rx_vec_queue_default(struct iavf_rx_queue *rxq)
218 if (!rte_is_power_of_2(rxq->nb_rx_desc))
221 if (rxq->rx_free_thresh < IAVF_VPMD_RX_MAX_BURST)
224 if (rxq->nb_rx_desc % rxq->rx_free_thresh)
231 iavf_tx_vec_queue_default(struct iavf_tx_queue *txq)
236 if (txq->offloads & IAVF_NO_VECTOR_FLAGS)
239 if (txq->rs_thresh < IAVF_VPMD_TX_MAX_BURST ||
240 txq->rs_thresh > IAVF_VPMD_TX_MAX_FREE_BUF)
247 iavf_rx_vec_dev_check_default(struct rte_eth_dev *dev)
250 struct iavf_rx_queue *rxq;
252 for (i = 0; i < dev->data->nb_rx_queues; i++) {
253 rxq = dev->data->rx_queues[i];
254 if (iavf_rx_vec_queue_default(rxq))
262 iavf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
265 struct iavf_tx_queue *txq;
267 for (i = 0; i < dev->data->nb_tx_queues; i++) {
268 txq = dev->data->tx_queues[i];
269 if (iavf_tx_vec_queue_default(txq))