1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2018
10 #include "ice_flex_pipe.h"
11 #include "ice_switch.h"
13 enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
16 ice_debug_cq(struct ice_hw *hw, u32 mask, void *desc, void *buf, u16 buf_len);
17 enum ice_status ice_init_hw(struct ice_hw *hw);
18 void ice_deinit_hw(struct ice_hw *hw);
19 enum ice_status ice_check_reset(struct ice_hw *hw);
20 enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
22 enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
23 void ice_shutdown_all_ctrlq(struct ice_hw *hw);
25 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
26 struct ice_rq_event_info *e, u16 *pending);
28 ice_get_link_status(struct ice_port_info *pi, bool *link_up);
30 ice_update_link_info(struct ice_port_info *pi);
32 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
33 enum ice_aq_res_access_type access, u32 timeout);
34 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
36 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool sh, u16 *res);
38 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
40 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
41 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
42 enum ice_adminq_opc opc, struct ice_sq_cd *cd);
43 enum ice_status ice_init_nvm(struct ice_hw *hw);
44 enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
46 ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);
48 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
49 struct ice_aq_desc *desc, void *buf, u16 buf_size,
50 struct ice_sq_cd *cd);
51 void ice_clear_pxe_mode(struct ice_hw *hw);
53 enum ice_status ice_get_caps(struct ice_hw *hw);
55 /* Define a macro that will align a pointer to point to the next memory address
56 * that falls on the given power of 2 (i.e., 2, 4, 8, 16, 32, 64...). For
57 * example, given the variable pointer = 0x1006, then after the following call:
59 * pointer = ICE_ALIGN(pointer, 4)
61 * ... the value of pointer would equal 0x1008, since 0x1008 is the next
62 * address after 0x1006 which is divisible by 4.
64 #define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
67 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
69 #if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER)
70 enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
72 ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);
74 ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
75 struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
76 u32 tx_cmpltnq_index);
78 ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);
80 ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
81 struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
82 u32 tx_drbell_q_index);
83 #endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */
86 ice_aq_get_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut,
89 ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut,
92 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
93 struct ice_aqc_get_set_rss_keys *keys);
95 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
96 struct ice_aqc_get_set_rss_keys *keys);
98 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
99 enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
100 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
101 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
103 ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
105 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
106 void *buf, u16 buf_size, struct ice_sq_cd *cd);
107 enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
110 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
111 struct ice_aqc_get_phy_caps_data *caps,
112 struct ice_sq_cd *cd);
114 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
115 u16 link_speeds_bitmap);
117 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
118 struct ice_sq_cd *cd);
120 enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
122 ice_aq_set_phy_cfg(struct ice_hw *hw, u8 lport,
123 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
125 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
126 bool ena_auto_link_update);
128 ice_cfg_phy_fec(struct ice_aqc_set_phy_cfg_data *cfg, enum ice_fec_mode fec);
130 ice_copy_phy_caps_to_cfg(struct ice_aqc_get_phy_caps_data *caps,
131 struct ice_aqc_set_phy_cfg_data *cfg);
133 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
134 struct ice_sq_cd *cd);
136 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
138 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
139 struct ice_link_status *link, struct ice_sq_cd *cd);
141 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
142 struct ice_sq_cd *cd);
144 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
148 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
149 struct ice_sq_cd *cd);
154 ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
156 ice_dis_vsi_txq(struct ice_port_info *pi, u8 num_queues, u16 *q_ids,
157 u32 *q_teids, enum ice_disq_rst_src rst_src, u16 vmvf_num,
158 struct ice_sq_cd *cmd_details);
160 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
163 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_qgrps,
164 struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
165 struct ice_sq_cd *cd);
166 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
167 void ice_replay_post(struct ice_hw *hw);
168 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
169 void ice_sched_replay_agg(struct ice_hw *hw);
170 enum ice_status ice_sched_replay_tc_node_bw(struct ice_hw *hw);
171 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
173 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
174 enum ice_rl_type rl_type, u8 bw_alloc);
175 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
176 void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);
178 ice_stat_update40(struct ice_hw *hw, u32 hireg, u32 loreg,
179 bool prev_stat_loaded, u64 *prev_stat, u64 *cur_stat);
181 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
182 u64 *prev_stat, u64 *cur_stat);
184 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
185 struct ice_aqc_get_elem *buf);
186 #endif /* _ICE_COMMON_H_ */