1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2019
9 #include "ice_flex_pipe.h"
10 #include "ice_switch.h"
20 enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
22 enum ice_status ice_init_hw(struct ice_hw *hw);
23 void ice_deinit_hw(struct ice_hw *hw);
25 ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
27 enum ice_status ice_check_reset(struct ice_hw *hw);
28 enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
30 enum ice_status ice_create_all_ctrlq(struct ice_hw *hw);
31 enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
32 void ice_shutdown_all_ctrlq(struct ice_hw *hw);
33 void ice_destroy_all_ctrlq(struct ice_hw *hw);
35 ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
36 struct ice_rq_event_info *e, u16 *pending);
38 ice_get_link_status(struct ice_port_info *pi, bool *link_up);
39 enum ice_status ice_update_link_info(struct ice_port_info *pi);
41 ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
42 enum ice_aq_res_access_type access, u32 timeout);
43 void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
45 ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
47 ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
49 ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
50 struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
51 enum ice_adminq_opc opc, struct ice_sq_cd *cd);
52 enum ice_status ice_init_nvm(struct ice_hw *hw);
53 enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
55 ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);
57 ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
58 struct ice_aq_desc *desc, void *buf, u16 buf_size,
59 struct ice_sq_cd *cd);
60 void ice_clear_pxe_mode(struct ice_hw *hw);
62 enum ice_status ice_get_caps(struct ice_hw *hw);
64 void ice_set_safe_mode_caps(struct ice_hw *hw);
66 /* Define a macro that will align a pointer to point to the next memory address
67 * that falls on the given power of 2 (i.e., 2, 4, 8, 16, 32, 64...). For
68 * example, given the variable pointer = 0x1006, then after the following call:
70 * pointer = ICE_ALIGN(pointer, 4)
72 * ... the value of pointer would equal 0x1008, since 0x1008 is the next
73 * address after 0x1006 which is divisible by 4.
75 #define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
78 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
80 #if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER)
81 enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
83 ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);
85 ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
86 struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
87 u32 tx_cmpltnq_index);
89 ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);
91 ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
92 struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
93 u32 tx_drbell_q_index);
94 #endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */
97 ice_aq_get_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut,
100 ice_aq_set_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut,
103 ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
104 struct ice_aqc_get_set_rss_keys *keys);
106 ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
107 struct ice_aqc_get_set_rss_keys *keys);
109 ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
110 struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
111 struct ice_sq_cd *cd);
113 bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
114 enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
115 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
116 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
118 ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
120 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
121 void *buf, u16 buf_size, struct ice_sq_cd *cd);
122 enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
125 ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
126 struct ice_sq_cd *cd);
128 ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
129 struct ice_aqc_get_phy_caps_data *caps,
130 struct ice_sq_cd *cd);
132 ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
133 u16 link_speeds_bitmap);
135 ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
136 struct ice_sq_cd *cd);
138 enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
140 ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
141 struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
142 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
143 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
145 ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
146 bool ena_auto_link_update);
148 ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
149 struct ice_aqc_set_phy_cfg_data *cfg);
151 ice_copy_phy_caps_to_cfg(struct ice_aqc_get_phy_caps_data *caps,
152 struct ice_aqc_set_phy_cfg_data *cfg);
154 ice_cfg_phy_fec(struct ice_aqc_set_phy_cfg_data *cfg, enum ice_fec_mode fec);
156 ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
157 struct ice_sq_cd *cd);
159 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
161 ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
162 struct ice_link_status *link, struct ice_sq_cd *cd);
164 ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
165 struct ice_sq_cd *cd);
167 ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
171 ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
172 struct ice_sq_cd *cd);
174 ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
175 u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
176 bool write, struct ice_sq_cd *cd);
180 ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info);
182 ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
183 u16 *q_handle, u16 *q_ids, u32 *q_teids,
184 enum ice_disq_rst_src rst_src, u16 vmvf_num,
185 struct ice_sq_cd *cd);
187 ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
190 ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
191 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
192 struct ice_sq_cd *cd);
193 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
194 void ice_replay_post(struct ice_hw *hw);
195 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
196 void ice_sched_replay_agg(struct ice_hw *hw);
197 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
198 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
200 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
202 ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
204 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
205 enum ice_rl_type rl_type, u8 bw_alloc);
206 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
208 ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
209 u64 *prev_stat, u64 *cur_stat);
211 ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
212 u64 *prev_stat, u64 *cur_stat);
214 ice_get_nvm_version(struct ice_hw *hw, u8 *oem_ver, u16 *oem_build,
215 u8 *oem_patch, u8 *ver_hi, u8 *ver_lo);
216 enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);
217 void ice_print_rollback_msg(struct ice_hw *hw);
219 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
220 struct ice_aqc_get_elem *buf);
221 #endif /* _ICE_COMMON_H_ */