1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2020 Intel Corporation
8 #include "ice_flex_type.h"
10 #define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
11 #define ICE_FLOW_PROF_ID_INVAL 0xfffffffffffffffful
12 #define ICE_FLOW_PROF_ID_BYPASS 0
13 #define ICE_FLOW_PROF_ID_DEFAULT 1
14 #define ICE_FLOW_ENTRY_HANDLE_INVAL 0
15 #define ICE_FLOW_VSI_INVAL 0xffff
16 #define ICE_FLOW_FLD_OFF_INVAL 0xffff
18 /* Generate flow hash field from flow field type(s) */
19 #define ICE_FLOW_HASH_ETH \
20 (BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_DA) | \
21 BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_SA))
22 #define ICE_FLOW_HASH_IPV4 \
23 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) | \
24 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA))
25 #define ICE_FLOW_HASH_IPV6 \
26 (BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
27 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
28 #define ICE_FLOW_HASH_TCP_PORT \
29 (BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
30 BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
31 #define ICE_FLOW_HASH_UDP_PORT \
32 (BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) | \
33 BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT))
34 #define ICE_FLOW_HASH_SCTP_PORT \
35 (BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) | \
36 BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT))
38 #define ICE_HASH_INVALID 0
39 #define ICE_HASH_TCP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_TCP_PORT)
40 #define ICE_HASH_TCP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_TCP_PORT)
41 #define ICE_HASH_UDP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_UDP_PORT)
42 #define ICE_HASH_UDP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_UDP_PORT)
43 #define ICE_HASH_SCTP_IPV4 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT)
44 #define ICE_HASH_SCTP_IPV6 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT)
46 #define ICE_FLOW_HASH_GTP_TEID \
47 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID))
49 #define ICE_FLOW_HASH_GTP_IPV4_TEID \
50 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_TEID)
51 #define ICE_FLOW_HASH_GTP_IPV6_TEID \
52 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_TEID)
54 #define ICE_FLOW_HASH_GTP_U_TEID \
55 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID))
57 #define ICE_FLOW_HASH_GTP_U_IPV4_TEID \
58 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_TEID)
59 #define ICE_FLOW_HASH_GTP_U_IPV6_TEID \
60 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_TEID)
62 #define ICE_FLOW_HASH_GTP_U_EH_TEID \
63 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID))
65 #define ICE_FLOW_HASH_GTP_U_EH_QFI \
66 (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_QFI))
68 #define ICE_FLOW_HASH_GTP_U_IPV4_EH \
69 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_EH_TEID | \
70 ICE_FLOW_HASH_GTP_U_EH_QFI)
71 #define ICE_FLOW_HASH_GTP_U_IPV6_EH \
72 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_EH_TEID | \
73 ICE_FLOW_HASH_GTP_U_EH_QFI)
75 #define ICE_FLOW_HASH_PPPOE_SESS_ID \
76 (BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID))
78 #define ICE_FLOW_HASH_PPPOE_SESS_ID_ETH \
79 (ICE_FLOW_HASH_ETH | ICE_FLOW_HASH_PPPOE_SESS_ID)
80 #define ICE_FLOW_HASH_PPPOE_TCP_ID \
81 (ICE_FLOW_HASH_TCP_PORT | ICE_FLOW_HASH_PPPOE_SESS_ID)
82 #define ICE_FLOW_HASH_PPPOE_UDP_ID \
83 (ICE_FLOW_HASH_UDP_PORT | ICE_FLOW_HASH_PPPOE_SESS_ID)
85 #define ICE_FLOW_HASH_PFCP_SEID \
86 (BIT_ULL(ICE_FLOW_FIELD_IDX_PFCP_SEID))
87 #define ICE_FLOW_HASH_PFCP_IPV4_SEID \
88 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_PFCP_SEID)
89 #define ICE_FLOW_HASH_PFCP_IPV6_SEID \
90 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_PFCP_SEID)
92 #define ICE_FLOW_HASH_L2TPV3_SESS_ID \
93 (BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID))
94 #define ICE_FLOW_HASH_L2TPV3_IPV4_SESS_ID \
95 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_L2TPV3_SESS_ID)
96 #define ICE_FLOW_HASH_L2TPV3_IPV6_SESS_ID \
97 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_L2TPV3_SESS_ID)
99 #define ICE_FLOW_HASH_ESP_SPI \
100 (BIT_ULL(ICE_FLOW_FIELD_IDX_ESP_SPI))
101 #define ICE_FLOW_HASH_ESP_IPV4_SPI \
102 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_ESP_SPI)
103 #define ICE_FLOW_HASH_ESP_IPV6_SPI \
104 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_ESP_SPI)
106 #define ICE_FLOW_HASH_AH_SPI \
107 (BIT_ULL(ICE_FLOW_FIELD_IDX_AH_SPI))
108 #define ICE_FLOW_HASH_AH_IPV4_SPI \
109 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_AH_SPI)
110 #define ICE_FLOW_HASH_AH_IPV6_SPI \
111 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_AH_SPI)
113 #define ICE_FLOW_HASH_NAT_T_ESP_SPI \
114 (BIT_ULL(ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI))
115 #define ICE_FLOW_HASH_NAT_T_ESP_IPV4_SPI \
116 (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_NAT_T_ESP_SPI)
117 #define ICE_FLOW_HASH_NAT_T_ESP_IPV6_SPI \
118 (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_NAT_T_ESP_SPI)
120 /* Protocol header fields within a packet segment. A segment consists of one or
121 * more protocol headers that make up a logical group of protocol headers. Each
122 * logical group of protocol headers encapsulates or is encapsulated using/by
123 * tunneling or encapsulation protocols for network virtualization such as GRE,
126 enum ice_flow_seg_hdr {
127 ICE_FLOW_SEG_HDR_NONE = 0x00000000,
128 ICE_FLOW_SEG_HDR_ETH = 0x00000001,
129 ICE_FLOW_SEG_HDR_VLAN = 0x00000002,
130 ICE_FLOW_SEG_HDR_IPV4 = 0x00000004,
131 ICE_FLOW_SEG_HDR_IPV6 = 0x00000008,
132 ICE_FLOW_SEG_HDR_ARP = 0x00000010,
133 ICE_FLOW_SEG_HDR_ICMP = 0x00000020,
134 ICE_FLOW_SEG_HDR_TCP = 0x00000040,
135 ICE_FLOW_SEG_HDR_UDP = 0x00000080,
136 ICE_FLOW_SEG_HDR_SCTP = 0x00000100,
137 ICE_FLOW_SEG_HDR_GRE = 0x00000200,
138 ICE_FLOW_SEG_HDR_GTPC = 0x00000400,
139 ICE_FLOW_SEG_HDR_GTPC_TEID = 0x00000800,
140 ICE_FLOW_SEG_HDR_GTPU_IP = 0x00001000,
141 ICE_FLOW_SEG_HDR_GTPU_EH = 0x00002000,
142 ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00004000,
143 ICE_FLOW_SEG_HDR_GTPU_UP = 0x00008000,
144 ICE_FLOW_SEG_HDR_PPPOE = 0x00010000,
145 ICE_FLOW_SEG_HDR_PFCP_NODE = 0x00020000,
146 ICE_FLOW_SEG_HDR_PFCP_SESSION = 0x00040000,
147 ICE_FLOW_SEG_HDR_L2TPV3 = 0x00080000,
148 ICE_FLOW_SEG_HDR_ESP = 0x00100000,
149 ICE_FLOW_SEG_HDR_AH = 0x00200000,
150 ICE_FLOW_SEG_HDR_NAT_T_ESP = 0x00400000,
151 ICE_FLOW_SEG_HDR_ETH_NON_IP = 0x00800000,
154 /* These segements all have the same PTYPES, but are otherwise distinguished by
155 * the value of the gtp_eh_pdu and gtp_eh_pdu_link flags:
157 * gtp_eh_pdu gtp_eh_pdu_link
158 * ICE_FLOW_SEG_HDR_GTPU_IP 0 0
159 * ICE_FLOW_SEG_HDR_GTPU_EH 1 don't care
160 * ICE_FLOW_SEG_HDR_GTPU_DWN 1 0
161 * ICE_FLOW_SEG_HDR_GTPU_UP 1 1
163 #define ICE_FLOW_SEG_HDR_GTPU (ICE_FLOW_SEG_HDR_GTPU_IP | \
164 ICE_FLOW_SEG_HDR_GTPU_EH | \
165 ICE_FLOW_SEG_HDR_GTPU_DWN | \
166 ICE_FLOW_SEG_HDR_GTPU_UP)
167 #define ICE_FLOW_SEG_HDR_PFCP (ICE_FLOW_SEG_HDR_PFCP_NODE | \
168 ICE_FLOW_SEG_HDR_PFCP_SESSION)
170 enum ice_flow_field {
172 ICE_FLOW_FIELD_IDX_ETH_DA,
173 ICE_FLOW_FIELD_IDX_ETH_SA,
174 ICE_FLOW_FIELD_IDX_S_VLAN,
175 ICE_FLOW_FIELD_IDX_C_VLAN,
176 ICE_FLOW_FIELD_IDX_ETH_TYPE,
178 ICE_FLOW_FIELD_IDX_IPV4_DSCP,
179 ICE_FLOW_FIELD_IDX_IPV6_DSCP,
180 ICE_FLOW_FIELD_IDX_IPV4_TTL,
181 ICE_FLOW_FIELD_IDX_IPV4_PROT,
182 ICE_FLOW_FIELD_IDX_IPV6_TTL,
183 ICE_FLOW_FIELD_IDX_IPV6_PROT,
184 ICE_FLOW_FIELD_IDX_IPV4_SA,
185 ICE_FLOW_FIELD_IDX_IPV4_DA,
186 ICE_FLOW_FIELD_IDX_IPV6_SA,
187 ICE_FLOW_FIELD_IDX_IPV6_DA,
189 ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
190 ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
191 ICE_FLOW_FIELD_IDX_UDP_SRC_PORT,
192 ICE_FLOW_FIELD_IDX_UDP_DST_PORT,
193 ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,
194 ICE_FLOW_FIELD_IDX_SCTP_DST_PORT,
195 ICE_FLOW_FIELD_IDX_TCP_FLAGS,
197 ICE_FLOW_FIELD_IDX_ARP_SIP,
198 ICE_FLOW_FIELD_IDX_ARP_DIP,
199 ICE_FLOW_FIELD_IDX_ARP_SHA,
200 ICE_FLOW_FIELD_IDX_ARP_DHA,
201 ICE_FLOW_FIELD_IDX_ARP_OP,
203 ICE_FLOW_FIELD_IDX_ICMP_TYPE,
204 ICE_FLOW_FIELD_IDX_ICMP_CODE,
206 ICE_FLOW_FIELD_IDX_GRE_KEYID,
208 ICE_FLOW_FIELD_IDX_GTPC_TEID,
210 ICE_FLOW_FIELD_IDX_GTPU_IP_TEID,
212 ICE_FLOW_FIELD_IDX_GTPU_EH_TEID,
213 ICE_FLOW_FIELD_IDX_GTPU_EH_QFI,
215 ICE_FLOW_FIELD_IDX_GTPU_UP_TEID,
217 ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID,
219 ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID,
221 ICE_FLOW_FIELD_IDX_PFCP_SEID,
223 ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID,
225 ICE_FLOW_FIELD_IDX_ESP_SPI,
227 ICE_FLOW_FIELD_IDX_AH_SPI,
229 ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI,
230 /* The total number of enums must not exceed 64 */
231 ICE_FLOW_FIELD_IDX_MAX
234 /* Flow headers and fields for AVF support */
235 enum ice_flow_avf_hdr_field {
236 /* Values 0 - 28 are reserved for future use */
237 ICE_AVF_FLOW_FIELD_INVALID = 0,
238 ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP = 29,
239 ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP,
240 ICE_AVF_FLOW_FIELD_IPV4_UDP,
241 ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK,
242 ICE_AVF_FLOW_FIELD_IPV4_TCP,
243 ICE_AVF_FLOW_FIELD_IPV4_SCTP,
244 ICE_AVF_FLOW_FIELD_IPV4_OTHER,
245 ICE_AVF_FLOW_FIELD_FRAG_IPV4,
246 /* Values 37-38 are reserved */
247 ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP = 39,
248 ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP,
249 ICE_AVF_FLOW_FIELD_IPV6_UDP,
250 ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK,
251 ICE_AVF_FLOW_FIELD_IPV6_TCP,
252 ICE_AVF_FLOW_FIELD_IPV6_SCTP,
253 ICE_AVF_FLOW_FIELD_IPV6_OTHER,
254 ICE_AVF_FLOW_FIELD_FRAG_IPV6,
255 ICE_AVF_FLOW_FIELD_RSVD47,
256 ICE_AVF_FLOW_FIELD_FCOE_OX,
257 ICE_AVF_FLOW_FIELD_FCOE_RX,
258 ICE_AVF_FLOW_FIELD_FCOE_OTHER,
259 /* Values 51-62 are reserved */
260 ICE_AVF_FLOW_FIELD_L2_PAYLOAD = 63,
261 ICE_AVF_FLOW_FIELD_MAX
264 /* Supported RSS offloads This macro is defined to support
265 * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware
266 * capabilities to the caller of this ops.
268 #define ICE_DEFAULT_RSS_HENA ( \
269 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \
270 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \
271 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \
272 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \
273 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \
274 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \
275 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \
276 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \
277 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \
278 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \
279 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \
280 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \
281 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \
282 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \
283 BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \
284 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP))
287 ICE_FLOW_DIR_UNDEFINED = 0,
290 ICE_FLOW_TX_RX = ICE_FLOW_RX | ICE_FLOW_TX
293 enum ice_flow_priority {
295 ICE_FLOW_PRIO_NORMAL,
299 #define ICE_FLOW_SEG_MAX 2
300 #define ICE_FLOW_SEG_RAW_FLD_MAX 2
301 #define ICE_FLOW_PROFILE_MAX 1024
302 #define ICE_FLOW_SW_FIELD_VECTOR_MAX 48
303 #define ICE_FLOW_ACL_FIELD_VECTOR_MAX 32
304 #define ICE_FLOW_FV_EXTRACT_SZ 2
306 #define ICE_FLOW_SET_HDRS(seg, val) ((seg)->hdrs |= (u32)(val))
308 struct ice_flow_seg_xtrct {
309 u8 prot_id; /* Protocol ID of extracted header field */
310 u16 off; /* Starting offset of the field in header in bytes */
311 u8 idx; /* Index of FV entry used */
312 u8 disp; /* Displacement of field in bits fr. FV entry's start */
313 u16 mask; /* Mask for field */
316 enum ice_flow_fld_match_type {
317 ICE_FLOW_FLD_TYPE_REG, /* Value, mask */
318 ICE_FLOW_FLD_TYPE_RANGE, /* Value, mask, last (upper bound) */
319 ICE_FLOW_FLD_TYPE_PREFIX, /* IP address, prefix, size of prefix */
320 ICE_FLOW_FLD_TYPE_SIZE, /* Value, mask, size of match */
323 struct ice_flow_fld_loc {
324 /* Describe offsets of field information relative to the beginning of
325 * input buffer provided when adding flow entries.
327 u16 val; /* Offset where the value is located */
328 u16 mask; /* Offset where the mask/prefix value is located */
329 u16 last; /* Length or offset where the upper value is located */
332 struct ice_flow_fld_info {
333 enum ice_flow_fld_match_type type;
334 /* Location where to retrieve data from an input buffer */
335 struct ice_flow_fld_loc src;
336 /* Location where to put the data into the final entry buffer */
337 struct ice_flow_fld_loc entry;
338 struct ice_flow_seg_xtrct xtrct;
341 struct ice_flow_seg_fld_raw {
342 struct ice_flow_fld_info info;
343 u16 off; /* Offset from the start of the segment */
346 struct ice_flow_seg_info {
347 u32 hdrs; /* Bitmask indicating protocol headers present */
348 u64 match; /* Bitmask indicating header fields to be matched */
349 u64 range; /* Bitmask indicating header fields matched as ranges */
351 struct ice_flow_fld_info fields[ICE_FLOW_FIELD_IDX_MAX];
353 u8 raws_cnt; /* Number of raw fields to be matched */
354 struct ice_flow_seg_fld_raw raws[ICE_FLOW_SEG_RAW_FLD_MAX];
357 /* This structure describes a flow entry, and is tracked only in this file */
358 struct ice_flow_entry {
359 struct LIST_ENTRY_TYPE l_entry;
362 struct ice_flow_prof *prof;
364 struct ice_flow_action *acts;
365 /* Flow entry's content */
367 /* Range buffer (For ACL only) */
368 struct ice_aqc_acl_profile_ranges *range_buf;
369 enum ice_flow_priority priority;
372 /* Entry index in the ACL's scenario */
374 #define ICE_FLOW_ACL_MAX_NUM_ACT 2
378 #define ICE_FLOW_ENTRY_HNDL(e) ((unsigned long)e)
379 #define ICE_FLOW_ENTRY_PTR(h) ((struct ice_flow_entry *)(h))
381 struct ice_flow_prof {
382 struct LIST_ENTRY_TYPE l_entry;
385 enum ice_flow_dir dir;
389 /* Keep track of flow entries associated with this flow profile */
390 struct ice_lock entries_lock;
391 struct LIST_HEAD_TYPE entries;
393 struct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX];
395 /* software VSI handles referenced by this flow profile */
396 ice_declare_bitmap(vsis, ICE_MAX_VSI);
399 /* struct sw_recipe */
400 struct ice_acl_scen *scen;
403 /* Symmetric Hash for RSS */
407 /* Default actions */
408 struct ice_flow_action *acts;
412 struct LIST_ENTRY_TYPE l_entry;
413 /* bitmap of VSIs added to the RSS entry */
414 ice_declare_bitmap(vsis, ICE_MAX_VSI);
420 enum ice_flow_action_type {
424 ICE_FLOW_ACT_CNTR_PKT,
425 ICE_FLOW_ACT_FWD_VSI,
426 ICE_FLOW_ACT_FWD_VSI_LIST, /* Should be abstracted away */
427 ICE_FLOW_ACT_FWD_QUEUE, /* Can Queues be abstracted away? */
428 ICE_FLOW_ACT_FWD_QUEUE_GROUP, /* Can Queues be abstracted away? */
432 ICE_FLOW_ACT_CNTR_BYTES,
433 ICE_FLOW_ACT_CNTR_PKT_BYTES,
434 ICE_FLOW_ACT_GENERIC_0,
435 ICE_FLOW_ACT_GENERIC_1,
436 ICE_FLOW_ACT_GENERIC_2,
437 ICE_FLOW_ACT_GENERIC_3,
438 ICE_FLOW_ACT_GENERIC_4,
439 ICE_FLOW_ACT_RPT_FLOW_ID,
440 ICE_FLOW_ACT_BUILD_PROF_IDX,
443 struct ice_flow_action {
444 enum ice_flow_action_type type;
446 struct ice_acl_act_entry acl_act;
452 ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
453 struct ice_flow_seg_info *segs, u8 segs_cnt);
455 ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
456 u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt,
457 struct ice_flow_action *acts, u8 acts_cnt,
458 struct ice_flow_prof **prof);
460 ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id);
462 ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
465 ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
468 u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id);
470 ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
471 u64 entry_id, u16 vsi, enum ice_flow_priority prio,
472 void *data, struct ice_flow_action *acts, u8 acts_cnt,
474 enum ice_status ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk,
477 ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
478 u16 val_loc, u16 mask_loc, u16 last_loc, bool range);
480 ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
481 u16 val_loc, u16 prefix_loc, u8 prefix_sz);
483 ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
484 u16 val_loc, u16 mask_loc);
485 void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
486 enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
488 ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);
489 enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
491 ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
492 u32 addl_hdrs, bool symm);
494 ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
496 u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);
497 #endif /* _ICE_FLOW_H_ */