1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2019
5 #include "ice_common.h"
10 * @hw: pointer to the HW struct
11 * @module_typeid: module pointer location in words from the NVM beginning
12 * @offset: byte offset from the module beginning
13 * @length: length of the section to be read (in bytes from the offset)
14 * @data: command buffer (size [bytes] = length)
15 * @last_command: tells if this is the last command in a series
16 * @read_shadow_ram: tell if this is a shadow RAM read
17 * @cd: pointer to command details structure or NULL
19 * Read the NVM using the admin queue commands (0x0701)
21 static enum ice_status
22 ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
23 void *data, bool last_command, bool read_shadow_ram,
26 struct ice_aq_desc desc;
27 struct ice_aqc_nvm *cmd;
29 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
31 cmd = &desc.params.nvm;
33 /* In offset the highest byte must be zeroed. */
34 if (offset & 0xFF000000)
37 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_nvm_read);
39 if (!read_shadow_ram && module_typeid == ICE_AQC_NVM_START_POINT)
40 cmd->cmd_flags |= ICE_AQC_NVM_FLASH_ONLY;
42 /* If this is the last command in a series, set the proper flag. */
44 cmd->cmd_flags |= ICE_AQC_NVM_LAST_CMD;
45 cmd->module_typeid = CPU_TO_LE16(module_typeid);
46 cmd->offset_low = CPU_TO_LE16(offset & 0xFFFF);
47 cmd->offset_high = (offset >> 16) & 0xFF;
48 cmd->length = CPU_TO_LE16(length);
50 return ice_aq_send_cmd(hw, &desc, data, length, cd);
54 * ice_check_sr_access_params - verify params for Shadow RAM R/W operations.
55 * @hw: pointer to the HW structure
56 * @offset: offset in words from module start
57 * @words: number of words to access
59 static enum ice_status
60 ice_check_sr_access_params(struct ice_hw *hw, u32 offset, u16 words)
62 if ((offset + words) > hw->nvm.sr_words) {
63 ice_debug(hw, ICE_DBG_NVM,
64 "NVM error: offset beyond SR lmt.\n");
68 if (words > ICE_SR_SECTOR_SIZE_IN_WORDS) {
69 /* We can access only up to 4KB (one sector), in one AQ write */
70 ice_debug(hw, ICE_DBG_NVM,
71 "NVM error: tried to access %d words, limit is %d.\n",
72 words, ICE_SR_SECTOR_SIZE_IN_WORDS);
76 if (((offset + (words - 1)) / ICE_SR_SECTOR_SIZE_IN_WORDS) !=
77 (offset / ICE_SR_SECTOR_SIZE_IN_WORDS)) {
78 /* A single access cannot spread over two sectors */
79 ice_debug(hw, ICE_DBG_NVM,
80 "NVM error: cannot spread over two sectors.\n");
88 * ice_read_sr_aq - Read Shadow RAM.
89 * @hw: pointer to the HW structure
90 * @offset: offset in words from module start
91 * @words: number of words to read
92 * @data: buffer for words reads from Shadow RAM
93 * @last_command: tells the AdminQ that this is the last command
95 * Reads 16-bit word buffers from the Shadow RAM using the admin command.
97 static enum ice_status
98 ice_read_sr_aq(struct ice_hw *hw, u32 offset, u16 words, u16 *data,
101 enum ice_status status;
103 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
105 status = ice_check_sr_access_params(hw, offset, words);
107 /* values in "offset" and "words" parameters are sized as words
108 * (16 bits) but ice_aq_read_nvm expects these values in bytes.
109 * So do this conversion while calling ice_aq_read_nvm.
112 status = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT,
113 2 * offset, 2 * words, data,
114 last_command, true, NULL);
120 * ice_read_sr_word_aq - Reads Shadow RAM via AQ
121 * @hw: pointer to the HW structure
122 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
123 * @data: word read from the Shadow RAM
125 * Reads one 16 bit word from the Shadow RAM using the ice_read_sr_aq method.
127 static enum ice_status
128 ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)
130 enum ice_status status;
132 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
134 status = ice_read_sr_aq(hw, offset, 1, data, true);
136 *data = LE16_TO_CPU(*(_FORCE_ __le16 *)data);
143 * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ
144 * @hw: pointer to the HW structure
145 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
146 * @words: (in) number of words to read; (out) number of words actually read
147 * @data: words read from the Shadow RAM
149 * Reads 16 bit words (data buf) from the SR using the ice_read_sr_aq
150 * method. Ownership of the NVM is taken before reading the buffer and later
153 static enum ice_status
154 ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
156 enum ice_status status;
157 bool last_cmd = false;
161 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
164 u16 read_size, off_w;
166 /* Calculate number of bytes we should read in this step.
167 * It's not allowed to read more than one page at a time or
168 * to cross page boundaries.
170 off_w = offset % ICE_SR_SECTOR_SIZE_IN_WORDS;
173 (ICE_SR_SECTOR_SIZE_IN_WORDS - off_w)) :
174 MIN_T(u16, (*words - words_read),
175 ICE_SR_SECTOR_SIZE_IN_WORDS);
177 /* Check if this is last command, if so set proper flag */
178 if ((words_read + read_size) >= *words)
181 status = ice_read_sr_aq(hw, offset, read_size,
182 data + words_read, last_cmd);
184 goto read_nvm_buf_aq_exit;
186 /* Increment counter for words already read and move offset to
189 words_read += read_size;
191 } while (words_read < *words);
193 for (i = 0; i < *words; i++)
194 data[i] = LE16_TO_CPU(((_FORCE_ __le16 *)data)[i]);
196 read_nvm_buf_aq_exit:
202 * ice_acquire_nvm - Generic request for acquiring the NVM ownership
203 * @hw: pointer to the HW structure
204 * @access: NVM access type (read or write)
206 * This function will request NVM ownership.
208 static enum ice_status
209 ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
211 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
213 if (hw->nvm.blank_nvm_mode)
216 return ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);
220 * ice_release_nvm - Generic request for releasing the NVM ownership
221 * @hw: pointer to the HW structure
223 * This function will release NVM ownership.
225 static void ice_release_nvm(struct ice_hw *hw)
227 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
229 if (hw->nvm.blank_nvm_mode)
232 ice_release_res(hw, ICE_NVM_RES_ID);
236 * ice_read_sr_word - Reads Shadow RAM word and acquire NVM if necessary
237 * @hw: pointer to the HW structure
238 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
239 * @data: word read from the Shadow RAM
241 * Reads one 16 bit word from the Shadow RAM using the ice_read_sr_word_aq.
243 enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
245 enum ice_status status;
247 status = ice_acquire_nvm(hw, ICE_RES_READ);
249 status = ice_read_sr_word_aq(hw, offset, data);
257 * ice_init_nvm - initializes NVM setting
258 * @hw: pointer to the HW struct
260 * This function reads and populates NVM settings such as Shadow RAM size,
261 * max_timeout, and blank_nvm_mode
263 enum ice_status ice_init_nvm(struct ice_hw *hw)
265 struct ice_nvm_info *nvm = &hw->nvm;
266 u16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len;
267 u16 eetrack_lo, eetrack_hi;
268 enum ice_status status;
272 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
274 /* The SR size is stored regardless of the NVM programming mode
275 * as the blank mode may be used in the factory line.
277 gens_stat = rd32(hw, GLNVM_GENS);
278 sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S;
280 /* Switching to words (sr_size contains power of 2) */
281 nvm->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
283 /* Check if we are in the normal or blank NVM programming mode */
284 fla = rd32(hw, GLNVM_FLA);
285 if (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */
286 nvm->blank_nvm_mode = false;
288 /* Blank programming mode */
289 nvm->blank_nvm_mode = true;
290 ice_debug(hw, ICE_DBG_NVM,
291 "NVM init error: unsupported blank mode.\n");
292 return ICE_ERR_NVM_BLANK_MODE;
295 status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &nvm->ver);
297 ice_debug(hw, ICE_DBG_INIT,
298 "Failed to read DEV starter version.\n");
302 status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
304 ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK lo.\n");
307 status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);
309 ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK hi.\n");
313 nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
315 /* the following devices do not have boot_cfg_tlv yet */
316 if (hw->device_id == ICE_DEV_ID_C822N_BACKPLANE ||
317 hw->device_id == ICE_DEV_ID_C822N_QSFP ||
318 hw->device_id == ICE_DEV_ID_C822N_SFP)
321 status = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,
322 ICE_SR_BOOT_CFG_PTR);
324 ice_debug(hw, ICE_DBG_INIT,
325 "Failed to read Boot Configuration Block TLV.\n");
329 /* Boot Configuration Block must have length at least 2 words
330 * (Combo Image Version High and Combo Image Version Low)
332 if (boot_cfg_tlv_len < 2) {
333 ice_debug(hw, ICE_DBG_INIT,
334 "Invalid Boot Configuration Block TLV size.\n");
335 return ICE_ERR_INVAL_SIZE;
338 status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF),
341 ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER hi.\n");
345 status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF + 1),
348 ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER lo.\n");
352 nvm->oem_ver = ((u32)oem_hi << 16) | oem_lo;
359 * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary
360 * @hw: pointer to the HW structure
361 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
362 * @words: (in) number of words to read; (out) number of words actually read
363 * @data: words read from the Shadow RAM
365 * Reads 16 bit words (data buf) from the SR using the ice_read_nvm_buf_aq
366 * method. The buf read is preceded by the NVM ownership take
367 * and followed by the release.
370 ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
372 enum ice_status status;
374 status = ice_acquire_nvm(hw, ICE_RES_READ);
376 status = ice_read_sr_buf_aq(hw, offset, words, data);
385 * ice_nvm_validate_checksum
386 * @hw: pointer to the HW struct
388 * Verify NVM PFA checksum validity (0x0706)
390 enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw)
392 struct ice_aqc_nvm_checksum *cmd;
393 struct ice_aq_desc desc;
394 enum ice_status status;
396 status = ice_acquire_nvm(hw, ICE_RES_READ);
400 cmd = &desc.params.nvm_checksum;
402 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_nvm_checksum);
403 cmd->flags = ICE_AQC_NVM_CHECKSUM_VERIFY;
405 status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
409 if (LE16_TO_CPU(cmd->checksum) != ICE_AQC_NVM_CHECKSUM_CORRECT)
410 status = ICE_ERR_NVM_CHECKSUM;
416 * ice_nvm_access_get_features - Return the NVM access features structure
417 * @cmd: NVM access command to process
418 * @data: storage for the driver NVM features
420 * Fill in the data section of the NVM access request with a copy of the NVM
421 * features structure.
424 ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
425 union ice_nvm_access_data *data)
427 /* The provided data_size must be at least as large as our NVM
428 * features structure. A larger size should not be treated as an
429 * error, to allow future extensions to to the features structure to
430 * work on older drivers.
432 if (cmd->data_size < sizeof(struct ice_nvm_features))
433 return ICE_ERR_NO_MEMORY;
435 /* Initialize the data buffer to zeros */
436 ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
438 /* Fill in the features data */
439 data->drv_features.major = ICE_NVM_ACCESS_MAJOR_VER;
440 data->drv_features.minor = ICE_NVM_ACCESS_MINOR_VER;
441 data->drv_features.size = sizeof(struct ice_nvm_features);
442 data->drv_features.features[0] = ICE_NVM_FEATURES_0_REG_ACCESS;
448 * ice_nvm_access_get_module - Helper function to read module value
449 * @cmd: NVM access command structure
451 * Reads the module value out of the NVM access config field.
453 u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd)
455 return ((cmd->config & ICE_NVM_CFG_MODULE_M) >> ICE_NVM_CFG_MODULE_S);
459 * ice_nvm_access_get_flags - Helper function to read flags value
460 * @cmd: NVM access command structure
462 * Reads the flags value out of the NVM access config field.
464 u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd)
466 return ((cmd->config & ICE_NVM_CFG_FLAGS_M) >> ICE_NVM_CFG_FLAGS_S);
470 * ice_nvm_access_get_adapter - Helper function to read adapter info
471 * @cmd: NVM access command structure
473 * Read the adapter info value out of the NVM access config field.
475 u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd)
477 return ((cmd->config & ICE_NVM_CFG_ADAPTER_INFO_M) >>
478 ICE_NVM_CFG_ADAPTER_INFO_S);
482 * ice_validate_nvm_rw_reg - Check than an NVM access request is valid
483 * @cmd: NVM access command structure
485 * Validates that an NVM access structure is request to read or write a valid
486 * register offset. First validates that the module and flags are correct, and
487 * then ensures that the register offset is one of the accepted registers.
489 static enum ice_status
490 ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd)
492 u32 module, flags, offset;
495 module = ice_nvm_access_get_module(cmd);
496 flags = ice_nvm_access_get_flags(cmd);
497 offset = cmd->offset;
499 /* Make sure the module and flags indicate a read/write request */
500 if (module != ICE_NVM_REG_RW_MODULE ||
501 flags != ICE_NVM_REG_RW_FLAGS ||
502 cmd->data_size != FIELD_SIZEOF(union ice_nvm_access_data, regval))
503 return ICE_ERR_PARAM;
507 case GL_HICR_EN: /* Note, this register is read only */
510 case GLGEN_CSR_DEBUG_C:
520 for (i = 0; i <= ICE_NVM_ACCESS_GL_HIDA_MAX; i++)
521 if (offset == (u32)GL_HIDA(i))
524 for (i = 0; i <= ICE_NVM_ACCESS_GL_HIBA_MAX; i++)
525 if (offset == (u32)GL_HIBA(i))
528 /* All other register offsets are not valid */
529 return ICE_ERR_OUT_OF_RANGE;
533 * ice_nvm_access_read - Handle an NVM read request
534 * @hw: pointer to the HW struct
535 * @cmd: NVM access command to process
536 * @data: storage for the register value read
538 * Process an NVM access request to read a register.
541 ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
542 union ice_nvm_access_data *data)
544 enum ice_status status;
546 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
548 /* Always initialize the output data, even on failure */
549 ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
551 /* Make sure this is a valid read/write access request */
552 status = ice_validate_nvm_rw_reg(cmd);
556 ice_debug(hw, ICE_DBG_NVM, "NVM access: reading register %08x\n",
559 /* Read the register and store the contents in the data field */
560 data->regval = rd32(hw, cmd->offset);
566 * ice_nvm_access_write - Handle an NVM write request
567 * @hw: pointer to the HW struct
568 * @cmd: NVM access command to process
569 * @data: NVM access data to write
571 * Process an NVM access request to write a register.
574 ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
575 union ice_nvm_access_data *data)
577 enum ice_status status;
579 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
581 /* Make sure this is a valid read/write access request */
582 status = ice_validate_nvm_rw_reg(cmd);
586 /* The HICR_EN register is read-only */
587 if (cmd->offset == GL_HICR_EN)
588 return ICE_ERR_OUT_OF_RANGE;
590 ice_debug(hw, ICE_DBG_NVM,
591 "NVM access: writing register %08x with value %08x\n",
592 cmd->offset, data->regval);
594 /* Write the data field to the specified register */
595 wr32(hw, cmd->offset, data->regval);
601 * ice_handle_nvm_access - Handle an NVM access request
602 * @hw: pointer to the HW struct
603 * @cmd: NVM access command info
604 * @data: pointer to read or return data
606 * Process an NVM access request. Read the command structure information and
607 * determine if it is valid. If not, report an error indicating the command
610 * For valid commands, perform the necessary function, copying the data into
611 * the provided data buffer.
614 ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
615 union ice_nvm_access_data *data)
617 u32 module, flags, adapter_info;
619 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
621 /* Extended flags are currently reserved and must be zero */
622 if ((cmd->config & ICE_NVM_CFG_EXT_FLAGS_M) != 0)
623 return ICE_ERR_PARAM;
625 /* Adapter info must match the HW device ID */
626 adapter_info = ice_nvm_access_get_adapter(cmd);
627 if (adapter_info != hw->device_id)
628 return ICE_ERR_PARAM;
630 switch (cmd->command) {
631 case ICE_NVM_CMD_READ:
632 module = ice_nvm_access_get_module(cmd);
633 flags = ice_nvm_access_get_flags(cmd);
635 /* Getting the driver's NVM features structure shares the same
636 * command type as reading a register. Read the config field
637 * to determine if this is a request to get features.
639 if (module == ICE_NVM_GET_FEATURES_MODULE &&
640 flags == ICE_NVM_GET_FEATURES_FLAGS &&
642 return ice_nvm_access_get_features(cmd, data);
644 return ice_nvm_access_read(hw, cmd, data);
645 case ICE_NVM_CMD_WRITE:
646 return ice_nvm_access_write(hw, cmd, data);
648 return ICE_ERR_PARAM;