1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2019
5 #include "ice_common.h"
9 * @hw: pointer to the HW struct
10 * @module_typeid: module pointer location in words from the NVM beginning
11 * @offset: byte offset from the module beginning
12 * @length: length of the section to be read (in bytes from the offset)
13 * @data: command buffer (size [bytes] = length)
14 * @last_command: tells if this is the last command in a series
15 * @read_shadow_ram: tell if this is a shadow RAM read
16 * @cd: pointer to command details structure or NULL
18 * Read the NVM using the admin queue commands (0x0701)
20 static enum ice_status
21 ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
22 void *data, bool last_command, bool read_shadow_ram,
25 struct ice_aq_desc desc;
26 struct ice_aqc_nvm *cmd;
28 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
30 cmd = &desc.params.nvm;
32 if (offset > ICE_AQC_NVM_MAX_OFFSET)
35 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_nvm_read);
37 if (!read_shadow_ram && module_typeid == ICE_AQC_NVM_START_POINT)
38 cmd->cmd_flags |= ICE_AQC_NVM_FLASH_ONLY;
40 /* If this is the last command in a series, set the proper flag. */
42 cmd->cmd_flags |= ICE_AQC_NVM_LAST_CMD;
43 cmd->module_typeid = CPU_TO_LE16(module_typeid);
44 cmd->offset_low = CPU_TO_LE16(offset & 0xFFFF);
45 cmd->offset_high = (offset >> 16) & 0xFF;
46 cmd->length = CPU_TO_LE16(length);
48 return ice_aq_send_cmd(hw, &desc, data, length, cd);
52 * ice_read_flat_nvm - Read portion of NVM by flat offset
53 * @hw: pointer to the HW struct
54 * @offset: offset from beginning of NVM
55 * @length: (in) number of bytes to read; (out) number of bytes actually read
56 * @data: buffer to return data in (sized to fit the specified length)
57 * @read_shadow_ram: if true, read from shadow RAM instead of NVM
59 * Reads a portion of the NVM, as a flat memory space. This function correctly
60 * breaks read requests across Shadow RAM sectors and ensures that no single
61 * read request exceeds the maximum 4Kb read for a single AdminQ command.
63 * Returns a status code on failure. Note that the data pointer may be
64 * partially updated if some reads succeed before a failure.
67 ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
70 enum ice_status status;
75 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
79 /* Verify the length of the read if this is for the Shadow RAM */
80 if (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {
81 ice_debug(hw, ICE_DBG_NVM,
82 "NVM error: requested data is beyond Shadow RAM limit\n");
87 u32 read_size, sector_offset;
89 /* ice_aq_read_nvm cannot read more than 4Kb at a time.
90 * Additionally, a read from the Shadow RAM may not cross over
91 * a sector boundary. Conveniently, the sector size is also
94 sector_offset = offset % ICE_AQ_MAX_BUF_LEN;
95 read_size = MIN_T(u32, ICE_AQ_MAX_BUF_LEN - sector_offset,
98 last_cmd = !(bytes_read + read_size < inlen);
100 /* ice_aq_read_nvm takes the length as a u16. Our read_size is
101 * calculated using a u32, but the ICE_AQ_MAX_BUF_LEN maximum
102 * size guarantees that it will fit within the 2 bytes.
104 status = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT,
105 offset, (u16)read_size,
106 data + bytes_read, last_cmd,
107 read_shadow_ram, NULL);
111 bytes_read += read_size;
115 *length = bytes_read;
120 * ice_check_sr_access_params - verify params for Shadow RAM R/W operations.
121 * @hw: pointer to the HW structure
122 * @offset: offset in words from module start
123 * @words: number of words to access
125 static enum ice_status
126 ice_check_sr_access_params(struct ice_hw *hw, u32 offset, u16 words)
128 if ((offset + words) > hw->nvm.sr_words) {
129 ice_debug(hw, ICE_DBG_NVM,
130 "NVM error: offset beyond SR lmt.\n");
131 return ICE_ERR_PARAM;
134 if (words > ICE_SR_SECTOR_SIZE_IN_WORDS) {
135 /* We can access only up to 4KB (one sector), in one AQ write */
136 ice_debug(hw, ICE_DBG_NVM,
137 "NVM error: tried to access %d words, limit is %d.\n",
138 words, ICE_SR_SECTOR_SIZE_IN_WORDS);
139 return ICE_ERR_PARAM;
142 if (((offset + (words - 1)) / ICE_SR_SECTOR_SIZE_IN_WORDS) !=
143 (offset / ICE_SR_SECTOR_SIZE_IN_WORDS)) {
144 /* A single access cannot spread over two sectors */
145 ice_debug(hw, ICE_DBG_NVM,
146 "NVM error: cannot spread over two sectors.\n");
147 return ICE_ERR_PARAM;
154 * ice_read_sr_aq - Read Shadow RAM.
155 * @hw: pointer to the HW structure
156 * @offset: offset in words from module start
157 * @words: number of words to read
158 * @data: buffer for words reads from Shadow RAM
159 * @last_command: tells the AdminQ that this is the last command
161 * Reads 16-bit word buffers from the Shadow RAM using the admin command.
163 static enum ice_status
164 ice_read_sr_aq(struct ice_hw *hw, u32 offset, u16 words, u16 *data,
167 enum ice_status status;
169 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
171 status = ice_check_sr_access_params(hw, offset, words);
173 /* values in "offset" and "words" parameters are sized as words
174 * (16 bits) but ice_aq_read_nvm expects these values in bytes.
175 * So do this conversion while calling ice_aq_read_nvm.
178 status = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT,
179 2 * offset, 2 * words, data,
180 last_command, true, NULL);
186 * ice_read_sr_word_aq - Reads Shadow RAM via AQ
187 * @hw: pointer to the HW structure
188 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
189 * @data: word read from the Shadow RAM
191 * Reads one 16 bit word from the Shadow RAM using the ice_read_sr_aq method.
193 static enum ice_status
194 ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)
196 enum ice_status status;
198 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
200 status = ice_read_sr_aq(hw, offset, 1, data, true);
202 *data = LE16_TO_CPU(*(_FORCE_ __le16 *)data);
208 * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ
209 * @hw: pointer to the HW structure
210 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
211 * @words: (in) number of words to read; (out) number of words actually read
212 * @data: words read from the Shadow RAM
214 * Reads 16 bit words (data buf) from the Shadow RAM. Ownership of the NVM is
215 * taken before reading the buffer and later released.
217 static enum ice_status
218 ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
220 u32 bytes = *words * 2, i;
221 enum ice_status status;
223 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
225 /* ice_read_flat_nvm takes into account the 4Kb AdminQ and Shadow RAM
226 * sector restrictions necessary when reading from the NVM.
228 status = ice_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true);
230 /* Report the number of words successfully read */
233 /* Byte swap the words up to the amount we actually read */
234 for (i = 0; i < *words; i++)
235 data[i] = LE16_TO_CPU(((_FORCE_ __le16 *)data)[i]);
241 * ice_acquire_nvm - Generic request for acquiring the NVM ownership
242 * @hw: pointer to the HW structure
243 * @access: NVM access type (read or write)
245 * This function will request NVM ownership.
247 static enum ice_status
248 ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
250 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
252 if (hw->nvm.blank_nvm_mode)
255 return ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);
259 * ice_release_nvm - Generic request for releasing the NVM ownership
260 * @hw: pointer to the HW structure
262 * This function will release NVM ownership.
264 static void ice_release_nvm(struct ice_hw *hw)
266 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
268 if (hw->nvm.blank_nvm_mode)
271 ice_release_res(hw, ICE_NVM_RES_ID);
275 * ice_read_sr_word - Reads Shadow RAM word and acquire NVM if necessary
276 * @hw: pointer to the HW structure
277 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
278 * @data: word read from the Shadow RAM
280 * Reads one 16 bit word from the Shadow RAM using the ice_read_sr_word_aq.
282 enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
284 enum ice_status status;
286 status = ice_acquire_nvm(hw, ICE_RES_READ);
288 status = ice_read_sr_word_aq(hw, offset, data);
296 * ice_init_nvm - initializes NVM setting
297 * @hw: pointer to the HW struct
299 * This function reads and populates NVM settings such as Shadow RAM size,
300 * max_timeout, and blank_nvm_mode
302 enum ice_status ice_init_nvm(struct ice_hw *hw)
304 u16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len;
305 struct ice_nvm_info *nvm = &hw->nvm;
306 u16 eetrack_lo, eetrack_hi;
307 enum ice_status status;
311 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
313 /* The SR size is stored regardless of the NVM programming mode
314 * as the blank mode may be used in the factory line.
316 gens_stat = rd32(hw, GLNVM_GENS);
317 sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S;
319 /* Switching to words (sr_size contains power of 2) */
320 nvm->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
322 /* Check if we are in the normal or blank NVM programming mode */
323 fla = rd32(hw, GLNVM_FLA);
324 if (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */
325 nvm->blank_nvm_mode = false;
327 /* Blank programming mode */
328 nvm->blank_nvm_mode = true;
329 ice_debug(hw, ICE_DBG_NVM,
330 "NVM init error: unsupported blank mode.\n");
331 return ICE_ERR_NVM_BLANK_MODE;
334 status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &nvm->ver);
336 ice_debug(hw, ICE_DBG_INIT,
337 "Failed to read DEV starter version.\n");
341 status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
343 ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK lo.\n");
346 status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);
348 ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK hi.\n");
352 nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
354 switch (hw->device_id) {
355 /* the following devices do not have boot_cfg_tlv yet */
356 case ICE_DEV_ID_E822C_BACKPLANE:
357 case ICE_DEV_ID_E822C_QSFP:
358 case ICE_DEV_ID_E822C_10G_BASE_T:
359 case ICE_DEV_ID_E822C_SGMII:
360 case ICE_DEV_ID_E822C_SFP:
361 case ICE_DEV_ID_E822L_BACKPLANE:
362 case ICE_DEV_ID_E822L_SFP:
363 case ICE_DEV_ID_E822L_10G_BASE_T:
364 case ICE_DEV_ID_E822L_SGMII:
370 status = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,
371 ICE_SR_BOOT_CFG_PTR);
373 ice_debug(hw, ICE_DBG_INIT,
374 "Failed to read Boot Configuration Block TLV.\n");
378 /* Boot Configuration Block must have length at least 2 words
379 * (Combo Image Version High and Combo Image Version Low)
381 if (boot_cfg_tlv_len < 2) {
382 ice_debug(hw, ICE_DBG_INIT,
383 "Invalid Boot Configuration Block TLV size.\n");
384 return ICE_ERR_INVAL_SIZE;
387 status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF),
390 ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER hi.\n");
394 status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF + 1),
397 ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER lo.\n");
401 nvm->oem_ver = ((u32)oem_hi << 16) | oem_lo;
407 * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary
408 * @hw: pointer to the HW structure
409 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
410 * @words: (in) number of words to read; (out) number of words actually read
411 * @data: words read from the Shadow RAM
413 * Reads 16 bit words (data buf) from the SR using the ice_read_nvm_buf_aq
414 * method. The buf read is preceded by the NVM ownership take
415 * and followed by the release.
418 ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
420 enum ice_status status;
422 status = ice_acquire_nvm(hw, ICE_RES_READ);
424 status = ice_read_sr_buf_aq(hw, offset, words, data);
432 * ice_nvm_validate_checksum
433 * @hw: pointer to the HW struct
435 * Verify NVM PFA checksum validity (0x0706)
437 enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw)
439 struct ice_aqc_nvm_checksum *cmd;
440 struct ice_aq_desc desc;
441 enum ice_status status;
443 status = ice_acquire_nvm(hw, ICE_RES_READ);
447 cmd = &desc.params.nvm_checksum;
449 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_nvm_checksum);
450 cmd->flags = ICE_AQC_NVM_CHECKSUM_VERIFY;
452 status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
456 if (LE16_TO_CPU(cmd->checksum) != ICE_AQC_NVM_CHECKSUM_CORRECT)
457 status = ICE_ERR_NVM_CHECKSUM;
463 * ice_nvm_access_get_features - Return the NVM access features structure
464 * @cmd: NVM access command to process
465 * @data: storage for the driver NVM features
467 * Fill in the data section of the NVM access request with a copy of the NVM
468 * features structure.
471 ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
472 union ice_nvm_access_data *data)
474 /* The provided data_size must be at least as large as our NVM
475 * features structure. A larger size should not be treated as an
476 * error, to allow future extensions to to the features structure to
477 * work on older drivers.
479 if (cmd->data_size < sizeof(struct ice_nvm_features))
480 return ICE_ERR_NO_MEMORY;
482 /* Initialize the data buffer to zeros */
483 ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
485 /* Fill in the features data */
486 data->drv_features.major = ICE_NVM_ACCESS_MAJOR_VER;
487 data->drv_features.minor = ICE_NVM_ACCESS_MINOR_VER;
488 data->drv_features.size = sizeof(struct ice_nvm_features);
489 data->drv_features.features[0] = ICE_NVM_FEATURES_0_REG_ACCESS;
495 * ice_nvm_access_get_module - Helper function to read module value
496 * @cmd: NVM access command structure
498 * Reads the module value out of the NVM access config field.
500 u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd)
502 return ((cmd->config & ICE_NVM_CFG_MODULE_M) >> ICE_NVM_CFG_MODULE_S);
506 * ice_nvm_access_get_flags - Helper function to read flags value
507 * @cmd: NVM access command structure
509 * Reads the flags value out of the NVM access config field.
511 u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd)
513 return ((cmd->config & ICE_NVM_CFG_FLAGS_M) >> ICE_NVM_CFG_FLAGS_S);
517 * ice_nvm_access_get_adapter - Helper function to read adapter info
518 * @cmd: NVM access command structure
520 * Read the adapter info value out of the NVM access config field.
522 u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd)
524 return ((cmd->config & ICE_NVM_CFG_ADAPTER_INFO_M) >>
525 ICE_NVM_CFG_ADAPTER_INFO_S);
529 * ice_validate_nvm_rw_reg - Check than an NVM access request is valid
530 * @cmd: NVM access command structure
532 * Validates that an NVM access structure is request to read or write a valid
533 * register offset. First validates that the module and flags are correct, and
534 * then ensures that the register offset is one of the accepted registers.
536 static enum ice_status
537 ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd)
539 u32 module, flags, offset;
542 module = ice_nvm_access_get_module(cmd);
543 flags = ice_nvm_access_get_flags(cmd);
544 offset = cmd->offset;
546 /* Make sure the module and flags indicate a read/write request */
547 if (module != ICE_NVM_REG_RW_MODULE ||
548 flags != ICE_NVM_REG_RW_FLAGS ||
549 cmd->data_size != FIELD_SIZEOF(union ice_nvm_access_data, regval))
550 return ICE_ERR_PARAM;
554 case GL_HICR_EN: /* Note, this register is read only */
557 case GLGEN_CSR_DEBUG_C:
568 for (i = 0; i <= ICE_NVM_ACCESS_GL_HIDA_MAX; i++)
569 if (offset == (u32)GL_HIDA(i))
572 for (i = 0; i <= ICE_NVM_ACCESS_GL_HIBA_MAX; i++)
573 if (offset == (u32)GL_HIBA(i))
576 /* All other register offsets are not valid */
577 return ICE_ERR_OUT_OF_RANGE;
581 * ice_nvm_access_read - Handle an NVM read request
582 * @hw: pointer to the HW struct
583 * @cmd: NVM access command to process
584 * @data: storage for the register value read
586 * Process an NVM access request to read a register.
589 ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
590 union ice_nvm_access_data *data)
592 enum ice_status status;
594 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
596 /* Always initialize the output data, even on failure */
597 ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
599 /* Make sure this is a valid read/write access request */
600 status = ice_validate_nvm_rw_reg(cmd);
604 ice_debug(hw, ICE_DBG_NVM, "NVM access: reading register %08x\n",
607 /* Read the register and store the contents in the data field */
608 data->regval = rd32(hw, cmd->offset);
614 * ice_nvm_access_write - Handle an NVM write request
615 * @hw: pointer to the HW struct
616 * @cmd: NVM access command to process
617 * @data: NVM access data to write
619 * Process an NVM access request to write a register.
622 ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
623 union ice_nvm_access_data *data)
625 enum ice_status status;
627 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
629 /* Make sure this is a valid read/write access request */
630 status = ice_validate_nvm_rw_reg(cmd);
634 /* Reject requests to write to read-only registers */
635 switch (cmd->offset) {
638 return ICE_ERR_OUT_OF_RANGE;
643 ice_debug(hw, ICE_DBG_NVM,
644 "NVM access: writing register %08x with value %08x\n",
645 cmd->offset, data->regval);
647 /* Write the data field to the specified register */
648 wr32(hw, cmd->offset, data->regval);
654 * ice_handle_nvm_access - Handle an NVM access request
655 * @hw: pointer to the HW struct
656 * @cmd: NVM access command info
657 * @data: pointer to read or return data
659 * Process an NVM access request. Read the command structure information and
660 * determine if it is valid. If not, report an error indicating the command
663 * For valid commands, perform the necessary function, copying the data into
664 * the provided data buffer.
667 ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
668 union ice_nvm_access_data *data)
670 u32 module, flags, adapter_info;
672 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
674 /* Extended flags are currently reserved and must be zero */
675 if ((cmd->config & ICE_NVM_CFG_EXT_FLAGS_M) != 0)
676 return ICE_ERR_PARAM;
678 /* Adapter info must match the HW device ID */
679 adapter_info = ice_nvm_access_get_adapter(cmd);
680 if (adapter_info != hw->device_id)
681 return ICE_ERR_PARAM;
683 switch (cmd->command) {
684 case ICE_NVM_CMD_READ:
685 module = ice_nvm_access_get_module(cmd);
686 flags = ice_nvm_access_get_flags(cmd);
688 /* Getting the driver's NVM features structure shares the same
689 * command type as reading a register. Read the config field
690 * to determine if this is a request to get features.
692 if (module == ICE_NVM_GET_FEATURES_MODULE &&
693 flags == ICE_NVM_GET_FEATURES_FLAGS &&
695 return ice_nvm_access_get_features(cmd, data);
697 return ice_nvm_access_read(hw, cmd, data);
698 case ICE_NVM_CMD_WRITE:
699 return ice_nvm_access_write(hw, cmd, data);
701 return ICE_ERR_PARAM;