1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
13 #include <sys/queue.h>
16 #include <rte_common.h>
17 #include <rte_memcpy.h>
18 #include <rte_malloc.h>
19 #include <rte_memzone.h>
20 #include <rte_byteorder.h>
21 #include <rte_cycles.h>
22 #include <rte_spinlock.h>
24 #include <rte_random.h>
27 #include "../ice_logs.h"
42 #define hw_dbg(hw, S, A...) do {} while (0)
43 #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
44 #define lower_32_bits(n) ((u32)(n))
45 #define low_16_bits(x) ((x) & 0xFFFF)
46 #define high_16_bits(x) (((x) & 0xFFFF0000) >> 16)
49 #define ETH_ADDR_LEN 6
53 #define __le16 uint16_t
56 #define __le32 uint32_t
59 #define __le64 uint64_t
62 #define __be16 uint16_t
65 #define __be32 uint32_t
68 #define __be64 uint64_t
71 #ifndef __always_unused
72 #define __always_unused __attribute__((unused))
74 #ifndef __maybe_unused
75 #define __maybe_unused __attribute__((unused))
78 #define __packed __attribute__((packed))
82 #define BIT_ULL(a) (1ULL << (a))
90 #define min(a, b) RTE_MIN(a, b)
91 #define max(a, b) RTE_MAX(a, b)
93 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
94 #define FIELD_SIZEOF(t, f) (sizeof(((t *)0)->f))
95 #define MAKEMASK(m, s) ((m) << (s))
97 #define DEBUGOUT(S, A...) PMD_DRV_LOG_RAW(DEBUG, S, ##A)
98 #define DEBUGFUNC(F) PMD_DRV_LOG_RAW(DEBUG, F)
100 #define ice_debug(h, m, s, ...) \
102 if (((m) & (h)->debug_mask)) \
103 PMD_DRV_LOG_RAW(DEBUG, "ice %02x.%x " s, \
104 (h)->bus.device, (h)->bus.func, \
108 #define ice_info(hw, fmt, args...) ice_debug(hw, ICE_DBG_ALL, fmt, ##args)
109 #define ice_warn(hw, fmt, args...) ice_debug(hw, ICE_DBG_ALL, fmt, ##args)
110 #define ice_debug_array(hw, type, rowsize, groupsize, buf, len) \
112 struct ice_hw *hw_l = hw; \
116 for (i = 0; i < len_l; i += 8) \
117 ice_debug(hw_l, type, \
118 "0x%04X 0x%016"PRIx64"\n", \
119 i, *((u64 *)((buf_l) + i))); \
121 #define ice_snprintf snprintf
123 #define SNPRINTF ice_snprintf
126 #define ICE_PCI_REG(reg) rte_read32(reg)
127 #define ICE_PCI_REG_ADDR(a, reg) \
128 ((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))
129 #define ICE_PCI_REG64(reg) rte_read64(reg)
130 #define ICE_PCI_REG_ADDR64(a, reg) \
131 ((volatile uint64_t *)((char *)(a)->hw_addr + (reg)))
132 static inline uint32_t ice_read_addr(volatile void *addr)
134 return rte_le_to_cpu_32(ICE_PCI_REG(addr));
137 static inline uint64_t ice_read_addr64(volatile void *addr)
139 return rte_le_to_cpu_64(ICE_PCI_REG64(addr));
142 #define ICE_PCI_REG_WRITE(reg, value) \
143 rte_write32((rte_cpu_to_le_32(value)), reg)
145 #define ice_flush(a) ICE_READ_REG((a), GLGEN_STAT)
146 #define icevf_flush(a) ICE_READ_REG((a), VFGEN_RSTAT)
147 #define ICE_READ_REG(hw, reg) ice_read_addr(ICE_PCI_REG_ADDR((hw), (reg)))
148 #define ICE_WRITE_REG(hw, reg, value) \
149 ICE_PCI_REG_WRITE(ICE_PCI_REG_ADDR((hw), (reg)), (value))
151 #define rd32(a, reg) ice_read_addr(ICE_PCI_REG_ADDR((a), (reg)))
152 #define wr32(a, reg, value) \
153 ICE_PCI_REG_WRITE(ICE_PCI_REG_ADDR((a), (reg)), (value))
154 #define flush(a) ice_read_addr(ICE_PCI_REG_ADDR((a), (GLGEN_STAT)))
155 #define div64_long(n, d) ((n) / (d))
156 #define rd64(a, reg) ice_read_addr64(ICE_PCI_REG_ADDR64((a), (reg)))
158 #define BITS_PER_BYTE 8
160 /* memory allocation tracking */
166 } __attribute__((packed));
168 struct ice_virt_mem {
171 } __attribute__((packed));
173 #define ice_malloc(h, s) rte_zmalloc(NULL, s, 0)
174 #define ice_calloc(h, c, s) rte_zmalloc(NULL, (c) * (s), 0)
175 #define ice_free(h, m) rte_free(m)
177 #define ice_memset(a, b, c, d) memset((a), (b), (c))
178 #define ice_memcpy(a, b, c, d) rte_memcpy((a), (b), (c))
179 #define ice_memdup(a, b, c, d) rte_memcpy(ice_malloc(a, c), b, c)
181 #define CPU_TO_BE16(o) rte_cpu_to_be_16(o)
182 #define CPU_TO_BE32(o) rte_cpu_to_be_32(o)
183 #define CPU_TO_BE64(o) rte_cpu_to_be_64(o)
184 #define CPU_TO_LE16(o) rte_cpu_to_le_16(o)
185 #define CPU_TO_LE32(s) rte_cpu_to_le_32(s)
186 #define CPU_TO_LE64(h) rte_cpu_to_le_64(h)
187 #define LE16_TO_CPU(a) rte_le_to_cpu_16(a)
188 #define LE32_TO_CPU(c) rte_le_to_cpu_32(c)
189 #define LE64_TO_CPU(k) rte_le_to_cpu_64(k)
191 #define NTOHS(a) rte_be_to_cpu_16(a)
192 #define NTOHL(a) rte_be_to_cpu_32(a)
193 #define HTONS(a) rte_cpu_to_be_16(a)
194 #define HTONL(a) rte_cpu_to_be_32(a)
198 rte_spinlock_t spinlock;
202 ice_init_lock(struct ice_lock *sp)
204 rte_spinlock_init(&sp->spinlock);
208 ice_acquire_lock(struct ice_lock *sp)
210 rte_spinlock_lock(&sp->spinlock);
214 ice_release_lock(struct ice_lock *sp)
216 rte_spinlock_unlock(&sp->spinlock);
220 ice_destroy_lock(__attribute__((unused)) struct ice_lock *sp)
227 ice_alloc_dma_mem(__attribute__((unused)) struct ice_hw *hw,
228 struct ice_dma_mem *mem, u64 size)
230 const struct rte_memzone *mz = NULL;
231 char z_name[RTE_MEMZONE_NAMESIZE];
236 snprintf(z_name, sizeof(z_name), "ice_dma_%"PRIu64, rte_rand());
237 mz = rte_memzone_reserve_bounded(z_name, size, SOCKET_ID_ANY, 0,
244 mem->pa = mz->phys_addr;
245 mem->zone = (const void *)mz;
246 PMD_DRV_LOG(DEBUG, "memzone %s allocated with physical address: "
247 "%"PRIu64, mz->name, mem->pa);
253 ice_free_dma_mem(__attribute__((unused)) struct ice_hw *hw,
254 struct ice_dma_mem *mem)
256 PMD_DRV_LOG(DEBUG, "memzone %s to be freed with physical address: "
257 "%"PRIu64, ((const struct rte_memzone *)mem->zone)->name,
259 rte_memzone_free((const struct rte_memzone *)mem->zone);
266 ice_hweight8(u32 num)
271 for (i = 0; i < 8; i++) {
272 bits += (u8)(num & 0x1);
280 ice_hweight32(u32 num)
285 for (i = 0; i < 32; i++) {
286 bits += (u8)(num & 0x1);
293 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
294 #define DELAY(x) rte_delay_us(x)
295 #define ice_usec_delay(x) rte_delay_us(x)
296 #define ice_msec_delay(x, y) rte_delay_us(1000 * (x))
297 #define udelay(x) DELAY(x)
298 #define msleep(x) DELAY(1000 * (x))
299 #define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
301 struct ice_list_entry {
302 LIST_ENTRY(ice_list_entry) next;
305 LIST_HEAD(ice_list_head, ice_list_entry);
307 #define LIST_ENTRY_TYPE ice_list_entry
308 #define LIST_HEAD_TYPE ice_list_head
309 #define INIT_LIST_HEAD(list_head) LIST_INIT(list_head)
310 #define LIST_DEL(entry) LIST_REMOVE(entry, next)
311 /* LIST_EMPTY(list_head)) the same in sys/queue.h */
313 /*Note parameters are swapped*/
314 #define LIST_FIRST_ENTRY(head, type, field) (type *)((head)->lh_first)
315 #define LIST_NEXT_ENTRY(entry, type, field) \
316 ((type *)(entry)->field.next.le_next)
317 #define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
318 #define LIST_ADD_AFTER(entry, list_entry) \
319 LIST_INSERT_AFTER(list_entry, entry, next)
321 static inline void list_add_tail(struct ice_list_entry *entry,
322 struct ice_list_head *head)
324 struct ice_list_entry *tail = head->lh_first;
327 LIST_INSERT_HEAD(head, entry, next);
330 while (tail->next.le_next != NULL)
331 tail = tail->next.le_next;
332 LIST_INSERT_AFTER(tail, entry, next);
335 #define LIST_ADD_TAIL(entry, head) list_add_tail(entry, head)
336 #define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
337 for ((pos) = (head)->lh_first ? \
338 container_of((head)->lh_first, struct type, member) : \
341 (pos) = (pos)->member.next.le_next ? \
342 container_of((pos)->member.next.le_next, struct type, \
346 #define LIST_REPLACE_INIT(list_head, head) do { \
347 (head)->lh_first = (list_head)->lh_first; \
348 INIT_LIST_HEAD(list_head); \
351 #define HLIST_NODE_TYPE LIST_ENTRY_TYPE
352 #define HLIST_HEAD_TYPE LIST_HEAD_TYPE
353 #define INIT_HLIST_HEAD(list_head) INIT_LIST_HEAD(list_head)
354 #define HLIST_ADD_HEAD(entry, list_head) LIST_ADD(entry, list_head)
355 #define HLIST_EMPTY(list_head) LIST_EMPTY(list_head)
356 #define HLIST_DEL(entry) LIST_DEL(entry)
357 #define HLIST_FOR_EACH_ENTRY(pos, head, type, member) \
358 LIST_FOR_EACH_ENTRY(pos, head, type, member)
359 #define LIST_FOR_EACH_ENTRY_SAFE(pos, tmp, head, type, member) \
360 LIST_FOR_EACH_ENTRY(pos, head, type, member)
362 #ifndef ICE_DBG_TRACE
363 #define ICE_DBG_TRACE BIT_ULL(0)
366 #ifndef DIVIDE_AND_ROUND_UP
367 #define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
370 #ifndef ICE_INTEL_VENDOR_ID
371 #define ICE_INTEL_VENDOR_ID 0x8086
374 #ifndef IS_UNICAST_ETHER_ADDR
375 #define IS_UNICAST_ETHER_ADDR(addr) \
376 ((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 0))
379 #ifndef IS_MULTICAST_ETHER_ADDR
380 #define IS_MULTICAST_ETHER_ADDR(addr) \
381 ((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 1))
384 #ifndef IS_BROADCAST_ETHER_ADDR
385 /* Check whether an address is broadcast. */
386 #define IS_BROADCAST_ETHER_ADDR(addr) \
387 ((bool)((((u16 *)(addr))[0] == ((u16)0xffff))))
390 #ifndef IS_ZERO_ETHER_ADDR
391 #define IS_ZERO_ETHER_ADDR(addr) \
392 (((bool)((((u16 *)(addr))[0] == ((u16)0x0)))) && \
393 ((bool)((((u16 *)(addr))[1] == ((u16)0x0)))) && \
394 ((bool)((((u16 *)(addr))[2] == ((u16)0x0)))))
397 #endif /* _ICE_OSDEP_H_ */