1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
13 #include <sys/queue.h>
16 #include <rte_common.h>
17 #include <rte_memcpy.h>
18 #include <rte_malloc.h>
19 #include <rte_memzone.h>
20 #include <rte_byteorder.h>
21 #include <rte_cycles.h>
22 #include <rte_spinlock.h>
24 #include <rte_random.h>
27 #include "../ice_logs.h"
29 #ifndef __INTEL_NET_BASE_OSDEP__
30 #define __INTEL_NET_BASE_OSDEP__
45 #define __le16 uint16_t
48 #define __le32 uint32_t
51 #define __le64 uint64_t
54 #define __be16 uint16_t
57 #define __be32 uint32_t
60 #define __be64 uint64_t
63 #define min(a, b) RTE_MIN(a, b)
64 #define max(a, b) RTE_MAX(a, b)
66 #define FIELD_SIZEOF(t, f) RTE_SIZEOF_FIELD(t, f)
67 #define ARRAY_SIZE(arr) RTE_DIM(arr)
69 #define CPU_TO_LE16(o) rte_cpu_to_le_16(o)
70 #define CPU_TO_LE32(s) rte_cpu_to_le_32(s)
71 #define CPU_TO_LE64(h) rte_cpu_to_le_64(h)
72 #define LE16_TO_CPU(a) rte_le_to_cpu_16(a)
73 #define LE32_TO_CPU(c) rte_le_to_cpu_32(c)
74 #define LE64_TO_CPU(k) rte_le_to_cpu_64(k)
76 #define CPU_TO_BE16(o) rte_cpu_to_be_16(o)
77 #define CPU_TO_BE32(o) rte_cpu_to_be_32(o)
78 #define CPU_TO_BE64(o) rte_cpu_to_be_64(o)
80 #define NTOHS(a) rte_be_to_cpu_16(a)
81 #define NTOHL(a) rte_be_to_cpu_32(a)
82 #define HTONS(a) rte_cpu_to_be_16(a)
83 #define HTONL(a) rte_cpu_to_be_32(a)
85 static __rte_always_inline uint32_t
86 readl(volatile void *addr)
88 return rte_le_to_cpu_32(rte_read32(addr));
91 static __rte_always_inline void
92 writel(uint32_t value, volatile void *addr)
94 rte_write32(rte_cpu_to_le_32(value), addr);
97 static __rte_always_inline void
98 writel_relaxed(uint32_t value, volatile void *addr)
100 rte_write32_relaxed(rte_cpu_to_le_32(value), addr);
103 static __rte_always_inline uint64_t
104 readq(volatile void *addr)
106 return rte_le_to_cpu_64(rte_read64(addr));
109 static __rte_always_inline void
110 writeq(uint64_t value, volatile void *addr)
112 rte_write64(rte_cpu_to_le_64(value), addr);
115 #define wr32(a, reg, value) writel((value), (a)->hw_addr + (reg))
116 #define rd32(a, reg) readl((a)->hw_addr + (reg))
117 #define wr64(a, reg, value) writeq((value), (a)->hw_addr + (reg))
118 #define rd64(a, reg) readq((a)->hw_addr + (reg))
120 #endif /* __INTEL_NET_BASE_OSDEP__ */
122 #ifndef __always_unused
123 #define __always_unused __attribute__((unused))
125 #ifndef __maybe_unused
126 #define __maybe_unused __attribute__((unused))
129 #define __packed __attribute__((packed))
133 #define BIT_ULL(a) (1ULL << (a))
136 #define MAKEMASK(m, s) ((m) << (s))
138 #define ice_debug(h, m, s, ...) \
140 if (((m) & (h)->debug_mask)) \
141 PMD_DRV_LOG_RAW(DEBUG, "ice %02x.%x " s, \
142 (h)->bus.device, (h)->bus.func, \
146 #define ice_info(hw, fmt, args...) ice_debug(hw, ICE_DBG_ALL, fmt, ##args)
147 #define ice_warn(hw, fmt, args...) ice_debug(hw, ICE_DBG_ALL, fmt, ##args)
148 #define ice_debug_array(hw, type, rowsize, groupsize, buf, len) \
150 struct ice_hw *hw_l = hw; \
154 for (i = 0; i < len_l; i += 8) \
155 ice_debug(hw_l, type, \
156 "0x%04X 0x%016"PRIx64"\n", \
157 i, *((u64 *)((buf_l) + i))); \
159 #define ice_snprintf snprintf
161 #define SNPRINTF ice_snprintf
164 #define ICE_PCI_REG_WRITE(reg, value) writel(value, reg)
166 #define ICE_READ_REG(hw, reg) rd32(hw, reg)
167 #define ICE_WRITE_REG(hw, reg, value) wr32(hw, reg, value)
169 #define ice_flush(a) ICE_READ_REG((a), GLGEN_STAT)
170 #define icevf_flush(a) ICE_READ_REG((a), VFGEN_RSTAT)
172 #define flush(a) ICE_READ_REG((a), GLGEN_STAT)
173 #define div64_long(n, d) ((n) / (d))
175 #define BITS_PER_BYTE 8
177 /* memory allocation tracking */
183 } __attribute__((packed));
185 struct ice_virt_mem {
188 } __attribute__((packed));
190 #define ice_malloc(h, s) rte_zmalloc(NULL, s, 0)
191 #define ice_calloc(h, c, s) rte_zmalloc(NULL, (c) * (s), 0)
192 #define ice_free(h, m) rte_free(m)
194 #define ice_memset(a, b, c, d) memset((a), (b), (c))
195 #define ice_memcpy(a, b, c, d) rte_memcpy((a), (b), (c))
196 #define ice_memdup(a, b, c, d) rte_memcpy(ice_malloc(a, c), b, c)
200 rte_spinlock_t spinlock;
204 ice_init_lock(struct ice_lock *sp)
206 rte_spinlock_init(&sp->spinlock);
210 ice_acquire_lock(struct ice_lock *sp)
212 rte_spinlock_lock(&sp->spinlock);
216 ice_release_lock(struct ice_lock *sp)
218 rte_spinlock_unlock(&sp->spinlock);
222 ice_destroy_lock(__attribute__((unused)) struct ice_lock *sp)
229 ice_alloc_dma_mem(__attribute__((unused)) struct ice_hw *hw,
230 struct ice_dma_mem *mem, u64 size)
232 const struct rte_memzone *mz = NULL;
233 char z_name[RTE_MEMZONE_NAMESIZE];
238 snprintf(z_name, sizeof(z_name), "ice_dma_%"PRIu64, rte_rand());
239 mz = rte_memzone_reserve_bounded(z_name, size, SOCKET_ID_ANY, 0,
246 mem->pa = mz->phys_addr;
247 mem->zone = (const void *)mz;
248 PMD_DRV_LOG(DEBUG, "memzone %s allocated with physical address: "
249 "%"PRIu64, mz->name, mem->pa);
255 ice_free_dma_mem(__attribute__((unused)) struct ice_hw *hw,
256 struct ice_dma_mem *mem)
258 PMD_DRV_LOG(DEBUG, "memzone %s to be freed with physical address: "
259 "%"PRIu64, ((const struct rte_memzone *)mem->zone)->name,
261 rte_memzone_free((const struct rte_memzone *)mem->zone);
268 ice_hweight8(u32 num)
273 for (i = 0; i < 8; i++) {
274 bits += (u8)(num & 0x1);
282 ice_hweight32(u32 num)
287 for (i = 0; i < 32; i++) {
288 bits += (u8)(num & 0x1);
295 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
296 #define DELAY(x) rte_delay_us(x)
297 #define ice_usec_delay(x, y) rte_delay_us(x)
298 #define ice_msec_delay(x, y) rte_delay_us(1000 * (x))
299 #define udelay(x) DELAY(x)
300 #define msleep(x) DELAY(1000 * (x))
301 #define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
303 struct ice_list_entry {
304 LIST_ENTRY(ice_list_entry) next;
307 LIST_HEAD(ice_list_head, ice_list_entry);
309 #define LIST_ENTRY_TYPE ice_list_entry
310 #define LIST_HEAD_TYPE ice_list_head
311 #define INIT_LIST_HEAD(list_head) LIST_INIT(list_head)
312 #define LIST_DEL(entry) LIST_REMOVE(entry, next)
313 /* LIST_EMPTY(list_head)) the same in sys/queue.h */
315 /*Note parameters are swapped*/
316 #define LIST_FIRST_ENTRY(head, type, field) (type *)((head)->lh_first)
317 #define LIST_NEXT_ENTRY(entry, type, field) \
318 ((type *)(entry)->field.next.le_next)
319 #define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next)
320 #define LIST_ADD_AFTER(entry, list_entry) \
321 LIST_INSERT_AFTER(list_entry, entry, next)
323 static inline void list_add_tail(struct ice_list_entry *entry,
324 struct ice_list_head *head)
326 struct ice_list_entry *tail = head->lh_first;
329 LIST_INSERT_HEAD(head, entry, next);
332 while (tail->next.le_next != NULL)
333 tail = tail->next.le_next;
334 LIST_INSERT_AFTER(tail, entry, next);
337 #define LIST_ADD_TAIL(entry, head) list_add_tail(entry, head)
338 #define LIST_FOR_EACH_ENTRY(pos, head, type, member) \
339 for ((pos) = (head)->lh_first ? \
340 container_of((head)->lh_first, struct type, member) : \
343 (pos) = (pos)->member.next.le_next ? \
344 container_of((pos)->member.next.le_next, struct type, \
348 #define LIST_REPLACE_INIT(list_head, head) do { \
349 (head)->lh_first = (list_head)->lh_first; \
350 INIT_LIST_HEAD(list_head); \
353 #define HLIST_NODE_TYPE LIST_ENTRY_TYPE
354 #define HLIST_HEAD_TYPE LIST_HEAD_TYPE
355 #define INIT_HLIST_HEAD(list_head) INIT_LIST_HEAD(list_head)
356 #define HLIST_ADD_HEAD(entry, list_head) LIST_ADD(entry, list_head)
357 #define HLIST_EMPTY(list_head) LIST_EMPTY(list_head)
358 #define HLIST_DEL(entry) LIST_DEL(entry)
359 #define HLIST_FOR_EACH_ENTRY(pos, head, type, member) \
360 LIST_FOR_EACH_ENTRY(pos, head, type, member)
361 #define LIST_FOR_EACH_ENTRY_SAFE(pos, tmp, head, type, member) \
362 LIST_FOR_EACH_ENTRY(pos, head, type, member)
364 #ifndef ICE_DBG_TRACE
365 #define ICE_DBG_TRACE BIT_ULL(0)
368 #ifndef DIVIDE_AND_ROUND_UP
369 #define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
372 #ifndef ICE_INTEL_VENDOR_ID
373 #define ICE_INTEL_VENDOR_ID 0x8086
376 #ifndef IS_UNICAST_ETHER_ADDR
377 #define IS_UNICAST_ETHER_ADDR(addr) \
378 ((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 0))
381 #ifndef IS_MULTICAST_ETHER_ADDR
382 #define IS_MULTICAST_ETHER_ADDR(addr) \
383 ((bool)((((u8 *)(addr))[0] % ((u8)0x2)) == 1))
386 #ifndef IS_BROADCAST_ETHER_ADDR
387 /* Check whether an address is broadcast. */
388 #define IS_BROADCAST_ETHER_ADDR(addr) \
389 ((bool)((((u16 *)(addr))[0] == ((u16)0xffff))))
392 #ifndef IS_ZERO_ETHER_ADDR
393 #define IS_ZERO_ETHER_ADDR(addr) \
394 (((bool)((((u16 *)(addr))[0] == ((u16)0x0)))) && \
395 ((bool)((((u16 *)(addr))[1] == ((u16)0x0)))) && \
396 ((bool)((((u16 *)(addr))[2] == ((u16)0x0)))))
399 #endif /* _ICE_OSDEP_H_ */