1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2020 Intel Corporation
8 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
9 * @pi: port information structure
10 * @info: Scheduler element information from firmware
12 * This function inserts the root node of the scheduling tree topology
15 static enum ice_status
16 ice_sched_add_root_node(struct ice_port_info *pi,
17 struct ice_aqc_txsched_elem_data *info)
19 struct ice_sched_node *root;
27 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
29 return ICE_ERR_NO_MEMORY;
31 /* coverity[suspicious_sizeof] */
32 root->children = (struct ice_sched_node **)
33 ice_calloc(hw, hw->max_children[0], sizeof(*root));
34 if (!root->children) {
36 return ICE_ERR_NO_MEMORY;
39 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
45 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
46 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
47 * @teid: node TEID to search
49 * This function searches for a node matching the TEID in the scheduling tree
50 * from the SW DB. The search is recursive and is restricted by the number of
51 * layers it has searched through; stopping at the max supported layer.
53 * This function needs to be called when holding the port_info->sched_lock
55 struct ice_sched_node *
56 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
60 /* The TEID is same as that of the start_node */
61 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
64 /* The node has no children or is at the max layer */
65 if (!start_node->num_children ||
66 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
67 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
70 /* Check if TEID matches to any of the children nodes */
71 for (i = 0; i < start_node->num_children; i++)
72 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
73 return start_node->children[i];
75 /* Search within each child's sub-tree */
76 for (i = 0; i < start_node->num_children; i++) {
77 struct ice_sched_node *tmp;
79 tmp = ice_sched_find_node_by_teid(start_node->children[i],
89 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
90 * @hw: pointer to the HW struct
91 * @cmd_opc: cmd opcode
92 * @elems_req: number of elements to request
93 * @buf: pointer to buffer
94 * @buf_size: buffer size in bytes
95 * @elems_resp: returns total number of elements response
96 * @cd: pointer to command details structure or NULL
98 * This function sends a scheduling elements cmd (cmd_opc)
100 static enum ice_status
101 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
102 u16 elems_req, void *buf, u16 buf_size,
103 u16 *elems_resp, struct ice_sq_cd *cd)
105 struct ice_aqc_sched_elem_cmd *cmd;
106 struct ice_aq_desc desc;
107 enum ice_status status;
109 cmd = &desc.params.sched_elem_cmd;
110 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
111 cmd->num_elem_req = CPU_TO_LE16(elems_req);
112 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
113 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
114 if (!status && elems_resp)
115 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
121 * ice_aq_query_sched_elems - query scheduler elements
122 * @hw: pointer to the HW struct
123 * @elems_req: number of elements to query
124 * @buf: pointer to buffer
125 * @buf_size: buffer size in bytes
126 * @elems_ret: returns total number of elements returned
127 * @cd: pointer to command details structure or NULL
129 * Query scheduling elements (0x0404)
132 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
133 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
134 u16 *elems_ret, struct ice_sq_cd *cd)
136 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
137 elems_req, (void *)buf, buf_size,
142 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
143 * @pi: port information structure
144 * @layer: Scheduler layer of the node
145 * @info: Scheduler element information from firmware
147 * This function inserts a scheduler node to the SW DB.
150 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
151 struct ice_aqc_txsched_elem_data *info)
153 struct ice_aqc_txsched_elem_data elem;
154 struct ice_sched_node *parent;
155 struct ice_sched_node *node;
156 enum ice_status status;
160 return ICE_ERR_PARAM;
164 /* A valid parent node should be there */
165 parent = ice_sched_find_node_by_teid(pi->root,
166 LE32_TO_CPU(info->parent_teid));
168 ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n",
169 LE32_TO_CPU(info->parent_teid));
170 return ICE_ERR_PARAM;
173 /* query the current node information from FW before adding it
176 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
179 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
181 return ICE_ERR_NO_MEMORY;
182 if (hw->max_children[layer]) {
183 /* coverity[suspicious_sizeof] */
184 node->children = (struct ice_sched_node **)
185 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
186 if (!node->children) {
188 return ICE_ERR_NO_MEMORY;
193 node->parent = parent;
194 node->tx_sched_layer = layer;
195 parent->children[parent->num_children++] = node;
201 * ice_aq_delete_sched_elems - delete scheduler elements
202 * @hw: pointer to the HW struct
203 * @grps_req: number of groups to delete
204 * @buf: pointer to buffer
205 * @buf_size: buffer size in bytes
206 * @grps_del: returns total number of elements deleted
207 * @cd: pointer to command details structure or NULL
209 * Delete scheduling elements (0x040F)
211 static enum ice_status
212 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
213 struct ice_aqc_delete_elem *buf, u16 buf_size,
214 u16 *grps_del, struct ice_sq_cd *cd)
216 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
217 grps_req, (void *)buf, buf_size,
222 * ice_sched_remove_elems - remove nodes from HW
223 * @hw: pointer to the HW struct
224 * @parent: pointer to the parent node
225 * @num_nodes: number of nodes
226 * @node_teids: array of node teids to be deleted
228 * This function remove nodes from HW
230 static enum ice_status
231 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
232 u16 num_nodes, u32 *node_teids)
234 struct ice_aqc_delete_elem *buf;
235 u16 i, num_groups_removed = 0;
236 enum ice_status status;
239 buf_size = ice_struct_size(buf, teid, num_nodes);
240 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
242 return ICE_ERR_NO_MEMORY;
244 buf->hdr.parent_teid = parent->info.node_teid;
245 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
246 for (i = 0; i < num_nodes; i++)
247 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
249 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
250 &num_groups_removed, NULL);
251 if (status != ICE_SUCCESS || num_groups_removed != 1)
252 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
253 hw->adminq.sq_last_status);
260 * ice_sched_get_first_node - get the first node of the given layer
261 * @pi: port information structure
262 * @parent: pointer the base node of the subtree
263 * @layer: layer number
265 * This function retrieves the first node of the given layer from the subtree
267 static struct ice_sched_node *
268 ice_sched_get_first_node(struct ice_port_info *pi,
269 struct ice_sched_node *parent, u8 layer)
271 return pi->sib_head[parent->tc_num][layer];
275 * ice_sched_get_tc_node - get pointer to TC node
276 * @pi: port information structure
279 * This function returns the TC node pointer
281 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
285 if (!pi || !pi->root)
287 for (i = 0; i < pi->root->num_children; i++)
288 if (pi->root->children[i]->tc_num == tc)
289 return pi->root->children[i];
294 * ice_free_sched_node - Free a Tx scheduler node from SW DB
295 * @pi: port information structure
296 * @node: pointer to the ice_sched_node struct
298 * This function frees up a node from SW DB as well as from HW
300 * This function needs to be called with the port_info->sched_lock held
302 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
304 struct ice_sched_node *parent;
305 struct ice_hw *hw = pi->hw;
308 /* Free the children before freeing up the parent node
309 * The parent array is updated below and that shifts the nodes
310 * in the array. So always pick the first child if num children > 0
312 while (node->num_children)
313 ice_free_sched_node(pi, node->children[0]);
315 /* Leaf, TC and root nodes can't be deleted by SW */
316 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
317 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
320 u32 teid = LE32_TO_CPU(node->info.node_teid);
322 ice_sched_remove_elems(hw, node->parent, 1, &teid);
324 parent = node->parent;
325 /* root has no parent */
327 struct ice_sched_node *p;
329 /* update the parent */
330 for (i = 0; i < parent->num_children; i++)
331 if (parent->children[i] == node) {
332 for (j = i + 1; j < parent->num_children; j++)
333 parent->children[j - 1] =
335 parent->num_children--;
339 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
341 if (p->sibling == node) {
342 p->sibling = node->sibling;
348 /* update the sibling head if head is getting removed */
349 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
350 pi->sib_head[node->tc_num][node->tx_sched_layer] =
354 /* leaf nodes have no children */
356 ice_free(hw, node->children);
361 * ice_aq_get_dflt_topo - gets default scheduler topology
362 * @hw: pointer to the HW struct
363 * @lport: logical port number
364 * @buf: pointer to buffer
365 * @buf_size: buffer size in bytes
366 * @num_branches: returns total number of queue to port branches
367 * @cd: pointer to command details structure or NULL
369 * Get default scheduler topology (0x400)
371 static enum ice_status
372 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
373 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
374 u8 *num_branches, struct ice_sq_cd *cd)
376 struct ice_aqc_get_topo *cmd;
377 struct ice_aq_desc desc;
378 enum ice_status status;
380 cmd = &desc.params.get_topo;
381 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
382 cmd->port_num = lport;
383 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
384 if (!status && num_branches)
385 *num_branches = cmd->num_branches;
391 * ice_aq_add_sched_elems - adds scheduling element
392 * @hw: pointer to the HW struct
393 * @grps_req: the number of groups that are requested to be added
394 * @buf: pointer to buffer
395 * @buf_size: buffer size in bytes
396 * @grps_added: returns total number of groups added
397 * @cd: pointer to command details structure or NULL
399 * Add scheduling elements (0x0401)
401 static enum ice_status
402 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
403 struct ice_aqc_add_elem *buf, u16 buf_size,
404 u16 *grps_added, struct ice_sq_cd *cd)
406 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
407 grps_req, (void *)buf, buf_size,
412 * ice_aq_cfg_sched_elems - configures scheduler elements
413 * @hw: pointer to the HW struct
414 * @elems_req: number of elements to configure
415 * @buf: pointer to buffer
416 * @buf_size: buffer size in bytes
417 * @elems_cfgd: returns total number of elements configured
418 * @cd: pointer to command details structure or NULL
420 * Configure scheduling elements (0x0403)
422 static enum ice_status
423 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
424 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
425 u16 *elems_cfgd, struct ice_sq_cd *cd)
427 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
428 elems_req, (void *)buf, buf_size,
433 * ice_aq_move_sched_elems - move scheduler elements
434 * @hw: pointer to the HW struct
435 * @grps_req: number of groups to move
436 * @buf: pointer to buffer
437 * @buf_size: buffer size in bytes
438 * @grps_movd: returns total number of groups moved
439 * @cd: pointer to command details structure or NULL
441 * Move scheduling elements (0x0408)
443 static enum ice_status
444 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
445 struct ice_aqc_move_elem *buf, u16 buf_size,
446 u16 *grps_movd, struct ice_sq_cd *cd)
448 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
449 grps_req, (void *)buf, buf_size,
454 * ice_aq_suspend_sched_elems - suspend scheduler elements
455 * @hw: pointer to the HW struct
456 * @elems_req: number of elements to suspend
457 * @buf: pointer to buffer
458 * @buf_size: buffer size in bytes
459 * @elems_ret: returns total number of elements suspended
460 * @cd: pointer to command details structure or NULL
462 * Suspend scheduling elements (0x0409)
464 static enum ice_status
465 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
466 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
468 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
469 elems_req, (void *)buf, buf_size,
474 * ice_aq_resume_sched_elems - resume scheduler elements
475 * @hw: pointer to the HW struct
476 * @elems_req: number of elements to resume
477 * @buf: pointer to buffer
478 * @buf_size: buffer size in bytes
479 * @elems_ret: returns total number of elements resumed
480 * @cd: pointer to command details structure or NULL
482 * resume scheduling elements (0x040A)
484 static enum ice_status
485 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
486 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
488 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
489 elems_req, (void *)buf, buf_size,
494 * ice_aq_query_sched_res - query scheduler resource
495 * @hw: pointer to the HW struct
496 * @buf_size: buffer size in bytes
497 * @buf: pointer to buffer
498 * @cd: pointer to command details structure or NULL
500 * Query scheduler resource allocation (0x0412)
502 static enum ice_status
503 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
504 struct ice_aqc_query_txsched_res_resp *buf,
505 struct ice_sq_cd *cd)
507 struct ice_aq_desc desc;
509 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
510 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
514 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
515 * @hw: pointer to the HW struct
516 * @num_nodes: number of nodes
517 * @node_teids: array of node teids to be suspended or resumed
518 * @suspend: true means suspend / false means resume
520 * This function suspends or resumes HW nodes
522 static enum ice_status
523 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
526 u16 i, buf_size, num_elem_ret = 0;
527 enum ice_status status;
530 buf_size = sizeof(*buf) * num_nodes;
531 buf = (__le32 *)ice_malloc(hw, buf_size);
533 return ICE_ERR_NO_MEMORY;
535 for (i = 0; i < num_nodes; i++)
536 buf[i] = CPU_TO_LE32(node_teids[i]);
539 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
540 buf_size, &num_elem_ret,
543 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
544 buf_size, &num_elem_ret,
546 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
547 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
554 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
555 * @hw: pointer to the HW struct
556 * @vsi_handle: VSI handle
558 * @new_numqs: number of queues
560 static enum ice_status
561 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
563 struct ice_vsi_ctx *vsi_ctx;
564 struct ice_q_ctx *q_ctx;
566 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
568 return ICE_ERR_PARAM;
569 /* allocate LAN queue contexts */
570 if (!vsi_ctx->lan_q_ctx[tc]) {
571 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
572 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
573 if (!vsi_ctx->lan_q_ctx[tc])
574 return ICE_ERR_NO_MEMORY;
575 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
578 /* num queues are increased, update the queue contexts */
579 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
580 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
582 q_ctx = (struct ice_q_ctx *)
583 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
585 return ICE_ERR_NO_MEMORY;
586 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
587 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
588 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
589 vsi_ctx->lan_q_ctx[tc] = q_ctx;
590 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
596 * ice_aq_rl_profile - performs a rate limiting task
597 * @hw: pointer to the HW struct
598 * @opcode: opcode for add, query, or remove profile(s)
599 * @num_profiles: the number of profiles
600 * @buf: pointer to buffer
601 * @buf_size: buffer size in bytes
602 * @num_processed: number of processed add or remove profile(s) to return
603 * @cd: pointer to command details structure
605 * RL profile function to add, query, or remove profile(s)
607 static enum ice_status
608 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
609 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
610 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
612 struct ice_aqc_rl_profile *cmd;
613 struct ice_aq_desc desc;
614 enum ice_status status;
616 cmd = &desc.params.rl_profile;
618 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
619 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
620 cmd->num_profiles = CPU_TO_LE16(num_profiles);
621 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
622 if (!status && num_processed)
623 *num_processed = LE16_TO_CPU(cmd->num_processed);
628 * ice_aq_add_rl_profile - adds rate limiting profile(s)
629 * @hw: pointer to the HW struct
630 * @num_profiles: the number of profile(s) to be add
631 * @buf: pointer to buffer
632 * @buf_size: buffer size in bytes
633 * @num_profiles_added: total number of profiles added to return
634 * @cd: pointer to command details structure
636 * Add RL profile (0x0410)
638 static enum ice_status
639 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
640 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
641 u16 *num_profiles_added, struct ice_sq_cd *cd)
643 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
644 buf, buf_size, num_profiles_added, cd);
648 * ice_aq_query_rl_profile - query rate limiting profile(s)
649 * @hw: pointer to the HW struct
650 * @num_profiles: the number of profile(s) to query
651 * @buf: pointer to buffer
652 * @buf_size: buffer size in bytes
653 * @cd: pointer to command details structure
655 * Query RL profile (0x0411)
658 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
659 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
660 struct ice_sq_cd *cd)
662 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
663 num_profiles, buf, buf_size, NULL, cd);
667 * ice_aq_remove_rl_profile - removes RL profile(s)
668 * @hw: pointer to the HW struct
669 * @num_profiles: the number of profile(s) to remove
670 * @buf: pointer to buffer
671 * @buf_size: buffer size in bytes
672 * @num_profiles_removed: total number of profiles removed to return
673 * @cd: pointer to command details structure or NULL
675 * Remove RL profile (0x0415)
677 static enum ice_status
678 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
679 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
680 u16 *num_profiles_removed, struct ice_sq_cd *cd)
682 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
683 num_profiles, buf, buf_size,
684 num_profiles_removed, cd);
688 * ice_sched_del_rl_profile - remove RL profile
689 * @hw: pointer to the HW struct
690 * @rl_info: rate limit profile information
692 * If the profile ID is not referenced anymore, it removes profile ID with
693 * its associated parameters from HW DB,and locally. The caller needs to
694 * hold scheduler lock.
696 static enum ice_status
697 ice_sched_del_rl_profile(struct ice_hw *hw,
698 struct ice_aqc_rl_profile_info *rl_info)
700 struct ice_aqc_rl_profile_elem *buf;
701 u16 num_profiles_removed;
702 enum ice_status status;
703 u16 num_profiles = 1;
705 if (rl_info->prof_id_ref != 0)
706 return ICE_ERR_IN_USE;
708 /* Safe to remove profile ID */
709 buf = &rl_info->profile;
710 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
711 &num_profiles_removed, NULL);
712 if (status || num_profiles_removed != num_profiles)
715 /* Delete stale entry now */
716 LIST_DEL(&rl_info->list_entry);
717 ice_free(hw, rl_info);
722 * ice_sched_clear_rl_prof - clears RL prof entries
723 * @pi: port information structure
725 * This function removes all RL profile from HW as well as from SW DB.
727 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
730 struct ice_hw *hw = pi->hw;
732 for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
733 struct ice_aqc_rl_profile_info *rl_prof_elem;
734 struct ice_aqc_rl_profile_info *rl_prof_tmp;
736 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
737 &hw->rl_prof_list[ln],
738 ice_aqc_rl_profile_info, list_entry) {
739 enum ice_status status;
741 rl_prof_elem->prof_id_ref = 0;
742 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
744 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
745 /* On error, free mem required */
746 LIST_DEL(&rl_prof_elem->list_entry);
747 ice_free(hw, rl_prof_elem);
754 * ice_sched_clear_agg - clears the aggregator related information
755 * @hw: pointer to the hardware structure
757 * This function removes aggregator list and free up aggregator related memory
758 * previously allocated.
760 void ice_sched_clear_agg(struct ice_hw *hw)
762 struct ice_sched_agg_info *agg_info;
763 struct ice_sched_agg_info *atmp;
765 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
768 struct ice_sched_agg_vsi_info *agg_vsi_info;
769 struct ice_sched_agg_vsi_info *vtmp;
771 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
772 &agg_info->agg_vsi_list,
773 ice_sched_agg_vsi_info, list_entry) {
774 LIST_DEL(&agg_vsi_info->list_entry);
775 ice_free(hw, agg_vsi_info);
777 LIST_DEL(&agg_info->list_entry);
778 ice_free(hw, agg_info);
783 * ice_sched_clear_tx_topo - clears the scheduler tree nodes
784 * @pi: port information structure
786 * This function removes all the nodes from HW as well as from SW DB.
788 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
792 /* remove RL profiles related lists */
793 ice_sched_clear_rl_prof(pi);
795 ice_free_sched_node(pi, pi->root);
801 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
802 * @pi: port information structure
804 * Cleanup scheduling elements from SW DB
806 void ice_sched_clear_port(struct ice_port_info *pi)
808 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
811 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
812 ice_acquire_lock(&pi->sched_lock);
813 ice_sched_clear_tx_topo(pi);
814 ice_release_lock(&pi->sched_lock);
815 ice_destroy_lock(&pi->sched_lock);
819 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
820 * @hw: pointer to the HW struct
822 * Cleanup scheduling elements from SW DB for all the ports
824 void ice_sched_cleanup_all(struct ice_hw *hw)
829 if (hw->layer_info) {
830 ice_free(hw, hw->layer_info);
831 hw->layer_info = NULL;
834 ice_sched_clear_port(hw->port_info);
836 hw->num_tx_sched_layers = 0;
837 hw->num_tx_sched_phys_layers = 0;
838 hw->flattened_layers = 0;
843 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
844 * @hw: pointer to the HW struct
845 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
846 * @buf: pointer to buffer
847 * @buf_size: buffer size in bytes
848 * @cd: pointer to command details structure or NULL
850 * Configure L2 Node CGD (0x0414)
853 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
854 struct ice_aqc_cfg_l2_node_cgd_elem *buf,
855 u16 buf_size, struct ice_sq_cd *cd)
857 struct ice_aqc_cfg_l2_node_cgd *cmd;
858 struct ice_aq_desc desc;
860 cmd = &desc.params.cfg_l2_node_cgd;
861 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
862 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
864 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
865 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
869 * ice_sched_add_elems - add nodes to HW and SW DB
870 * @pi: port information structure
871 * @tc_node: pointer to the branch node
872 * @parent: pointer to the parent node
873 * @layer: layer number to add nodes
874 * @num_nodes: number of nodes
875 * @num_nodes_added: pointer to num nodes added
876 * @first_node_teid: if new nodes are added then return the TEID of first node
878 * This function add nodes to HW as well as to SW DB for a given layer
880 static enum ice_status
881 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
882 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
883 u16 *num_nodes_added, u32 *first_node_teid)
885 struct ice_sched_node *prev, *new_node;
886 struct ice_aqc_add_elem *buf;
887 u16 i, num_groups_added = 0;
888 enum ice_status status = ICE_SUCCESS;
889 struct ice_hw *hw = pi->hw;
893 buf_size = ice_struct_size(buf, generic, num_nodes);
894 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
896 return ICE_ERR_NO_MEMORY;
898 buf->hdr.parent_teid = parent->info.node_teid;
899 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
900 for (i = 0; i < num_nodes; i++) {
901 buf->generic[i].parent_teid = parent->info.node_teid;
902 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
903 buf->generic[i].data.valid_sections =
904 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
905 ICE_AQC_ELEM_VALID_EIR;
906 buf->generic[i].data.generic = 0;
907 buf->generic[i].data.cir_bw.bw_profile_idx =
908 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
909 buf->generic[i].data.cir_bw.bw_alloc =
910 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
911 buf->generic[i].data.eir_bw.bw_profile_idx =
912 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
913 buf->generic[i].data.eir_bw.bw_alloc =
914 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
917 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
918 &num_groups_added, NULL);
919 if (status != ICE_SUCCESS || num_groups_added != 1) {
920 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
921 hw->adminq.sq_last_status);
926 *num_nodes_added = num_nodes;
927 /* add nodes to the SW DB */
928 for (i = 0; i < num_nodes; i++) {
929 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
930 if (status != ICE_SUCCESS) {
931 ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n",
936 teid = LE32_TO_CPU(buf->generic[i].node_teid);
937 new_node = ice_sched_find_node_by_teid(parent, teid);
939 ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);
943 new_node->sibling = NULL;
944 new_node->tc_num = tc_node->tc_num;
946 /* add it to previous node sibling pointer */
947 /* Note: siblings are not linked across branches */
948 prev = ice_sched_get_first_node(pi, tc_node, layer);
949 if (prev && prev != new_node) {
950 while (prev->sibling)
951 prev = prev->sibling;
952 prev->sibling = new_node;
955 /* initialize the sibling head */
956 if (!pi->sib_head[tc_node->tc_num][layer])
957 pi->sib_head[tc_node->tc_num][layer] = new_node;
960 *first_node_teid = teid;
968 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
969 * @pi: port information structure
970 * @tc_node: pointer to TC node
971 * @parent: pointer to parent node
972 * @layer: layer number to add nodes
973 * @num_nodes: number of nodes to be added
974 * @first_node_teid: pointer to the first node TEID
975 * @num_nodes_added: pointer to number of nodes added
977 * This function add nodes to a given layer.
979 static enum ice_status
980 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
981 struct ice_sched_node *tc_node,
982 struct ice_sched_node *parent, u8 layer,
983 u16 num_nodes, u32 *first_node_teid,
984 u16 *num_nodes_added)
986 u32 *first_teid_ptr = first_node_teid;
987 u16 new_num_nodes, max_child_nodes;
988 enum ice_status status = ICE_SUCCESS;
989 struct ice_hw *hw = pi->hw;
993 *num_nodes_added = 0;
998 if (!parent || layer < hw->sw_entry_point_layer)
999 return ICE_ERR_PARAM;
1001 /* max children per node per layer */
1002 max_child_nodes = hw->max_children[parent->tx_sched_layer];
1004 /* current number of children + required nodes exceed max children ? */
1005 if ((parent->num_children + num_nodes) > max_child_nodes) {
1006 /* Fail if the parent is a TC node */
1007 if (parent == tc_node)
1010 /* utilize all the spaces if the parent is not full */
1011 if (parent->num_children < max_child_nodes) {
1012 new_num_nodes = max_child_nodes - parent->num_children;
1013 /* this recursion is intentional, and wouldn't
1014 * go more than 2 calls
1016 status = ice_sched_add_nodes_to_layer(pi, tc_node,
1021 if (status != ICE_SUCCESS)
1024 *num_nodes_added += num_added;
1026 /* Don't modify the first node TEID memory if the first node was
1027 * added already in the above call. Instead send some temp
1028 * memory for all other recursive calls.
1031 first_teid_ptr = &temp;
1033 new_num_nodes = num_nodes - num_added;
1035 /* This parent is full, try the next sibling */
1036 parent = parent->sibling;
1038 /* this recursion is intentional, for 1024 queues
1039 * per VSI, it goes max of 16 iterations.
1040 * 1024 / 8 = 128 layer 8 nodes
1041 * 128 /8 = 16 (add 8 nodes per iteration)
1043 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1044 layer, new_num_nodes,
1047 *num_nodes_added += num_added;
1051 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1052 num_nodes_added, first_node_teid);
1057 * ice_sched_get_qgrp_layer - get the current queue group layer number
1058 * @hw: pointer to the HW struct
1060 * This function returns the current queue group layer number
1062 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1064 /* It's always total layers - 1, the array is 0 relative so -2 */
1065 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1069 * ice_sched_get_vsi_layer - get the current VSI layer number
1070 * @hw: pointer to the HW struct
1072 * This function returns the current VSI layer number
1074 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1076 /* Num Layers VSI layer
1079 * 5 or less sw_entry_point_layer
1081 /* calculate the VSI layer based on number of layers. */
1082 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1083 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1085 if (layer > hw->sw_entry_point_layer)
1088 return hw->sw_entry_point_layer;
1092 * ice_sched_get_agg_layer - get the current aggregator layer number
1093 * @hw: pointer to the HW struct
1095 * This function returns the current aggregator layer number
1097 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1099 /* Num Layers aggregator layer
1101 * 7 or less sw_entry_point_layer
1103 /* calculate the aggregator layer based on number of layers. */
1104 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1105 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1107 if (layer > hw->sw_entry_point_layer)
1110 return hw->sw_entry_point_layer;
1114 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1115 * @pi: port information structure
1117 * This function removes the leaf node that was created by the FW
1118 * during initialization
1120 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1122 struct ice_sched_node *node;
1126 if (!node->num_children)
1128 node = node->children[0];
1130 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1131 u32 teid = LE32_TO_CPU(node->info.node_teid);
1132 enum ice_status status;
1134 /* remove the default leaf node */
1135 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1137 ice_free_sched_node(pi, node);
1142 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1143 * @pi: port information structure
1145 * This function frees all the nodes except root and TC that were created by
1146 * the FW during initialization
1148 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1150 struct ice_sched_node *node;
1152 ice_rm_dflt_leaf_node(pi);
1154 /* remove the default nodes except TC and root nodes */
1157 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1158 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1159 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1160 ice_free_sched_node(pi, node);
1164 if (!node->num_children)
1166 node = node->children[0];
1171 * ice_sched_init_port - Initialize scheduler by querying information from FW
1172 * @pi: port info structure for the tree to cleanup
1174 * This function is the initial call to find the total number of Tx scheduler
1175 * resources, default topology created by firmware and storing the information
1178 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1180 struct ice_aqc_get_topo_elem *buf;
1181 enum ice_status status;
1188 return ICE_ERR_PARAM;
1191 /* Query the Default Topology from FW */
1192 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1193 ICE_AQ_MAX_BUF_LEN);
1195 return ICE_ERR_NO_MEMORY;
1197 /* Query default scheduling tree topology */
1198 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1199 &num_branches, NULL);
1203 /* num_branches should be between 1-8 */
1204 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1205 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1207 status = ICE_ERR_PARAM;
1211 /* get the number of elements on the default/first branch */
1212 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1214 /* num_elems should always be between 1-9 */
1215 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1216 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1218 status = ICE_ERR_PARAM;
1222 /* If the last node is a leaf node then the index of the queue group
1223 * layer is two less than the number of elements.
1225 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1226 ICE_AQC_ELEM_TYPE_LEAF)
1227 pi->last_node_teid =
1228 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1230 pi->last_node_teid =
1231 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1233 /* Insert the Tx Sched root node */
1234 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1238 /* Parse the default tree and cache the information */
1239 for (i = 0; i < num_branches; i++) {
1240 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1242 /* Skip root element as already inserted */
1243 for (j = 1; j < num_elems; j++) {
1244 /* update the sw entry point */
1245 if (buf[0].generic[j].data.elem_type ==
1246 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1247 hw->sw_entry_point_layer = j;
1249 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1255 /* Remove the default nodes. */
1257 ice_sched_rm_dflt_nodes(pi);
1259 /* initialize the port for handling the scheduler tree */
1260 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1261 ice_init_lock(&pi->sched_lock);
1262 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1263 INIT_LIST_HEAD(&hw->rl_prof_list[i]);
1266 if (status && pi->root) {
1267 ice_free_sched_node(pi, pi->root);
1276 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1277 * @pi: port information structure
1278 * @teid: Scheduler node TEID
1280 * This function retrieves the ice_sched_node struct for given TEID from
1281 * the SW DB and returns it to the caller.
1283 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1285 struct ice_sched_node *node;
1290 /* Find the node starting from root */
1291 ice_acquire_lock(&pi->sched_lock);
1292 node = ice_sched_find_node_by_teid(pi->root, teid);
1293 ice_release_lock(&pi->sched_lock);
1296 ice_debug(pi->hw, ICE_DBG_SCHED, "Node not found for teid=0x%x\n", teid);
1302 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1303 * @hw: pointer to the HW struct
1305 * query FW for allocated scheduler resources and store in HW struct
1307 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1309 struct ice_aqc_query_txsched_res_resp *buf;
1310 enum ice_status status = ICE_SUCCESS;
1317 buf = (struct ice_aqc_query_txsched_res_resp *)
1318 ice_malloc(hw, sizeof(*buf));
1320 return ICE_ERR_NO_MEMORY;
1322 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1324 goto sched_query_out;
1326 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1327 hw->num_tx_sched_phys_layers =
1328 LE16_TO_CPU(buf->sched_props.phys_levels);
1329 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1330 hw->max_cgds = buf->sched_props.max_pf_cgds;
1332 /* max sibling group size of current layer refers to the max children
1333 * of the below layer node.
1334 * layer 1 node max children will be layer 2 max sibling group size
1335 * layer 2 node max children will be layer 3 max sibling group size
1336 * and so on. This array will be populated from root (index 0) to
1337 * qgroup layer 7. Leaf node has no children.
1339 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1340 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1341 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1344 hw->layer_info = (struct ice_aqc_layer_props *)
1345 ice_memdup(hw, buf->layer_props,
1346 (hw->num_tx_sched_layers *
1347 sizeof(*hw->layer_info)),
1349 if (!hw->layer_info) {
1350 status = ICE_ERR_NO_MEMORY;
1351 goto sched_query_out;
1360 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1361 * @hw: pointer to the HW struct
1363 * Determine the PSM clock frequency and store in HW struct
1365 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1369 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1370 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1371 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1373 #define PSM_CLK_SRC_367_MHZ 0x0
1374 #define PSM_CLK_SRC_416_MHZ 0x1
1375 #define PSM_CLK_SRC_446_MHZ 0x2
1376 #define PSM_CLK_SRC_390_MHZ 0x3
1379 case PSM_CLK_SRC_367_MHZ:
1380 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1382 case PSM_CLK_SRC_416_MHZ:
1383 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1385 case PSM_CLK_SRC_446_MHZ:
1386 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1388 case PSM_CLK_SRC_390_MHZ:
1389 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1392 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1394 /* fall back to a safe default */
1395 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1400 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1401 * @hw: pointer to the HW struct
1402 * @base: pointer to the base node
1403 * @node: pointer to the node to search
1405 * This function checks whether a given node is part of the base node
1409 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1410 struct ice_sched_node *node)
1414 for (i = 0; i < base->num_children; i++) {
1415 struct ice_sched_node *child = base->children[i];
1420 if (child->tx_sched_layer > node->tx_sched_layer)
1423 /* this recursion is intentional, and wouldn't
1424 * go more than 8 calls
1426 if (ice_sched_find_node_in_subtree(hw, child, node))
1433 * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node
1434 * @pi: port information structure
1435 * @vsi_node: software VSI handle
1436 * @qgrp_node: first queue group node identified for scanning
1437 * @owner: LAN or RDMA
1439 * This function retrieves a free LAN or RDMA queue group node by scanning
1440 * qgrp_node and its siblings for the queue group with the fewest number
1441 * of queues currently assigned.
1443 static struct ice_sched_node *
1444 ice_sched_get_free_qgrp(struct ice_port_info *pi,
1445 struct ice_sched_node *vsi_node,
1446 struct ice_sched_node *qgrp_node, u8 owner)
1448 struct ice_sched_node *min_qgrp;
1453 min_children = qgrp_node->num_children;
1456 min_qgrp = qgrp_node;
1457 /* scan all queue groups until find a node which has less than the
1458 * minimum number of children. This way all queue group nodes get
1459 * equal number of shares and active. The bandwidth will be equally
1460 * distributed across all queues.
1463 /* make sure the qgroup node is part of the VSI subtree */
1464 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1465 if (qgrp_node->num_children < min_children &&
1466 qgrp_node->owner == owner) {
1467 /* replace the new min queue group node */
1468 min_qgrp = qgrp_node;
1469 min_children = min_qgrp->num_children;
1470 /* break if it has no children, */
1474 qgrp_node = qgrp_node->sibling;
1480 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1481 * @pi: port information structure
1482 * @vsi_handle: software VSI handle
1483 * @tc: branch number
1484 * @owner: LAN or RDMA
1486 * This function retrieves a free LAN or RDMA queue group node
1488 struct ice_sched_node *
1489 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1492 struct ice_sched_node *vsi_node, *qgrp_node;
1493 struct ice_vsi_ctx *vsi_ctx;
1497 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1498 max_children = pi->hw->max_children[qgrp_layer];
1500 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1503 vsi_node = vsi_ctx->sched.vsi_node[tc];
1504 /* validate invalid VSI ID */
1508 /* get the first queue group node from VSI sub-tree */
1509 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1511 /* make sure the qgroup node is part of the VSI subtree */
1512 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1513 if (qgrp_node->num_children < max_children &&
1514 qgrp_node->owner == owner)
1516 qgrp_node = qgrp_node->sibling;
1519 /* Select the best queue group */
1520 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
1524 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1525 * @pi: pointer to the port information structure
1526 * @tc_node: pointer to the TC node
1527 * @vsi_handle: software VSI handle
1529 * This function retrieves a VSI node for a given VSI ID from a given
1532 struct ice_sched_node *
1533 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1536 struct ice_sched_node *node;
1539 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1540 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1542 /* Check whether it already exists */
1544 if (node->vsi_handle == vsi_handle)
1546 node = node->sibling;
1553 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1554 * @pi: pointer to the port information structure
1555 * @tc_node: pointer to the TC node
1556 * @agg_id: aggregator ID
1558 * This function retrieves an aggregator node for a given aggregator ID from
1561 static struct ice_sched_node *
1562 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1565 struct ice_sched_node *node;
1566 struct ice_hw *hw = pi->hw;
1571 agg_layer = ice_sched_get_agg_layer(hw);
1572 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1574 /* Check whether it already exists */
1576 if (node->agg_id == agg_id)
1578 node = node->sibling;
1585 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1586 * @hw: pointer to the HW struct
1587 * @node: pointer to the ice_sched_node struct
1589 * This function queries and compares the HW element with SW DB node parameters
1591 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1593 struct ice_aqc_txsched_elem_data buf;
1594 enum ice_status status;
1597 node_teid = LE32_TO_CPU(node->info.node_teid);
1598 status = ice_sched_query_elem(hw, node_teid, &buf);
1599 if (status != ICE_SUCCESS)
1602 if (memcmp(&buf, &node->info, sizeof(buf))) {
1603 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1612 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1613 * @hw: pointer to the HW struct
1614 * @num_qs: number of queues
1615 * @num_nodes: num nodes array
1617 * This function calculates the number of VSI child nodes based on the
1621 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1626 qgl = ice_sched_get_qgrp_layer(hw);
1627 vsil = ice_sched_get_vsi_layer(hw);
1629 /* calculate num nodes from queue group to VSI layer */
1630 for (i = qgl; i > vsil; i--) {
1631 /* round to the next integer if there is a remainder */
1632 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1634 /* need at least one node */
1635 num_nodes[i] = num ? num : 1;
1640 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1641 * @pi: port information structure
1642 * @vsi_handle: software VSI handle
1643 * @tc_node: pointer to the TC node
1644 * @num_nodes: pointer to the num nodes that needs to be added per layer
1645 * @owner: node owner (LAN or RDMA)
1647 * This function adds the VSI child nodes to tree. It gets called for
1648 * LAN and RDMA separately.
1650 static enum ice_status
1651 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1652 struct ice_sched_node *tc_node, u16 *num_nodes,
1655 struct ice_sched_node *parent, *node;
1656 struct ice_hw *hw = pi->hw;
1657 enum ice_status status;
1658 u32 first_node_teid;
1662 qgl = ice_sched_get_qgrp_layer(hw);
1663 vsil = ice_sched_get_vsi_layer(hw);
1664 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1665 for (i = vsil + 1; i <= qgl; i++) {
1669 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1673 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1676 /* The newly added node can be a new parent for the next
1680 parent = ice_sched_find_node_by_teid(tc_node,
1684 node->owner = owner;
1685 node = node->sibling;
1688 parent = parent->children[0];
1696 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1697 * @pi: pointer to the port info structure
1698 * @tc_node: pointer to TC node
1699 * @num_nodes: pointer to num nodes array
1701 * This function calculates the number of supported nodes needed to add this
1702 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1706 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1707 struct ice_sched_node *tc_node, u16 *num_nodes)
1709 struct ice_sched_node *node;
1713 vsil = ice_sched_get_vsi_layer(pi->hw);
1714 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1715 /* Add intermediate nodes if TC has no children and
1716 * need at least one node for VSI
1718 if (!tc_node->num_children || i == vsil) {
1721 /* If intermediate nodes are reached max children
1722 * then add a new one.
1724 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1725 /* scan all the siblings */
1727 if (node->num_children <
1728 pi->hw->max_children[i])
1730 node = node->sibling;
1733 /* tree has one intermediate node to add this new VSI.
1734 * So no need to calculate supported nodes for below
1739 /* all the nodes are full, allocate a new one */
1745 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1746 * @pi: port information structure
1747 * @vsi_handle: software VSI handle
1748 * @tc_node: pointer to TC node
1749 * @num_nodes: pointer to num nodes array
1751 * This function adds the VSI supported nodes into Tx tree including the
1752 * VSI, its parent and intermediate nodes in below layers
1754 static enum ice_status
1755 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1756 struct ice_sched_node *tc_node, u16 *num_nodes)
1758 struct ice_sched_node *parent = tc_node;
1759 enum ice_status status;
1760 u32 first_node_teid;
1765 return ICE_ERR_PARAM;
1767 vsil = ice_sched_get_vsi_layer(pi->hw);
1768 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1769 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1773 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1776 /* The newly added node can be a new parent for the next
1780 parent = ice_sched_find_node_by_teid(tc_node,
1783 parent = parent->children[0];
1789 parent->vsi_handle = vsi_handle;
1796 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1797 * @pi: port information structure
1798 * @vsi_handle: software VSI handle
1801 * This function adds a new VSI into scheduler tree
1803 static enum ice_status
1804 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1806 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1807 struct ice_sched_node *tc_node;
1809 tc_node = ice_sched_get_tc_node(pi, tc);
1811 return ICE_ERR_PARAM;
1813 /* calculate number of supported nodes needed for this VSI */
1814 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1816 /* add VSI supported nodes to TC subtree */
1817 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1822 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1823 * @pi: port information structure
1824 * @vsi_handle: software VSI handle
1826 * @new_numqs: new number of max queues
1827 * @owner: owner of this subtree
1829 * This function updates the VSI child nodes based on the number of queues
1831 static enum ice_status
1832 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1833 u8 tc, u16 new_numqs, u8 owner)
1835 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1836 struct ice_sched_node *vsi_node;
1837 struct ice_sched_node *tc_node;
1838 struct ice_vsi_ctx *vsi_ctx;
1839 enum ice_status status = ICE_SUCCESS;
1840 struct ice_hw *hw = pi->hw;
1843 tc_node = ice_sched_get_tc_node(pi, tc);
1847 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1851 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1853 return ICE_ERR_PARAM;
1855 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1856 /* num queues are not changed or less than the previous number */
1857 if (new_numqs <= prev_numqs)
1859 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1864 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1865 /* Keep the max number of queue configuration all the time. Update the
1866 * tree only if number of queues > previous number of queues. This may
1867 * leave some extra nodes in the tree if number of queues < previous
1868 * number but that wouldn't harm anything. Removing those extra nodes
1869 * may complicate the code if those nodes are part of SRL or
1870 * individually rate limited.
1872 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1873 new_num_nodes, owner);
1876 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1882 * ice_sched_cfg_vsi - configure the new/existing VSI
1883 * @pi: port information structure
1884 * @vsi_handle: software VSI handle
1886 * @maxqs: max number of queues
1887 * @owner: LAN or RDMA
1888 * @enable: TC enabled or disabled
1890 * This function adds/updates VSI nodes based on the number of queues. If TC is
1891 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1892 * disabled then suspend the VSI if it is not already.
1895 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1896 u8 owner, bool enable)
1898 struct ice_sched_node *vsi_node, *tc_node;
1899 struct ice_vsi_ctx *vsi_ctx;
1900 enum ice_status status = ICE_SUCCESS;
1901 struct ice_hw *hw = pi->hw;
1903 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1904 tc_node = ice_sched_get_tc_node(pi, tc);
1906 return ICE_ERR_PARAM;
1907 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1909 return ICE_ERR_PARAM;
1910 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1912 /* suspend the VSI if TC is not enabled */
1914 if (vsi_node && vsi_node->in_use) {
1915 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1917 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1920 vsi_node->in_use = false;
1925 /* TC is enabled, if it is a new VSI then add it to the tree */
1927 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1931 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1935 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1936 vsi_node->in_use = true;
1937 /* invalidate the max queues whenever VSI gets added first time
1938 * into the scheduler tree (boot or after reset). We need to
1939 * recreate the child nodes all the time in these cases.
1941 vsi_ctx->sched.max_lanq[tc] = 0;
1944 /* update the VSI child nodes */
1945 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1950 /* TC is enabled, resume the VSI if it is in the suspend state */
1951 if (!vsi_node->in_use) {
1952 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1954 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1956 vsi_node->in_use = true;
1963 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1964 * @pi: port information structure
1965 * @vsi_handle: software VSI handle
1967 * This function removes single aggregator VSI info entry from
1970 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1972 struct ice_sched_agg_info *agg_info;
1973 struct ice_sched_agg_info *atmp;
1975 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1978 struct ice_sched_agg_vsi_info *agg_vsi_info;
1979 struct ice_sched_agg_vsi_info *vtmp;
1981 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1982 &agg_info->agg_vsi_list,
1983 ice_sched_agg_vsi_info, list_entry)
1984 if (agg_vsi_info->vsi_handle == vsi_handle) {
1985 LIST_DEL(&agg_vsi_info->list_entry);
1986 ice_free(pi->hw, agg_vsi_info);
1993 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1994 * @node: pointer to the sub-tree node
1996 * This function checks for a leaf node presence in a given sub-tree node.
1998 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
2002 for (i = 0; i < node->num_children; i++)
2003 if (ice_sched_is_leaf_node_present(node->children[i]))
2005 /* check for a leaf node */
2006 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
2010 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
2011 * @pi: port information structure
2012 * @vsi_handle: software VSI handle
2013 * @owner: LAN or RDMA
2015 * This function removes the VSI and its LAN or RDMA children nodes from the
2018 static enum ice_status
2019 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
2021 enum ice_status status = ICE_ERR_PARAM;
2022 struct ice_vsi_ctx *vsi_ctx;
2025 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
2026 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2028 ice_acquire_lock(&pi->sched_lock);
2029 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2031 goto exit_sched_rm_vsi_cfg;
2033 ice_for_each_traffic_class(i) {
2034 struct ice_sched_node *vsi_node, *tc_node;
2037 tc_node = ice_sched_get_tc_node(pi, i);
2041 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2045 if (ice_sched_is_leaf_node_present(vsi_node)) {
2046 ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);
2047 status = ICE_ERR_IN_USE;
2048 goto exit_sched_rm_vsi_cfg;
2050 while (j < vsi_node->num_children) {
2051 if (vsi_node->children[j]->owner == owner) {
2052 ice_free_sched_node(pi, vsi_node->children[j]);
2054 /* reset the counter again since the num
2055 * children will be updated after node removal
2062 /* remove the VSI if it has no children */
2063 if (!vsi_node->num_children) {
2064 ice_free_sched_node(pi, vsi_node);
2065 vsi_ctx->sched.vsi_node[i] = NULL;
2067 /* clean up aggregator related VSI info if any */
2068 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2070 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2071 vsi_ctx->sched.max_lanq[i] = 0;
2073 status = ICE_SUCCESS;
2075 exit_sched_rm_vsi_cfg:
2076 ice_release_lock(&pi->sched_lock);
2081 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2082 * @pi: port information structure
2083 * @vsi_handle: software VSI handle
2085 * This function clears the VSI and its LAN children nodes from scheduler tree
2088 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2090 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2094 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2095 * @hw: pointer to the HW struct
2096 * @node: pointer to the ice_sched_node struct
2098 * This function compares all the nodes for a given tree against HW DB nodes
2099 * This function needs to be called with the port_info->sched_lock held
2101 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2105 /* start from the leaf node */
2106 for (i = 0; i < node->num_children; i++)
2107 /* Fail if node doesn't match with the SW DB
2108 * this recursion is intentional, and wouldn't
2109 * go more than 9 calls
2111 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2114 return ice_sched_check_node(hw, node);
2118 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2119 * @hw: pointer to the HW struct
2120 * @node_teid: node TEID
2121 * @buf: pointer to buffer
2122 * @buf_size: buffer size in bytes
2123 * @cd: pointer to command details structure or NULL
2125 * This function retrieves the tree topology from the firmware for a given
2126 * node TEID to the root node.
2129 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2130 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
2131 struct ice_sq_cd *cd)
2133 struct ice_aqc_query_node_to_root *cmd;
2134 struct ice_aq_desc desc;
2136 cmd = &desc.params.query_node_to_root;
2137 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2138 cmd->teid = CPU_TO_LE32(node_teid);
2139 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2143 * ice_get_agg_info - get the aggregator ID
2144 * @hw: pointer to the hardware structure
2145 * @agg_id: aggregator ID
2147 * This function validates aggregator ID. The function returns info if
2148 * aggregator ID is present in list otherwise it returns null.
2150 static struct ice_sched_agg_info *
2151 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2153 struct ice_sched_agg_info *agg_info;
2155 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2157 if (agg_info->agg_id == agg_id)
2164 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2165 * @hw: pointer to the HW struct
2166 * @node: pointer to a child node
2167 * @num_nodes: num nodes count array
2169 * This function walks through the aggregator subtree to find a free parent
2172 static struct ice_sched_node *
2173 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2176 u8 l = node->tx_sched_layer;
2179 vsil = ice_sched_get_vsi_layer(hw);
2181 /* Is it VSI parent layer ? */
2183 return (node->num_children < hw->max_children[l]) ? node : NULL;
2185 /* We have intermediate nodes. Let's walk through the subtree. If the
2186 * intermediate node has space to add a new node then clear the count
2188 if (node->num_children < hw->max_children[l])
2190 /* The below recursive call is intentional and wouldn't go more than
2191 * 2 or 3 iterations.
2194 for (i = 0; i < node->num_children; i++) {
2195 struct ice_sched_node *parent;
2197 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2207 * ice_sched_update_parent - update the new parent in SW DB
2208 * @new_parent: pointer to a new parent node
2209 * @node: pointer to a child node
2211 * This function removes the child from the old parent and adds it to a new
2215 ice_sched_update_parent(struct ice_sched_node *new_parent,
2216 struct ice_sched_node *node)
2218 struct ice_sched_node *old_parent;
2221 old_parent = node->parent;
2223 /* update the old parent children */
2224 for (i = 0; i < old_parent->num_children; i++)
2225 if (old_parent->children[i] == node) {
2226 for (j = i + 1; j < old_parent->num_children; j++)
2227 old_parent->children[j - 1] =
2228 old_parent->children[j];
2229 old_parent->num_children--;
2233 /* now move the node to a new parent */
2234 new_parent->children[new_parent->num_children++] = node;
2235 node->parent = new_parent;
2236 node->info.parent_teid = new_parent->info.node_teid;
2240 * ice_sched_move_nodes - move child nodes to a given parent
2241 * @pi: port information structure
2242 * @parent: pointer to parent node
2243 * @num_items: number of child nodes to be moved
2244 * @list: pointer to child node teids
2246 * This function move the child nodes to a given parent.
2248 static enum ice_status
2249 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2250 u16 num_items, u32 *list)
2252 enum ice_status status = ICE_SUCCESS;
2253 struct ice_aqc_move_elem *buf;
2254 struct ice_sched_node *node;
2255 u16 i, grps_movd = 0;
2261 if (!parent || !num_items)
2262 return ICE_ERR_PARAM;
2264 /* Does parent have enough space */
2265 if (parent->num_children + num_items >
2266 hw->max_children[parent->tx_sched_layer])
2267 return ICE_ERR_AQ_FULL;
2269 buf_len = ice_struct_size(buf, teid, 1);
2270 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);
2272 return ICE_ERR_NO_MEMORY;
2274 for (i = 0; i < num_items; i++) {
2275 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2277 status = ICE_ERR_PARAM;
2281 buf->hdr.src_parent_teid = node->info.parent_teid;
2282 buf->hdr.dest_parent_teid = parent->info.node_teid;
2283 buf->teid[0] = node->info.node_teid;
2284 buf->hdr.num_elems = CPU_TO_LE16(1);
2285 status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,
2287 if (status && grps_movd != 1) {
2288 status = ICE_ERR_CFG;
2292 /* update the SW DB */
2293 ice_sched_update_parent(parent, node);
2302 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2303 * @pi: port information structure
2304 * @vsi_handle: software VSI handle
2305 * @agg_id: aggregator ID
2308 * This function moves a VSI to an aggregator node or its subtree.
2309 * Intermediate nodes may be created if required.
2311 static enum ice_status
2312 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2315 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2316 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2317 u32 first_node_teid, vsi_teid;
2318 enum ice_status status;
2319 u16 num_nodes_added;
2322 tc_node = ice_sched_get_tc_node(pi, tc);
2326 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2328 return ICE_ERR_DOES_NOT_EXIST;
2330 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2332 return ICE_ERR_DOES_NOT_EXIST;
2334 /* Is this VSI already part of given aggregator? */
2335 if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))
2338 aggl = ice_sched_get_agg_layer(pi->hw);
2339 vsil = ice_sched_get_vsi_layer(pi->hw);
2341 /* set intermediate node count to 1 between aggregator and VSI layers */
2342 for (i = aggl + 1; i < vsil; i++)
2345 /* Check if the aggregator subtree has any free node to add the VSI */
2346 for (i = 0; i < agg_node->num_children; i++) {
2347 parent = ice_sched_get_free_vsi_parent(pi->hw,
2348 agg_node->children[i],
2356 for (i = aggl + 1; i < vsil; i++) {
2357 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2361 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2364 /* The newly added node can be a new parent for the next
2367 if (num_nodes_added)
2368 parent = ice_sched_find_node_by_teid(tc_node,
2371 parent = parent->children[0];
2378 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2379 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2383 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2384 * @pi: port information structure
2385 * @agg_info: aggregator info
2386 * @tc: traffic class number
2387 * @rm_vsi_info: true or false
2389 * This function move all the VSI(s) to the default aggregator and delete
2390 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2391 * caller holds the scheduler lock.
2393 static enum ice_status
2394 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2395 struct ice_sched_agg_info *agg_info, u8 tc,
2398 struct ice_sched_agg_vsi_info *agg_vsi_info;
2399 struct ice_sched_agg_vsi_info *tmp;
2400 enum ice_status status = ICE_SUCCESS;
2402 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2403 ice_sched_agg_vsi_info, list_entry) {
2404 u16 vsi_handle = agg_vsi_info->vsi_handle;
2406 /* Move VSI to default aggregator */
2407 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2410 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2411 ICE_DFLT_AGG_ID, tc);
2415 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2416 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2417 LIST_DEL(&agg_vsi_info->list_entry);
2418 ice_free(pi->hw, agg_vsi_info);
2426 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2427 * @pi: port information structure
2428 * @node: node pointer
2430 * This function checks whether the aggregator is attached with any VSI or not.
2433 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2437 vsil = ice_sched_get_vsi_layer(pi->hw);
2438 if (node->tx_sched_layer < vsil - 1) {
2439 for (i = 0; i < node->num_children; i++)
2440 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2444 return node->num_children ? true : false;
2449 * ice_sched_rm_agg_cfg - remove the aggregator node
2450 * @pi: port information structure
2451 * @agg_id: aggregator ID
2454 * This function removes the aggregator node and intermediate nodes if any
2457 static enum ice_status
2458 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2460 struct ice_sched_node *tc_node, *agg_node;
2461 struct ice_hw *hw = pi->hw;
2463 tc_node = ice_sched_get_tc_node(pi, tc);
2467 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2469 return ICE_ERR_DOES_NOT_EXIST;
2471 /* Can't remove the aggregator node if it has children */
2472 if (ice_sched_is_agg_inuse(pi, agg_node))
2473 return ICE_ERR_IN_USE;
2475 /* need to remove the whole subtree if aggregator node is the
2478 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2479 struct ice_sched_node *parent = agg_node->parent;
2484 if (parent->num_children > 1)
2490 ice_free_sched_node(pi, agg_node);
2495 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2496 * @pi: port information structure
2497 * @agg_info: aggregator ID
2499 * @rm_vsi_info: bool value true or false
2501 * This function removes aggregator reference to VSI of given TC. It removes
2502 * the aggregator configuration completely for requested TC. The caller needs
2503 * to hold the scheduler lock.
2505 static enum ice_status
2506 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2507 u8 tc, bool rm_vsi_info)
2509 enum ice_status status = ICE_SUCCESS;
2511 /* If nothing to remove - return success */
2512 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2513 goto exit_rm_agg_cfg_tc;
2515 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2517 goto exit_rm_agg_cfg_tc;
2519 /* Delete aggregator node(s) */
2520 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2522 goto exit_rm_agg_cfg_tc;
2524 ice_clear_bit(tc, agg_info->tc_bitmap);
2530 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2531 * @pi: port information structure
2532 * @agg_id: aggregator ID
2533 * @tc_bitmap: 8 bits TC bitmap
2535 * Save aggregator TC bitmap. This function needs to be called with scheduler
2538 static enum ice_status
2539 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2540 ice_bitmap_t *tc_bitmap)
2542 struct ice_sched_agg_info *agg_info;
2544 agg_info = ice_get_agg_info(pi->hw, agg_id);
2546 return ICE_ERR_PARAM;
2547 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2548 ICE_MAX_TRAFFIC_CLASS);
2553 * ice_sched_add_agg_cfg - create an aggregator node
2554 * @pi: port information structure
2555 * @agg_id: aggregator ID
2558 * This function creates an aggregator node and intermediate nodes if required
2561 static enum ice_status
2562 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2564 struct ice_sched_node *parent, *agg_node, *tc_node;
2565 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2566 enum ice_status status = ICE_SUCCESS;
2567 struct ice_hw *hw = pi->hw;
2568 u32 first_node_teid;
2569 u16 num_nodes_added;
2572 tc_node = ice_sched_get_tc_node(pi, tc);
2576 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2577 /* Does Agg node already exist ? */
2581 aggl = ice_sched_get_agg_layer(hw);
2583 /* need one node in Agg layer */
2584 num_nodes[aggl] = 1;
2586 /* Check whether the intermediate nodes have space to add the
2587 * new aggregator. If they are full, then SW needs to allocate a new
2588 * intermediate node on those layers
2590 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2591 parent = ice_sched_get_first_node(pi, tc_node, i);
2593 /* scan all the siblings */
2595 if (parent->num_children < hw->max_children[i])
2597 parent = parent->sibling;
2600 /* all the nodes are full, reserve one for this layer */
2605 /* add the aggregator node */
2607 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2611 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2615 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2618 /* The newly added node can be a new parent for the next
2621 if (num_nodes_added) {
2622 parent = ice_sched_find_node_by_teid(tc_node,
2624 /* register aggregator ID with the aggregator node */
2625 if (parent && i == aggl)
2626 parent->agg_id = agg_id;
2628 parent = parent->children[0];
2636 * ice_sched_cfg_agg - configure aggregator node
2637 * @pi: port information structure
2638 * @agg_id: aggregator ID
2639 * @agg_type: aggregator type queue, VSI, or aggregator group
2640 * @tc_bitmap: bits TC bitmap
2642 * It registers a unique aggregator node into scheduler services. It
2643 * allows a user to register with a unique ID to track it's resources.
2644 * The aggregator type determines if this is a queue group, VSI group
2645 * or aggregator group. It then creates the aggregator node(s) for requested
2646 * TC(s) or removes an existing aggregator node including its configuration
2647 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2648 * resources and remove aggregator ID.
2649 * This function needs to be called with scheduler lock held.
2651 static enum ice_status
2652 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2653 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2655 struct ice_sched_agg_info *agg_info;
2656 enum ice_status status = ICE_SUCCESS;
2657 struct ice_hw *hw = pi->hw;
2660 agg_info = ice_get_agg_info(hw, agg_id);
2662 /* Create new entry for new aggregator ID */
2663 agg_info = (struct ice_sched_agg_info *)
2664 ice_malloc(hw, sizeof(*agg_info));
2666 status = ICE_ERR_NO_MEMORY;
2669 agg_info->agg_id = agg_id;
2670 agg_info->agg_type = agg_type;
2671 agg_info->tc_bitmap[0] = 0;
2673 /* Initialize the aggregator VSI list head */
2674 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2676 /* Add new entry in aggregator list */
2677 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2679 /* Create aggregator node(s) for requested TC(s) */
2680 ice_for_each_traffic_class(tc) {
2681 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2682 /* Delete aggregator cfg TC if it exists previously */
2683 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2689 /* Check if aggregator node for TC already exists */
2690 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2693 /* Create new aggregator node for TC */
2694 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2698 /* Save aggregator node's TC information */
2699 ice_set_bit(tc, agg_info->tc_bitmap);
2706 * ice_cfg_agg - config aggregator node
2707 * @pi: port information structure
2708 * @agg_id: aggregator ID
2709 * @agg_type: aggregator type queue, VSI, or aggregator group
2710 * @tc_bitmap: bits TC bitmap
2712 * This function configures aggregator node(s).
2715 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2718 ice_bitmap_t bitmap = tc_bitmap;
2719 enum ice_status status;
2721 ice_acquire_lock(&pi->sched_lock);
2722 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2723 (ice_bitmap_t *)&bitmap);
2725 status = ice_save_agg_tc_bitmap(pi, agg_id,
2726 (ice_bitmap_t *)&bitmap);
2727 ice_release_lock(&pi->sched_lock);
2732 * ice_get_agg_vsi_info - get the aggregator ID
2733 * @agg_info: aggregator info
2734 * @vsi_handle: software VSI handle
2736 * The function returns aggregator VSI info based on VSI handle. This function
2737 * needs to be called with scheduler lock held.
2739 static struct ice_sched_agg_vsi_info *
2740 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2742 struct ice_sched_agg_vsi_info *agg_vsi_info;
2744 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2745 ice_sched_agg_vsi_info, list_entry)
2746 if (agg_vsi_info->vsi_handle == vsi_handle)
2747 return agg_vsi_info;
2753 * ice_get_vsi_agg_info - get the aggregator info of VSI
2754 * @hw: pointer to the hardware structure
2755 * @vsi_handle: Sw VSI handle
2757 * The function returns aggregator info of VSI represented via vsi_handle. The
2758 * VSI has in this case a different aggregator than the default one. This
2759 * function needs to be called with scheduler lock held.
2761 static struct ice_sched_agg_info *
2762 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2764 struct ice_sched_agg_info *agg_info;
2766 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2768 struct ice_sched_agg_vsi_info *agg_vsi_info;
2770 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2778 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2779 * @pi: port information structure
2780 * @agg_id: aggregator ID
2781 * @vsi_handle: software VSI handle
2782 * @tc_bitmap: TC bitmap of enabled TC(s)
2784 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2787 static enum ice_status
2788 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2789 ice_bitmap_t *tc_bitmap)
2791 struct ice_sched_agg_vsi_info *agg_vsi_info;
2792 struct ice_sched_agg_info *agg_info;
2794 agg_info = ice_get_agg_info(pi->hw, agg_id);
2796 return ICE_ERR_PARAM;
2797 /* check if entry already exist */
2798 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2800 return ICE_ERR_PARAM;
2801 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2802 ICE_MAX_TRAFFIC_CLASS);
2807 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2808 * @pi: port information structure
2809 * @agg_id: aggregator ID
2810 * @vsi_handle: software VSI handle
2811 * @tc_bitmap: TC bitmap of enabled TC(s)
2813 * This function moves VSI to a new or default aggregator node. If VSI is
2814 * already associated to the aggregator node then no operation is performed on
2815 * the tree. This function needs to be called with scheduler lock held.
2817 static enum ice_status
2818 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2819 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2821 struct ice_sched_agg_vsi_info *agg_vsi_info;
2822 struct ice_sched_agg_info *agg_info;
2823 enum ice_status status = ICE_SUCCESS;
2824 struct ice_hw *hw = pi->hw;
2827 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2828 return ICE_ERR_PARAM;
2829 agg_info = ice_get_agg_info(hw, agg_id);
2831 return ICE_ERR_PARAM;
2832 /* check if entry already exist */
2833 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2834 if (!agg_vsi_info) {
2835 /* Create new entry for VSI under aggregator list */
2836 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2837 ice_malloc(hw, sizeof(*agg_vsi_info));
2839 return ICE_ERR_PARAM;
2841 /* add VSI ID into the aggregator list */
2842 agg_vsi_info->vsi_handle = vsi_handle;
2843 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2845 /* Move VSI node to new aggregator node for requested TC(s) */
2846 ice_for_each_traffic_class(tc) {
2847 if (!ice_is_tc_ena(*tc_bitmap, tc))
2850 /* Move VSI to new aggregator */
2851 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2855 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2861 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2862 * @hw: pointer to the hardware structure
2864 * This function removes unused rate limit profiles from the HW and
2865 * SW DB. The caller needs to hold scheduler lock.
2867 static void ice_sched_rm_unused_rl_prof(struct ice_hw *hw)
2871 for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
2872 struct ice_aqc_rl_profile_info *rl_prof_elem;
2873 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2875 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2876 &hw->rl_prof_list[ln],
2877 ice_aqc_rl_profile_info, list_entry) {
2878 if (!ice_sched_del_rl_profile(hw, rl_prof_elem))
2879 ice_debug(hw, ICE_DBG_SCHED, "Removed rl profile\n");
2885 * ice_sched_update_elem - update element
2886 * @hw: pointer to the HW struct
2887 * @node: pointer to node
2888 * @info: node info to update
2890 * Update the HW DB, and local SW DB of node. Update the scheduling
2891 * parameters of node from argument info data buffer (Info->data buf) and
2892 * returns success or error on config sched element failure. The caller
2893 * needs to hold scheduler lock.
2895 static enum ice_status
2896 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2897 struct ice_aqc_txsched_elem_data *info)
2899 struct ice_aqc_txsched_elem_data buf;
2900 enum ice_status status;
2905 /* Parent TEID is reserved field in this aq call */
2906 buf.parent_teid = 0;
2907 /* Element type is reserved field in this aq call */
2908 buf.data.elem_type = 0;
2909 /* Flags is reserved field in this aq call */
2913 /* Configure element node */
2914 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2916 if (status || elem_cfgd != num_elems) {
2917 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2921 /* Config success case */
2922 /* Now update local SW DB */
2923 /* Only copy the data portion of info buffer */
2924 node->info.data = info->data;
2929 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2930 * @hw: pointer to the HW struct
2931 * @node: sched node to configure
2932 * @rl_type: rate limit type CIR, EIR, or shared
2933 * @bw_alloc: BW weight/allocation
2935 * This function configures node element's BW allocation.
2937 static enum ice_status
2938 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2939 enum ice_rl_type rl_type, u16 bw_alloc)
2941 struct ice_aqc_txsched_elem_data buf;
2942 struct ice_aqc_txsched_elem *data;
2943 enum ice_status status;
2947 if (rl_type == ICE_MIN_BW) {
2948 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2949 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2950 } else if (rl_type == ICE_MAX_BW) {
2951 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2952 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2954 return ICE_ERR_PARAM;
2957 /* Configure element */
2958 status = ice_sched_update_elem(hw, node, &buf);
2963 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2964 * @pi: port information structure
2965 * @agg_id: aggregator ID
2966 * @vsi_handle: software VSI handle
2967 * @tc_bitmap: TC bitmap of enabled TC(s)
2969 * Move or associate VSI to a new or default aggregator node.
2972 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2975 ice_bitmap_t bitmap = tc_bitmap;
2976 enum ice_status status;
2978 ice_acquire_lock(&pi->sched_lock);
2979 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2980 (ice_bitmap_t *)&bitmap);
2982 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2983 (ice_bitmap_t *)&bitmap);
2984 ice_release_lock(&pi->sched_lock);
2989 * ice_rm_agg_cfg - remove aggregator configuration
2990 * @pi: port information structure
2991 * @agg_id: aggregator ID
2993 * This function removes aggregator reference to VSI and delete aggregator ID
2994 * info. It removes the aggregator configuration completely.
2996 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
2998 struct ice_sched_agg_info *agg_info;
2999 enum ice_status status = ICE_SUCCESS;
3002 ice_acquire_lock(&pi->sched_lock);
3003 agg_info = ice_get_agg_info(pi->hw, agg_id);
3005 status = ICE_ERR_DOES_NOT_EXIST;
3006 goto exit_ice_rm_agg_cfg;
3009 ice_for_each_traffic_class(tc) {
3010 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
3012 goto exit_ice_rm_agg_cfg;
3015 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
3016 status = ICE_ERR_IN_USE;
3017 goto exit_ice_rm_agg_cfg;
3020 /* Safe to delete entry now */
3021 LIST_DEL(&agg_info->list_entry);
3022 ice_free(pi->hw, agg_info);
3024 /* Remove unused RL profile IDs from HW and SW DB */
3025 ice_sched_rm_unused_rl_prof(pi->hw);
3027 exit_ice_rm_agg_cfg:
3028 ice_release_lock(&pi->sched_lock);
3033 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
3034 * @bw_t_info: bandwidth type information structure
3035 * @bw_alloc: Bandwidth allocation information
3037 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
3041 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3043 bw_t_info->cir_bw.bw_alloc = bw_alloc;
3044 if (bw_t_info->cir_bw.bw_alloc)
3045 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3047 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3051 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
3052 * @bw_t_info: bandwidth type information structure
3053 * @bw_alloc: Bandwidth allocation information
3055 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
3059 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3061 bw_t_info->eir_bw.bw_alloc = bw_alloc;
3062 if (bw_t_info->eir_bw.bw_alloc)
3063 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3065 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3069 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3070 * @pi: port information structure
3071 * @vsi_handle: sw VSI handle
3072 * @tc: traffic class
3073 * @rl_type: rate limit type min or max
3074 * @bw_alloc: Bandwidth allocation information
3076 * Save BW alloc information of VSI type node for post replay use.
3078 static enum ice_status
3079 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3080 enum ice_rl_type rl_type, u16 bw_alloc)
3082 struct ice_vsi_ctx *vsi_ctx;
3084 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3085 return ICE_ERR_PARAM;
3086 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3088 return ICE_ERR_PARAM;
3091 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3095 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3099 return ICE_ERR_PARAM;
3105 * ice_set_clear_cir_bw - set or clear CIR BW
3106 * @bw_t_info: bandwidth type information structure
3107 * @bw: bandwidth in Kbps - Kilo bits per sec
3109 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3111 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3113 if (bw == ICE_SCHED_DFLT_BW) {
3114 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3115 bw_t_info->cir_bw.bw = 0;
3117 /* Save type of BW information */
3118 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3119 bw_t_info->cir_bw.bw = bw;
3124 * ice_set_clear_eir_bw - set or clear EIR BW
3125 * @bw_t_info: bandwidth type information structure
3126 * @bw: bandwidth in Kbps - Kilo bits per sec
3128 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3130 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3132 if (bw == ICE_SCHED_DFLT_BW) {
3133 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3134 bw_t_info->eir_bw.bw = 0;
3136 /* EIR BW and Shared BW profiles are mutually exclusive and
3137 * hence only one of them may be set for any given element.
3138 * First clear earlier saved shared BW information.
3140 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3141 bw_t_info->shared_bw = 0;
3142 /* save EIR BW information */
3143 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3144 bw_t_info->eir_bw.bw = bw;
3149 * ice_set_clear_shared_bw - set or clear shared BW
3150 * @bw_t_info: bandwidth type information structure
3151 * @bw: bandwidth in Kbps - Kilo bits per sec
3153 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3155 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3157 if (bw == ICE_SCHED_DFLT_BW) {
3158 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3159 bw_t_info->shared_bw = 0;
3161 /* EIR BW and Shared BW profiles are mutually exclusive and
3162 * hence only one of them may be set for any given element.
3163 * First clear earlier saved EIR BW information.
3165 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3166 bw_t_info->eir_bw.bw = 0;
3167 /* save shared BW information */
3168 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3169 bw_t_info->shared_bw = bw;
3174 * ice_sched_save_vsi_bw - save VSI node's BW information
3175 * @pi: port information structure
3176 * @vsi_handle: sw VSI handle
3177 * @tc: traffic class
3178 * @rl_type: rate limit type min, max, or shared
3179 * @bw: bandwidth in Kbps - Kilo bits per sec
3181 * Save BW information of VSI type node for post replay use.
3183 static enum ice_status
3184 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3185 enum ice_rl_type rl_type, u32 bw)
3187 struct ice_vsi_ctx *vsi_ctx;
3189 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3190 return ICE_ERR_PARAM;
3191 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3193 return ICE_ERR_PARAM;
3196 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3199 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3202 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3205 return ICE_ERR_PARAM;
3211 * ice_set_clear_prio - set or clear priority information
3212 * @bw_t_info: bandwidth type information structure
3213 * @prio: priority to save
3215 * Save or clear priority (prio) in the passed param bw_t_info.
3217 static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3219 bw_t_info->generic = prio;
3220 if (bw_t_info->generic)
3221 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3223 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3227 * ice_sched_save_vsi_prio - save VSI node's priority information
3228 * @pi: port information structure
3229 * @vsi_handle: Software VSI handle
3230 * @tc: traffic class
3231 * @prio: priority to save
3233 * Save priority information of VSI type node for post replay use.
3235 static enum ice_status
3236 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3239 struct ice_vsi_ctx *vsi_ctx;
3241 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3242 return ICE_ERR_PARAM;
3243 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3245 return ICE_ERR_PARAM;
3246 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3247 return ICE_ERR_PARAM;
3248 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3253 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3254 * @pi: port information structure
3255 * @agg_id: node aggregator ID
3256 * @tc: traffic class
3257 * @rl_type: rate limit type min or max
3258 * @bw_alloc: bandwidth alloc information
3260 * Save BW alloc information of AGG type node for post replay use.
3262 static enum ice_status
3263 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3264 enum ice_rl_type rl_type, u16 bw_alloc)
3266 struct ice_sched_agg_info *agg_info;
3268 agg_info = ice_get_agg_info(pi->hw, agg_id);
3270 return ICE_ERR_PARAM;
3271 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3272 return ICE_ERR_PARAM;
3275 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3278 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3281 return ICE_ERR_PARAM;
3287 * ice_sched_save_agg_bw - save aggregator node's BW information
3288 * @pi: port information structure
3289 * @agg_id: node aggregator ID
3290 * @tc: traffic class
3291 * @rl_type: rate limit type min, max, or shared
3292 * @bw: bandwidth in Kbps - Kilo bits per sec
3294 * Save BW information of AGG type node for post replay use.
3296 static enum ice_status
3297 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3298 enum ice_rl_type rl_type, u32 bw)
3300 struct ice_sched_agg_info *agg_info;
3302 agg_info = ice_get_agg_info(pi->hw, agg_id);
3304 return ICE_ERR_PARAM;
3305 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3306 return ICE_ERR_PARAM;
3309 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3312 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3315 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3318 return ICE_ERR_PARAM;
3324 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3325 * @pi: port information structure
3326 * @vsi_handle: software VSI handle
3327 * @tc: traffic class
3328 * @rl_type: min or max
3329 * @bw: bandwidth in Kbps
3331 * This function configures BW limit of VSI scheduling node based on TC
3335 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3336 enum ice_rl_type rl_type, u32 bw)
3338 enum ice_status status;
3340 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3344 ice_acquire_lock(&pi->sched_lock);
3345 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3346 ice_release_lock(&pi->sched_lock);
3352 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3353 * @pi: port information structure
3354 * @vsi_handle: software VSI handle
3355 * @tc: traffic class
3356 * @rl_type: min or max
3358 * This function configures default BW limit of VSI scheduling node based on TC
3362 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3363 enum ice_rl_type rl_type)
3365 enum ice_status status;
3367 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3372 ice_acquire_lock(&pi->sched_lock);
3373 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3375 ice_release_lock(&pi->sched_lock);
3381 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3382 * @pi: port information structure
3383 * @agg_id: aggregator ID
3384 * @tc: traffic class
3385 * @rl_type: min or max
3386 * @bw: bandwidth in Kbps
3388 * This function applies BW limit to aggregator scheduling node based on TC
3392 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3393 enum ice_rl_type rl_type, u32 bw)
3395 enum ice_status status;
3397 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3400 ice_acquire_lock(&pi->sched_lock);
3401 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3402 ice_release_lock(&pi->sched_lock);
3408 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3409 * @pi: port information structure
3410 * @agg_id: aggregator ID
3411 * @tc: traffic class
3412 * @rl_type: min or max
3414 * This function applies default BW limit to aggregator scheduling node based
3415 * on TC information.
3418 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3419 enum ice_rl_type rl_type)
3421 enum ice_status status;
3423 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3427 ice_acquire_lock(&pi->sched_lock);
3428 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3430 ice_release_lock(&pi->sched_lock);
3436 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3437 * @pi: port information structure
3438 * @vsi_handle: software VSI handle
3439 * @bw: bandwidth in Kbps
3441 * This function Configures shared rate limiter(SRL) of all VSI type nodes
3442 * across all traffic classes for VSI matching handle.
3445 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
3447 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
3451 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3452 * @pi: port information structure
3453 * @vsi_handle: software VSI handle
3455 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3456 * across all traffic classes for VSI matching handle.
3459 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3461 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3466 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3467 * @pi: port information structure
3468 * @agg_id: aggregator ID
3469 * @bw: bandwidth in Kbps
3471 * This function configures the shared rate limiter(SRL) of all aggregator type
3472 * nodes across all traffic classes for aggregator matching agg_id.
3475 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
3477 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
3481 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3482 * @pi: port information structure
3483 * @agg_id: aggregator ID
3485 * This function removes the shared rate limiter(SRL) of all aggregator type
3486 * nodes across all traffic classes for aggregator matching agg_id.
3489 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3491 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
3495 * ice_config_vsi_queue_priority - config VSI queue priority of node
3496 * @pi: port information structure
3497 * @num_qs: number of VSI queues
3498 * @q_ids: queue IDs array
3499 * @q_prio: queue priority array
3501 * This function configures the queue node priority (Sibling Priority) of the
3502 * passed in VSI's queue(s) for a given traffic class (TC).
3505 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3508 enum ice_status status = ICE_ERR_PARAM;
3511 ice_acquire_lock(&pi->sched_lock);
3513 for (i = 0; i < num_qs; i++) {
3514 struct ice_sched_node *node;
3516 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3517 if (!node || node->info.data.elem_type !=
3518 ICE_AQC_ELEM_TYPE_LEAF) {
3519 status = ICE_ERR_PARAM;
3522 /* Configure Priority */
3523 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3528 ice_release_lock(&pi->sched_lock);
3533 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3534 * @pi: port information structure
3535 * @agg_id: Aggregator ID
3536 * @num_vsis: number of VSI(s)
3537 * @vsi_handle_arr: array of software VSI handles
3538 * @node_prio: pointer to node priority
3539 * @tc: traffic class
3541 * This function configures the node priority (Sibling Priority) of the
3542 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3545 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3546 u16 num_vsis, u16 *vsi_handle_arr,
3547 u8 *node_prio, u8 tc)
3549 struct ice_sched_agg_vsi_info *agg_vsi_info;
3550 struct ice_sched_node *tc_node, *agg_node;
3551 enum ice_status status = ICE_ERR_PARAM;
3552 struct ice_sched_agg_info *agg_info;
3553 bool agg_id_present = false;
3554 struct ice_hw *hw = pi->hw;
3557 ice_acquire_lock(&pi->sched_lock);
3558 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3560 if (agg_info->agg_id == agg_id) {
3561 agg_id_present = true;
3564 if (!agg_id_present)
3565 goto exit_agg_priority_per_tc;
3567 tc_node = ice_sched_get_tc_node(pi, tc);
3569 goto exit_agg_priority_per_tc;
3571 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3573 goto exit_agg_priority_per_tc;
3575 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3576 goto exit_agg_priority_per_tc;
3578 for (i = 0; i < num_vsis; i++) {
3579 struct ice_sched_node *vsi_node;
3580 bool vsi_handle_valid = false;
3583 status = ICE_ERR_PARAM;
3584 vsi_handle = vsi_handle_arr[i];
3585 if (!ice_is_vsi_valid(hw, vsi_handle))
3586 goto exit_agg_priority_per_tc;
3587 /* Verify child nodes before applying settings */
3588 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3589 ice_sched_agg_vsi_info, list_entry)
3590 if (agg_vsi_info->vsi_handle == vsi_handle) {
3591 /* cppcheck-suppress unreadVariable */
3592 vsi_handle_valid = true;
3596 if (!vsi_handle_valid)
3597 goto exit_agg_priority_per_tc;
3599 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3601 goto exit_agg_priority_per_tc;
3603 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3604 /* Configure Priority */
3605 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3609 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3616 exit_agg_priority_per_tc:
3617 ice_release_lock(&pi->sched_lock);
3622 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3623 * @pi: port information structure
3624 * @vsi_handle: software VSI handle
3625 * @ena_tcmap: enabled TC map
3626 * @rl_type: Rate limit type CIR/EIR
3627 * @bw_alloc: Array of BW alloc
3629 * This function configures the BW allocation of the passed in VSI's
3630 * node(s) for enabled traffic class.
3633 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3634 enum ice_rl_type rl_type, u8 *bw_alloc)
3636 enum ice_status status = ICE_SUCCESS;
3639 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3640 return ICE_ERR_PARAM;
3642 ice_acquire_lock(&pi->sched_lock);
3644 /* Return success if no nodes are present across TC */
3645 ice_for_each_traffic_class(tc) {
3646 struct ice_sched_node *tc_node, *vsi_node;
3648 if (!ice_is_tc_ena(ena_tcmap, tc))
3651 tc_node = ice_sched_get_tc_node(pi, tc);
3655 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3659 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3663 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3664 rl_type, bw_alloc[tc]);
3669 ice_release_lock(&pi->sched_lock);
3674 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3675 * @pi: port information structure
3676 * @agg_id: aggregator ID
3677 * @ena_tcmap: enabled TC map
3678 * @rl_type: rate limit type CIR/EIR
3679 * @bw_alloc: array of BW alloc
3681 * This function configures the BW allocation of passed in aggregator for
3682 * enabled traffic class(s).
3685 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3686 enum ice_rl_type rl_type, u8 *bw_alloc)
3688 struct ice_sched_agg_info *agg_info;
3689 bool agg_id_present = false;
3690 enum ice_status status = ICE_SUCCESS;
3691 struct ice_hw *hw = pi->hw;
3694 ice_acquire_lock(&pi->sched_lock);
3695 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3697 if (agg_info->agg_id == agg_id) {
3698 agg_id_present = true;
3701 if (!agg_id_present) {
3702 status = ICE_ERR_PARAM;
3703 goto exit_cfg_agg_bw_alloc;
3706 /* Return success if no nodes are present across TC */
3707 ice_for_each_traffic_class(tc) {
3708 struct ice_sched_node *tc_node, *agg_node;
3710 if (!ice_is_tc_ena(ena_tcmap, tc))
3713 tc_node = ice_sched_get_tc_node(pi, tc);
3717 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3721 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3725 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3731 exit_cfg_agg_bw_alloc:
3732 ice_release_lock(&pi->sched_lock);
3737 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3738 * @hw: pointer to the HW struct
3739 * @bw: bandwidth in Kbps
3741 * This function calculates the wakeup parameter of RL profile.
3743 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3745 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3749 /* Get the wakeup integer value */
3750 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3751 wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
3752 if (wakeup_int > 63) {
3753 wakeup = (u16)((1 << 15) | wakeup_int);
3755 /* Calculate fraction value up to 4 decimals
3756 * Convert Integer value to a constant multiplier
3758 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3759 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3760 hw->psm_clk_freq, bytes_per_sec);
3762 /* Get Fraction value */
3763 wakeup_f = wakeup_a - wakeup_b;
3765 /* Round up the Fractional value via Ceil(Fractional value) */
3766 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3769 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3770 ICE_RL_PROF_MULTIPLIER);
3771 wakeup |= (u16)(wakeup_int << 9);
3772 wakeup |= (u16)(0x1ff & wakeup_f_int);
3779 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3780 * @hw: pointer to the HW struct
3781 * @bw: bandwidth in Kbps
3782 * @profile: profile parameters to return
3784 * This function converts the BW to profile structure format.
3786 static enum ice_status
3787 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3788 struct ice_aqc_rl_profile_elem *profile)
3790 enum ice_status status = ICE_ERR_PARAM;
3791 s64 bytes_per_sec, ts_rate, mv_tmp;
3797 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3798 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3801 /* Bytes per second from Kbps */
3802 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3804 /* encode is 6 bits but really useful are 5 bits */
3805 for (i = 0; i < 64; i++) {
3806 u64 pow_result = BIT_ULL(i);
3808 ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
3809 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3813 /* Multiplier value */
3814 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3817 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3818 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3820 /* First multiplier value greater than the given
3823 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3832 wm = ice_sched_calc_wakeup(hw, bw);
3833 profile->rl_multiply = CPU_TO_LE16(mv);
3834 profile->wake_up_calc = CPU_TO_LE16(wm);
3835 profile->rl_encode = CPU_TO_LE16(encode);
3836 status = ICE_SUCCESS;
3838 status = ICE_ERR_DOES_NOT_EXIST;
3845 * ice_sched_add_rl_profile - add RL profile
3846 * @hw: pointer to the hardware structure
3847 * @rl_type: type of rate limit BW - min, max, or shared
3848 * @bw: bandwidth in Kbps - Kilo bits per sec
3849 * @layer_num: specifies in which layer to create profile
3851 * This function first checks the existing list for corresponding BW
3852 * parameter. If it exists, it returns the associated profile otherwise
3853 * it creates a new rate limit profile for requested BW, and adds it to
3854 * the HW DB and local list. It returns the new profile or null on error.
3855 * The caller needs to hold the scheduler lock.
3857 static struct ice_aqc_rl_profile_info *
3858 ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,
3859 u32 bw, u8 layer_num)
3861 struct ice_aqc_rl_profile_info *rl_prof_elem;
3862 u16 profiles_added = 0, num_profiles = 1;
3863 struct ice_aqc_rl_profile_elem *buf;
3864 enum ice_status status;
3867 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3871 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3874 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3877 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3885 LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
3886 ice_aqc_rl_profile_info, list_entry)
3887 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
3888 profile_type && rl_prof_elem->bw == bw)
3889 /* Return existing profile ID info */
3890 return rl_prof_elem;
3892 /* Create new profile ID */
3893 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3894 ice_malloc(hw, sizeof(*rl_prof_elem));
3899 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
3900 if (status != ICE_SUCCESS)
3901 goto exit_add_rl_prof;
3903 rl_prof_elem->bw = bw;
3904 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3905 rl_prof_elem->profile.level = layer_num + 1;
3906 rl_prof_elem->profile.flags = profile_type;
3907 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3909 /* Create new entry in HW DB */
3910 buf = &rl_prof_elem->profile;
3911 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3912 &profiles_added, NULL);
3913 if (status || profiles_added != num_profiles)
3914 goto exit_add_rl_prof;
3916 /* Good entry - add in the list */
3917 rl_prof_elem->prof_id_ref = 0;
3918 LIST_ADD(&rl_prof_elem->list_entry, &hw->rl_prof_list[layer_num]);
3919 return rl_prof_elem;
3922 ice_free(hw, rl_prof_elem);
3927 * ice_sched_cfg_node_bw_lmt - configure node sched params
3928 * @hw: pointer to the HW struct
3929 * @node: sched node to configure
3930 * @rl_type: rate limit type CIR, EIR, or shared
3931 * @rl_prof_id: rate limit profile ID
3933 * This function configures node element's BW limit.
3935 static enum ice_status
3936 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3937 enum ice_rl_type rl_type, u16 rl_prof_id)
3939 struct ice_aqc_txsched_elem_data buf;
3940 struct ice_aqc_txsched_elem *data;
3946 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3947 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3950 /* EIR BW and Shared BW profiles are mutually exclusive and
3951 * hence only one of them may be set for any given element
3953 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3955 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3956 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3959 /* Check for removing shared BW */
3960 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3961 /* remove shared profile */
3962 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3963 data->srl_id = 0; /* clear SRL field */
3965 /* enable back EIR to default profile */
3966 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3967 data->eir_bw.bw_profile_idx =
3968 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3971 /* EIR BW and Shared BW profiles are mutually exclusive and
3972 * hence only one of them may be set for any given element
3974 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3975 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3976 ICE_SCHED_DFLT_RL_PROF_ID))
3978 /* EIR BW is set to default, disable it */
3979 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3980 /* Okay to enable shared BW now */
3981 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
3982 data->srl_id = CPU_TO_LE16(rl_prof_id);
3985 /* Unknown rate limit type */
3986 return ICE_ERR_PARAM;
3989 /* Configure element */
3990 return ice_sched_update_elem(hw, node, &buf);
3994 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
3996 * @rl_type: rate limit type
3998 * If existing profile matches, it returns the corresponding rate
3999 * limit profile ID, otherwise it returns an invalid ID as error.
4002 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
4003 enum ice_rl_type rl_type)
4005 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
4006 struct ice_aqc_txsched_elem *data;
4008 data = &node->info.data;
4011 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
4012 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
4015 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
4016 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
4019 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
4020 rl_prof_id = LE16_TO_CPU(data->srl_id);
4030 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
4031 * @pi: port information structure
4032 * @rl_type: type of rate limit BW - min, max, or shared
4033 * @layer_index: layer index
4035 * This function returns requested profile creation layer.
4038 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
4041 struct ice_hw *hw = pi->hw;
4043 if (layer_index >= hw->num_tx_sched_layers)
4044 return ICE_SCHED_INVAL_LAYER_NUM;
4047 if (hw->layer_info[layer_index].max_cir_rl_profiles)
4051 if (hw->layer_info[layer_index].max_eir_rl_profiles)
4055 /* if current layer doesn't support SRL profile creation
4056 * then try a layer up or down.
4058 if (hw->layer_info[layer_index].max_srl_profiles)
4060 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4061 hw->layer_info[layer_index + 1].max_srl_profiles)
4062 return layer_index + 1;
4063 else if (layer_index > 0 &&
4064 hw->layer_info[layer_index - 1].max_srl_profiles)
4065 return layer_index - 1;
4070 return ICE_SCHED_INVAL_LAYER_NUM;
4074 * ice_sched_get_srl_node - get shared rate limit node
4076 * @srl_layer: shared rate limit layer
4078 * This function returns SRL node to be used for shared rate limit purpose.
4079 * The caller needs to hold scheduler lock.
4081 static struct ice_sched_node *
4082 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4084 if (srl_layer > node->tx_sched_layer)
4085 return node->children[0];
4086 else if (srl_layer < node->tx_sched_layer)
4087 /* Node can't be created without a parent. It will always
4088 * have a valid parent except root node.
4090 return node->parent;
4096 * ice_sched_rm_rl_profile - remove RL profile ID
4097 * @hw: pointer to the hardware structure
4098 * @layer_num: layer number where profiles are saved
4099 * @profile_type: profile type like EIR, CIR, or SRL
4100 * @profile_id: profile ID to remove
4102 * This function removes rate limit profile from layer 'layer_num' of type
4103 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4106 static enum ice_status
4107 ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,
4110 struct ice_aqc_rl_profile_info *rl_prof_elem;
4111 enum ice_status status = ICE_SUCCESS;
4113 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4114 return ICE_ERR_PARAM;
4115 /* Check the existing list for RL profile */
4116 LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
4117 ice_aqc_rl_profile_info, list_entry)
4118 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
4120 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4122 if (rl_prof_elem->prof_id_ref)
4123 rl_prof_elem->prof_id_ref--;
4125 /* Remove old profile ID from database */
4126 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
4127 if (status && status != ICE_ERR_IN_USE)
4128 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
4131 if (status == ICE_ERR_IN_USE)
4132 status = ICE_SUCCESS;
4137 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4138 * @pi: port information structure
4139 * @node: pointer to node structure
4140 * @rl_type: rate limit type min, max, or shared
4141 * @layer_num: layer number where RL profiles are saved
4143 * This function configures node element's BW rate limit profile ID of
4144 * type CIR, EIR, or SRL to default. This function needs to be called
4145 * with the scheduler lock held.
4147 static enum ice_status
4148 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4149 struct ice_sched_node *node,
4150 enum ice_rl_type rl_type, u8 layer_num)
4152 enum ice_status status;
4161 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4162 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4165 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4166 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4169 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4170 /* No SRL is configured for default case */
4171 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4174 return ICE_ERR_PARAM;
4176 /* Save existing RL prof ID for later clean up */
4177 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4178 /* Configure BW scheduling parameters */
4179 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4183 /* Remove stale RL profile ID */
4184 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4185 old_id == ICE_SCHED_INVAL_PROF_ID)
4188 return ice_sched_rm_rl_profile(hw, layer_num, profile_type, old_id);
4192 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
4193 * @pi: port information structure
4194 * @node: pointer to node structure
4195 * @layer_num: layer number where rate limit profiles are saved
4196 * @rl_type: rate limit type min, max, or shared
4197 * @bw: bandwidth value
4199 * This function prepares node element's bandwidth to SRL or EIR exclusively.
4200 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
4201 * them may be set for any given element. This function needs to be called
4202 * with the scheduler lock held.
4204 static enum ice_status
4205 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
4206 struct ice_sched_node *node,
4207 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
4209 if (rl_type == ICE_SHARED_BW) {
4210 /* SRL node passed in this case, it may be different node */
4211 if (bw == ICE_SCHED_DFLT_BW)
4212 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
4213 * enables EIR to default. EIR is not set in this
4214 * case, so no additional action is required.
4218 /* SRL being configured, set EIR to default here.
4219 * ice_sched_cfg_node_bw_lmt() disables EIR when it
4222 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
4224 } else if (rl_type == ICE_MAX_BW &&
4225 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
4226 /* Remove Shared profile. Set default shared BW call
4227 * removes shared profile for a node.
4229 return ice_sched_set_node_bw_dflt(pi, node,
4237 * ice_sched_set_node_bw - set node's bandwidth
4238 * @pi: port information structure
4240 * @rl_type: rate limit type min, max, or shared
4241 * @bw: bandwidth in Kbps - Kilo bits per sec
4242 * @layer_num: layer number
4244 * This function adds new profile corresponding to requested BW, configures
4245 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4246 * ID from local database. The caller needs to hold scheduler lock.
4248 static enum ice_status
4249 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4250 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4252 struct ice_aqc_rl_profile_info *rl_prof_info;
4253 enum ice_status status = ICE_ERR_PARAM;
4254 struct ice_hw *hw = pi->hw;
4255 u16 old_id, rl_prof_id;
4257 rl_prof_info = ice_sched_add_rl_profile(hw, rl_type, bw, layer_num);
4261 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4263 /* Save existing RL prof ID for later clean up */
4264 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4265 /* Configure BW scheduling parameters */
4266 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4270 /* New changes has been applied */
4271 /* Increment the profile ID reference count */
4272 rl_prof_info->prof_id_ref++;
4274 /* Check for old ID removal */
4275 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4276 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4279 return ice_sched_rm_rl_profile(hw, layer_num,
4280 rl_prof_info->profile.flags &
4281 ICE_AQC_RL_PROFILE_TYPE_M, old_id);
4285 * ice_sched_set_node_bw_lmt - set node's BW limit
4286 * @pi: port information structure
4288 * @rl_type: rate limit type min, max, or shared
4289 * @bw: bandwidth in Kbps - Kilo bits per sec
4291 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4292 * EIR, or SRL. The caller needs to hold scheduler lock.
4294 static enum ice_status
4295 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4296 enum ice_rl_type rl_type, u32 bw)
4298 struct ice_sched_node *cfg_node = node;
4299 enum ice_status status;
4305 return ICE_ERR_PARAM;
4307 /* Remove unused RL profile IDs from HW and SW DB */
4308 ice_sched_rm_unused_rl_prof(hw);
4309 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4310 node->tx_sched_layer);
4311 if (layer_num >= hw->num_tx_sched_layers)
4312 return ICE_ERR_PARAM;
4314 if (rl_type == ICE_SHARED_BW) {
4315 /* SRL node may be different */
4316 cfg_node = ice_sched_get_srl_node(node, layer_num);
4320 /* EIR BW and Shared BW profiles are mutually exclusive and
4321 * hence only one of them may be set for any given element
4323 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
4327 if (bw == ICE_SCHED_DFLT_BW)
4328 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
4330 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
4334 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4335 * @pi: port information structure
4336 * @node: pointer to node structure
4337 * @rl_type: rate limit type min, max, or shared
4339 * This function configures node element's BW rate limit profile ID of
4340 * type CIR, EIR, or SRL to default. This function needs to be called
4341 * with the scheduler lock held.
4343 static enum ice_status
4344 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4345 struct ice_sched_node *node,
4346 enum ice_rl_type rl_type)
4348 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4353 * ice_sched_validate_srl_node - Check node for SRL applicability
4354 * @node: sched node to configure
4355 * @sel_layer: selected SRL layer
4357 * This function checks if the SRL can be applied to a selceted layer node on
4358 * behalf of the requested node (first argument). This function needs to be
4359 * called with scheduler lock held.
4361 static enum ice_status
4362 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4364 /* SRL profiles are not available on all layers. Check if the
4365 * SRL profile can be applied to a node above or below the
4366 * requested node. SRL configuration is possible only if the
4367 * selected layer's node has single child.
4369 if (sel_layer == node->tx_sched_layer ||
4370 ((sel_layer == node->tx_sched_layer + 1) &&
4371 node->num_children == 1) ||
4372 ((sel_layer == node->tx_sched_layer - 1) &&
4373 (node->parent && node->parent->num_children == 1)))
4380 * ice_sched_save_q_bw - save queue node's BW information
4381 * @q_ctx: queue context structure
4382 * @rl_type: rate limit type min, max, or shared
4383 * @bw: bandwidth in Kbps - Kilo bits per sec
4385 * Save BW information of queue type node for post replay use.
4387 static enum ice_status
4388 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4392 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4395 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4398 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4401 return ICE_ERR_PARAM;
4407 * ice_sched_set_q_bw_lmt - sets queue BW limit
4408 * @pi: port information structure
4409 * @vsi_handle: sw VSI handle
4410 * @tc: traffic class
4411 * @q_handle: software queue handle
4412 * @rl_type: min, max, or shared
4413 * @bw: bandwidth in Kbps
4415 * This function sets BW limit of queue scheduling node.
4417 static enum ice_status
4418 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4419 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4421 enum ice_status status = ICE_ERR_PARAM;
4422 struct ice_sched_node *node;
4423 struct ice_q_ctx *q_ctx;
4425 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4426 return ICE_ERR_PARAM;
4427 ice_acquire_lock(&pi->sched_lock);
4428 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4431 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4433 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4437 /* Return error if it is not a leaf node */
4438 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4441 /* SRL bandwidth layer selection */
4442 if (rl_type == ICE_SHARED_BW) {
4443 u8 sel_layer; /* selected layer */
4445 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4446 node->tx_sched_layer);
4447 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4448 status = ICE_ERR_PARAM;
4451 status = ice_sched_validate_srl_node(node, sel_layer);
4456 if (bw == ICE_SCHED_DFLT_BW)
4457 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4459 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4462 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4465 ice_release_lock(&pi->sched_lock);
4470 * ice_cfg_q_bw_lmt - configure queue BW limit
4471 * @pi: port information structure
4472 * @vsi_handle: sw VSI handle
4473 * @tc: traffic class
4474 * @q_handle: software queue handle
4475 * @rl_type: min, max, or shared
4476 * @bw: bandwidth in Kbps
4478 * This function configures BW limit of queue scheduling node.
4481 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4482 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4484 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4489 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4490 * @pi: port information structure
4491 * @vsi_handle: sw VSI handle
4492 * @tc: traffic class
4493 * @q_handle: software queue handle
4494 * @rl_type: min, max, or shared
4496 * This function configures BW default limit of queue scheduling node.
4499 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4500 u16 q_handle, enum ice_rl_type rl_type)
4502 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4507 * ice_sched_save_tc_node_bw - save TC node BW limit
4508 * @pi: port information structure
4510 * @rl_type: min or max
4511 * @bw: bandwidth in Kbps
4513 * This function saves the modified values of bandwidth settings for later
4514 * replay purpose (restore) after reset.
4516 static enum ice_status
4517 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4518 enum ice_rl_type rl_type, u32 bw)
4520 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4521 return ICE_ERR_PARAM;
4524 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4527 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4530 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4533 return ICE_ERR_PARAM;
4539 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4540 * @pi: port information structure
4542 * @rl_type: min or max
4543 * @bw: bandwidth in Kbps
4545 * This function configures bandwidth limit of TC node.
4547 static enum ice_status
4548 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4549 enum ice_rl_type rl_type, u32 bw)
4551 enum ice_status status = ICE_ERR_PARAM;
4552 struct ice_sched_node *tc_node;
4554 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4556 ice_acquire_lock(&pi->sched_lock);
4557 tc_node = ice_sched_get_tc_node(pi, tc);
4559 goto exit_set_tc_node_bw;
4560 if (bw == ICE_SCHED_DFLT_BW)
4561 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4563 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4565 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4567 exit_set_tc_node_bw:
4568 ice_release_lock(&pi->sched_lock);
4573 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4574 * @pi: port information structure
4576 * @rl_type: min or max
4577 * @bw: bandwidth in Kbps
4579 * This function configures BW limit of TC node.
4580 * Note: The minimum guaranteed reservation is done via DCBX.
4583 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4584 enum ice_rl_type rl_type, u32 bw)
4586 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4590 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4591 * @pi: port information structure
4593 * @rl_type: min or max
4595 * This function configures BW default limit of TC node.
4598 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4599 enum ice_rl_type rl_type)
4601 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4605 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4606 * @pi: port information structure
4607 * @tc: traffic class
4608 * @rl_type: rate limit type min or max
4609 * @bw_alloc: Bandwidth allocation information
4611 * Save BW alloc information of VSI type node for post replay use.
4613 static enum ice_status
4614 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4615 enum ice_rl_type rl_type, u16 bw_alloc)
4617 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4618 return ICE_ERR_PARAM;
4621 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4625 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4629 return ICE_ERR_PARAM;
4635 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4636 * @pi: port information structure
4638 * @rl_type: min or max
4639 * @bw_alloc: bandwidth alloc
4641 * This function configures bandwidth alloc of TC node, also saves the
4642 * changed settings for replay purpose, and return success if it succeeds
4643 * in modifying bandwidth alloc setting.
4645 static enum ice_status
4646 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4647 enum ice_rl_type rl_type, u8 bw_alloc)
4649 enum ice_status status = ICE_ERR_PARAM;
4650 struct ice_sched_node *tc_node;
4652 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4654 ice_acquire_lock(&pi->sched_lock);
4655 tc_node = ice_sched_get_tc_node(pi, tc);
4657 goto exit_set_tc_node_bw_alloc;
4658 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4661 goto exit_set_tc_node_bw_alloc;
4662 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4664 exit_set_tc_node_bw_alloc:
4665 ice_release_lock(&pi->sched_lock);
4670 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4671 * @pi: port information structure
4673 * @rl_type: min or max
4674 * @bw_alloc: bandwidth alloc
4676 * This function configures BW limit of TC node.
4677 * Note: The minimum guaranteed reservation is done via DCBX.
4680 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4681 enum ice_rl_type rl_type, u8 bw_alloc)
4683 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4687 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4688 * @pi: port information structure
4689 * @vsi_handle: software VSI handle
4691 * This function retrieves the aggregator ID based on VSI ID and TC,
4692 * and sets node's BW limit to default. This function needs to be
4693 * called with the scheduler lock held.
4696 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4698 struct ice_vsi_ctx *vsi_ctx;
4699 enum ice_status status = ICE_SUCCESS;
4702 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4703 return ICE_ERR_PARAM;
4704 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4706 return ICE_ERR_PARAM;
4708 ice_for_each_traffic_class(tc) {
4709 struct ice_sched_node *node;
4711 node = vsi_ctx->sched.ag_node[tc];
4715 /* Set min profile to default */
4716 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4720 /* Set max profile to default */
4721 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4725 /* Remove shared profile, if there is one */
4726 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4736 * ice_sched_get_node_by_id_type - get node from ID type
4737 * @pi: port information structure
4739 * @agg_type: type of aggregator
4740 * @tc: traffic class
4742 * This function returns node identified by ID of type aggregator, and
4743 * based on traffic class (TC). This function needs to be called with
4744 * the scheduler lock held.
4746 static struct ice_sched_node *
4747 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4748 enum ice_agg_type agg_type, u8 tc)
4750 struct ice_sched_node *node = NULL;
4751 struct ice_sched_node *child_node;
4754 case ICE_AGG_TYPE_VSI: {
4755 struct ice_vsi_ctx *vsi_ctx;
4756 u16 vsi_handle = (u16)id;
4758 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4760 /* Get sched_vsi_info */
4761 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4764 node = vsi_ctx->sched.vsi_node[tc];
4768 case ICE_AGG_TYPE_AGG: {
4769 struct ice_sched_node *tc_node;
4771 tc_node = ice_sched_get_tc_node(pi, tc);
4773 node = ice_sched_get_agg_node(pi, tc_node, id);
4777 case ICE_AGG_TYPE_Q:
4778 /* The current implementation allows single queue to modify */
4779 node = ice_sched_get_node(pi, id);
4782 case ICE_AGG_TYPE_QG:
4783 /* The current implementation allows single qg to modify */
4784 child_node = ice_sched_get_node(pi, id);
4787 node = child_node->parent;
4798 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4799 * @pi: port information structure
4800 * @id: ID (software VSI handle or AGG ID)
4801 * @agg_type: aggregator type (VSI or AGG type node)
4802 * @tc: traffic class
4803 * @rl_type: min or max
4804 * @bw: bandwidth in Kbps
4806 * This function sets BW limit of VSI or Aggregator scheduling node
4807 * based on TC information from passed in argument BW.
4810 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4811 enum ice_agg_type agg_type, u8 tc,
4812 enum ice_rl_type rl_type, u32 bw)
4814 enum ice_status status = ICE_ERR_PARAM;
4815 struct ice_sched_node *node;
4820 if (rl_type == ICE_UNKNOWN_BW)
4823 ice_acquire_lock(&pi->sched_lock);
4824 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4826 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4827 goto exit_set_node_bw_lmt_per_tc;
4829 if (bw == ICE_SCHED_DFLT_BW)
4830 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4832 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4834 exit_set_node_bw_lmt_per_tc:
4835 ice_release_lock(&pi->sched_lock);
4840 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4841 * @pi: port information structure
4842 * @vsi_handle: software VSI handle
4844 * This function validates SRL node of the VSI node if available SRL layer is
4845 * different than the VSI node layer on all TC(s).This function needs to be
4846 * called with scheduler lock held.
4848 static enum ice_status
4849 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4851 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4854 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4855 return ICE_ERR_PARAM;
4857 /* Return success if no nodes are present across TC */
4858 ice_for_each_traffic_class(tc) {
4859 struct ice_sched_node *tc_node, *vsi_node;
4860 enum ice_rl_type rl_type = ICE_SHARED_BW;
4861 enum ice_status status;
4863 tc_node = ice_sched_get_tc_node(pi, tc);
4867 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4871 /* SRL bandwidth layer selection */
4872 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4873 u8 node_layer = vsi_node->tx_sched_layer;
4876 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4878 if (layer_num >= pi->hw->num_tx_sched_layers)
4879 return ICE_ERR_PARAM;
4880 sel_layer = layer_num;
4883 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4891 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4892 * @pi: port information structure
4893 * @vsi_handle: software VSI handle
4894 * @bw: bandwidth in Kbps
4896 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4897 * across all traffic classes for VSI matching handle. When BW value of
4898 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4901 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4904 enum ice_status status = ICE_SUCCESS;
4908 return ICE_ERR_PARAM;
4910 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4911 return ICE_ERR_PARAM;
4913 ice_acquire_lock(&pi->sched_lock);
4914 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4916 goto exit_set_vsi_bw_shared_lmt;
4917 /* Return success if no nodes are present across TC */
4918 ice_for_each_traffic_class(tc) {
4919 struct ice_sched_node *tc_node, *vsi_node;
4920 enum ice_rl_type rl_type = ICE_SHARED_BW;
4922 tc_node = ice_sched_get_tc_node(pi, tc);
4926 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4930 if (bw == ICE_SCHED_DFLT_BW)
4931 /* It removes existing SRL from the node */
4932 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4935 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4939 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4944 exit_set_vsi_bw_shared_lmt:
4945 ice_release_lock(&pi->sched_lock);
4950 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4951 * @pi: port information structure
4952 * @agg_id: aggregator ID
4954 * This function validates SRL node of the AGG node if available SRL layer is
4955 * different than the AGG node layer on all TC(s).This function needs to be
4956 * called with scheduler lock held.
4958 static enum ice_status
4959 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4961 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4962 struct ice_sched_agg_info *agg_info;
4963 bool agg_id_present = false;
4964 enum ice_status status = ICE_SUCCESS;
4967 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4969 if (agg_info->agg_id == agg_id) {
4970 agg_id_present = true;
4973 if (!agg_id_present)
4974 return ICE_ERR_PARAM;
4975 /* Return success if no nodes are present across TC */
4976 ice_for_each_traffic_class(tc) {
4977 struct ice_sched_node *tc_node, *agg_node;
4978 enum ice_rl_type rl_type = ICE_SHARED_BW;
4980 tc_node = ice_sched_get_tc_node(pi, tc);
4984 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
4987 /* SRL bandwidth layer selection */
4988 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4989 u8 node_layer = agg_node->tx_sched_layer;
4992 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4994 if (layer_num >= pi->hw->num_tx_sched_layers)
4995 return ICE_ERR_PARAM;
4996 sel_layer = layer_num;
4999 status = ice_sched_validate_srl_node(agg_node, sel_layer);
5007 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
5008 * @pi: port information structure
5009 * @agg_id: aggregator ID
5010 * @bw: bandwidth in Kbps
5012 * This function configures the shared rate limiter(SRL) of all aggregator type
5013 * nodes across all traffic classes for aggregator matching agg_id. When
5014 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
5018 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
5020 struct ice_sched_agg_info *agg_info;
5021 struct ice_sched_agg_info *tmp;
5022 bool agg_id_present = false;
5023 enum ice_status status = ICE_SUCCESS;
5027 return ICE_ERR_PARAM;
5029 ice_acquire_lock(&pi->sched_lock);
5030 status = ice_sched_validate_agg_srl_node(pi, agg_id);
5032 goto exit_agg_bw_shared_lmt;
5034 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
5035 ice_sched_agg_info, list_entry)
5036 if (agg_info->agg_id == agg_id) {
5037 agg_id_present = true;
5041 if (!agg_id_present) {
5042 status = ICE_ERR_PARAM;
5043 goto exit_agg_bw_shared_lmt;
5046 /* Return success if no nodes are present across TC */
5047 ice_for_each_traffic_class(tc) {
5048 enum ice_rl_type rl_type = ICE_SHARED_BW;
5049 struct ice_sched_node *tc_node, *agg_node;
5051 tc_node = ice_sched_get_tc_node(pi, tc);
5055 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5059 if (bw == ICE_SCHED_DFLT_BW)
5060 /* It removes existing SRL from the node */
5061 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
5064 status = ice_sched_set_node_bw_lmt(pi, agg_node,
5068 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5073 exit_agg_bw_shared_lmt:
5074 ice_release_lock(&pi->sched_lock);
5079 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5080 * @pi: port information structure
5081 * @node: sched node to configure
5082 * @priority: sibling priority
5084 * This function configures node element's sibling priority only. This
5085 * function needs to be called with scheduler lock held.
5088 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5089 struct ice_sched_node *node, u8 priority)
5091 struct ice_aqc_txsched_elem_data buf;
5092 struct ice_aqc_txsched_elem *data;
5093 struct ice_hw *hw = pi->hw;
5094 enum ice_status status;
5097 return ICE_ERR_PARAM;
5100 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5101 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5102 ICE_AQC_ELEM_GENERIC_PRIO_M;
5103 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5104 data->generic |= priority;
5106 /* Configure element */
5107 status = ice_sched_update_elem(hw, node, &buf);
5112 * ice_cfg_rl_burst_size - Set burst size value
5113 * @hw: pointer to the HW struct
5114 * @bytes: burst size in bytes
5116 * This function configures/set the burst size to requested new value. The new
5117 * burst size value is used for future rate limit calls. It doesn't change the
5118 * existing or previously created RL profiles.
5120 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5122 u16 burst_size_to_prog;
5124 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5125 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5126 return ICE_ERR_PARAM;
5127 if (ice_round_to_num(bytes, 64) <=
5128 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5129 /* 64 byte granularity case */
5130 /* Disable MSB granularity bit */
5131 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5132 /* round number to nearest 64 byte granularity */
5133 bytes = ice_round_to_num(bytes, 64);
5134 /* The value is in 64 byte chunks */
5135 burst_size_to_prog |= (u16)(bytes / 64);
5137 /* k bytes granularity case */
5138 /* Enable MSB granularity bit */
5139 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5140 /* round number to nearest 1024 granularity */
5141 bytes = ice_round_to_num(bytes, 1024);
5142 /* check rounding doesn't go beyond allowed */
5143 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5144 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5145 /* The value is in k bytes */
5146 burst_size_to_prog |= (u16)(bytes / 1024);
5148 hw->max_burst_size = burst_size_to_prog;
5153 * ice_sched_replay_node_prio - re-configure node priority
5154 * @hw: pointer to the HW struct
5155 * @node: sched node to configure
5156 * @priority: priority value
5158 * This function configures node element's priority value. It
5159 * needs to be called with scheduler lock held.
5161 static enum ice_status
5162 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5165 struct ice_aqc_txsched_elem_data buf;
5166 struct ice_aqc_txsched_elem *data;
5167 enum ice_status status;
5171 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5172 data->generic = priority;
5174 /* Configure element */
5175 status = ice_sched_update_elem(hw, node, &buf);
5180 * ice_sched_replay_node_bw - replay node(s) BW
5181 * @hw: pointer to the HW struct
5182 * @node: sched node to configure
5183 * @bw_t_info: BW type information
5185 * This function restores node's BW from bw_t_info. The caller needs
5186 * to hold the scheduler lock.
5188 static enum ice_status
5189 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5190 struct ice_bw_type_info *bw_t_info)
5192 struct ice_port_info *pi = hw->port_info;
5193 enum ice_status status = ICE_ERR_PARAM;
5198 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5200 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5201 status = ice_sched_replay_node_prio(hw, node,
5202 bw_t_info->generic);
5206 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5207 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5208 bw_t_info->cir_bw.bw);
5212 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5213 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5214 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5219 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5220 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5221 bw_t_info->eir_bw.bw);
5225 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5226 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5227 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5232 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5233 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5234 bw_t_info->shared_bw);
5239 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5240 * @hw: pointer to the HW struct
5241 * @agg_info: aggregator data structure
5243 * This function re-creates aggregator type nodes. The caller needs to hold
5244 * the scheduler lock.
5246 static enum ice_status
5247 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5249 struct ice_sched_node *tc_node, *agg_node;
5250 enum ice_status status = ICE_SUCCESS;
5254 return ICE_ERR_PARAM;
5255 ice_for_each_traffic_class(tc) {
5256 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5259 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5261 status = ICE_ERR_PARAM;
5264 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5267 status = ICE_ERR_PARAM;
5270 status = ice_sched_replay_node_bw(hw, agg_node,
5271 &agg_info->bw_t_info[tc]);
5279 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5280 * @pi: port info struct
5281 * @tc_bitmap: 8 bits TC bitmap to check
5282 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5284 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5285 * may be missing, it returns enabled TCs. This function needs to be called with
5286 * scheduler lock held.
5289 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5290 ice_bitmap_t *ena_tc_bitmap)
5294 /* Some TC(s) may be missing after reset, adjust for replay */
5295 ice_for_each_traffic_class(tc)
5296 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5297 (ice_sched_get_tc_node(pi, tc)))
5298 ice_set_bit(tc, ena_tc_bitmap);
5302 * ice_sched_replay_agg - recreate aggregator node(s)
5303 * @hw: pointer to the HW struct
5305 * This function recreate aggregator type nodes which are not replayed earlier.
5306 * It also replay aggregator BW information. These aggregator nodes are not
5307 * associated with VSI type node yet.
5309 void ice_sched_replay_agg(struct ice_hw *hw)
5311 struct ice_port_info *pi = hw->port_info;
5312 struct ice_sched_agg_info *agg_info;
5314 ice_acquire_lock(&pi->sched_lock);
5315 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5317 /* replay aggregator (re-create aggregator node) */
5318 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5319 agg_info->replay_tc_bitmap,
5320 ICE_MAX_TRAFFIC_CLASS)) {
5321 ice_declare_bitmap(replay_bitmap,
5322 ICE_MAX_TRAFFIC_CLASS);
5323 enum ice_status status;
5325 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5326 ice_sched_get_ena_tc_bitmap(pi,
5327 agg_info->replay_tc_bitmap,
5329 status = ice_sched_cfg_agg(hw->port_info,
5334 ice_info(hw, "Replay agg id[%d] failed\n",
5336 /* Move on to next one */
5339 /* Replay aggregator node BW (restore aggregator BW) */
5340 status = ice_sched_replay_agg_bw(hw, agg_info);
5342 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5345 ice_release_lock(&pi->sched_lock);
5349 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5350 * @hw: pointer to the HW struct
5352 * This function initialize aggregator(s) TC bitmap to zero. A required
5353 * preinit step for replaying aggregators.
5355 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5357 struct ice_port_info *pi = hw->port_info;
5358 struct ice_sched_agg_info *agg_info;
5360 ice_acquire_lock(&pi->sched_lock);
5361 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5363 struct ice_sched_agg_vsi_info *agg_vsi_info;
5365 agg_info->tc_bitmap[0] = 0;
5366 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5367 ice_sched_agg_vsi_info, list_entry)
5368 agg_vsi_info->tc_bitmap[0] = 0;
5370 ice_release_lock(&pi->sched_lock);
5374 * ice_sched_replay_root_node_bw - replay root node BW
5375 * @pi: port information structure
5377 * Replay root node BW settings.
5379 enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi)
5381 enum ice_status status = ICE_SUCCESS;
5384 return ICE_ERR_PARAM;
5385 ice_acquire_lock(&pi->sched_lock);
5387 status = ice_sched_replay_node_bw(pi->hw, pi->root,
5388 &pi->root_node_bw_t_info);
5389 ice_release_lock(&pi->sched_lock);
5394 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5395 * @pi: port information structure
5397 * This function replay TC nodes.
5399 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5401 enum ice_status status = ICE_SUCCESS;
5405 return ICE_ERR_PARAM;
5406 ice_acquire_lock(&pi->sched_lock);
5407 ice_for_each_traffic_class(tc) {
5408 struct ice_sched_node *tc_node;
5410 tc_node = ice_sched_get_tc_node(pi, tc);
5412 continue; /* TC not present */
5413 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5414 &pi->tc_node_bw_t_info[tc]);
5418 ice_release_lock(&pi->sched_lock);
5423 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5424 * @hw: pointer to the HW struct
5425 * @vsi_handle: software VSI handle
5426 * @tc_bitmap: 8 bits TC bitmap
5428 * This function replays VSI type nodes bandwidth. This function needs to be
5429 * called with scheduler lock held.
5431 static enum ice_status
5432 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5433 ice_bitmap_t *tc_bitmap)
5435 struct ice_sched_node *vsi_node, *tc_node;
5436 struct ice_port_info *pi = hw->port_info;
5437 struct ice_bw_type_info *bw_t_info;
5438 struct ice_vsi_ctx *vsi_ctx;
5439 enum ice_status status = ICE_SUCCESS;
5442 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5444 return ICE_ERR_PARAM;
5445 ice_for_each_traffic_class(tc) {
5446 if (!ice_is_tc_ena(*tc_bitmap, tc))
5448 tc_node = ice_sched_get_tc_node(pi, tc);
5451 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5454 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5455 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5463 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5464 * @hw: pointer to the HW struct
5465 * @vsi_handle: software VSI handle
5467 * This function replays aggregator node, VSI to aggregator type nodes, and
5468 * their node bandwidth information. This function needs to be called with
5469 * scheduler lock held.
5471 static enum ice_status
5472 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5474 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5475 struct ice_sched_agg_vsi_info *agg_vsi_info;
5476 struct ice_port_info *pi = hw->port_info;
5477 struct ice_sched_agg_info *agg_info;
5478 enum ice_status status;
5480 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5481 if (!ice_is_vsi_valid(hw, vsi_handle))
5482 return ICE_ERR_PARAM;
5483 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5485 return ICE_SUCCESS; /* Not present in list - default Agg case */
5486 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5488 return ICE_SUCCESS; /* Not present in list - default Agg case */
5489 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5491 /* Replay aggregator node associated to vsi_handle */
5492 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5493 ICE_AGG_TYPE_AGG, replay_bitmap);
5496 /* Replay aggregator node BW (restore aggregator BW) */
5497 status = ice_sched_replay_agg_bw(hw, agg_info);
5501 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5502 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5504 /* Move this VSI (vsi_handle) to above aggregator */
5505 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5509 /* Replay VSI BW (restore VSI BW) */
5510 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5511 agg_vsi_info->tc_bitmap);
5515 * ice_replay_vsi_agg - replay VSI to aggregator node
5516 * @hw: pointer to the HW struct
5517 * @vsi_handle: software VSI handle
5519 * This function replays association of VSI to aggregator type nodes, and
5520 * node bandwidth information.
5522 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5524 struct ice_port_info *pi = hw->port_info;
5525 enum ice_status status;
5527 ice_acquire_lock(&pi->sched_lock);
5528 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5529 ice_release_lock(&pi->sched_lock);
5534 * ice_sched_replay_q_bw - replay queue type node BW
5535 * @pi: port information structure
5536 * @q_ctx: queue context structure
5538 * This function replays queue type node bandwidth. This function needs to be
5539 * called with scheduler lock held.
5542 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5544 struct ice_sched_node *q_node;
5546 /* Following also checks the presence of node in tree */
5547 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5549 return ICE_ERR_PARAM;
5550 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);