1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2018
9 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
10 * @pi: port information structure
11 * @info: Scheduler element information from firmware
13 * This function inserts the root node of the scheduling tree topology
16 static enum ice_status
17 ice_sched_add_root_node(struct ice_port_info *pi,
18 struct ice_aqc_txsched_elem_data *info)
20 struct ice_sched_node *root;
28 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
30 return ICE_ERR_NO_MEMORY;
32 /* coverity[suspicious_sizeof] */
33 root->children = (struct ice_sched_node **)
34 ice_calloc(hw, hw->max_children[0], sizeof(*root));
35 if (!root->children) {
37 return ICE_ERR_NO_MEMORY;
40 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
46 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
47 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
48 * @teid: node TEID to search
50 * This function searches for a node matching the TEID in the scheduling tree
51 * from the SW DB. The search is recursive and is restricted by the number of
52 * layers it has searched through; stopping at the max supported layer.
54 * This function needs to be called when holding the port_info->sched_lock
56 struct ice_sched_node *
57 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
61 /* The TEID is same as that of the start_node */
62 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
65 /* The node has no children or is at the max layer */
66 if (!start_node->num_children ||
67 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
68 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
71 /* Check if TEID matches to any of the children nodes */
72 for (i = 0; i < start_node->num_children; i++)
73 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
74 return start_node->children[i];
76 /* Search within each child's sub-tree */
77 for (i = 0; i < start_node->num_children; i++) {
78 struct ice_sched_node *tmp;
80 tmp = ice_sched_find_node_by_teid(start_node->children[i],
90 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
91 * @hw: pointer to the HW struct
92 * @cmd_opc: cmd opcode
93 * @elems_req: number of elements to request
94 * @buf: pointer to buffer
95 * @buf_size: buffer size in bytes
96 * @elems_resp: returns total number of elements response
97 * @cd: pointer to command details structure or NULL
99 * This function sends a scheduling elements cmd (cmd_opc)
101 static enum ice_status
102 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
103 u16 elems_req, void *buf, u16 buf_size,
104 u16 *elems_resp, struct ice_sq_cd *cd)
106 struct ice_aqc_sched_elem_cmd *cmd;
107 struct ice_aq_desc desc;
108 enum ice_status status;
110 cmd = &desc.params.sched_elem_cmd;
111 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
112 cmd->num_elem_req = CPU_TO_LE16(elems_req);
113 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
114 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
115 if (!status && elems_resp)
116 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
122 * ice_aq_query_sched_elems - query scheduler elements
123 * @hw: pointer to the HW struct
124 * @elems_req: number of elements to query
125 * @buf: pointer to buffer
126 * @buf_size: buffer size in bytes
127 * @elems_ret: returns total number of elements returned
128 * @cd: pointer to command details structure or NULL
130 * Query scheduling elements (0x0404)
133 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
134 struct ice_aqc_get_elem *buf, u16 buf_size,
135 u16 *elems_ret, struct ice_sq_cd *cd)
137 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
138 elems_req, (void *)buf, buf_size,
143 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
144 * @pi: port information structure
145 * @layer: Scheduler layer of the node
146 * @info: Scheduler element information from firmware
148 * This function inserts a scheduler node to the SW DB.
151 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
152 struct ice_aqc_txsched_elem_data *info)
154 struct ice_sched_node *parent;
155 struct ice_aqc_get_elem elem;
156 struct ice_sched_node *node;
157 enum ice_status status;
161 return ICE_ERR_PARAM;
165 /* A valid parent node should be there */
166 parent = ice_sched_find_node_by_teid(pi->root,
167 LE32_TO_CPU(info->parent_teid));
169 ice_debug(hw, ICE_DBG_SCHED,
170 "Parent Node not found for parent_teid=0x%x\n",
171 LE32_TO_CPU(info->parent_teid));
172 return ICE_ERR_PARAM;
175 /* query the current node information from FW before additing it
178 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
181 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
183 return ICE_ERR_NO_MEMORY;
184 if (hw->max_children[layer]) {
185 /* coverity[suspicious_sizeof] */
186 node->children = (struct ice_sched_node **)
187 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
188 if (!node->children) {
190 return ICE_ERR_NO_MEMORY;
195 node->parent = parent;
196 node->tx_sched_layer = layer;
197 parent->children[parent->num_children++] = node;
198 node->info = elem.generic[0];
203 * ice_aq_delete_sched_elems - delete scheduler elements
204 * @hw: pointer to the HW struct
205 * @grps_req: number of groups to delete
206 * @buf: pointer to buffer
207 * @buf_size: buffer size in bytes
208 * @grps_del: returns total number of elements deleted
209 * @cd: pointer to command details structure or NULL
211 * Delete scheduling elements (0x040F)
213 static enum ice_status
214 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
215 struct ice_aqc_delete_elem *buf, u16 buf_size,
216 u16 *grps_del, struct ice_sq_cd *cd)
218 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
219 grps_req, (void *)buf, buf_size,
224 * ice_sched_remove_elems - remove nodes from HW
225 * @hw: pointer to the HW struct
226 * @parent: pointer to the parent node
227 * @num_nodes: number of nodes
228 * @node_teids: array of node teids to be deleted
230 * This function remove nodes from HW
232 static enum ice_status
233 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
234 u16 num_nodes, u32 *node_teids)
236 struct ice_aqc_delete_elem *buf;
237 u16 i, num_groups_removed = 0;
238 enum ice_status status;
241 buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
242 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
244 return ICE_ERR_NO_MEMORY;
246 buf->hdr.parent_teid = parent->info.node_teid;
247 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
248 for (i = 0; i < num_nodes; i++)
249 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
251 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
252 &num_groups_removed, NULL);
253 if (status != ICE_SUCCESS || num_groups_removed != 1)
254 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
255 hw->adminq.sq_last_status);
262 * ice_sched_get_first_node - get the first node of the given layer
263 * @hw: pointer to the HW struct
264 * @parent: pointer the base node of the subtree
265 * @layer: layer number
267 * This function retrieves the first node of the given layer from the subtree
269 static struct ice_sched_node *
270 ice_sched_get_first_node(struct ice_hw *hw, struct ice_sched_node *parent,
275 if (layer < hw->sw_entry_point_layer)
277 for (i = 0; i < parent->num_children; i++) {
278 struct ice_sched_node *node = parent->children[i];
281 if (node->tx_sched_layer == layer)
283 /* this recursion is intentional, and wouldn't
284 * go more than 9 calls
286 return ice_sched_get_first_node(hw, node, layer);
293 * ice_sched_get_tc_node - get pointer to TC node
294 * @pi: port information structure
297 * This function returns the TC node pointer
299 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
305 for (i = 0; i < pi->root->num_children; i++)
306 if (pi->root->children[i]->tc_num == tc)
307 return pi->root->children[i];
312 * ice_free_sched_node - Free a Tx scheduler node from SW DB
313 * @pi: port information structure
314 * @node: pointer to the ice_sched_node struct
316 * This function frees up a node from SW DB as well as from HW
318 * This function needs to be called with the port_info->sched_lock held
320 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
322 struct ice_sched_node *parent;
323 struct ice_hw *hw = pi->hw;
326 /* Free the children before freeing up the parent node
327 * The parent array is updated below and that shifts the nodes
328 * in the array. So always pick the first child if num children > 0
330 while (node->num_children)
331 ice_free_sched_node(pi, node->children[0]);
333 /* Leaf, TC and root nodes can't be deleted by SW */
334 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
335 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
336 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
337 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
338 u32 teid = LE32_TO_CPU(node->info.node_teid);
340 ice_sched_remove_elems(hw, node->parent, 1, &teid);
342 parent = node->parent;
343 /* root has no parent */
345 struct ice_sched_node *p, *tc_node;
347 /* update the parent */
348 for (i = 0; i < parent->num_children; i++)
349 if (parent->children[i] == node) {
350 for (j = i + 1; j < parent->num_children; j++)
351 parent->children[j - 1] =
353 parent->num_children--;
357 /* search for previous sibling that points to this node and
358 * remove the reference
360 tc_node = ice_sched_get_tc_node(pi, node->tc_num);
362 ice_debug(hw, ICE_DBG_SCHED,
363 "Invalid TC number %d\n", node->tc_num);
366 p = ice_sched_get_first_node(hw, tc_node, node->tx_sched_layer);
368 if (p->sibling == node) {
369 p->sibling = node->sibling;
376 /* leaf nodes have no children */
378 ice_free(hw, node->children);
383 * ice_aq_get_dflt_topo - gets default scheduler topology
384 * @hw: pointer to the HW struct
385 * @lport: logical port number
386 * @buf: pointer to buffer
387 * @buf_size: buffer size in bytes
388 * @num_branches: returns total number of queue to port branches
389 * @cd: pointer to command details structure or NULL
391 * Get default scheduler topology (0x400)
393 static enum ice_status
394 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
395 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
396 u8 *num_branches, struct ice_sq_cd *cd)
398 struct ice_aqc_get_topo *cmd;
399 struct ice_aq_desc desc;
400 enum ice_status status;
402 cmd = &desc.params.get_topo;
403 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
404 cmd->port_num = lport;
405 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
406 if (!status && num_branches)
407 *num_branches = cmd->num_branches;
413 * ice_aq_add_sched_elems - adds scheduling element
414 * @hw: pointer to the HW struct
415 * @grps_req: the number of groups that are requested to be added
416 * @buf: pointer to buffer
417 * @buf_size: buffer size in bytes
418 * @grps_added: returns total number of groups added
419 * @cd: pointer to command details structure or NULL
421 * Add scheduling elements (0x0401)
423 static enum ice_status
424 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
425 struct ice_aqc_add_elem *buf, u16 buf_size,
426 u16 *grps_added, struct ice_sq_cd *cd)
428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
429 grps_req, (void *)buf, buf_size,
434 * ice_aq_cfg_sched_elems - configures scheduler elements
435 * @hw: pointer to the HW struct
436 * @elems_req: number of elements to configure
437 * @buf: pointer to buffer
438 * @buf_size: buffer size in bytes
439 * @elems_cfgd: returns total number of elements configured
440 * @cd: pointer to command details structure or NULL
442 * Configure scheduling elements (0x0403)
444 static enum ice_status
445 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
446 struct ice_aqc_conf_elem *buf, u16 buf_size,
447 u16 *elems_cfgd, struct ice_sq_cd *cd)
449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
450 elems_req, (void *)buf, buf_size,
455 * ice_aq_move_sched_elems - move scheduler elements
456 * @hw: pointer to the HW struct
457 * @grps_req: number of groups to move
458 * @buf: pointer to buffer
459 * @buf_size: buffer size in bytes
460 * @grps_movd: returns total number of groups moved
461 * @cd: pointer to command details structure or NULL
463 * Move scheduling elements (0x0408)
466 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
467 struct ice_aqc_move_elem *buf, u16 buf_size,
468 u16 *grps_movd, struct ice_sq_cd *cd)
470 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
471 grps_req, (void *)buf, buf_size,
476 * ice_aq_suspend_sched_elems - suspend scheduler elements
477 * @hw: pointer to the HW struct
478 * @elems_req: number of elements to suspend
479 * @buf: pointer to buffer
480 * @buf_size: buffer size in bytes
481 * @elems_ret: returns total number of elements suspended
482 * @cd: pointer to command details structure or NULL
484 * Suspend scheduling elements (0x0409)
486 static enum ice_status
487 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
488 struct ice_aqc_suspend_resume_elem *buf,
489 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
491 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
492 elems_req, (void *)buf, buf_size,
497 * ice_aq_resume_sched_elems - resume scheduler elements
498 * @hw: pointer to the HW struct
499 * @elems_req: number of elements to resume
500 * @buf: pointer to buffer
501 * @buf_size: buffer size in bytes
502 * @elems_ret: returns total number of elements resumed
503 * @cd: pointer to command details structure or NULL
505 * resume scheduling elements (0x040A)
507 static enum ice_status
508 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
509 struct ice_aqc_suspend_resume_elem *buf,
510 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
512 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
513 elems_req, (void *)buf, buf_size,
518 * ice_aq_query_sched_res - query scheduler resource
519 * @hw: pointer to the HW struct
520 * @buf_size: buffer size in bytes
521 * @buf: pointer to buffer
522 * @cd: pointer to command details structure or NULL
524 * Query scheduler resource allocation (0x0412)
526 static enum ice_status
527 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
528 struct ice_aqc_query_txsched_res_resp *buf,
529 struct ice_sq_cd *cd)
531 struct ice_aq_desc desc;
533 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
534 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
538 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
539 * @hw: pointer to the HW struct
540 * @num_nodes: number of nodes
541 * @node_teids: array of node teids to be suspended or resumed
542 * @suspend: true means suspend / false means resume
544 * This function suspends or resumes HW nodes
546 static enum ice_status
547 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
550 struct ice_aqc_suspend_resume_elem *buf;
551 u16 i, buf_size, num_elem_ret = 0;
552 enum ice_status status;
554 buf_size = sizeof(*buf) * num_nodes;
555 buf = (struct ice_aqc_suspend_resume_elem *)
556 ice_malloc(hw, buf_size);
558 return ICE_ERR_NO_MEMORY;
560 for (i = 0; i < num_nodes; i++)
561 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
564 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
565 buf_size, &num_elem_ret,
568 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
569 buf_size, &num_elem_ret,
571 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
572 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
579 * ice_aq_rl_profile - performs a rate limiting task
580 * @hw: pointer to the HW struct
581 * @opcode:opcode for add, query, or remove profile(s)
582 * @num_profiles: the number of profiles
583 * @buf: pointer to buffer
584 * @buf_size: buffer size in bytes
585 * @num_processed: number of processed add or remove profile(s) to return
586 * @cd: pointer to command details structure
588 * Rl profile function to add, query, or remove profile(s)
590 static enum ice_status
591 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
592 u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
593 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
595 struct ice_aqc_rl_profile *cmd;
596 struct ice_aq_desc desc;
597 enum ice_status status;
599 cmd = &desc.params.rl_profile;
601 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
602 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
603 cmd->num_profiles = CPU_TO_LE16(num_profiles);
604 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
605 if (!status && num_processed)
606 *num_processed = LE16_TO_CPU(cmd->num_processed);
611 * ice_aq_add_rl_profile - adds rate limiting profile(s)
612 * @hw: pointer to the HW struct
613 * @num_profiles: the number of profile(s) to be add
614 * @buf: pointer to buffer
615 * @buf_size: buffer size in bytes
616 * @num_profiles_added: total number of profiles added to return
617 * @cd: pointer to command details structure
619 * Add RL profile (0x0410)
621 static enum ice_status
622 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
623 struct ice_aqc_rl_profile_generic_elem *buf,
624 u16 buf_size, u16 *num_profiles_added,
625 struct ice_sq_cd *cd)
627 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
629 buf_size, num_profiles_added, cd);
633 * ice_aq_query_rl_profile - query rate limiting profile(s)
634 * @hw: pointer to the HW struct
635 * @num_profiles: the number of profile(s) to query
636 * @buf: pointer to buffer
637 * @buf_size: buffer size in bytes
638 * @cd: pointer to command details structure
640 * Query RL profile (0x0411)
643 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
644 struct ice_aqc_rl_profile_generic_elem *buf,
645 u16 buf_size, struct ice_sq_cd *cd)
647 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
648 num_profiles, buf, buf_size, NULL, cd);
652 * ice_aq_remove_rl_profile - removes RL profile(s)
653 * @hw: pointer to the HW struct
654 * @num_profiles: the number of profile(s) to remove
655 * @buf: pointer to buffer
656 * @buf_size: buffer size in bytes
657 * @num_profiles_removed: total number of profiles removed to return
658 * @cd: pointer to command details structure or NULL
660 * Remove RL profile (0x0415)
662 static enum ice_status
663 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
664 struct ice_aqc_rl_profile_generic_elem *buf,
665 u16 buf_size, u16 *num_profiles_removed,
666 struct ice_sq_cd *cd)
668 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
670 buf_size, num_profiles_removed, cd);
674 * ice_sched_clear_rl_prof - clears RL prof entries
675 * @pi: port information structure
677 * This function removes all RL profile from HW as well as from SW DB.
679 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
683 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
684 struct ice_aqc_rl_profile_info *rl_prof_elem;
685 struct ice_aqc_rl_profile_info *rl_prof_tmp;
687 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
688 &pi->rl_prof_list[ln],
689 ice_aqc_rl_profile_info, list_entry) {
690 struct ice_hw *hw = pi->hw;
691 enum ice_status status;
693 rl_prof_elem->prof_id_ref = 0;
694 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
696 ice_debug(hw, ICE_DBG_SCHED,
697 "Remove rl profile failed\n");
698 /* On error, free mem required */
699 LIST_DEL(&rl_prof_elem->list_entry);
700 ice_free(hw, rl_prof_elem);
707 * ice_sched_clear_agg - clears the aggregator related information
708 * @hw: pointer to the hardware structure
710 * This function removes aggregator list and free up aggregator related memory
711 * previously allocated.
713 void ice_sched_clear_agg(struct ice_hw *hw)
715 struct ice_sched_agg_info *agg_info;
716 struct ice_sched_agg_info *atmp;
718 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
721 struct ice_sched_agg_vsi_info *agg_vsi_info;
722 struct ice_sched_agg_vsi_info *vtmp;
724 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
725 &agg_info->agg_vsi_list,
726 ice_sched_agg_vsi_info, list_entry) {
727 LIST_DEL(&agg_vsi_info->list_entry);
728 ice_free(hw, agg_vsi_info);
730 LIST_DEL(&agg_info->list_entry);
731 ice_free(hw, agg_info);
736 * ice_sched_clear_tx_topo - clears the schduler tree nodes
737 * @pi: port information structure
739 * This function removes all the nodes from HW as well as from SW DB.
741 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
745 /* remove RL profiles related lists */
746 ice_sched_clear_rl_prof(pi);
748 ice_free_sched_node(pi, pi->root);
754 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
755 * @pi: port information structure
757 * Cleanup scheduling elements from SW DB
759 void ice_sched_clear_port(struct ice_port_info *pi)
761 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
764 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
765 ice_acquire_lock(&pi->sched_lock);
766 ice_sched_clear_tx_topo(pi);
767 ice_release_lock(&pi->sched_lock);
768 ice_destroy_lock(&pi->sched_lock);
772 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
773 * @hw: pointer to the HW struct
775 * Cleanup scheduling elements from SW DB for all the ports
777 void ice_sched_cleanup_all(struct ice_hw *hw)
782 if (hw->layer_info) {
783 ice_free(hw, hw->layer_info);
784 hw->layer_info = NULL;
788 ice_sched_clear_port(hw->port_info);
790 hw->num_tx_sched_layers = 0;
791 hw->num_tx_sched_phys_layers = 0;
792 hw->flattened_layers = 0;
797 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
798 * @hw: pointer to the HW struct
799 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
800 * @buf: pointer to buffer
801 * @buf_size: buffer size in bytes
802 * @cd: pointer to command details structure or NULL
804 * Configure L2 Node CGD (0x0414)
807 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
808 struct ice_aqc_cfg_l2_node_cgd_data *buf,
809 u16 buf_size, struct ice_sq_cd *cd)
811 struct ice_aqc_cfg_l2_node_cgd *cmd;
812 struct ice_aq_desc desc;
814 cmd = &desc.params.cfg_l2_node_cgd;
815 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
816 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
818 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
819 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
824 * ice_sched_add_elems - add nodes to HW and SW DB
825 * @pi: port information structure
826 * @tc_node: pointer to the branch node
827 * @parent: pointer to the parent node
828 * @layer: layer number to add nodes
829 * @num_nodes: number of nodes
830 * @num_nodes_added: pointer to num nodes added
831 * @first_node_teid: if new nodes are added then return the TEID of first node
833 * This function add nodes to HW as well as to SW DB for a given layer
835 static enum ice_status
836 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
837 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
838 u16 *num_nodes_added, u32 *first_node_teid)
840 struct ice_sched_node *prev, *new_node;
841 struct ice_aqc_add_elem *buf;
842 u16 i, num_groups_added = 0;
843 enum ice_status status = ICE_SUCCESS;
844 struct ice_hw *hw = pi->hw;
848 buf_size = sizeof(*buf) + sizeof(*buf->generic) * (num_nodes - 1);
849 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
851 return ICE_ERR_NO_MEMORY;
853 buf->hdr.parent_teid = parent->info.node_teid;
854 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
855 for (i = 0; i < num_nodes; i++) {
856 buf->generic[i].parent_teid = parent->info.node_teid;
857 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
858 buf->generic[i].data.valid_sections =
859 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
860 ICE_AQC_ELEM_VALID_EIR;
861 buf->generic[i].data.generic = 0;
862 buf->generic[i].data.cir_bw.bw_profile_idx =
863 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
864 buf->generic[i].data.cir_bw.bw_alloc =
865 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
866 buf->generic[i].data.eir_bw.bw_profile_idx =
867 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
868 buf->generic[i].data.eir_bw.bw_alloc =
869 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
872 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
873 &num_groups_added, NULL);
874 if (status != ICE_SUCCESS || num_groups_added != 1) {
875 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
876 hw->adminq.sq_last_status);
881 *num_nodes_added = num_nodes;
882 /* add nodes to the SW DB */
883 for (i = 0; i < num_nodes; i++) {
884 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
885 if (status != ICE_SUCCESS) {
886 ice_debug(hw, ICE_DBG_SCHED,
887 "add nodes in SW DB failed status =%d\n",
892 teid = LE32_TO_CPU(buf->generic[i].node_teid);
893 new_node = ice_sched_find_node_by_teid(parent, teid);
895 ice_debug(hw, ICE_DBG_SCHED,
896 "Node is missing for teid =%d\n", teid);
900 new_node->sibling = NULL;
901 new_node->tc_num = tc_node->tc_num;
903 /* add it to previous node sibling pointer */
904 /* Note: siblings are not linked across branches */
905 prev = ice_sched_get_first_node(hw, tc_node, layer);
906 if (prev && prev != new_node) {
907 while (prev->sibling)
908 prev = prev->sibling;
909 prev->sibling = new_node;
913 *first_node_teid = teid;
921 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
922 * @pi: port information structure
923 * @tc_node: pointer to TC node
924 * @parent: pointer to parent node
925 * @layer: layer number to add nodes
926 * @num_nodes: number of nodes to be added
927 * @first_node_teid: pointer to the first node TEID
928 * @num_nodes_added: pointer to number of nodes added
930 * This function add nodes to a given layer.
932 static enum ice_status
933 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
934 struct ice_sched_node *tc_node,
935 struct ice_sched_node *parent, u8 layer,
936 u16 num_nodes, u32 *first_node_teid,
937 u16 *num_nodes_added)
939 u32 *first_teid_ptr = first_node_teid;
940 u16 new_num_nodes, max_child_nodes;
941 enum ice_status status = ICE_SUCCESS;
942 struct ice_hw *hw = pi->hw;
946 *num_nodes_added = 0;
951 if (!parent || layer < hw->sw_entry_point_layer)
952 return ICE_ERR_PARAM;
954 /* max children per node per layer */
955 max_child_nodes = hw->max_children[parent->tx_sched_layer];
957 /* current number of children + required nodes exceed max children ? */
958 if ((parent->num_children + num_nodes) > max_child_nodes) {
959 /* Fail if the parent is a TC node */
960 if (parent == tc_node)
963 /* utilize all the spaces if the parent is not full */
964 if (parent->num_children < max_child_nodes) {
965 new_num_nodes = max_child_nodes - parent->num_children;
966 /* this recursion is intentional, and wouldn't
967 * go more than 2 calls
969 status = ice_sched_add_nodes_to_layer(pi, tc_node,
974 if (status != ICE_SUCCESS)
977 *num_nodes_added += num_added;
979 /* Don't modify the first node TEID memory if the first node was
980 * added already in the above call. Instead send some temp
981 * memory for all other recursive calls.
984 first_teid_ptr = &temp;
986 new_num_nodes = num_nodes - num_added;
988 /* This parent is full, try the next sibling */
989 parent = parent->sibling;
991 /* this recursion is intentional, for 1024 queues
992 * per VSI, it goes max of 16 iterations.
993 * 1024 / 8 = 128 layer 8 nodes
994 * 128 /8 = 16 (add 8 nodes per iteration)
996 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
997 layer, new_num_nodes,
1000 *num_nodes_added += num_added;
1004 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1005 num_nodes_added, first_node_teid);
1010 * ice_sched_get_qgrp_layer - get the current queue group layer number
1011 * @hw: pointer to the HW struct
1013 * This function returns the current queue group layer number
1015 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1017 /* It's always total layers - 1, the array is 0 relative so -2 */
1018 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1022 * ice_sched_get_vsi_layer - get the current VSI layer number
1023 * @hw: pointer to the HW struct
1025 * This function returns the current VSI layer number
1027 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1029 /* Num Layers VSI layer
1032 * 5 or less sw_entry_point_layer
1034 /* calculate the VSI layer based on number of layers. */
1035 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1036 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1038 if (layer > hw->sw_entry_point_layer)
1041 return hw->sw_entry_point_layer;
1045 * ice_sched_get_agg_layer - get the current aggregator layer number
1046 * @hw: pointer to the HW struct
1048 * This function returns the current aggregator layer number
1050 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1052 /* Num Layers aggregator layer
1054 * 7 or less sw_entry_point_layer
1056 /* calculate the aggregator layer based on number of layers. */
1057 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1058 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1060 if (layer > hw->sw_entry_point_layer)
1063 return hw->sw_entry_point_layer;
1067 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1068 * @pi: port information structure
1070 * This function removes the leaf node that was created by the FW
1071 * during initialization
1073 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1075 struct ice_sched_node *node;
1079 if (!node->num_children)
1081 node = node->children[0];
1083 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1084 u32 teid = LE32_TO_CPU(node->info.node_teid);
1085 enum ice_status status;
1087 /* remove the default leaf node */
1088 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1090 ice_free_sched_node(pi, node);
1095 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1096 * @pi: port information structure
1098 * This function frees all the nodes except root and TC that were created by
1099 * the FW during initialization
1101 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1103 struct ice_sched_node *node;
1105 ice_rm_dflt_leaf_node(pi);
1107 /* remove the default nodes except TC and root nodes */
1110 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1111 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1112 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1113 ice_free_sched_node(pi, node);
1117 if (!node->num_children)
1119 node = node->children[0];
1124 * ice_sched_init_port - Initialize scheduler by querying information from FW
1125 * @pi: port info structure for the tree to cleanup
1127 * This function is the initial call to find the total number of Tx scheduler
1128 * resources, default topology created by firmware and storing the information
1131 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1133 struct ice_aqc_get_topo_elem *buf;
1134 enum ice_status status;
1141 return ICE_ERR_PARAM;
1144 /* Query the Default Topology from FW */
1145 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1146 ICE_AQ_MAX_BUF_LEN);
1148 return ICE_ERR_NO_MEMORY;
1150 /* Query default scheduling tree topology */
1151 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1152 &num_branches, NULL);
1156 /* num_branches should be between 1-8 */
1157 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1158 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1160 status = ICE_ERR_PARAM;
1164 /* get the number of elements on the default/first branch */
1165 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1167 /* num_elems should always be between 1-9 */
1168 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1169 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1171 status = ICE_ERR_PARAM;
1175 /* If the last node is a leaf node then the index of the Q group
1176 * layer is two less than the number of elements.
1178 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1179 ICE_AQC_ELEM_TYPE_LEAF)
1180 pi->last_node_teid =
1181 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1183 pi->last_node_teid =
1184 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1186 /* Insert the Tx Sched root node */
1187 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1191 /* Parse the default tree and cache the information */
1192 for (i = 0; i < num_branches; i++) {
1193 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1195 /* Skip root element as already inserted */
1196 for (j = 1; j < num_elems; j++) {
1197 /* update the sw entry point */
1198 if (buf[0].generic[j].data.elem_type ==
1199 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1200 hw->sw_entry_point_layer = j;
1202 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1208 /* Remove the default nodes. */
1210 ice_sched_rm_dflt_nodes(pi);
1212 /* initialize the port for handling the scheduler tree */
1213 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1214 ice_init_lock(&pi->sched_lock);
1215 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1216 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1219 if (status && pi->root) {
1220 ice_free_sched_node(pi, pi->root);
1229 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1230 * @pi: port information structure
1231 * @teid: Scheduler node TEID
1233 * This function retrieves the ice_sched_node struct for given TEID from
1234 * the SW DB and returns it to the caller.
1236 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1238 struct ice_sched_node *node;
1243 /* Find the node starting from root */
1244 ice_acquire_lock(&pi->sched_lock);
1245 node = ice_sched_find_node_by_teid(pi->root, teid);
1246 ice_release_lock(&pi->sched_lock);
1249 ice_debug(pi->hw, ICE_DBG_SCHED,
1250 "Node not found for teid=0x%x\n", teid);
1256 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1257 * @hw: pointer to the HW struct
1259 * query FW for allocated scheduler resources and store in HW struct
1261 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1263 struct ice_aqc_query_txsched_res_resp *buf;
1264 enum ice_status status = ICE_SUCCESS;
1271 buf = (struct ice_aqc_query_txsched_res_resp *)
1272 ice_malloc(hw, sizeof(*buf));
1274 return ICE_ERR_NO_MEMORY;
1276 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1278 goto sched_query_out;
1280 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1281 hw->num_tx_sched_phys_layers =
1282 LE16_TO_CPU(buf->sched_props.phys_levels);
1283 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1284 hw->max_cgds = buf->sched_props.max_pf_cgds;
1286 /* max sibling group size of current layer refers to the max children
1287 * of the below layer node.
1288 * layer 1 node max children will be layer 2 max sibling group size
1289 * layer 2 node max children will be layer 3 max sibling group size
1290 * and so on. This array will be populated from root (index 0) to
1291 * qgroup layer 7. Leaf node has no children.
1293 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1294 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1295 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1298 hw->layer_info = (struct ice_aqc_layer_props *)
1299 ice_memdup(hw, buf->layer_props,
1300 (hw->num_tx_sched_layers *
1301 sizeof(*hw->layer_info)),
1303 if (!hw->layer_info) {
1304 status = ICE_ERR_NO_MEMORY;
1305 goto sched_query_out;
1315 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1316 * @hw: pointer to the HW struct
1317 * @base: pointer to the base node
1318 * @node: pointer to the node to search
1320 * This function checks whether a given node is part of the base node
1324 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1325 struct ice_sched_node *node)
1329 for (i = 0; i < base->num_children; i++) {
1330 struct ice_sched_node *child = base->children[i];
1335 if (child->tx_sched_layer > node->tx_sched_layer)
1338 /* this recursion is intentional, and wouldn't
1339 * go more than 8 calls
1341 if (ice_sched_find_node_in_subtree(hw, child, node))
1348 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1349 * @pi: port information structure
1350 * @vsi_handle: software VSI handle
1351 * @tc: branch number
1352 * @owner: LAN or RDMA
1354 * This function retrieves a free LAN or RDMA queue group node
1356 struct ice_sched_node *
1357 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1360 struct ice_sched_node *vsi_node, *qgrp_node = NULL;
1361 struct ice_vsi_ctx *vsi_ctx;
1365 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1366 max_children = pi->hw->max_children[qgrp_layer];
1368 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1371 vsi_node = vsi_ctx->sched.vsi_node[tc];
1372 /* validate invalid VSI ID */
1376 /* get the first queue group node from VSI sub-tree */
1377 qgrp_node = ice_sched_get_first_node(pi->hw, vsi_node, qgrp_layer);
1379 /* make sure the qgroup node is part of the VSI subtree */
1380 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1381 if (qgrp_node->num_children < max_children &&
1382 qgrp_node->owner == owner)
1384 qgrp_node = qgrp_node->sibling;
1392 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1393 * @hw: pointer to the HW struct
1394 * @tc_node: pointer to the TC node
1395 * @vsi_handle: software VSI handle
1397 * This function retrieves a VSI node for a given VSI ID from a given
1400 struct ice_sched_node *
1401 ice_sched_get_vsi_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
1404 struct ice_sched_node *node;
1407 vsi_layer = ice_sched_get_vsi_layer(hw);
1408 node = ice_sched_get_first_node(hw, tc_node, vsi_layer);
1410 /* Check whether it already exists */
1412 if (node->vsi_handle == vsi_handle)
1414 node = node->sibling;
1421 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1422 * @hw: pointer to the HW struct
1423 * @tc_node: pointer to the TC node
1424 * @agg_id: aggregator ID
1426 * This function retrieves an aggregator node for a given aggregator ID from
1429 struct ice_sched_node *
1430 ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
1433 struct ice_sched_node *node;
1436 agg_layer = ice_sched_get_agg_layer(hw);
1437 node = ice_sched_get_first_node(hw, tc_node, agg_layer);
1439 /* Check whether it already exists */
1441 if (node->agg_id == agg_id)
1443 node = node->sibling;
1450 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1451 * @hw: pointer to the HW struct
1452 * @node: pointer to the ice_sched_node struct
1454 * This function queries and compares the HW element with SW DB node parameters
1456 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1458 struct ice_aqc_get_elem buf;
1459 enum ice_status status;
1462 node_teid = LE32_TO_CPU(node->info.node_teid);
1463 status = ice_sched_query_elem(hw, node_teid, &buf);
1464 if (status != ICE_SUCCESS)
1467 if (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {
1468 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1477 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1478 * @hw: pointer to the HW struct
1479 * @num_qs: number of queues
1480 * @num_nodes: num nodes array
1482 * This function calculates the number of VSI child nodes based on the
1486 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1491 qgl = ice_sched_get_qgrp_layer(hw);
1492 vsil = ice_sched_get_vsi_layer(hw);
1494 /* calculate num nodes from queue group to VSI layer */
1495 for (i = qgl; i > vsil; i--) {
1496 /* round to the next integer if there is a remainder */
1497 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1499 /* need at least one node */
1500 num_nodes[i] = num ? num : 1;
1505 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1506 * @pi: port information structure
1507 * @vsi_handle: software VSI handle
1508 * @tc_node: pointer to the TC node
1509 * @num_nodes: pointer to the num nodes that needs to be added per layer
1510 * @owner: node owner (LAN or RDMA)
1512 * This function adds the VSI child nodes to tree. It gets called for
1513 * LAN and RDMA separately.
1515 static enum ice_status
1516 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1517 struct ice_sched_node *tc_node, u16 *num_nodes,
1520 struct ice_sched_node *parent, *node;
1521 struct ice_hw *hw = pi->hw;
1522 enum ice_status status;
1523 u32 first_node_teid;
1527 qgl = ice_sched_get_qgrp_layer(hw);
1528 vsil = ice_sched_get_vsi_layer(hw);
1529 parent = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
1530 for (i = vsil + 1; i <= qgl; i++) {
1534 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1538 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1541 /* The newly added node can be a new parent for the next
1545 parent = ice_sched_find_node_by_teid(tc_node,
1549 node->owner = owner;
1550 node = node->sibling;
1553 parent = parent->children[0];
1561 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1562 * @hw: pointer to the HW struct
1563 * @tc_node: pointer to TC node
1564 * @num_nodes: pointer to num nodes array
1566 * This function calculates the number of supported nodes needed to add this
1567 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1571 ice_sched_calc_vsi_support_nodes(struct ice_hw *hw,
1572 struct ice_sched_node *tc_node, u16 *num_nodes)
1574 struct ice_sched_node *node;
1578 vsil = ice_sched_get_vsi_layer(hw);
1579 for (i = vsil; i >= hw->sw_entry_point_layer; i--)
1580 /* Add intermediate nodes if TC has no children and
1581 * need at least one node for VSI
1583 if (!tc_node->num_children || i == vsil) {
1586 /* If intermediate nodes are reached max children
1587 * then add a new one.
1589 node = ice_sched_get_first_node(hw, tc_node, (u8)i);
1590 /* scan all the siblings */
1592 if (node->num_children < hw->max_children[i])
1594 node = node->sibling;
1597 /* tree has one intermediate node to add this new VSI.
1598 * So no need to calculate supported nodes for below
1603 /* all the nodes are full, allocate a new one */
1609 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1610 * @pi: port information structure
1611 * @vsi_handle: software VSI handle
1612 * @tc_node: pointer to TC node
1613 * @num_nodes: pointer to num nodes array
1615 * This function adds the VSI supported nodes into Tx tree including the
1616 * VSI, its parent and intermediate nodes in below layers
1618 static enum ice_status
1619 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1620 struct ice_sched_node *tc_node, u16 *num_nodes)
1622 struct ice_sched_node *parent = tc_node;
1623 enum ice_status status;
1624 u32 first_node_teid;
1629 return ICE_ERR_PARAM;
1631 vsil = ice_sched_get_vsi_layer(pi->hw);
1632 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1633 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1637 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1640 /* The newly added node can be a new parent for the next
1644 parent = ice_sched_find_node_by_teid(tc_node,
1647 parent = parent->children[0];
1653 parent->vsi_handle = vsi_handle;
1660 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1661 * @pi: port information structure
1662 * @vsi_handle: software VSI handle
1665 * This function adds a new VSI into scheduler tree
1667 static enum ice_status
1668 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1670 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1671 struct ice_sched_node *tc_node;
1672 struct ice_hw *hw = pi->hw;
1674 tc_node = ice_sched_get_tc_node(pi, tc);
1676 return ICE_ERR_PARAM;
1678 /* calculate number of supported nodes needed for this VSI */
1679 ice_sched_calc_vsi_support_nodes(hw, tc_node, num_nodes);
1681 /* add VSI supported nodes to TC subtree */
1682 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1687 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1688 * @pi: port information structure
1689 * @vsi_handle: software VSI handle
1691 * @new_numqs: new number of max queues
1692 * @owner: owner of this subtree
1694 * This function updates the VSI child nodes based on the number of queues
1696 static enum ice_status
1697 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1698 u8 tc, u16 new_numqs, u8 owner)
1700 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1701 struct ice_sched_node *vsi_node;
1702 struct ice_sched_node *tc_node;
1703 struct ice_vsi_ctx *vsi_ctx;
1704 enum ice_status status = ICE_SUCCESS;
1705 struct ice_hw *hw = pi->hw;
1708 tc_node = ice_sched_get_tc_node(pi, tc);
1712 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
1716 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1718 return ICE_ERR_PARAM;
1720 if (owner == ICE_SCHED_NODE_OWNER_LAN)
1721 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1723 return ICE_ERR_PARAM;
1725 /* num queues are not changed or less than the previous number */
1726 if (new_numqs <= prev_numqs)
1729 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1730 /* Keep the max number of queue configuration all the time. Update the
1731 * tree only if number of queues > previous number of queues. This may
1732 * leave some extra nodes in the tree if number of queues < previous
1733 * number but that wouldn't harm anything. Removing those extra nodes
1734 * may complicate the code if those nodes are part of SRL or
1735 * individually rate limited.
1737 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1738 new_num_nodes, owner);
1741 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1747 * ice_sched_cfg_vsi - configure the new/existing VSI
1748 * @pi: port information structure
1749 * @vsi_handle: software VSI handle
1751 * @maxqs: max number of queues
1752 * @owner: LAN or RDMA
1753 * @enable: TC enabled or disabled
1755 * This function adds/updates VSI nodes based on the number of queues. If TC is
1756 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1757 * disabled then suspend the VSI if it is not already.
1760 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1761 u8 owner, bool enable)
1763 struct ice_sched_node *vsi_node, *tc_node;
1764 struct ice_vsi_ctx *vsi_ctx;
1765 enum ice_status status = ICE_SUCCESS;
1766 struct ice_hw *hw = pi->hw;
1768 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1769 tc_node = ice_sched_get_tc_node(pi, tc);
1771 return ICE_ERR_PARAM;
1772 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1774 return ICE_ERR_PARAM;
1775 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
1777 /* suspend the VSI if TC is not enabled */
1779 if (vsi_node && vsi_node->in_use) {
1780 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1782 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1785 vsi_node->in_use = false;
1790 /* TC is enabled, if it is a new VSI then add it to the tree */
1792 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1796 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
1800 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1801 vsi_node->in_use = true;
1802 /* invalidate the max queues whenever VSI gets added first time
1803 * into the scheduler tree (boot or after reset). We need to
1804 * recreate the child nodes all the time in these cases.
1806 vsi_ctx->sched.max_lanq[tc] = 0;
1809 /* update the VSI child nodes */
1810 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1815 /* TC is enabled, resume the VSI if it is in the suspend state */
1816 if (!vsi_node->in_use) {
1817 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1819 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1821 vsi_node->in_use = true;
1828 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1829 * @pi: port information structure
1830 * @vsi_handle: software VSI handle
1832 * This function removes single aggregator VSI info entry from
1836 ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1838 struct ice_sched_agg_info *agg_info;
1839 struct ice_sched_agg_info *atmp;
1841 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1844 struct ice_sched_agg_vsi_info *agg_vsi_info;
1845 struct ice_sched_agg_vsi_info *vtmp;
1847 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1848 &agg_info->agg_vsi_list,
1849 ice_sched_agg_vsi_info, list_entry)
1850 if (agg_vsi_info->vsi_handle == vsi_handle) {
1851 LIST_DEL(&agg_vsi_info->list_entry);
1852 ice_free(pi->hw, agg_vsi_info);
1859 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1860 * @node: pointer to the sub-tree node
1862 * This function checks for a leaf node presence in a given sub-tree node.
1864 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
1868 for (i = 0; i < node->num_children; i++)
1869 if (ice_sched_is_leaf_node_present(node->children[i]))
1871 /* check for a leaf node */
1872 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
1876 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
1877 * @pi: port information structure
1878 * @vsi_handle: software VSI handle
1879 * @owner: LAN or RDMA
1881 * This function removes the VSI and its LAN or RDMA children nodes from the
1884 static enum ice_status
1885 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
1887 enum ice_status status = ICE_ERR_PARAM;
1888 struct ice_vsi_ctx *vsi_ctx;
1891 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
1892 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
1894 ice_acquire_lock(&pi->sched_lock);
1895 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1897 goto exit_sched_rm_vsi_cfg;
1899 ice_for_each_traffic_class(i) {
1900 struct ice_sched_node *vsi_node, *tc_node;
1903 tc_node = ice_sched_get_tc_node(pi, i);
1907 vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
1911 if (ice_sched_is_leaf_node_present(vsi_node)) {
1912 ice_debug(pi->hw, ICE_DBG_SCHED,
1913 "VSI has leaf nodes in TC %d\n", i);
1914 status = ICE_ERR_IN_USE;
1915 goto exit_sched_rm_vsi_cfg;
1917 while (j < vsi_node->num_children) {
1918 if (vsi_node->children[j]->owner == owner) {
1919 ice_free_sched_node(pi, vsi_node->children[j]);
1921 /* reset the counter again since the num
1922 * children will be updated after node removal
1929 /* remove the VSI if it has no children */
1930 if (!vsi_node->num_children) {
1931 ice_free_sched_node(pi, vsi_node);
1932 vsi_ctx->sched.vsi_node[i] = NULL;
1934 /* clean up aggregator related VSI info if any */
1935 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
1937 if (owner == ICE_SCHED_NODE_OWNER_LAN)
1938 vsi_ctx->sched.max_lanq[i] = 0;
1940 status = ICE_SUCCESS;
1942 exit_sched_rm_vsi_cfg:
1943 ice_release_lock(&pi->sched_lock);
1948 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
1949 * @pi: port information structure
1950 * @vsi_handle: software VSI handle
1952 * This function clears the VSI and its LAN children nodes from scheduler tree
1955 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
1957 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
1962 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
1963 * @hw: pointer to the HW struct
1964 * @node: pointer to the ice_sched_node struct
1966 * This function compares all the nodes for a given tree against HW DB nodes
1967 * This function needs to be called with the port_info->sched_lock held
1969 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
1973 /* start from the leaf node */
1974 for (i = 0; i < node->num_children; i++)
1975 /* Fail if node doesn't match with the SW DB
1976 * this recursion is intentional, and wouldn't
1977 * go more than 9 calls
1979 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
1982 return ice_sched_check_node(hw, node);
1986 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
1987 * @hw: pointer to the HW struct
1988 * @node_teid: node TEID
1989 * @buf: pointer to buffer
1990 * @buf_size: buffer size in bytes
1991 * @cd: pointer to command details structure or NULL
1993 * This function retrieves the tree topology from the firmware for a given
1994 * node TEID to the root node.
1997 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
1998 struct ice_aqc_get_elem *buf, u16 buf_size,
1999 struct ice_sq_cd *cd)
2001 struct ice_aqc_query_node_to_root *cmd;
2002 struct ice_aq_desc desc;
2004 cmd = &desc.params.query_node_to_root;
2005 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2006 cmd->teid = CPU_TO_LE32(node_teid);
2007 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2011 * ice_get_agg_info - get the aggregator ID
2012 * @hw: pointer to the hardware structure
2013 * @agg_id: aggregator ID
2015 * This function validates aggregator ID. The function returns info if
2016 * aggregator ID is present in list otherwise it returns null.
2018 static struct ice_sched_agg_info*
2019 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2021 struct ice_sched_agg_info *agg_info;
2023 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2025 if (agg_info->agg_id == agg_id)
2032 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2033 * @pi: port information structure
2034 * @agg_info: aggregator info
2035 * @tc: traffic class number
2036 * @rm_vsi_info: true or false
2038 * This function move all the VSI(s) to the default aggregator and delete
2039 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2040 * caller holds the scheduler lock.
2042 static enum ice_status
2043 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2044 struct ice_sched_agg_info *agg_info, u8 tc,
2047 struct ice_sched_agg_vsi_info *agg_vsi_info;
2048 struct ice_sched_agg_vsi_info *tmp;
2049 enum ice_status status = ICE_SUCCESS;
2051 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2052 ice_sched_agg_vsi_info, list_entry) {
2053 u16 vsi_handle = agg_vsi_info->vsi_handle;
2055 /* Move VSI to default aggregator */
2056 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2059 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2060 ICE_DFLT_AGG_ID, tc);
2064 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2065 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2066 LIST_DEL(&agg_vsi_info->list_entry);
2067 ice_free(pi->hw, agg_vsi_info);
2075 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2076 * @pi: port information structure
2077 * @agg_info: aggregator ID
2079 * @rm_vsi_info: bool value true or false
2081 * This function removes aggregator reference to VSI of given TC. It removes
2082 * the aggregator configuration completely for requested TC. The caller needs
2083 * to hold the scheduler lock.
2085 static enum ice_status
2086 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2087 u8 tc, bool rm_vsi_info)
2089 enum ice_status status = ICE_SUCCESS;
2091 /* If nothing to remove - return success */
2092 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2093 goto exit_rm_agg_cfg_tc;
2095 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2097 goto exit_rm_agg_cfg_tc;
2099 /* Delete aggregator node(s) */
2100 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2102 goto exit_rm_agg_cfg_tc;
2104 ice_clear_bit(tc, agg_info->tc_bitmap);
2110 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2111 * @pi: port information structure
2112 * @agg_id: aggregator ID
2113 * @tc_bitmap: 8 bits TC bitmap
2115 * Save aggregator TC bitmap. This function needs to be called with scheduler
2118 static enum ice_status
2119 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2120 ice_bitmap_t *tc_bitmap)
2122 struct ice_sched_agg_info *agg_info;
2124 agg_info = ice_get_agg_info(pi->hw, agg_id);
2126 return ICE_ERR_PARAM;
2127 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2128 ICE_MAX_TRAFFIC_CLASS);
2133 * ice_sched_cfg_agg - configure aggregator node
2134 * @pi: port information structure
2135 * @agg_id: aggregator ID
2136 * @agg_type: aggregator type queue, VSI, or aggregator group
2137 * @tc_bitmap: bits TC bitmap
2139 * It registers a unique aggregator node into scheduler services. It
2140 * allows a user to register with a unique ID to track it's resources.
2141 * The aggregator type determines if this is a queue group, VSI group
2142 * or aggregator group. It then creates the aggregator node(s) for requested
2143 * TC(s) or removes an existing aggregator node including its configuration
2144 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2145 * resources and remove aggregator ID.
2146 * This function needs to be called with scheduler lock held.
2148 static enum ice_status
2149 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2150 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2152 struct ice_sched_agg_info *agg_info;
2153 enum ice_status status = ICE_SUCCESS;
2154 struct ice_hw *hw = pi->hw;
2157 agg_info = ice_get_agg_info(hw, agg_id);
2159 /* Create new entry for new aggregator ID */
2160 agg_info = (struct ice_sched_agg_info *)
2161 ice_malloc(hw, sizeof(*agg_info));
2163 status = ICE_ERR_NO_MEMORY;
2166 agg_info->agg_id = agg_id;
2167 agg_info->agg_type = agg_type;
2168 agg_info->tc_bitmap[0] = 0;
2170 /* Initialize the aggregator VSI list head */
2171 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2173 /* Add new entry in aggregator list */
2174 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2176 /* Create aggregator node(s) for requested TC(s) */
2177 ice_for_each_traffic_class(tc) {
2178 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2179 /* Delete aggregator cfg TC if it exists previously */
2180 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2186 /* Check if aggregator node for TC already exists */
2187 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2190 /* Create new aggregator node for TC */
2191 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2195 /* Save aggregator node's TC information */
2196 ice_set_bit(tc, agg_info->tc_bitmap);
2203 * ice_cfg_agg - config aggregator node
2204 * @pi: port information structure
2205 * @agg_id: aggregator ID
2206 * @agg_type: aggregator type queue, VSI, or aggregator group
2207 * @tc_bitmap: bits TC bitmap
2209 * This function configures aggregator node(s).
2212 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2215 ice_bitmap_t bitmap = tc_bitmap;
2216 enum ice_status status;
2218 ice_acquire_lock(&pi->sched_lock);
2219 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2220 (ice_bitmap_t *)&bitmap);
2222 status = ice_save_agg_tc_bitmap(pi, agg_id,
2223 (ice_bitmap_t *)&bitmap);
2224 ice_release_lock(&pi->sched_lock);
2229 * ice_get_agg_vsi_info - get the aggregator ID
2230 * @agg_info: aggregator info
2231 * @vsi_handle: software VSI handle
2233 * The function returns aggregator VSI info based on VSI handle. This function
2234 * needs to be called with scheduler lock held.
2236 static struct ice_sched_agg_vsi_info*
2237 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2239 struct ice_sched_agg_vsi_info *agg_vsi_info;
2241 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2242 ice_sched_agg_vsi_info, list_entry)
2243 if (agg_vsi_info->vsi_handle == vsi_handle)
2244 return agg_vsi_info;
2250 * ice_get_vsi_agg_info - get the aggregator info of VSI
2251 * @hw: pointer to the hardware structure
2252 * @vsi_handle: Sw VSI handle
2254 * The function returns aggregator info of VSI represented via vsi_handle. The
2255 * VSI has in this case a different aggregator than the default one. This
2256 * function needs to be called with scheduler lock held.
2258 static struct ice_sched_agg_info*
2259 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2261 struct ice_sched_agg_info *agg_info;
2263 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2265 struct ice_sched_agg_vsi_info *agg_vsi_info;
2267 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2275 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2276 * @pi: port information structure
2277 * @agg_id: aggregator ID
2278 * @vsi_handle: software VSI handle
2279 * @tc_bitmap: TC bitmap of enabled TC(s)
2281 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2284 static enum ice_status
2285 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2286 ice_bitmap_t *tc_bitmap)
2288 struct ice_sched_agg_vsi_info *agg_vsi_info;
2289 struct ice_sched_agg_info *agg_info;
2291 agg_info = ice_get_agg_info(pi->hw, agg_id);
2293 return ICE_ERR_PARAM;
2294 /* check if entry already exist */
2295 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2297 return ICE_ERR_PARAM;
2298 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2299 ICE_MAX_TRAFFIC_CLASS);
2304 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2305 * @pi: port information structure
2306 * @agg_id: aggregator ID
2307 * @vsi_handle: software VSI handle
2308 * @tc_bitmap: TC bitmap of enabled TC(s)
2310 * This function moves VSI to a new or default aggregator node. If VSI is
2311 * already associated to the aggregator node then no operation is performed on
2312 * the tree. This function needs to be called with scheduler lock held.
2314 static enum ice_status
2315 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2316 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2318 struct ice_sched_agg_vsi_info *agg_vsi_info;
2319 struct ice_sched_agg_info *agg_info;
2320 enum ice_status status = ICE_SUCCESS;
2321 struct ice_hw *hw = pi->hw;
2324 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2325 return ICE_ERR_PARAM;
2326 agg_info = ice_get_agg_info(hw, agg_id);
2328 return ICE_ERR_PARAM;
2329 /* check if entry already exist */
2330 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2331 if (!agg_vsi_info) {
2332 /* Create new entry for VSI under aggregator list */
2333 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2334 ice_malloc(hw, sizeof(*agg_vsi_info));
2336 return ICE_ERR_PARAM;
2338 /* add VSI ID into the aggregator list */
2339 agg_vsi_info->vsi_handle = vsi_handle;
2340 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2342 /* Move VSI node to new aggregator node for requested TC(s) */
2343 ice_for_each_traffic_class(tc) {
2344 if (!ice_is_tc_ena(*tc_bitmap, tc))
2347 /* Move VSI to new aggregator */
2348 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2352 if (agg_id != ICE_DFLT_AGG_ID)
2353 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2355 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2357 /* If VSI moved back to default aggregator, delete agg_vsi_info. */
2358 if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
2359 ICE_MAX_TRAFFIC_CLASS)) {
2360 LIST_DEL(&agg_vsi_info->list_entry);
2361 ice_free(hw, agg_vsi_info);
2367 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2368 * @pi: port information structure
2369 * @agg_id: aggregator ID
2370 * @vsi_handle: software VSI handle
2371 * @tc_bitmap: TC bitmap of enabled TC(s)
2373 * Move or associate VSI to a new or default aggregator node.
2376 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2379 ice_bitmap_t bitmap = tc_bitmap;
2380 enum ice_status status;
2382 ice_acquire_lock(&pi->sched_lock);
2383 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2384 (ice_bitmap_t *)&bitmap);
2386 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2387 (ice_bitmap_t *)&bitmap);
2388 ice_release_lock(&pi->sched_lock);
2393 * ice_rm_agg_cfg - remove aggregator configuration
2394 * @pi: port information structure
2395 * @agg_id: aggregator ID
2397 * This function removes aggregator reference to VSI and delete aggregator ID
2398 * info. It removes the aggregator configuration completely.
2400 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
2402 struct ice_sched_agg_info *agg_info;
2403 enum ice_status status = ICE_SUCCESS;
2406 ice_acquire_lock(&pi->sched_lock);
2407 agg_info = ice_get_agg_info(pi->hw, agg_id);
2409 status = ICE_ERR_DOES_NOT_EXIST;
2410 goto exit_ice_rm_agg_cfg;
2413 ice_for_each_traffic_class(tc) {
2414 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
2416 goto exit_ice_rm_agg_cfg;
2419 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
2420 status = ICE_ERR_IN_USE;
2421 goto exit_ice_rm_agg_cfg;
2424 /* Safe to delete entry now */
2425 LIST_DEL(&agg_info->list_entry);
2426 ice_free(pi->hw, agg_info);
2428 /* Remove unused RL profile IDs from HW and SW DB */
2429 ice_sched_rm_unused_rl_prof(pi);
2431 exit_ice_rm_agg_cfg:
2432 ice_release_lock(&pi->sched_lock);
2437 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
2438 * @bw_t_info: bandwidth type information structure
2439 * @bw_alloc: Bandwidth allocation information
2441 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
2445 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
2447 bw_t_info->cir_bw.bw_alloc = bw_alloc;
2448 if (bw_t_info->cir_bw.bw_alloc)
2449 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
2451 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
2455 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
2456 * @bw_t_info: bandwidth type information structure
2457 * @bw_alloc: Bandwidth allocation information
2459 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
2463 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
2465 bw_t_info->eir_bw.bw_alloc = bw_alloc;
2466 if (bw_t_info->eir_bw.bw_alloc)
2467 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
2469 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
2473 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
2474 * @pi: port information structure
2475 * @vsi_handle: sw VSI handle
2476 * @tc: traffic class
2477 * @rl_type: rate limit type min or max
2478 * @bw_alloc: Bandwidth allocation information
2480 * Save BW alloc information of VSI type node for post replay use.
2482 static enum ice_status
2483 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
2484 enum ice_rl_type rl_type, u16 bw_alloc)
2486 struct ice_vsi_ctx *vsi_ctx;
2488 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2489 return ICE_ERR_PARAM;
2490 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2492 return ICE_ERR_PARAM;
2495 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
2499 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
2503 return ICE_ERR_PARAM;
2509 * ice_set_clear_cir_bw - set or clear CIR BW
2510 * @bw_t_info: bandwidth type information structure
2511 * @bw: bandwidth in Kbps - Kilo bits per sec
2513 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
2516 ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
2518 if (bw == ICE_SCHED_DFLT_BW) {
2519 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
2520 bw_t_info->cir_bw.bw = 0;
2522 /* Save type of BW information */
2523 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
2524 bw_t_info->cir_bw.bw = bw;
2529 * ice_set_clear_eir_bw - set or clear EIR BW
2530 * @bw_t_info: bandwidth type information structure
2531 * @bw: bandwidth in Kbps - Kilo bits per sec
2533 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
2536 ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
2538 if (bw == ICE_SCHED_DFLT_BW) {
2539 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
2540 bw_t_info->eir_bw.bw = 0;
2542 /* EIR BW and Shared BW profiles are mutually exclusive and
2543 * hence only one of them may be set for any given element.
2544 * First clear earlier saved shared BW information.
2546 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
2547 bw_t_info->shared_bw = 0;
2548 /* save EIR BW information */
2549 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
2550 bw_t_info->eir_bw.bw = bw;
2555 * ice_set_clear_shared_bw - set or clear shared BW
2556 * @bw_t_info: bandwidth type information structure
2557 * @bw: bandwidth in Kbps - Kilo bits per sec
2559 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
2562 ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
2564 if (bw == ICE_SCHED_DFLT_BW) {
2565 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
2566 bw_t_info->shared_bw = 0;
2568 /* EIR BW and Shared BW profiles are mutually exclusive and
2569 * hence only one of them may be set for any given element.
2570 * First clear earlier saved EIR BW information.
2572 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
2573 bw_t_info->eir_bw.bw = 0;
2574 /* save shared BW information */
2575 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
2576 bw_t_info->shared_bw = bw;
2581 * ice_sched_save_vsi_bw - save VSI node's BW information
2582 * @pi: port information structure
2583 * @vsi_handle: sw VSI handle
2584 * @tc: traffic class
2585 * @rl_type: rate limit type min, max, or shared
2586 * @bw: bandwidth in Kbps - Kilo bits per sec
2588 * Save BW information of VSI type node for post replay use.
2590 static enum ice_status
2591 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
2592 enum ice_rl_type rl_type, u32 bw)
2594 struct ice_vsi_ctx *vsi_ctx;
2596 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2597 return ICE_ERR_PARAM;
2598 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2600 return ICE_ERR_PARAM;
2603 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
2606 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
2609 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
2612 return ICE_ERR_PARAM;
2618 * ice_set_clear_prio - set or clear priority information
2619 * @bw_t_info: bandwidth type information structure
2620 * @prio: priority to save
2622 * Save or clear priority (prio) in the passed param bw_t_info.
2625 ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
2627 bw_t_info->generic = prio;
2628 if (bw_t_info->generic)
2629 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
2631 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
2635 * ice_sched_save_vsi_prio - save VSI node's priority information
2636 * @pi: port information structure
2637 * @vsi_handle: Software VSI handle
2638 * @tc: traffic class
2639 * @prio: priority to save
2641 * Save priority information of VSI type node for post replay use.
2643 static enum ice_status
2644 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
2647 struct ice_vsi_ctx *vsi_ctx;
2649 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2650 return ICE_ERR_PARAM;
2651 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2653 return ICE_ERR_PARAM;
2654 if (tc >= ICE_MAX_TRAFFIC_CLASS)
2655 return ICE_ERR_PARAM;
2656 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
2661 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
2662 * @pi: port information structure
2663 * @agg_id: node aggregator ID
2664 * @tc: traffic class
2665 * @rl_type: rate limit type min or max
2666 * @bw_alloc: bandwidth alloc information
2668 * Save BW alloc information of AGG type node for post replay use.
2670 static enum ice_status
2671 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
2672 enum ice_rl_type rl_type, u16 bw_alloc)
2674 struct ice_sched_agg_info *agg_info;
2676 agg_info = ice_get_agg_info(pi->hw, agg_id);
2678 return ICE_ERR_PARAM;
2679 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2680 return ICE_ERR_PARAM;
2683 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
2686 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
2689 return ICE_ERR_PARAM;
2695 * ice_sched_save_agg_bw - save aggregator node's BW information
2696 * @pi: port information structure
2697 * @agg_id: node aggregator ID
2698 * @tc: traffic class
2699 * @rl_type: rate limit type min, max, or shared
2700 * @bw: bandwidth in Kbps - Kilo bits per sec
2702 * Save BW information of AGG type node for post replay use.
2704 static enum ice_status
2705 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
2706 enum ice_rl_type rl_type, u32 bw)
2708 struct ice_sched_agg_info *agg_info;
2710 agg_info = ice_get_agg_info(pi->hw, agg_id);
2712 return ICE_ERR_PARAM;
2713 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2714 return ICE_ERR_PARAM;
2717 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
2720 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
2723 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
2726 return ICE_ERR_PARAM;
2732 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
2733 * @pi: port information structure
2734 * @vsi_handle: software VSI handle
2735 * @tc: traffic class
2736 * @rl_type: min or max
2737 * @bw: bandwidth in Kbps
2739 * This function configures BW limit of VSI scheduling node based on TC
2743 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
2744 enum ice_rl_type rl_type, u32 bw)
2746 enum ice_status status;
2748 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
2752 ice_acquire_lock(&pi->sched_lock);
2753 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
2754 ice_release_lock(&pi->sched_lock);
2760 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
2761 * @pi: port information structure
2762 * @vsi_handle: software VSI handle
2763 * @tc: traffic class
2764 * @rl_type: min or max
2766 * This function configures default BW limit of VSI scheduling node based on TC
2770 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
2771 enum ice_rl_type rl_type)
2773 enum ice_status status;
2775 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
2780 ice_acquire_lock(&pi->sched_lock);
2781 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
2783 ice_release_lock(&pi->sched_lock);
2789 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
2790 * @pi: port information structure
2791 * @agg_id: aggregator ID
2792 * @tc: traffic class
2793 * @rl_type: min or max
2794 * @bw: bandwidth in Kbps
2796 * This function applies BW limit to aggregator scheduling node based on TC
2800 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
2801 enum ice_rl_type rl_type, u32 bw)
2803 enum ice_status status;
2805 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
2808 ice_acquire_lock(&pi->sched_lock);
2809 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
2810 ice_release_lock(&pi->sched_lock);
2816 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
2817 * @pi: port information structure
2818 * @agg_id: aggregator ID
2819 * @tc: traffic class
2820 * @rl_type: min or max
2822 * This function applies default BW limit to aggregator scheduling node based
2823 * on TC information.
2826 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
2827 enum ice_rl_type rl_type)
2829 enum ice_status status;
2831 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
2835 ice_acquire_lock(&pi->sched_lock);
2836 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
2838 ice_release_lock(&pi->sched_lock);
2844 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
2845 * @pi: port information structure
2846 * @vsi_handle: software VSI handle
2847 * @bw: bandwidth in Kbps
2849 * This function Configures shared rate limiter(SRL) of all VSI type nodes
2850 * across all traffic classes for VSI matching handle.
2853 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
2855 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
2859 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
2860 * @pi: port information structure
2861 * @vsi_handle: software VSI handle
2863 * This function removes the shared rate limiter(SRL) of all VSI type nodes
2864 * across all traffic classes for VSI matching handle.
2867 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
2869 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
2874 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
2875 * @pi: port information structure
2876 * @agg_id: aggregator ID
2877 * @bw: bandwidth in Kbps
2879 * This function configures the shared rate limiter(SRL) of all aggregator type
2880 * nodes across all traffic classes for aggregator matching agg_id.
2883 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
2885 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
2889 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
2890 * @pi: port information structure
2891 * @agg_id: aggregator ID
2893 * This function removes the shared rate limiter(SRL) of all aggregator type
2894 * nodes across all traffic classes for aggregator matching agg_id.
2897 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
2899 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
2903 * ice_config_vsi_queue_priority - config VSI queue priority of node
2904 * @pi: port information structure
2905 * @num_qs: number of VSI queues
2906 * @q_ids: queue IDs array
2907 * @q_ids: queue IDs array
2908 * @q_prio: queue priority array
2910 * This function configures the queue node priority (Sibling Priority) of the
2911 * passed in VSI's queue(s) for a given traffic class (TC).
2914 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
2917 enum ice_status status = ICE_ERR_PARAM;
2918 struct ice_hw *hw = pi->hw;
2921 ice_acquire_lock(&pi->sched_lock);
2923 for (i = 0; i < num_qs; i++) {
2924 struct ice_sched_node *node;
2926 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
2927 if (!node || node->info.data.elem_type !=
2928 ICE_AQC_ELEM_TYPE_LEAF) {
2929 status = ICE_ERR_PARAM;
2932 /* Configure Priority */
2933 status = ice_sched_cfg_sibl_node_prio(hw, node, q_prio[i]);
2938 ice_release_lock(&pi->sched_lock);
2943 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
2944 * @pi: port information structure
2945 * @agg_id: Aggregator ID
2946 * @num_vsis: number of VSI(s)
2947 * @vsi_handle_arr: array of software VSI handles
2948 * @node_prio: pointer to node priority
2949 * @tc: traffic class
2951 * This function configures the node priority (Sibling Priority) of the
2952 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
2955 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
2956 u16 num_vsis, u16 *vsi_handle_arr,
2957 u8 *node_prio, u8 tc)
2959 struct ice_sched_agg_vsi_info *agg_vsi_info;
2960 struct ice_sched_node *tc_node, *agg_node;
2961 enum ice_status status = ICE_ERR_PARAM;
2962 struct ice_sched_agg_info *agg_info;
2963 bool agg_id_present = false;
2964 struct ice_hw *hw = pi->hw;
2967 ice_acquire_lock(&pi->sched_lock);
2968 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2970 if (agg_info->agg_id == agg_id) {
2971 agg_id_present = true;
2974 if (!agg_id_present)
2975 goto exit_agg_priority_per_tc;
2977 tc_node = ice_sched_get_tc_node(pi, tc);
2979 goto exit_agg_priority_per_tc;
2981 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
2983 goto exit_agg_priority_per_tc;
2985 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
2986 goto exit_agg_priority_per_tc;
2988 for (i = 0; i < num_vsis; i++) {
2989 struct ice_sched_node *vsi_node;
2990 bool vsi_handle_valid = false;
2993 status = ICE_ERR_PARAM;
2994 vsi_handle = vsi_handle_arr[i];
2995 if (!ice_is_vsi_valid(hw, vsi_handle))
2996 goto exit_agg_priority_per_tc;
2997 /* Verify child nodes before applying settings */
2998 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2999 ice_sched_agg_vsi_info, list_entry)
3000 if (agg_vsi_info->vsi_handle == vsi_handle) {
3001 vsi_handle_valid = true;
3004 if (!vsi_handle_valid)
3005 goto exit_agg_priority_per_tc;
3007 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
3009 goto exit_agg_priority_per_tc;
3011 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3012 /* Configure Priority */
3013 status = ice_sched_cfg_sibl_node_prio(hw, vsi_node,
3017 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3024 exit_agg_priority_per_tc:
3025 ice_release_lock(&pi->sched_lock);
3030 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3031 * @pi: port information structure
3032 * @vsi_handle: software VSI handle
3033 * @ena_tcmap: enabled TC map
3034 * @rl_type: Rate limit type CIR/EIR
3035 * @bw_alloc: Array of BW alloc
3037 * This function configures the BW allocation of the passed in VSI's
3038 * node(s) for enabled traffic class.
3041 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3042 enum ice_rl_type rl_type, u8 *bw_alloc)
3044 enum ice_status status = ICE_SUCCESS;
3047 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3048 return ICE_ERR_PARAM;
3050 ice_acquire_lock(&pi->sched_lock);
3052 /* Return success if no nodes are present across TC */
3053 ice_for_each_traffic_class(tc) {
3054 struct ice_sched_node *tc_node, *vsi_node;
3056 if (!ice_is_tc_ena(ena_tcmap, tc))
3059 tc_node = ice_sched_get_tc_node(pi, tc);
3063 vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
3067 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3071 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3072 rl_type, bw_alloc[tc]);
3077 ice_release_lock(&pi->sched_lock);
3082 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3083 * @pi: port information structure
3084 * @agg_id: aggregator ID
3085 * @ena_tcmap: enabled TC map
3086 * @rl_type: rate limit type CIR/EIR
3087 * @bw_alloc: array of BW alloc
3089 * This function configures the BW allocation of passed in aggregator for
3090 * enabled traffic class(s).
3093 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3094 enum ice_rl_type rl_type, u8 *bw_alloc)
3096 struct ice_sched_agg_info *agg_info;
3097 bool agg_id_present = false;
3098 enum ice_status status = ICE_SUCCESS;
3099 struct ice_hw *hw = pi->hw;
3102 ice_acquire_lock(&pi->sched_lock);
3103 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3105 if (agg_info->agg_id == agg_id) {
3106 agg_id_present = true;
3109 if (!agg_id_present) {
3110 status = ICE_ERR_PARAM;
3111 goto exit_cfg_agg_bw_alloc;
3114 /* Return success if no nodes are present across TC */
3115 ice_for_each_traffic_class(tc) {
3116 struct ice_sched_node *tc_node, *agg_node;
3118 if (!ice_is_tc_ena(ena_tcmap, tc))
3121 tc_node = ice_sched_get_tc_node(pi, tc);
3125 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
3129 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3133 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3139 exit_cfg_agg_bw_alloc:
3140 ice_release_lock(&pi->sched_lock);
3145 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3146 * @bw: bandwidth in Kbps
3148 * This function calculates the wakeup parameter of RL profile.
3150 static u16 ice_sched_calc_wakeup(s32 bw)
3152 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3156 /* Get the wakeup integer value */
3157 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3158 wakeup_int = DIV_64BIT(ICE_RL_PROF_FREQUENCY, bytes_per_sec);
3159 if (wakeup_int > 63) {
3160 wakeup = (u16)((1 << 15) | wakeup_int);
3162 /* Calculate fraction value up to 4 decimals
3163 * Convert Integer value to a constant multiplier
3165 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3166 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3167 ICE_RL_PROF_FREQUENCY, bytes_per_sec);
3169 /* Get Fraction value */
3170 wakeup_f = wakeup_a - wakeup_b;
3172 /* Round up the Fractional value via Ceil(Fractional value) */
3173 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3176 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3177 ICE_RL_PROF_MULTIPLIER);
3178 wakeup |= (u16)(wakeup_int << 9);
3179 wakeup |= (u16)(0x1ff & wakeup_f_int);
3186 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3187 * @bw: bandwidth in Kbps
3188 * @profile: profile parameters to return
3190 * This function converts the BW to profile structure format.
3192 static enum ice_status
3193 ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
3195 enum ice_status status = ICE_ERR_PARAM;
3196 s64 bytes_per_sec, ts_rate, mv_tmp;
3202 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3203 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3206 /* Bytes per second from Kbps */
3207 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3209 /* encode is 6 bits but really useful are 5 bits */
3210 for (i = 0; i < 64; i++) {
3211 u64 pow_result = BIT_ULL(i);
3213 ts_rate = DIV_64BIT((s64)ICE_RL_PROF_FREQUENCY,
3214 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3218 /* Multiplier value */
3219 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3222 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3223 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3225 /* First multiplier value greater than the given
3228 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3237 wm = ice_sched_calc_wakeup(bw);
3238 profile->rl_multiply = CPU_TO_LE16(mv);
3239 profile->wake_up_calc = CPU_TO_LE16(wm);
3240 profile->rl_encode = CPU_TO_LE16(encode);
3241 status = ICE_SUCCESS;
3243 status = ICE_ERR_DOES_NOT_EXIST;
3250 * ice_sched_add_rl_profile - add RL profile
3251 * @pi: port information structure
3252 * @rl_type: type of rate limit BW - min, max, or shared
3253 * @bw: bandwidth in Kbps - Kilo bits per sec
3254 * @layer_num: specifies in which layer to create profile
3256 * This function first checks the existing list for corresponding BW
3257 * parameter. If it exists, it returns the associated profile otherwise
3258 * it creates a new rate limit profile for requested BW, and adds it to
3259 * the HW DB and local list. It returns the new profile or null on error.
3260 * The caller needs to hold the scheduler lock.
3262 static struct ice_aqc_rl_profile_info *
3263 ice_sched_add_rl_profile(struct ice_port_info *pi,
3264 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3266 struct ice_aqc_rl_profile_generic_elem *buf;
3267 struct ice_aqc_rl_profile_info *rl_prof_elem;
3268 u16 profiles_added = 0, num_profiles = 1;
3269 enum ice_status status = ICE_ERR_PARAM;
3275 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3278 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3281 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3290 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3291 ice_aqc_rl_profile_info, list_entry)
3292 if (rl_prof_elem->profile.flags == profile_type &&
3293 rl_prof_elem->bw == bw)
3294 /* Return existing profile ID info */
3295 return rl_prof_elem;
3297 /* Create new profile ID */
3298 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3299 ice_malloc(hw, sizeof(*rl_prof_elem));
3304 status = ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile);
3305 if (status != ICE_SUCCESS)
3306 goto exit_add_rl_prof;
3308 rl_prof_elem->bw = bw;
3309 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3310 rl_prof_elem->profile.level = layer_num + 1;
3311 rl_prof_elem->profile.flags = profile_type;
3312 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3314 /* Create new entry in HW DB */
3315 buf = (struct ice_aqc_rl_profile_generic_elem *)
3316 &rl_prof_elem->profile;
3317 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3318 &profiles_added, NULL);
3319 if (status || profiles_added != num_profiles)
3320 goto exit_add_rl_prof;
3322 /* Good entry - add in the list */
3323 rl_prof_elem->prof_id_ref = 0;
3324 LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3325 return rl_prof_elem;
3328 ice_free(hw, rl_prof_elem);
3333 * ice_sched_del_rl_profile - remove rl profile
3334 * @hw: pointer to the hw struct
3335 * @rl_info: rate limit profile information
3337 * If the profile id is not referenced anymore, it removes profile id with
3338 * its associated parameters from hw db,and locally. The caller needs to
3339 * hold scheduler lock.
3342 ice_sched_del_rl_profile(struct ice_hw *hw,
3343 struct ice_aqc_rl_profile_info *rl_info)
3345 struct ice_aqc_rl_profile_generic_elem *buf;
3346 u16 num_profiles_removed;
3347 enum ice_status status;
3348 u16 num_profiles = 1;
3350 if (rl_info->prof_id_ref != 0)
3351 return ICE_ERR_IN_USE;
3353 /* Safe to remove profile id */
3354 buf = (struct ice_aqc_rl_profile_generic_elem *)
3356 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3357 &num_profiles_removed, NULL);
3358 if (status || num_profiles_removed != num_profiles)
3361 /* Delete stale entry now */
3362 LIST_DEL(&rl_info->list_entry);
3363 ice_free(hw, rl_info);
3368 * ice_sched_rm_unused_rl_prof - remove unused rl profile
3369 * @pi: port information structure
3371 * This function removes unused rate limit profiles from the hw and
3372 * SW DB. The caller needs to hold scheduler lock.
3374 void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
3378 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
3379 struct ice_aqc_rl_profile_info *rl_prof_elem;
3380 struct ice_aqc_rl_profile_info *rl_prof_tmp;
3382 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
3383 &pi->rl_prof_list[ln],
3384 ice_aqc_rl_profile_info, list_entry) {
3385 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
3386 ice_debug(pi->hw, ICE_DBG_SCHED,
3387 "Removed rl profile\n");
3393 * ice_sched_update_elem - update element
3394 * @hw: pointer to the hw struct
3395 * @node: pointer to node
3396 * @info: node info to update
3398 * It updates the HW DB, and local SW DB of node. It updates the scheduling
3399 * parameters of node from argument info data buffer (Info->data buf) and
3400 * returns success or error on config sched element failure. The caller
3401 * needs to hold scheduler lock.
3403 static enum ice_status
3404 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
3405 struct ice_aqc_txsched_elem_data *info)
3407 struct ice_aqc_conf_elem buf;
3408 enum ice_status status;
3412 buf.generic[0] = *info;
3413 /* Parent teid is reserved field in this aq call */
3414 buf.generic[0].parent_teid = 0;
3415 /* Element type is reserved field in this aq call */
3416 buf.generic[0].data.elem_type = 0;
3417 /* Flags is reserved field in this aq call */
3418 buf.generic[0].data.flags = 0;
3421 /* Configure element node */
3422 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
3424 if (status || elem_cfgd != num_elems) {
3425 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
3429 /* Config success case */
3430 /* Now update local SW DB */
3431 /* Only copy the data portion of info buffer */
3432 node->info.data = info->data;
3437 * ice_sched_cfg_node_bw_lmt - configure node sched params
3438 * @hw: pointer to the HW struct
3439 * @node: sched node to configure
3440 * @rl_type: rate limit type CIR, EIR, or shared
3441 * @rl_prof_id: rate limit profile ID
3443 * This function configures node element's BW limit.
3445 static enum ice_status
3446 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3447 enum ice_rl_type rl_type, u16 rl_prof_id)
3449 struct ice_aqc_txsched_elem_data buf;
3450 struct ice_aqc_txsched_elem *data;
3456 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3457 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3460 /* EIR BW and Shared BW profiles are mutually exclusive and
3461 * hence only one of them may be set for any given element
3463 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3465 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3466 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3469 /* Check for removing shared BW */
3470 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3471 /* remove shared profile */
3472 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3473 data->srl_id = 0; /* clear SRL field */
3475 /* enable back EIR to default profile */
3476 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3477 data->eir_bw.bw_profile_idx =
3478 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3481 /* EIR BW and Shared BW profiles are mutually exclusive and
3482 * hence only one of them may be set for any given element
3484 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3485 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3486 ICE_SCHED_DFLT_RL_PROF_ID))
3488 /* EIR BW is set to default, disable it */
3489 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3490 /* Okay to enable shared BW now */
3491 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
3492 data->srl_id = CPU_TO_LE16(rl_prof_id);
3495 /* Unknown rate limit type */
3496 return ICE_ERR_PARAM;
3499 /* Configure element */
3500 return ice_sched_update_elem(hw, node, &buf);
3504 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
3506 * @rl_type: rate limit type
3508 * If existing profile matches, it returns the corresponding rate
3509 * limit profile ID, otherwise it returns an invalid ID as error.
3512 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
3513 enum ice_rl_type rl_type)
3515 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
3516 struct ice_aqc_txsched_elem *data;
3518 data = &node->info.data;
3521 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
3522 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
3525 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
3526 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
3529 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3530 rl_prof_id = LE16_TO_CPU(data->srl_id);
3540 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
3541 * @pi: port information structure
3542 * @rl_type: type of rate limit BW - min, max, or shared
3543 * @layer_index: layer index
3545 * This function returns requested profile creation layer.
3548 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
3551 struct ice_hw *hw = pi->hw;
3553 if (layer_index >= hw->num_tx_sched_layers)
3554 return ICE_SCHED_INVAL_LAYER_NUM;
3557 if (hw->layer_info[layer_index].max_cir_rl_profiles)
3561 if (hw->layer_info[layer_index].max_eir_rl_profiles)
3565 /* if current layer doesn't support SRL profile creation
3566 * then try a layer up or down.
3568 if (hw->layer_info[layer_index].max_srl_profiles)
3570 else if (layer_index < hw->num_tx_sched_layers - 1 &&
3571 hw->layer_info[layer_index + 1].max_srl_profiles)
3572 return layer_index + 1;
3573 else if (layer_index > 0 &&
3574 hw->layer_info[layer_index - 1].max_srl_profiles)
3575 return layer_index - 1;
3580 return ICE_SCHED_INVAL_LAYER_NUM;
3584 * ice_sched_get_srl_node - get shared rate limit node
3586 * @srl_layer: shared rate limit layer
3588 * This function returns SRL node to be used for shared rate limit purpose.
3589 * The caller needs to hold scheduler lock.
3591 static struct ice_sched_node *
3592 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
3594 if (srl_layer > node->tx_sched_layer)
3595 return node->children[0];
3596 else if (srl_layer < node->tx_sched_layer)
3597 /* Node can't be created without a parent. It will always
3598 * have a valid parent except root node.
3600 return node->parent;
3606 * ice_sched_rm_rl_profile - remove RL profile ID
3607 * @pi: port information structure
3608 * @layer_num: layer number where profiles are saved
3609 * @profile_type: profile type like EIR, CIR, or SRL
3610 * @profile_id: profile ID to remove
3612 * This function removes rate limit profile from layer 'layer_num' of type
3613 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
3616 static enum ice_status
3617 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
3620 struct ice_aqc_rl_profile_info *rl_prof_elem;
3621 enum ice_status status = ICE_SUCCESS;
3623 /* Check the existing list for RL profile */
3624 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3625 ice_aqc_rl_profile_info, list_entry)
3626 if (rl_prof_elem->profile.flags == profile_type &&
3627 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
3629 if (rl_prof_elem->prof_id_ref)
3630 rl_prof_elem->prof_id_ref--;
3632 /* Remove old profile ID from database */
3633 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
3634 if (status && status != ICE_ERR_IN_USE)
3635 ice_debug(pi->hw, ICE_DBG_SCHED,
3636 "Remove rl profile failed\n");
3639 if (status == ICE_ERR_IN_USE)
3640 status = ICE_SUCCESS;
3645 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
3646 * @pi: port information structure
3647 * @node: pointer to node structure
3648 * @rl_type: rate limit type min, max, or shared
3649 * @layer_num: layer number where RL profiles are saved
3651 * This function configures node element's BW rate limit profile ID of
3652 * type CIR, EIR, or SRL to default. This function needs to be called
3653 * with the scheduler lock held.
3655 static enum ice_status
3656 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
3657 struct ice_sched_node *node,
3658 enum ice_rl_type rl_type, u8 layer_num)
3660 enum ice_status status;
3669 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3670 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
3673 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3674 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
3677 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3678 /* No SRL is configured for default case */
3679 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
3682 return ICE_ERR_PARAM;
3684 /* Save existing RL prof ID for later clean up */
3685 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
3686 /* Configure BW scheduling parameters */
3687 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
3691 /* Remove stale RL profile ID */
3692 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
3693 old_id == ICE_SCHED_INVAL_PROF_ID)
3696 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
3700 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
3701 * @pi: port information structure
3702 * @node: pointer to node structure
3703 * @layer_num: layer number where rate limit profiles are saved
3704 * @rl_type: rate limit type min, max, or shared
3705 * @bw: bandwidth value
3707 * This function prepares node element's bandwidth to SRL or EIR exclusively.
3708 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
3709 * them may be set for any given element. This function needs to be called
3710 * with the scheduler lock held.
3712 static enum ice_status
3713 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
3714 struct ice_sched_node *node,
3715 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
3717 if (rl_type == ICE_SHARED_BW) {
3718 /* SRL node passed in this case, it may be different node */
3719 if (bw == ICE_SCHED_DFLT_BW)
3720 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
3721 * enables EIR to default. EIR is not set in this
3722 * case, so no additional action is required.
3726 /* SRL being configured, set EIR to default here.
3727 * ice_sched_cfg_node_bw_lmt() disables EIR when it
3730 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
3732 } else if (rl_type == ICE_MAX_BW &&
3733 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
3734 /* Remove Shared profile. Set default shared BW call
3735 * removes shared profile for a node.
3737 return ice_sched_set_node_bw_dflt(pi, node,
3745 * ice_sched_set_node_bw - set node's bandwidth
3746 * @pi: port information structure
3748 * @rl_type: rate limit type min, max, or shared
3749 * @bw: bandwidth in Kbps - Kilo bits per sec
3750 * @layer_num: layer number
3752 * This function adds new profile corresponding to requested BW, configures
3753 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
3754 * ID from local database. The caller needs to hold scheduler lock.
3756 static enum ice_status
3757 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
3758 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3760 struct ice_aqc_rl_profile_info *rl_prof_info;
3761 enum ice_status status = ICE_ERR_PARAM;
3762 struct ice_hw *hw = pi->hw;
3763 u16 old_id, rl_prof_id;
3765 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
3769 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
3771 /* Save existing RL prof ID for later clean up */
3772 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
3773 /* Configure BW scheduling parameters */
3774 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
3778 /* New changes has been applied */
3779 /* Increment the profile ID reference count */
3780 rl_prof_info->prof_id_ref++;
3782 /* Check for old ID removal */
3783 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
3784 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
3787 return ice_sched_rm_rl_profile(pi, layer_num,
3788 rl_prof_info->profile.flags,
3793 * ice_sched_set_node_bw_lmt - set node's BW limit
3794 * @pi: port information structure
3796 * @rl_type: rate limit type min, max, or shared
3797 * @bw: bandwidth in Kbps - Kilo bits per sec
3799 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
3800 * EIR, or SRL. The caller needs to hold scheduler lock.
3803 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
3804 enum ice_rl_type rl_type, u32 bw)
3806 struct ice_sched_node *cfg_node = node;
3807 enum ice_status status;
3813 return ICE_ERR_PARAM;
3815 /* Remove unused RL profile IDs from HW and SW DB */
3816 ice_sched_rm_unused_rl_prof(pi);
3817 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
3818 node->tx_sched_layer);
3819 if (layer_num >= hw->num_tx_sched_layers)
3820 return ICE_ERR_PARAM;
3822 if (rl_type == ICE_SHARED_BW) {
3823 /* SRL node may be different */
3824 cfg_node = ice_sched_get_srl_node(node, layer_num);
3828 /* EIR BW and Shared BW profiles are mutually exclusive and
3829 * hence only one of them may be set for any given element
3831 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
3835 if (bw == ICE_SCHED_DFLT_BW)
3836 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
3838 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
3842 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
3843 * @pi: port information structure
3844 * @node: pointer to node structure
3845 * @rl_type: rate limit type min, max, or shared
3847 * This function configures node element's BW rate limit profile ID of
3848 * type CIR, EIR, or SRL to default. This function needs to be called
3849 * with the scheduler lock held.
3851 static enum ice_status
3852 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
3853 struct ice_sched_node *node,
3854 enum ice_rl_type rl_type)
3856 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
3861 * ice_sched_validate_srl_node - Check node for SRL applicability
3862 * @node: sched node to configure
3863 * @sel_layer: selected SRL layer
3865 * This function checks if the SRL can be applied to a selceted layer node on
3866 * behalf of the requested node (first argument). This function needs to be
3867 * called with scheduler lock held.
3869 static enum ice_status
3870 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
3872 /* SRL profiles are not available on all layers. Check if the
3873 * SRL profile can be applied to a node above or below the
3874 * requested node. SRL configuration is possible only if the
3875 * selected layer's node has single child.
3877 if (sel_layer == node->tx_sched_layer ||
3878 ((sel_layer == node->tx_sched_layer + 1) &&
3879 node->num_children == 1) ||
3880 ((sel_layer == node->tx_sched_layer - 1) &&
3881 (node->parent && node->parent->num_children == 1)))
3888 * ice_sched_set_q_bw_lmt - sets queue BW limit
3889 * @pi: port information structure
3890 * @q_id: queue ID (leaf node TEID)
3891 * @rl_type: min, max, or shared
3892 * @bw: bandwidth in Kbps
3894 * This function sets BW limit of queue scheduling node.
3896 static enum ice_status
3897 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u32 q_id,
3898 enum ice_rl_type rl_type, u32 bw)
3900 enum ice_status status = ICE_ERR_PARAM;
3901 struct ice_sched_node *node;
3903 ice_acquire_lock(&pi->sched_lock);
3905 node = ice_sched_find_node_by_teid(pi->root, q_id);
3907 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_id\n");
3911 /* Return error if it is not a leaf node */
3912 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
3915 /* SRL bandwidth layer selection */
3916 if (rl_type == ICE_SHARED_BW) {
3917 u8 sel_layer; /* selected layer */
3919 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
3920 node->tx_sched_layer);
3921 if (sel_layer >= pi->hw->num_tx_sched_layers) {
3922 status = ICE_ERR_PARAM;
3925 status = ice_sched_validate_srl_node(node, sel_layer);
3930 if (bw == ICE_SCHED_DFLT_BW)
3931 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
3933 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
3936 ice_release_lock(&pi->sched_lock);
3941 * ice_cfg_q_bw_lmt - configure queue BW limit
3942 * @pi: port information structure
3943 * @q_id: queue ID (leaf node TEID)
3944 * @rl_type: min, max, or shared
3945 * @bw: bandwidth in Kbps
3947 * This function configures BW limit of queue scheduling node.
3950 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u32 q_id, enum ice_rl_type rl_type,
3953 return ice_sched_set_q_bw_lmt(pi, q_id, rl_type, bw);
3957 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
3958 * @pi: port information structure
3959 * @q_id: queue ID (leaf node TEID)
3960 * @rl_type: min, max, or shared
3962 * This function configures BW default limit of queue scheduling node.
3965 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u32 q_id,
3966 enum ice_rl_type rl_type)
3968 return ice_sched_set_q_bw_lmt(pi, q_id, rl_type, ICE_SCHED_DFLT_BW);
3972 * ice_sched_save_tc_node_bw - save TC node BW limit
3973 * @pi: port information structure
3975 * @rl_type: min or max
3976 * @bw: bandwidth in Kbps
3978 * This function saves the modified values of bandwidth settings for later
3979 * replay purpose (restore) after reset.
3981 static enum ice_status
3982 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
3983 enum ice_rl_type rl_type, u32 bw)
3985 struct ice_hw *hw = pi->hw;
3987 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3988 return ICE_ERR_PARAM;
3991 ice_set_clear_cir_bw(&hw->tc_node_bw_t_info[tc], bw);
3994 ice_set_clear_eir_bw(&hw->tc_node_bw_t_info[tc], bw);
3997 ice_set_clear_shared_bw(&hw->tc_node_bw_t_info[tc], bw);
4000 return ICE_ERR_PARAM;
4006 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4007 * @pi: port information structure
4009 * @rl_type: min or max
4010 * @bw: bandwidth in Kbps
4012 * This function configures bandwidth limit of TC node.
4014 static enum ice_status
4015 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4016 enum ice_rl_type rl_type, u32 bw)
4018 enum ice_status status = ICE_ERR_PARAM;
4019 struct ice_sched_node *tc_node;
4021 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4023 ice_acquire_lock(&pi->sched_lock);
4024 tc_node = ice_sched_get_tc_node(pi, tc);
4026 goto exit_set_tc_node_bw;
4027 if (bw == ICE_SCHED_DFLT_BW)
4028 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4030 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4032 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4034 exit_set_tc_node_bw:
4035 ice_release_lock(&pi->sched_lock);
4040 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4041 * @pi: port information structure
4043 * @rl_type: min or max
4044 * @bw: bandwidth in Kbps
4046 * This function configures BW limit of TC node.
4047 * Note: The minimum guaranteed reservation is done via DCBX.
4050 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4051 enum ice_rl_type rl_type, u32 bw)
4053 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4057 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4058 * @pi: port information structure
4060 * @rl_type: min or max
4062 * This function configures BW default limit of TC node.
4065 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4066 enum ice_rl_type rl_type)
4068 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4072 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4073 * @pi: port information structure
4074 * @tc: traffic class
4075 * @rl_type: rate limit type min or max
4076 * @bw_alloc: Bandwidth allocation information
4078 * Save BW alloc information of VSI type node for post replay use.
4080 static enum ice_status
4081 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4082 enum ice_rl_type rl_type, u16 bw_alloc)
4084 struct ice_hw *hw = pi->hw;
4086 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4087 return ICE_ERR_PARAM;
4090 ice_set_clear_cir_bw_alloc(&hw->tc_node_bw_t_info[tc],
4094 ice_set_clear_eir_bw_alloc(&hw->tc_node_bw_t_info[tc],
4098 return ICE_ERR_PARAM;
4104 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4105 * @pi: port information structure
4107 * @rl_type: min or max
4108 * @bw_alloc: bandwidth alloc
4110 * This function configures bandwidth alloc of TC node, also saves the
4111 * changed settings for replay purpose, and return success if it succeeds
4112 * in modifying bandwidth alloc setting.
4114 static enum ice_status
4115 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4116 enum ice_rl_type rl_type, u8 bw_alloc)
4118 enum ice_status status = ICE_ERR_PARAM;
4119 struct ice_sched_node *tc_node;
4121 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4123 ice_acquire_lock(&pi->sched_lock);
4124 tc_node = ice_sched_get_tc_node(pi, tc);
4126 goto exit_set_tc_node_bw_alloc;
4127 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4130 goto exit_set_tc_node_bw_alloc;
4131 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4133 exit_set_tc_node_bw_alloc:
4134 ice_release_lock(&pi->sched_lock);
4139 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4140 * @pi: port information structure
4142 * @rl_type: min or max
4143 * @bw_alloc: bandwidth alloc
4145 * This function configures BW limit of TC node.
4146 * Note: The minimum guaranteed reservation is done via DCBX.
4149 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4150 enum ice_rl_type rl_type, u8 bw_alloc)
4152 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4156 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4157 * @pi: port information structure
4158 * @vsi_handle: software VSI handle
4160 * This function retrieves the aggregator ID based on VSI ID and TC,
4161 * and sets node's BW limit to default. This function needs to be
4162 * called with the scheduler lock held.
4165 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4167 struct ice_vsi_ctx *vsi_ctx;
4168 enum ice_status status = ICE_SUCCESS;
4171 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4172 return ICE_ERR_PARAM;
4173 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4175 return ICE_ERR_PARAM;
4177 ice_for_each_traffic_class(tc) {
4178 struct ice_sched_node *node;
4180 node = vsi_ctx->sched.ag_node[tc];
4184 /* Set min profile to default */
4185 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4189 /* Set max profile to default */
4190 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4194 /* Remove shared profile, if there is one */
4195 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4205 * ice_sched_get_node_by_id_type - get node from ID type
4206 * @pi: port information structure
4208 * @agg_type: type of aggregator
4209 * @tc: traffic class
4211 * This function returns node identified by ID of type aggregator, and
4212 * based on traffic class (TC). This function needs to be called with
4213 * the scheduler lock held.
4215 static struct ice_sched_node *
4216 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4217 enum ice_agg_type agg_type, u8 tc)
4219 struct ice_sched_node *node = NULL;
4220 struct ice_sched_node *child_node;
4223 case ICE_AGG_TYPE_VSI: {
4224 struct ice_vsi_ctx *vsi_ctx;
4225 u16 vsi_handle = (u16)id;
4227 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4229 /* Get sched_vsi_info */
4230 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4233 node = vsi_ctx->sched.vsi_node[tc];
4237 case ICE_AGG_TYPE_AGG: {
4238 struct ice_sched_node *tc_node;
4240 tc_node = ice_sched_get_tc_node(pi, tc);
4242 node = ice_sched_get_agg_node(pi->hw, tc_node, id);
4246 case ICE_AGG_TYPE_Q:
4247 /* The current implementation allows single queue to modify */
4248 node = ice_sched_get_node(pi, id);
4251 case ICE_AGG_TYPE_QG:
4252 /* The current implementation allows single qg to modify */
4253 child_node = ice_sched_get_node(pi, id);
4256 node = child_node->parent;
4267 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4268 * @pi: port information structure
4269 * @id: ID (software VSI handle or AGG ID)
4270 * @agg_type: aggregator type (VSI or AGG type node)
4271 * @tc: traffic class
4272 * @rl_type: min or max
4273 * @bw: bandwidth in Kbps
4275 * This function sets BW limit of VSI or Aggregator scheduling node
4276 * based on TC information from passed in argument BW.
4279 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4280 enum ice_agg_type agg_type, u8 tc,
4281 enum ice_rl_type rl_type, u32 bw)
4283 enum ice_status status = ICE_ERR_PARAM;
4284 struct ice_sched_node *node;
4289 if (rl_type == ICE_UNKNOWN_BW)
4292 ice_acquire_lock(&pi->sched_lock);
4293 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4295 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4296 goto exit_set_node_bw_lmt_per_tc;
4298 if (bw == ICE_SCHED_DFLT_BW)
4299 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4301 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4303 exit_set_node_bw_lmt_per_tc:
4304 ice_release_lock(&pi->sched_lock);
4309 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4310 * @pi: port information structure
4311 * @vsi_handle: software VSI handle
4313 * This function validates SRL node of the VSI node if available SRL layer is
4314 * different than the VSI node layer on all TC(s).This function needs to be
4315 * called with scheduler lock held.
4317 static enum ice_status
4318 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4320 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4323 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4324 return ICE_ERR_PARAM;
4326 /* Return success if no nodes are present across TC */
4327 ice_for_each_traffic_class(tc) {
4328 struct ice_sched_node *tc_node, *vsi_node;
4329 enum ice_rl_type rl_type = ICE_SHARED_BW;
4330 enum ice_status status;
4332 tc_node = ice_sched_get_tc_node(pi, tc);
4336 vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
4340 /* SRL bandwidth layer selection */
4341 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4342 u8 node_layer = vsi_node->tx_sched_layer;
4345 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4347 if (layer_num >= pi->hw->num_tx_sched_layers)
4348 return ICE_ERR_PARAM;
4349 sel_layer = layer_num;
4352 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4360 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4361 * @pi: port information structure
4362 * @vsi_handle: software VSI handle
4363 * @bw: bandwidth in Kbps
4365 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4366 * across all traffic classes for VSI matching handle. When BW value of
4367 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4370 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4373 enum ice_status status = ICE_SUCCESS;
4377 return ICE_ERR_PARAM;
4379 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4380 return ICE_ERR_PARAM;
4382 ice_acquire_lock(&pi->sched_lock);
4383 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4385 goto exit_set_vsi_bw_shared_lmt;
4386 /* Return success if no nodes are present across TC */
4387 ice_for_each_traffic_class(tc) {
4388 struct ice_sched_node *tc_node, *vsi_node;
4389 enum ice_rl_type rl_type = ICE_SHARED_BW;
4391 tc_node = ice_sched_get_tc_node(pi, tc);
4395 vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
4399 if (bw == ICE_SCHED_DFLT_BW)
4400 /* It removes existing SRL from the node */
4401 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4404 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4408 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4413 exit_set_vsi_bw_shared_lmt:
4414 ice_release_lock(&pi->sched_lock);
4419 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4420 * @pi: port information structure
4421 * @agg_id: aggregator ID
4423 * This function validates SRL node of the AGG node if available SRL layer is
4424 * different than the AGG node layer on all TC(s).This function needs to be
4425 * called with scheduler lock held.
4427 static enum ice_status
4428 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4430 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4431 struct ice_sched_agg_info *agg_info;
4432 bool agg_id_present = false;
4433 enum ice_status status = ICE_SUCCESS;
4436 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4438 if (agg_info->agg_id == agg_id) {
4439 agg_id_present = true;
4442 if (!agg_id_present)
4443 return ICE_ERR_PARAM;
4444 /* Return success if no nodes are present across TC */
4445 ice_for_each_traffic_class(tc) {
4446 struct ice_sched_node *tc_node, *agg_node;
4447 enum ice_rl_type rl_type = ICE_SHARED_BW;
4449 tc_node = ice_sched_get_tc_node(pi, tc);
4453 agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
4456 /* SRL bandwidth layer selection */
4457 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4458 u8 node_layer = agg_node->tx_sched_layer;
4461 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4463 if (layer_num >= pi->hw->num_tx_sched_layers)
4464 return ICE_ERR_PARAM;
4465 sel_layer = layer_num;
4468 status = ice_sched_validate_srl_node(agg_node, sel_layer);
4476 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
4477 * @pi: port information structure
4478 * @agg_id: aggregator ID
4479 * @bw: bandwidth in Kbps
4481 * This function configures the shared rate limiter(SRL) of all aggregator type
4482 * nodes across all traffic classes for aggregator matching agg_id. When
4483 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
4487 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
4489 struct ice_sched_agg_info *agg_info;
4490 struct ice_sched_agg_info *tmp;
4491 bool agg_id_present = false;
4492 enum ice_status status = ICE_SUCCESS;
4496 return ICE_ERR_PARAM;
4498 ice_acquire_lock(&pi->sched_lock);
4499 status = ice_sched_validate_agg_srl_node(pi, agg_id);
4501 goto exit_agg_bw_shared_lmt;
4503 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
4504 ice_sched_agg_info, list_entry)
4505 if (agg_info->agg_id == agg_id) {
4506 agg_id_present = true;
4510 if (!agg_id_present) {
4511 status = ICE_ERR_PARAM;
4512 goto exit_agg_bw_shared_lmt;
4515 /* Return success if no nodes are present across TC */
4516 ice_for_each_traffic_class(tc) {
4517 enum ice_rl_type rl_type = ICE_SHARED_BW;
4518 struct ice_sched_node *tc_node, *agg_node;
4520 tc_node = ice_sched_get_tc_node(pi, tc);
4524 agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
4528 if (bw == ICE_SCHED_DFLT_BW)
4529 /* It removes existing SRL from the node */
4530 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
4533 status = ice_sched_set_node_bw_lmt(pi, agg_node,
4537 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
4542 exit_agg_bw_shared_lmt:
4543 ice_release_lock(&pi->sched_lock);
4548 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
4549 * @hw: pointer to the hw struct
4550 * @node: sched node to configure
4551 * @priority: sibling priority
4553 * This function configures node element's sibling priority only. This
4554 * function needs to be called with scheduler lock held.
4557 ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
4560 struct ice_aqc_txsched_elem_data buf;
4561 struct ice_aqc_txsched_elem *data;
4562 enum ice_status status;
4566 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
4567 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
4568 ICE_AQC_ELEM_GENERIC_PRIO_M;
4569 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
4570 data->generic |= priority;
4572 /* Configure element */
4573 status = ice_sched_update_elem(hw, node, &buf);
4578 * ice_sched_cfg_node_bw_alloc - configure node bw weight/alloc params
4579 * @hw: pointer to the hw struct
4580 * @node: sched node to configure
4581 * @rl_type: rate limit type cir, eir, or shared
4582 * @bw_alloc: bw weight/allocation
4584 * This function configures node element's bw allocation.
4587 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
4588 enum ice_rl_type rl_type, u8 bw_alloc)
4590 struct ice_aqc_txsched_elem_data buf;
4591 struct ice_aqc_txsched_elem *data;
4592 enum ice_status status;
4596 if (rl_type == ICE_MIN_BW) {
4597 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
4598 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
4599 } else if (rl_type == ICE_MAX_BW) {
4600 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
4601 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
4603 return ICE_ERR_PARAM;
4606 /* Configure element */
4607 status = ice_sched_update_elem(hw, node, &buf);
4612 * ice_sched_add_agg_cfg - create an aggregator node
4613 * @pi: port information structure
4614 * @agg_id: aggregator id
4617 * This function creates an aggregator node and intermediate nodes if required
4621 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
4623 struct ice_sched_node *parent, *agg_node, *tc_node;
4624 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
4625 enum ice_status status = ICE_SUCCESS;
4626 struct ice_hw *hw = pi->hw;
4627 u32 first_node_teid;
4628 u16 num_nodes_added;
4631 tc_node = ice_sched_get_tc_node(pi, tc);
4635 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
4636 /* Does Agg node already exist ? */
4640 aggl = ice_sched_get_agg_layer(hw);
4642 /* need one node in Agg layer */
4643 num_nodes[aggl] = 1;
4645 /* Check whether the intermediate nodes have space to add the
4646 * new agg. If they are full, then SW needs to allocate a new
4647 * intermediate node on those layers
4649 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
4650 parent = ice_sched_get_first_node(hw, tc_node, i);
4652 /* scan all the siblings */
4654 if (parent->num_children < hw->max_children[i])
4656 parent = parent->sibling;
4659 /* all the nodes are full, reserve one for this layer */
4664 /* add the agg node */
4666 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
4670 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
4674 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
4677 /* The newly added node can be a new parent for the next
4680 if (num_nodes_added) {
4681 parent = ice_sched_find_node_by_teid(tc_node,
4683 /* register the aggregator id with the agg node */
4684 if (parent && i == aggl)
4685 parent->agg_id = agg_id;
4687 parent = parent->children[0];
4695 * ice_sched_is_agg_inuse - check whether the agg is in use or not
4696 * @pi: port information structure
4697 * @node: node pointer
4699 * This function checks whether the agg is attached with any vsi or not.
4702 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
4706 vsil = ice_sched_get_vsi_layer(pi->hw);
4707 if (node->tx_sched_layer < vsil - 1) {
4708 for (i = 0; i < node->num_children; i++)
4709 if (ice_sched_is_agg_inuse(pi, node->children[i]))
4713 return node->num_children ? true : false;
4718 * ice_sched_rm_agg_cfg - remove the aggregator node
4719 * @pi: port information structure
4720 * @agg_id: aggregator id
4723 * This function removes the aggregator node and intermediate nodes if any
4727 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
4729 struct ice_sched_node *tc_node, *agg_node;
4730 struct ice_hw *hw = pi->hw;
4732 tc_node = ice_sched_get_tc_node(pi, tc);
4736 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
4738 return ICE_ERR_DOES_NOT_EXIST;
4740 /* Can't remove the agg node if it has children */
4741 if (ice_sched_is_agg_inuse(pi, agg_node))
4742 return ICE_ERR_IN_USE;
4744 /* need to remove the whole subtree if agg node is the
4747 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
4748 struct ice_sched_node *parent = agg_node->parent;
4753 if (parent->num_children > 1)
4759 ice_free_sched_node(pi, agg_node);
4764 * ice_sched_get_free_vsi_parent - Find a free parent node in agg subtree
4765 * @hw: pointer to the hw struct
4766 * @node: pointer to a child node
4767 * @num_nodes: num nodes count array
4769 * This function walks through the aggregator subtree to find a free parent
4772 static struct ice_sched_node *
4773 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
4776 u8 l = node->tx_sched_layer;
4779 vsil = ice_sched_get_vsi_layer(hw);
4781 /* Is it VSI parent layer ? */
4783 return (node->num_children < hw->max_children[l]) ? node : NULL;
4785 /* We have intermediate nodes. Let's walk through the subtree. If the
4786 * intermediate node has space to add a new node then clear the count
4788 if (node->num_children < hw->max_children[l])
4790 /* The below recursive call is intentional and wouldn't go more than
4791 * 2 or 3 iterations.
4794 for (i = 0; i < node->num_children; i++) {
4795 struct ice_sched_node *parent;
4797 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
4807 * ice_sched_update_new_parent - update the new parent in SW DB
4808 * @new_parent: pointer to a new parent node
4809 * @node: pointer to a child node
4811 * This function removes the child from the old parent and adds it to a new
4815 ice_sched_update_parent(struct ice_sched_node *new_parent,
4816 struct ice_sched_node *node)
4818 struct ice_sched_node *old_parent;
4821 old_parent = node->parent;
4823 /* update the old parent children */
4824 for (i = 0; i < old_parent->num_children; i++)
4825 if (old_parent->children[i] == node) {
4826 for (j = i + 1; j < old_parent->num_children; j++)
4827 old_parent->children[j - 1] =
4828 old_parent->children[j];
4829 old_parent->num_children--;
4833 /* now move the node to a new parent */
4834 new_parent->children[new_parent->num_children++] = node;
4835 node->parent = new_parent;
4836 node->info.parent_teid = new_parent->info.node_teid;
4840 * ice_sched_move_nodes - move child nodes to a given parent
4841 * @pi: port information structure
4842 * @parent: pointer to parent node
4843 * @num_items: number of child nodes to be moved
4844 * @list: pointer to child node teids
4846 * This function move the child nodes to a given parent.
4848 static enum ice_status
4849 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
4850 u16 num_items, u32 *list)
4852 struct ice_aqc_move_elem *buf;
4853 struct ice_sched_node *node;
4854 enum ice_status status = ICE_SUCCESS;
4861 if (!parent || !num_items)
4862 return ICE_ERR_PARAM;
4864 /* Does parent have enough space */
4865 if (parent->num_children + num_items >=
4866 hw->max_children[parent->tx_sched_layer])
4867 return ICE_ERR_AQ_FULL;
4869 buf = (struct ice_aqc_move_elem *) ice_malloc(hw, sizeof(*buf));
4871 return ICE_ERR_NO_MEMORY;
4873 for (i = 0; i < num_items; i++) {
4874 node = ice_sched_find_node_by_teid(pi->root, list[i]);
4876 status = ICE_ERR_PARAM;
4880 buf->hdr.src_parent_teid = node->info.parent_teid;
4881 buf->hdr.dest_parent_teid = parent->info.node_teid;
4882 buf->teid[0] = node->info.node_teid;
4883 buf->hdr.num_elems = CPU_TO_LE16(1);
4884 status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
4886 if (status && grps_movd != 1) {
4887 status = ICE_ERR_CFG;
4891 /* update the SW DB */
4892 ice_sched_update_parent(parent, node);
4901 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
4902 * @pi: port information structure
4903 * @vsi_handle: software VSI handle
4904 * @agg_id: aggregator id
4907 * This function moves a VSI to an aggregator node or its subtree.
4908 * Intermediate nodes may be created if required.
4911 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
4914 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
4915 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
4916 u32 first_node_teid, vsi_teid;
4917 enum ice_status status;
4918 u16 num_nodes_added;
4921 tc_node = ice_sched_get_tc_node(pi, tc);
4925 agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
4927 return ICE_ERR_DOES_NOT_EXIST;
4929 vsi_node = ice_sched_get_vsi_node(pi->hw, tc_node, vsi_handle);
4931 return ICE_ERR_DOES_NOT_EXIST;
4933 aggl = ice_sched_get_agg_layer(pi->hw);
4934 vsil = ice_sched_get_vsi_layer(pi->hw);
4936 /* initialize intermediate node count to 1 between agg and VSI layers */
4937 for (i = aggl + 1; i < vsil; i++)
4940 /* Check whether the agg subtree has any free node to add the VSI */
4941 for (i = 0; i < agg_node->num_children; i++) {
4942 parent = ice_sched_get_free_vsi_parent(pi->hw,
4943 agg_node->children[i],
4951 for (i = aggl + 1; i < vsil; i++) {
4952 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
4956 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
4959 /* The newly added node can be a new parent for the next
4962 if (num_nodes_added)
4963 parent = ice_sched_find_node_by_teid(tc_node,
4966 parent = parent->children[0];
4973 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
4974 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
4978 * ice_cfg_rl_burst_size - Set burst size value
4979 * @hw: pointer to the HW struct
4980 * @bytes: burst size in bytes
4982 * This function configures/set the burst size to requested new value. The new
4983 * burst size value is used for future rate limit calls. It doesn't change the
4984 * existing or previously created RL profiles.
4986 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
4988 u16 burst_size_to_prog;
4990 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
4991 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
4992 return ICE_ERR_PARAM;
4993 if (bytes <= ICE_MAX_BURST_SIZE_BYTE_GRANULARITY) {
4994 /* byte granularity case */
4995 /* Disable MSB granularity bit */
4996 burst_size_to_prog = ICE_BYTE_GRANULARITY;
4997 /* round number to nearest 256 granularity */
4998 bytes = ice_round_to_num(bytes, 256);
4999 /* check rounding doesn't go beyond allowed */
5000 if (bytes > ICE_MAX_BURST_SIZE_BYTE_GRANULARITY)
5001 bytes = ICE_MAX_BURST_SIZE_BYTE_GRANULARITY;
5002 burst_size_to_prog |= (u16)bytes;
5004 /* k bytes granularity case */
5005 /* Enable MSB granularity bit */
5006 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5007 /* round number to nearest 1024 granularity */
5008 bytes = ice_round_to_num(bytes, 1024);
5009 /* check rounding doesn't go beyond allowed */
5010 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5011 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5012 /* The value is in k bytes */
5013 burst_size_to_prog |= (u16)(bytes / 1024);
5015 hw->max_burst_size = burst_size_to_prog;
5020 * ice_sched_replay_node_prio - re-configure node priority
5021 * @hw: pointer to the HW struct
5022 * @node: sched node to configure
5023 * @priority: priority value
5025 * This function configures node element's priority value. It
5026 * needs to be called with scheduler lock held.
5028 static enum ice_status
5029 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5032 struct ice_aqc_txsched_elem_data buf;
5033 struct ice_aqc_txsched_elem *data;
5034 enum ice_status status;
5038 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5039 data->generic = priority;
5041 /* Configure element */
5042 status = ice_sched_update_elem(hw, node, &buf);
5047 * ice_sched_replay_node_bw - replay node(s) BW
5048 * @hw: pointer to the HW struct
5049 * @node: sched node to configure
5050 * @bw_t_info: BW type information
5052 * This function restores node's BW from bw_t_info. The caller needs
5053 * to hold the scheduler lock.
5055 static enum ice_status
5056 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5057 struct ice_bw_type_info *bw_t_info)
5059 struct ice_port_info *pi = hw->port_info;
5060 enum ice_status status = ICE_ERR_PARAM;
5065 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5067 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5068 status = ice_sched_replay_node_prio(hw, node,
5069 bw_t_info->generic);
5073 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5074 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5075 bw_t_info->cir_bw.bw);
5079 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5080 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5081 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5086 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5087 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5088 bw_t_info->eir_bw.bw);
5092 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5093 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5094 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5099 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5100 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5101 bw_t_info->shared_bw);
5106 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5107 * @hw: pointer to the HW struct
5108 * @agg_info: aggregator data structure
5110 * This function re-creates aggregator type nodes. The caller needs to hold
5111 * the scheduler lock.
5113 static enum ice_status
5114 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5116 struct ice_sched_node *tc_node, *agg_node;
5117 enum ice_status status = ICE_SUCCESS;
5121 return ICE_ERR_PARAM;
5122 ice_for_each_traffic_class(tc) {
5123 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5126 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5128 status = ICE_ERR_PARAM;
5131 agg_node = ice_sched_get_agg_node(hw, tc_node,
5134 status = ICE_ERR_PARAM;
5137 status = ice_sched_replay_node_bw(hw, agg_node,
5138 &agg_info->bw_t_info[tc]);
5146 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5147 * @pi: port info struct
5148 * @tc_bitmap: 8 bits TC bitmap to check
5149 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5151 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5152 * may be missing, it returns enabled TCs. This function needs to be called with
5153 * scheduler lock held.
5156 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5157 ice_bitmap_t *ena_tc_bitmap)
5161 /* Some TC(s) may be missing after reset, adjust for replay */
5162 ice_for_each_traffic_class(tc)
5163 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5164 (ice_sched_get_tc_node(pi, tc)))
5165 ice_set_bit(tc, ena_tc_bitmap);
5169 * ice_sched_replay_agg - recreate aggregator node(s)
5170 * @hw: pointer to the HW struct
5172 * This function recreate aggregator type nodes which are not replayed earlier.
5173 * It also replay aggregator BW information. These aggregator nodes are not
5174 * associated with VSI type node yet.
5176 void ice_sched_replay_agg(struct ice_hw *hw)
5178 struct ice_port_info *pi = hw->port_info;
5179 struct ice_sched_agg_info *agg_info;
5181 ice_acquire_lock(&pi->sched_lock);
5182 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5184 /* replay aggregator (re-create aggregator node) */
5185 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5186 agg_info->replay_tc_bitmap,
5187 ICE_MAX_TRAFFIC_CLASS)) {
5188 ice_declare_bitmap(replay_bitmap,
5189 ICE_MAX_TRAFFIC_CLASS);
5190 enum ice_status status;
5192 ice_zero_bitmap(replay_bitmap,
5193 sizeof(replay_bitmap) * BITS_PER_BYTE);
5194 ice_sched_get_ena_tc_bitmap(pi,
5195 agg_info->replay_tc_bitmap,
5197 status = ice_sched_cfg_agg(hw->port_info,
5202 ice_info(hw, "Replay agg id[%d] failed\n",
5204 /* Move on to next one */
5207 /* Replay aggregator node BW (restore aggregator BW) */
5208 status = ice_sched_replay_agg_bw(hw, agg_info);
5210 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5214 ice_release_lock(&pi->sched_lock);
5218 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5219 * @hw: pointer to the HW struct
5221 * This function initialize aggregator(s) TC bitmap to zero. A required
5222 * preinit step for replaying aggregators.
5224 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5226 struct ice_port_info *pi = hw->port_info;
5227 struct ice_sched_agg_info *agg_info;
5229 ice_acquire_lock(&pi->sched_lock);
5230 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5232 struct ice_sched_agg_vsi_info *agg_vsi_info;
5234 agg_info->tc_bitmap[0] = 0;
5235 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5236 ice_sched_agg_vsi_info, list_entry)
5237 agg_vsi_info->tc_bitmap[0] = 0;
5239 ice_release_lock(&pi->sched_lock);
5243 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5244 * @hw: pointer to the HW struct
5246 * This function replay TC nodes. The caller needs to hold the scheduler lock.
5249 ice_sched_replay_tc_node_bw(struct ice_hw *hw)
5251 struct ice_port_info *pi = hw->port_info;
5252 enum ice_status status = ICE_SUCCESS;
5255 ice_acquire_lock(&pi->sched_lock);
5256 ice_for_each_traffic_class(tc) {
5257 struct ice_sched_node *tc_node;
5259 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5261 continue; /* TC not present */
5262 status = ice_sched_replay_node_bw(hw, tc_node,
5263 &hw->tc_node_bw_t_info[tc]);
5267 ice_release_lock(&pi->sched_lock);
5272 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5273 * @hw: pointer to the HW struct
5274 * @vsi_handle: software VSI handle
5275 * @tc_bitmap: 8 bits TC bitmap
5277 * This function replays VSI type nodes bandwidth. This function needs to be
5278 * called with scheduler lock held.
5280 static enum ice_status
5281 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5282 ice_bitmap_t *tc_bitmap)
5284 struct ice_sched_node *vsi_node, *tc_node;
5285 struct ice_port_info *pi = hw->port_info;
5286 struct ice_bw_type_info *bw_t_info;
5287 struct ice_vsi_ctx *vsi_ctx;
5288 enum ice_status status = ICE_SUCCESS;
5291 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5293 return ICE_ERR_PARAM;
5294 ice_for_each_traffic_class(tc) {
5295 if (!ice_is_tc_ena(*tc_bitmap, tc))
5297 tc_node = ice_sched_get_tc_node(pi, tc);
5300 vsi_node = ice_sched_get_vsi_node(hw, tc_node, vsi_handle);
5303 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5304 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5312 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5313 * @hw: pointer to the HW struct
5314 * @vsi_handle: software VSI handle
5316 * This function replays aggregator node, VSI to aggregator type nodes, and
5317 * their node bandwidth information. This function needs to be called with
5318 * scheduler lock held.
5320 static enum ice_status
5321 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5323 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5324 struct ice_sched_agg_vsi_info *agg_vsi_info;
5325 struct ice_port_info *pi = hw->port_info;
5326 struct ice_sched_agg_info *agg_info;
5327 enum ice_status status;
5329 ice_zero_bitmap(replay_bitmap, sizeof(replay_bitmap) * BITS_PER_BYTE);
5330 if (!ice_is_vsi_valid(hw, vsi_handle))
5331 return ICE_ERR_PARAM;
5332 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5334 return ICE_SUCCESS; /* Not present in list - default Agg case */
5335 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5337 return ICE_SUCCESS; /* Not present in list - default Agg case */
5338 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5340 /* Replay aggregator node associated to vsi_handle */
5341 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5342 ICE_AGG_TYPE_AGG, replay_bitmap);
5345 /* Replay aggregator node BW (restore aggregator BW) */
5346 status = ice_sched_replay_agg_bw(hw, agg_info);
5350 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5351 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5353 /* Move this VSI (vsi_handle) to above aggregator */
5354 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5358 /* Replay VSI BW (restore VSI BW) */
5359 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5360 agg_vsi_info->tc_bitmap);
5364 * ice_replay_vsi_agg - replay VSI to aggregator node
5365 * @hw: pointer to the HW struct
5366 * @vsi_handle: software VSI handle
5368 * This function replays association of VSI to aggregator type nodes, and
5369 * node bandwidth information.
5372 ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5374 struct ice_port_info *pi = hw->port_info;
5375 enum ice_status status;
5377 ice_acquire_lock(&pi->sched_lock);
5378 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5379 ice_release_lock(&pi->sched_lock);