1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2019
9 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
10 * @pi: port information structure
11 * @info: Scheduler element information from firmware
13 * This function inserts the root node of the scheduling tree topology
16 static enum ice_status
17 ice_sched_add_root_node(struct ice_port_info *pi,
18 struct ice_aqc_txsched_elem_data *info)
20 struct ice_sched_node *root;
28 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
30 return ICE_ERR_NO_MEMORY;
32 /* coverity[suspicious_sizeof] */
33 root->children = (struct ice_sched_node **)
34 ice_calloc(hw, hw->max_children[0], sizeof(*root));
35 if (!root->children) {
37 return ICE_ERR_NO_MEMORY;
40 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
46 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
47 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
48 * @teid: node TEID to search
50 * This function searches for a node matching the TEID in the scheduling tree
51 * from the SW DB. The search is recursive and is restricted by the number of
52 * layers it has searched through; stopping at the max supported layer.
54 * This function needs to be called when holding the port_info->sched_lock
56 struct ice_sched_node *
57 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
61 /* The TEID is same as that of the start_node */
62 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
65 /* The node has no children or is at the max layer */
66 if (!start_node->num_children ||
67 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
68 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
71 /* Check if TEID matches to any of the children nodes */
72 for (i = 0; i < start_node->num_children; i++)
73 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
74 return start_node->children[i];
76 /* Search within each child's sub-tree */
77 for (i = 0; i < start_node->num_children; i++) {
78 struct ice_sched_node *tmp;
80 tmp = ice_sched_find_node_by_teid(start_node->children[i],
90 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
91 * @hw: pointer to the HW struct
92 * @cmd_opc: cmd opcode
93 * @elems_req: number of elements to request
94 * @buf: pointer to buffer
95 * @buf_size: buffer size in bytes
96 * @elems_resp: returns total number of elements response
97 * @cd: pointer to command details structure or NULL
99 * This function sends a scheduling elements cmd (cmd_opc)
101 static enum ice_status
102 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
103 u16 elems_req, void *buf, u16 buf_size,
104 u16 *elems_resp, struct ice_sq_cd *cd)
106 struct ice_aqc_sched_elem_cmd *cmd;
107 struct ice_aq_desc desc;
108 enum ice_status status;
110 cmd = &desc.params.sched_elem_cmd;
111 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
112 cmd->num_elem_req = CPU_TO_LE16(elems_req);
113 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
114 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
115 if (!status && elems_resp)
116 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
122 * ice_aq_query_sched_elems - query scheduler elements
123 * @hw: pointer to the HW struct
124 * @elems_req: number of elements to query
125 * @buf: pointer to buffer
126 * @buf_size: buffer size in bytes
127 * @elems_ret: returns total number of elements returned
128 * @cd: pointer to command details structure or NULL
130 * Query scheduling elements (0x0404)
133 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
134 struct ice_aqc_get_elem *buf, u16 buf_size,
135 u16 *elems_ret, struct ice_sq_cd *cd)
137 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
138 elems_req, (void *)buf, buf_size,
143 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
144 * @pi: port information structure
145 * @layer: Scheduler layer of the node
146 * @info: Scheduler element information from firmware
148 * This function inserts a scheduler node to the SW DB.
151 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
152 struct ice_aqc_txsched_elem_data *info)
154 struct ice_sched_node *parent;
155 struct ice_aqc_get_elem elem;
156 struct ice_sched_node *node;
157 enum ice_status status;
161 return ICE_ERR_PARAM;
165 /* A valid parent node should be there */
166 parent = ice_sched_find_node_by_teid(pi->root,
167 LE32_TO_CPU(info->parent_teid));
169 ice_debug(hw, ICE_DBG_SCHED,
170 "Parent Node not found for parent_teid=0x%x\n",
171 LE32_TO_CPU(info->parent_teid));
172 return ICE_ERR_PARAM;
175 /* query the current node information from FW before additing it
178 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
181 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
183 return ICE_ERR_NO_MEMORY;
184 if (hw->max_children[layer]) {
185 /* coverity[suspicious_sizeof] */
186 node->children = (struct ice_sched_node **)
187 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
188 if (!node->children) {
190 return ICE_ERR_NO_MEMORY;
195 node->parent = parent;
196 node->tx_sched_layer = layer;
197 parent->children[parent->num_children++] = node;
198 node->info = elem.generic[0];
203 * ice_aq_delete_sched_elems - delete scheduler elements
204 * @hw: pointer to the HW struct
205 * @grps_req: number of groups to delete
206 * @buf: pointer to buffer
207 * @buf_size: buffer size in bytes
208 * @grps_del: returns total number of elements deleted
209 * @cd: pointer to command details structure or NULL
211 * Delete scheduling elements (0x040F)
213 static enum ice_status
214 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
215 struct ice_aqc_delete_elem *buf, u16 buf_size,
216 u16 *grps_del, struct ice_sq_cd *cd)
218 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
219 grps_req, (void *)buf, buf_size,
224 * ice_sched_remove_elems - remove nodes from HW
225 * @hw: pointer to the HW struct
226 * @parent: pointer to the parent node
227 * @num_nodes: number of nodes
228 * @node_teids: array of node teids to be deleted
230 * This function remove nodes from HW
232 static enum ice_status
233 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
234 u16 num_nodes, u32 *node_teids)
236 struct ice_aqc_delete_elem *buf;
237 u16 i, num_groups_removed = 0;
238 enum ice_status status;
241 buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
242 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
244 return ICE_ERR_NO_MEMORY;
246 buf->hdr.parent_teid = parent->info.node_teid;
247 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
248 for (i = 0; i < num_nodes; i++)
249 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
251 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
252 &num_groups_removed, NULL);
253 if (status != ICE_SUCCESS || num_groups_removed != 1)
254 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
255 hw->adminq.sq_last_status);
262 * ice_sched_get_first_node - get the first node of the given layer
263 * @pi: port information structure
264 * @parent: pointer the base node of the subtree
265 * @layer: layer number
267 * This function retrieves the first node of the given layer from the subtree
269 static struct ice_sched_node *
270 ice_sched_get_first_node(struct ice_port_info *pi,
271 struct ice_sched_node *parent, u8 layer)
273 return pi->sib_head[parent->tc_num][layer];
277 * ice_sched_get_tc_node - get pointer to TC node
278 * @pi: port information structure
281 * This function returns the TC node pointer
283 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
289 for (i = 0; i < pi->root->num_children; i++)
290 if (pi->root->children[i]->tc_num == tc)
291 return pi->root->children[i];
296 * ice_free_sched_node - Free a Tx scheduler node from SW DB
297 * @pi: port information structure
298 * @node: pointer to the ice_sched_node struct
300 * This function frees up a node from SW DB as well as from HW
302 * This function needs to be called with the port_info->sched_lock held
304 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
306 struct ice_sched_node *parent;
307 struct ice_hw *hw = pi->hw;
310 /* Free the children before freeing up the parent node
311 * The parent array is updated below and that shifts the nodes
312 * in the array. So always pick the first child if num children > 0
314 while (node->num_children)
315 ice_free_sched_node(pi, node->children[0]);
317 /* Leaf, TC and root nodes can't be deleted by SW */
318 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
321 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
322 u32 teid = LE32_TO_CPU(node->info.node_teid);
324 ice_sched_remove_elems(hw, node->parent, 1, &teid);
326 parent = node->parent;
327 /* root has no parent */
329 struct ice_sched_node *p;
331 /* update the parent */
332 for (i = 0; i < parent->num_children; i++)
333 if (parent->children[i] == node) {
334 for (j = i + 1; j < parent->num_children; j++)
335 parent->children[j - 1] =
337 parent->num_children--;
341 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
343 if (p->sibling == node) {
344 p->sibling = node->sibling;
350 /* update the sibling head if head is getting removed */
351 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
352 pi->sib_head[node->tc_num][node->tx_sched_layer] =
356 /* leaf nodes have no children */
358 ice_free(hw, node->children);
363 * ice_aq_get_dflt_topo - gets default scheduler topology
364 * @hw: pointer to the HW struct
365 * @lport: logical port number
366 * @buf: pointer to buffer
367 * @buf_size: buffer size in bytes
368 * @num_branches: returns total number of queue to port branches
369 * @cd: pointer to command details structure or NULL
371 * Get default scheduler topology (0x400)
373 static enum ice_status
374 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
375 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
376 u8 *num_branches, struct ice_sq_cd *cd)
378 struct ice_aqc_get_topo *cmd;
379 struct ice_aq_desc desc;
380 enum ice_status status;
382 cmd = &desc.params.get_topo;
383 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
384 cmd->port_num = lport;
385 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
386 if (!status && num_branches)
387 *num_branches = cmd->num_branches;
393 * ice_aq_add_sched_elems - adds scheduling element
394 * @hw: pointer to the HW struct
395 * @grps_req: the number of groups that are requested to be added
396 * @buf: pointer to buffer
397 * @buf_size: buffer size in bytes
398 * @grps_added: returns total number of groups added
399 * @cd: pointer to command details structure or NULL
401 * Add scheduling elements (0x0401)
403 static enum ice_status
404 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
405 struct ice_aqc_add_elem *buf, u16 buf_size,
406 u16 *grps_added, struct ice_sq_cd *cd)
408 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
409 grps_req, (void *)buf, buf_size,
414 * ice_aq_cfg_sched_elems - configures scheduler elements
415 * @hw: pointer to the HW struct
416 * @elems_req: number of elements to configure
417 * @buf: pointer to buffer
418 * @buf_size: buffer size in bytes
419 * @elems_cfgd: returns total number of elements configured
420 * @cd: pointer to command details structure or NULL
422 * Configure scheduling elements (0x0403)
424 static enum ice_status
425 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
426 struct ice_aqc_conf_elem *buf, u16 buf_size,
427 u16 *elems_cfgd, struct ice_sq_cd *cd)
429 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
430 elems_req, (void *)buf, buf_size,
435 * ice_aq_move_sched_elems - move scheduler elements
436 * @hw: pointer to the HW struct
437 * @grps_req: number of groups to move
438 * @buf: pointer to buffer
439 * @buf_size: buffer size in bytes
440 * @grps_movd: returns total number of groups moved
441 * @cd: pointer to command details structure or NULL
443 * Move scheduling elements (0x0408)
445 static enum ice_status
446 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
447 struct ice_aqc_move_elem *buf, u16 buf_size,
448 u16 *grps_movd, struct ice_sq_cd *cd)
450 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
451 grps_req, (void *)buf, buf_size,
456 * ice_aq_suspend_sched_elems - suspend scheduler elements
457 * @hw: pointer to the HW struct
458 * @elems_req: number of elements to suspend
459 * @buf: pointer to buffer
460 * @buf_size: buffer size in bytes
461 * @elems_ret: returns total number of elements suspended
462 * @cd: pointer to command details structure or NULL
464 * Suspend scheduling elements (0x0409)
466 static enum ice_status
467 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
468 struct ice_aqc_suspend_resume_elem *buf,
469 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
471 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
472 elems_req, (void *)buf, buf_size,
477 * ice_aq_resume_sched_elems - resume scheduler elements
478 * @hw: pointer to the HW struct
479 * @elems_req: number of elements to resume
480 * @buf: pointer to buffer
481 * @buf_size: buffer size in bytes
482 * @elems_ret: returns total number of elements resumed
483 * @cd: pointer to command details structure or NULL
485 * resume scheduling elements (0x040A)
487 static enum ice_status
488 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
489 struct ice_aqc_suspend_resume_elem *buf,
490 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
492 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
493 elems_req, (void *)buf, buf_size,
498 * ice_aq_query_sched_res - query scheduler resource
499 * @hw: pointer to the HW struct
500 * @buf_size: buffer size in bytes
501 * @buf: pointer to buffer
502 * @cd: pointer to command details structure or NULL
504 * Query scheduler resource allocation (0x0412)
506 static enum ice_status
507 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
508 struct ice_aqc_query_txsched_res_resp *buf,
509 struct ice_sq_cd *cd)
511 struct ice_aq_desc desc;
513 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
514 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
518 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
519 * @hw: pointer to the HW struct
520 * @num_nodes: number of nodes
521 * @node_teids: array of node teids to be suspended or resumed
522 * @suspend: true means suspend / false means resume
524 * This function suspends or resumes HW nodes
526 static enum ice_status
527 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
530 struct ice_aqc_suspend_resume_elem *buf;
531 u16 i, buf_size, num_elem_ret = 0;
532 enum ice_status status;
534 buf_size = sizeof(*buf) * num_nodes;
535 buf = (struct ice_aqc_suspend_resume_elem *)
536 ice_malloc(hw, buf_size);
538 return ICE_ERR_NO_MEMORY;
540 for (i = 0; i < num_nodes; i++)
541 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
544 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
545 buf_size, &num_elem_ret,
548 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
549 buf_size, &num_elem_ret,
551 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
552 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
559 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
560 * @hw: pointer to the HW struct
561 * @vsi_handle: VSI handle
563 * @new_numqs: number of queues
565 static enum ice_status
566 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
568 struct ice_vsi_ctx *vsi_ctx;
569 struct ice_q_ctx *q_ctx;
571 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
573 return ICE_ERR_PARAM;
574 /* allocate LAN queue contexts */
575 if (!vsi_ctx->lan_q_ctx[tc]) {
576 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
577 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
578 if (!vsi_ctx->lan_q_ctx[tc])
579 return ICE_ERR_NO_MEMORY;
580 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
583 /* num queues are increased, update the queue contexts */
584 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
585 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
587 q_ctx = (struct ice_q_ctx *)
588 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
590 return ICE_ERR_NO_MEMORY;
591 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
592 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
593 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
594 vsi_ctx->lan_q_ctx[tc] = q_ctx;
595 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
601 * ice_aq_rl_profile - performs a rate limiting task
602 * @hw: pointer to the HW struct
603 * @opcode:opcode for add, query, or remove profile(s)
604 * @num_profiles: the number of profiles
605 * @buf: pointer to buffer
606 * @buf_size: buffer size in bytes
607 * @num_processed: number of processed add or remove profile(s) to return
608 * @cd: pointer to command details structure
610 * Rl profile function to add, query, or remove profile(s)
612 static enum ice_status
613 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
614 u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
615 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
617 struct ice_aqc_rl_profile *cmd;
618 struct ice_aq_desc desc;
619 enum ice_status status;
621 cmd = &desc.params.rl_profile;
623 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
624 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
625 cmd->num_profiles = CPU_TO_LE16(num_profiles);
626 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
627 if (!status && num_processed)
628 *num_processed = LE16_TO_CPU(cmd->num_processed);
633 * ice_aq_add_rl_profile - adds rate limiting profile(s)
634 * @hw: pointer to the HW struct
635 * @num_profiles: the number of profile(s) to be add
636 * @buf: pointer to buffer
637 * @buf_size: buffer size in bytes
638 * @num_profiles_added: total number of profiles added to return
639 * @cd: pointer to command details structure
641 * Add RL profile (0x0410)
643 static enum ice_status
644 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
645 struct ice_aqc_rl_profile_generic_elem *buf,
646 u16 buf_size, u16 *num_profiles_added,
647 struct ice_sq_cd *cd)
649 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
651 buf_size, num_profiles_added, cd);
655 * ice_aq_query_rl_profile - query rate limiting profile(s)
656 * @hw: pointer to the HW struct
657 * @num_profiles: the number of profile(s) to query
658 * @buf: pointer to buffer
659 * @buf_size: buffer size in bytes
660 * @cd: pointer to command details structure
662 * Query RL profile (0x0411)
665 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
666 struct ice_aqc_rl_profile_generic_elem *buf,
667 u16 buf_size, struct ice_sq_cd *cd)
669 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
670 num_profiles, buf, buf_size, NULL, cd);
674 * ice_aq_remove_rl_profile - removes RL profile(s)
675 * @hw: pointer to the HW struct
676 * @num_profiles: the number of profile(s) to remove
677 * @buf: pointer to buffer
678 * @buf_size: buffer size in bytes
679 * @num_profiles_removed: total number of profiles removed to return
680 * @cd: pointer to command details structure or NULL
682 * Remove RL profile (0x0415)
684 static enum ice_status
685 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
686 struct ice_aqc_rl_profile_generic_elem *buf,
687 u16 buf_size, u16 *num_profiles_removed,
688 struct ice_sq_cd *cd)
690 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
692 buf_size, num_profiles_removed, cd);
696 * ice_sched_del_rl_profile - remove RL profile
697 * @hw: pointer to the HW struct
698 * @rl_info: rate limit profile information
700 * If the profile ID is not referenced anymore, it removes profile ID with
701 * its associated parameters from HW DB,and locally. The caller needs to
702 * hold scheduler lock.
704 static enum ice_status
705 ice_sched_del_rl_profile(struct ice_hw *hw,
706 struct ice_aqc_rl_profile_info *rl_info)
708 struct ice_aqc_rl_profile_generic_elem *buf;
709 u16 num_profiles_removed;
710 enum ice_status status;
711 u16 num_profiles = 1;
713 if (rl_info->prof_id_ref != 0)
714 return ICE_ERR_IN_USE;
716 /* Safe to remove profile ID */
717 buf = (struct ice_aqc_rl_profile_generic_elem *)
719 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
720 &num_profiles_removed, NULL);
721 if (status || num_profiles_removed != num_profiles)
724 /* Delete stale entry now */
725 LIST_DEL(&rl_info->list_entry);
726 ice_free(hw, rl_info);
731 * ice_sched_clear_rl_prof - clears RL prof entries
732 * @pi: port information structure
734 * This function removes all RL profile from HW as well as from SW DB.
736 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
740 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
741 struct ice_aqc_rl_profile_info *rl_prof_elem;
742 struct ice_aqc_rl_profile_info *rl_prof_tmp;
744 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
745 &pi->rl_prof_list[ln],
746 ice_aqc_rl_profile_info, list_entry) {
747 struct ice_hw *hw = pi->hw;
748 enum ice_status status;
750 rl_prof_elem->prof_id_ref = 0;
751 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
753 ice_debug(hw, ICE_DBG_SCHED,
754 "Remove rl profile failed\n");
755 /* On error, free mem required */
756 LIST_DEL(&rl_prof_elem->list_entry);
757 ice_free(hw, rl_prof_elem);
764 * ice_sched_clear_agg - clears the aggregator related information
765 * @hw: pointer to the hardware structure
767 * This function removes aggregator list and free up aggregator related memory
768 * previously allocated.
770 void ice_sched_clear_agg(struct ice_hw *hw)
772 struct ice_sched_agg_info *agg_info;
773 struct ice_sched_agg_info *atmp;
775 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
778 struct ice_sched_agg_vsi_info *agg_vsi_info;
779 struct ice_sched_agg_vsi_info *vtmp;
781 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
782 &agg_info->agg_vsi_list,
783 ice_sched_agg_vsi_info, list_entry) {
784 LIST_DEL(&agg_vsi_info->list_entry);
785 ice_free(hw, agg_vsi_info);
787 LIST_DEL(&agg_info->list_entry);
788 ice_free(hw, agg_info);
793 * ice_sched_clear_tx_topo - clears the schduler tree nodes
794 * @pi: port information structure
796 * This function removes all the nodes from HW as well as from SW DB.
798 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
802 /* remove RL profiles related lists */
803 ice_sched_clear_rl_prof(pi);
805 ice_free_sched_node(pi, pi->root);
811 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
812 * @pi: port information structure
814 * Cleanup scheduling elements from SW DB
816 void ice_sched_clear_port(struct ice_port_info *pi)
818 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
821 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
822 ice_acquire_lock(&pi->sched_lock);
823 ice_sched_clear_tx_topo(pi);
824 ice_release_lock(&pi->sched_lock);
825 ice_destroy_lock(&pi->sched_lock);
829 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
830 * @hw: pointer to the HW struct
832 * Cleanup scheduling elements from SW DB for all the ports
834 void ice_sched_cleanup_all(struct ice_hw *hw)
839 if (hw->layer_info) {
840 ice_free(hw, hw->layer_info);
841 hw->layer_info = NULL;
845 ice_sched_clear_port(hw->port_info);
847 hw->num_tx_sched_layers = 0;
848 hw->num_tx_sched_phys_layers = 0;
849 hw->flattened_layers = 0;
854 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
855 * @hw: pointer to the HW struct
856 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
857 * @buf: pointer to buffer
858 * @buf_size: buffer size in bytes
859 * @cd: pointer to command details structure or NULL
861 * Configure L2 Node CGD (0x0414)
864 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
865 struct ice_aqc_cfg_l2_node_cgd_data *buf,
866 u16 buf_size, struct ice_sq_cd *cd)
868 struct ice_aqc_cfg_l2_node_cgd *cmd;
869 struct ice_aq_desc desc;
871 cmd = &desc.params.cfg_l2_node_cgd;
872 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
873 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
875 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
876 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
881 * ice_sched_add_elems - add nodes to HW and SW DB
882 * @pi: port information structure
883 * @tc_node: pointer to the branch node
884 * @parent: pointer to the parent node
885 * @layer: layer number to add nodes
886 * @num_nodes: number of nodes
887 * @num_nodes_added: pointer to num nodes added
888 * @first_node_teid: if new nodes are added then return the TEID of first node
890 * This function add nodes to HW as well as to SW DB for a given layer
892 static enum ice_status
893 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
894 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
895 u16 *num_nodes_added, u32 *first_node_teid)
897 struct ice_sched_node *prev, *new_node;
898 struct ice_aqc_add_elem *buf;
899 u16 i, num_groups_added = 0;
900 enum ice_status status = ICE_SUCCESS;
901 struct ice_hw *hw = pi->hw;
905 buf_size = sizeof(*buf) + sizeof(*buf->generic) * (num_nodes - 1);
906 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
908 return ICE_ERR_NO_MEMORY;
910 buf->hdr.parent_teid = parent->info.node_teid;
911 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
912 for (i = 0; i < num_nodes; i++) {
913 buf->generic[i].parent_teid = parent->info.node_teid;
914 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
915 buf->generic[i].data.valid_sections =
916 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
917 ICE_AQC_ELEM_VALID_EIR;
918 buf->generic[i].data.generic = 0;
919 buf->generic[i].data.cir_bw.bw_profile_idx =
920 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
921 buf->generic[i].data.cir_bw.bw_alloc =
922 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
923 buf->generic[i].data.eir_bw.bw_profile_idx =
924 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
925 buf->generic[i].data.eir_bw.bw_alloc =
926 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
929 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
930 &num_groups_added, NULL);
931 if (status != ICE_SUCCESS || num_groups_added != 1) {
932 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
933 hw->adminq.sq_last_status);
938 *num_nodes_added = num_nodes;
939 /* add nodes to the SW DB */
940 for (i = 0; i < num_nodes; i++) {
941 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
942 if (status != ICE_SUCCESS) {
943 ice_debug(hw, ICE_DBG_SCHED,
944 "add nodes in SW DB failed status =%d\n",
949 teid = LE32_TO_CPU(buf->generic[i].node_teid);
950 new_node = ice_sched_find_node_by_teid(parent, teid);
952 ice_debug(hw, ICE_DBG_SCHED,
953 "Node is missing for teid =%d\n", teid);
957 new_node->sibling = NULL;
958 new_node->tc_num = tc_node->tc_num;
960 /* add it to previous node sibling pointer */
961 /* Note: siblings are not linked across branches */
962 prev = ice_sched_get_first_node(pi, tc_node, layer);
963 if (prev && prev != new_node) {
964 while (prev->sibling)
965 prev = prev->sibling;
966 prev->sibling = new_node;
969 /* initialize the sibling head */
970 if (!pi->sib_head[tc_node->tc_num][layer])
971 pi->sib_head[tc_node->tc_num][layer] = new_node;
974 *first_node_teid = teid;
982 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
983 * @pi: port information structure
984 * @tc_node: pointer to TC node
985 * @parent: pointer to parent node
986 * @layer: layer number to add nodes
987 * @num_nodes: number of nodes to be added
988 * @first_node_teid: pointer to the first node TEID
989 * @num_nodes_added: pointer to number of nodes added
991 * This function add nodes to a given layer.
993 static enum ice_status
994 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
995 struct ice_sched_node *tc_node,
996 struct ice_sched_node *parent, u8 layer,
997 u16 num_nodes, u32 *first_node_teid,
998 u16 *num_nodes_added)
1000 u32 *first_teid_ptr = first_node_teid;
1001 u16 new_num_nodes, max_child_nodes;
1002 enum ice_status status = ICE_SUCCESS;
1003 struct ice_hw *hw = pi->hw;
1007 *num_nodes_added = 0;
1012 if (!parent || layer < hw->sw_entry_point_layer)
1013 return ICE_ERR_PARAM;
1015 /* max children per node per layer */
1016 max_child_nodes = hw->max_children[parent->tx_sched_layer];
1018 /* current number of children + required nodes exceed max children ? */
1019 if ((parent->num_children + num_nodes) > max_child_nodes) {
1020 /* Fail if the parent is a TC node */
1021 if (parent == tc_node)
1024 /* utilize all the spaces if the parent is not full */
1025 if (parent->num_children < max_child_nodes) {
1026 new_num_nodes = max_child_nodes - parent->num_children;
1027 /* this recursion is intentional, and wouldn't
1028 * go more than 2 calls
1030 status = ice_sched_add_nodes_to_layer(pi, tc_node,
1035 if (status != ICE_SUCCESS)
1038 *num_nodes_added += num_added;
1040 /* Don't modify the first node TEID memory if the first node was
1041 * added already in the above call. Instead send some temp
1042 * memory for all other recursive calls.
1045 first_teid_ptr = &temp;
1047 new_num_nodes = num_nodes - num_added;
1049 /* This parent is full, try the next sibling */
1050 parent = parent->sibling;
1052 /* this recursion is intentional, for 1024 queues
1053 * per VSI, it goes max of 16 iterations.
1054 * 1024 / 8 = 128 layer 8 nodes
1055 * 128 /8 = 16 (add 8 nodes per iteration)
1057 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1058 layer, new_num_nodes,
1061 *num_nodes_added += num_added;
1065 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1066 num_nodes_added, first_node_teid);
1071 * ice_sched_get_qgrp_layer - get the current queue group layer number
1072 * @hw: pointer to the HW struct
1074 * This function returns the current queue group layer number
1076 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1078 /* It's always total layers - 1, the array is 0 relative so -2 */
1079 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1083 * ice_sched_get_vsi_layer - get the current VSI layer number
1084 * @hw: pointer to the HW struct
1086 * This function returns the current VSI layer number
1088 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1090 /* Num Layers VSI layer
1093 * 5 or less sw_entry_point_layer
1095 /* calculate the VSI layer based on number of layers. */
1096 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1097 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1099 if (layer > hw->sw_entry_point_layer)
1102 return hw->sw_entry_point_layer;
1106 * ice_sched_get_agg_layer - get the current aggregator layer number
1107 * @hw: pointer to the HW struct
1109 * This function returns the current aggregator layer number
1111 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1113 /* Num Layers aggregator layer
1115 * 7 or less sw_entry_point_layer
1117 /* calculate the aggregator layer based on number of layers. */
1118 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1119 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1121 if (layer > hw->sw_entry_point_layer)
1124 return hw->sw_entry_point_layer;
1128 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1129 * @pi: port information structure
1131 * This function removes the leaf node that was created by the FW
1132 * during initialization
1134 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1136 struct ice_sched_node *node;
1140 if (!node->num_children)
1142 node = node->children[0];
1144 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1145 u32 teid = LE32_TO_CPU(node->info.node_teid);
1146 enum ice_status status;
1148 /* remove the default leaf node */
1149 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1151 ice_free_sched_node(pi, node);
1156 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1157 * @pi: port information structure
1159 * This function frees all the nodes except root and TC that were created by
1160 * the FW during initialization
1162 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1164 struct ice_sched_node *node;
1166 ice_rm_dflt_leaf_node(pi);
1168 /* remove the default nodes except TC and root nodes */
1171 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1172 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1173 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1174 ice_free_sched_node(pi, node);
1178 if (!node->num_children)
1180 node = node->children[0];
1185 * ice_sched_init_port - Initialize scheduler by querying information from FW
1186 * @pi: port info structure for the tree to cleanup
1188 * This function is the initial call to find the total number of Tx scheduler
1189 * resources, default topology created by firmware and storing the information
1192 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1194 struct ice_aqc_get_topo_elem *buf;
1195 enum ice_status status;
1202 return ICE_ERR_PARAM;
1205 /* Query the Default Topology from FW */
1206 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1207 ICE_AQ_MAX_BUF_LEN);
1209 return ICE_ERR_NO_MEMORY;
1211 /* Query default scheduling tree topology */
1212 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1213 &num_branches, NULL);
1217 /* num_branches should be between 1-8 */
1218 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1219 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1221 status = ICE_ERR_PARAM;
1225 /* get the number of elements on the default/first branch */
1226 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1228 /* num_elems should always be between 1-9 */
1229 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1230 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1232 status = ICE_ERR_PARAM;
1236 /* If the last node is a leaf node then the index of the queue group
1237 * layer is two less than the number of elements.
1239 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1240 ICE_AQC_ELEM_TYPE_LEAF)
1241 pi->last_node_teid =
1242 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1244 pi->last_node_teid =
1245 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1247 /* Insert the Tx Sched root node */
1248 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1252 /* Parse the default tree and cache the information */
1253 for (i = 0; i < num_branches; i++) {
1254 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1256 /* Skip root element as already inserted */
1257 for (j = 1; j < num_elems; j++) {
1258 /* update the sw entry point */
1259 if (buf[0].generic[j].data.elem_type ==
1260 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1261 hw->sw_entry_point_layer = j;
1263 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1269 /* Remove the default nodes. */
1271 ice_sched_rm_dflt_nodes(pi);
1273 /* initialize the port for handling the scheduler tree */
1274 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1275 ice_init_lock(&pi->sched_lock);
1276 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1277 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1280 if (status && pi->root) {
1281 ice_free_sched_node(pi, pi->root);
1290 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1291 * @pi: port information structure
1292 * @teid: Scheduler node TEID
1294 * This function retrieves the ice_sched_node struct for given TEID from
1295 * the SW DB and returns it to the caller.
1297 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1299 struct ice_sched_node *node;
1304 /* Find the node starting from root */
1305 ice_acquire_lock(&pi->sched_lock);
1306 node = ice_sched_find_node_by_teid(pi->root, teid);
1307 ice_release_lock(&pi->sched_lock);
1310 ice_debug(pi->hw, ICE_DBG_SCHED,
1311 "Node not found for teid=0x%x\n", teid);
1317 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1318 * @hw: pointer to the HW struct
1320 * query FW for allocated scheduler resources and store in HW struct
1322 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1324 struct ice_aqc_query_txsched_res_resp *buf;
1325 enum ice_status status = ICE_SUCCESS;
1332 buf = (struct ice_aqc_query_txsched_res_resp *)
1333 ice_malloc(hw, sizeof(*buf));
1335 return ICE_ERR_NO_MEMORY;
1337 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1339 goto sched_query_out;
1341 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1342 hw->num_tx_sched_phys_layers =
1343 LE16_TO_CPU(buf->sched_props.phys_levels);
1344 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1345 hw->max_cgds = buf->sched_props.max_pf_cgds;
1347 /* max sibling group size of current layer refers to the max children
1348 * of the below layer node.
1349 * layer 1 node max children will be layer 2 max sibling group size
1350 * layer 2 node max children will be layer 3 max sibling group size
1351 * and so on. This array will be populated from root (index 0) to
1352 * qgroup layer 7. Leaf node has no children.
1354 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1355 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1356 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1359 hw->layer_info = (struct ice_aqc_layer_props *)
1360 ice_memdup(hw, buf->layer_props,
1361 (hw->num_tx_sched_layers *
1362 sizeof(*hw->layer_info)),
1364 if (!hw->layer_info) {
1365 status = ICE_ERR_NO_MEMORY;
1366 goto sched_query_out;
1376 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1377 * @hw: pointer to the HW struct
1378 * @base: pointer to the base node
1379 * @node: pointer to the node to search
1381 * This function checks whether a given node is part of the base node
1385 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1386 struct ice_sched_node *node)
1390 for (i = 0; i < base->num_children; i++) {
1391 struct ice_sched_node *child = base->children[i];
1396 if (child->tx_sched_layer > node->tx_sched_layer)
1399 /* this recursion is intentional, and wouldn't
1400 * go more than 8 calls
1402 if (ice_sched_find_node_in_subtree(hw, child, node))
1409 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1410 * @pi: port information structure
1411 * @vsi_handle: software VSI handle
1412 * @tc: branch number
1413 * @owner: LAN or RDMA
1415 * This function retrieves a free LAN or RDMA queue group node
1417 struct ice_sched_node *
1418 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1421 struct ice_sched_node *vsi_node, *qgrp_node = NULL;
1422 struct ice_vsi_ctx *vsi_ctx;
1426 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1427 max_children = pi->hw->max_children[qgrp_layer];
1429 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1432 vsi_node = vsi_ctx->sched.vsi_node[tc];
1433 /* validate invalid VSI ID */
1437 /* get the first queue group node from VSI sub-tree */
1438 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1440 /* make sure the qgroup node is part of the VSI subtree */
1441 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1442 if (qgrp_node->num_children < max_children &&
1443 qgrp_node->owner == owner)
1445 qgrp_node = qgrp_node->sibling;
1453 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1454 * @pi: pointer to the port information structure
1455 * @tc_node: pointer to the TC node
1456 * @vsi_handle: software VSI handle
1458 * This function retrieves a VSI node for a given VSI ID from a given
1461 struct ice_sched_node *
1462 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1465 struct ice_sched_node *node;
1468 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1469 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1471 /* Check whether it already exists */
1473 if (node->vsi_handle == vsi_handle)
1475 node = node->sibling;
1482 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1483 * @hw: pointer to the HW struct
1484 * @tc_node: pointer to the TC node
1485 * @agg_id: aggregator ID
1487 * This function retrieves an aggregator node for a given aggregator ID from
1490 static struct ice_sched_node *
1491 ice_sched_get_agg_node(struct ice_hw *hw, struct ice_sched_node *tc_node,
1494 struct ice_sched_node *node;
1497 agg_layer = ice_sched_get_agg_layer(hw);
1498 node = ice_sched_get_first_node(hw->port_info, tc_node, agg_layer);
1500 /* Check whether it already exists */
1502 if (node->agg_id == agg_id)
1504 node = node->sibling;
1511 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1512 * @hw: pointer to the HW struct
1513 * @node: pointer to the ice_sched_node struct
1515 * This function queries and compares the HW element with SW DB node parameters
1517 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1519 struct ice_aqc_get_elem buf;
1520 enum ice_status status;
1523 node_teid = LE32_TO_CPU(node->info.node_teid);
1524 status = ice_sched_query_elem(hw, node_teid, &buf);
1525 if (status != ICE_SUCCESS)
1528 if (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {
1529 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1538 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1539 * @hw: pointer to the HW struct
1540 * @num_qs: number of queues
1541 * @num_nodes: num nodes array
1543 * This function calculates the number of VSI child nodes based on the
1547 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1552 qgl = ice_sched_get_qgrp_layer(hw);
1553 vsil = ice_sched_get_vsi_layer(hw);
1555 /* calculate num nodes from queue group to VSI layer */
1556 for (i = qgl; i > vsil; i--) {
1557 /* round to the next integer if there is a remainder */
1558 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1560 /* need at least one node */
1561 num_nodes[i] = num ? num : 1;
1566 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1567 * @pi: port information structure
1568 * @vsi_handle: software VSI handle
1569 * @tc_node: pointer to the TC node
1570 * @num_nodes: pointer to the num nodes that needs to be added per layer
1571 * @owner: node owner (LAN or RDMA)
1573 * This function adds the VSI child nodes to tree. It gets called for
1574 * LAN and RDMA separately.
1576 static enum ice_status
1577 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1578 struct ice_sched_node *tc_node, u16 *num_nodes,
1581 struct ice_sched_node *parent, *node;
1582 struct ice_hw *hw = pi->hw;
1583 enum ice_status status;
1584 u32 first_node_teid;
1588 qgl = ice_sched_get_qgrp_layer(hw);
1589 vsil = ice_sched_get_vsi_layer(hw);
1590 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1591 for (i = vsil + 1; i <= qgl; i++) {
1595 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1599 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1602 /* The newly added node can be a new parent for the next
1606 parent = ice_sched_find_node_by_teid(tc_node,
1610 node->owner = owner;
1611 node = node->sibling;
1614 parent = parent->children[0];
1622 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1623 * @pi: pointer to the port info structure
1624 * @tc_node: pointer to TC node
1625 * @num_nodes: pointer to num nodes array
1627 * This function calculates the number of supported nodes needed to add this
1628 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1632 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1633 struct ice_sched_node *tc_node, u16 *num_nodes)
1635 struct ice_sched_node *node;
1639 vsil = ice_sched_get_vsi_layer(pi->hw);
1640 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1641 /* Add intermediate nodes if TC has no children and
1642 * need at least one node for VSI
1644 if (!tc_node->num_children || i == vsil) {
1647 /* If intermediate nodes are reached max children
1648 * then add a new one.
1650 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1651 /* scan all the siblings */
1653 if (node->num_children <
1654 pi->hw->max_children[i])
1656 node = node->sibling;
1659 /* tree has one intermediate node to add this new VSI.
1660 * So no need to calculate supported nodes for below
1665 /* all the nodes are full, allocate a new one */
1671 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1672 * @pi: port information structure
1673 * @vsi_handle: software VSI handle
1674 * @tc_node: pointer to TC node
1675 * @num_nodes: pointer to num nodes array
1677 * This function adds the VSI supported nodes into Tx tree including the
1678 * VSI, its parent and intermediate nodes in below layers
1680 static enum ice_status
1681 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1682 struct ice_sched_node *tc_node, u16 *num_nodes)
1684 struct ice_sched_node *parent = tc_node;
1685 enum ice_status status;
1686 u32 first_node_teid;
1691 return ICE_ERR_PARAM;
1693 vsil = ice_sched_get_vsi_layer(pi->hw);
1694 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1695 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1699 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1702 /* The newly added node can be a new parent for the next
1706 parent = ice_sched_find_node_by_teid(tc_node,
1709 parent = parent->children[0];
1715 parent->vsi_handle = vsi_handle;
1722 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1723 * @pi: port information structure
1724 * @vsi_handle: software VSI handle
1727 * This function adds a new VSI into scheduler tree
1729 static enum ice_status
1730 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1732 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1733 struct ice_sched_node *tc_node;
1735 tc_node = ice_sched_get_tc_node(pi, tc);
1737 return ICE_ERR_PARAM;
1739 /* calculate number of supported nodes needed for this VSI */
1740 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1742 /* add VSI supported nodes to TC subtree */
1743 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1748 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1749 * @pi: port information structure
1750 * @vsi_handle: software VSI handle
1752 * @new_numqs: new number of max queues
1753 * @owner: owner of this subtree
1755 * This function updates the VSI child nodes based on the number of queues
1757 static enum ice_status
1758 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1759 u8 tc, u16 new_numqs, u8 owner)
1761 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1762 struct ice_sched_node *vsi_node;
1763 struct ice_sched_node *tc_node;
1764 struct ice_vsi_ctx *vsi_ctx;
1765 enum ice_status status = ICE_SUCCESS;
1766 struct ice_hw *hw = pi->hw;
1769 tc_node = ice_sched_get_tc_node(pi, tc);
1773 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1777 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1779 return ICE_ERR_PARAM;
1781 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1782 /* num queues are not changed or less than the previous number */
1783 if (new_numqs <= prev_numqs)
1785 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1790 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1791 /* Keep the max number of queue configuration all the time. Update the
1792 * tree only if number of queues > previous number of queues. This may
1793 * leave some extra nodes in the tree if number of queues < previous
1794 * number but that wouldn't harm anything. Removing those extra nodes
1795 * may complicate the code if those nodes are part of SRL or
1796 * individually rate limited.
1798 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1799 new_num_nodes, owner);
1802 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1808 * ice_sched_cfg_vsi - configure the new/existing VSI
1809 * @pi: port information structure
1810 * @vsi_handle: software VSI handle
1812 * @maxqs: max number of queues
1813 * @owner: LAN or RDMA
1814 * @enable: TC enabled or disabled
1816 * This function adds/updates VSI nodes based on the number of queues. If TC is
1817 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1818 * disabled then suspend the VSI if it is not already.
1821 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1822 u8 owner, bool enable)
1824 struct ice_sched_node *vsi_node, *tc_node;
1825 struct ice_vsi_ctx *vsi_ctx;
1826 enum ice_status status = ICE_SUCCESS;
1827 struct ice_hw *hw = pi->hw;
1829 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1830 tc_node = ice_sched_get_tc_node(pi, tc);
1832 return ICE_ERR_PARAM;
1833 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1835 return ICE_ERR_PARAM;
1836 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1838 /* suspend the VSI if TC is not enabled */
1840 if (vsi_node && vsi_node->in_use) {
1841 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1843 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1846 vsi_node->in_use = false;
1851 /* TC is enabled, if it is a new VSI then add it to the tree */
1853 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1857 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1861 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1862 vsi_node->in_use = true;
1863 /* invalidate the max queues whenever VSI gets added first time
1864 * into the scheduler tree (boot or after reset). We need to
1865 * recreate the child nodes all the time in these cases.
1867 vsi_ctx->sched.max_lanq[tc] = 0;
1870 /* update the VSI child nodes */
1871 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1876 /* TC is enabled, resume the VSI if it is in the suspend state */
1877 if (!vsi_node->in_use) {
1878 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1880 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1882 vsi_node->in_use = true;
1889 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1890 * @pi: port information structure
1891 * @vsi_handle: software VSI handle
1893 * This function removes single aggregator VSI info entry from
1897 ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1899 struct ice_sched_agg_info *agg_info;
1900 struct ice_sched_agg_info *atmp;
1902 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1905 struct ice_sched_agg_vsi_info *agg_vsi_info;
1906 struct ice_sched_agg_vsi_info *vtmp;
1908 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1909 &agg_info->agg_vsi_list,
1910 ice_sched_agg_vsi_info, list_entry)
1911 if (agg_vsi_info->vsi_handle == vsi_handle) {
1912 LIST_DEL(&agg_vsi_info->list_entry);
1913 ice_free(pi->hw, agg_vsi_info);
1920 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1921 * @node: pointer to the sub-tree node
1923 * This function checks for a leaf node presence in a given sub-tree node.
1925 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
1929 for (i = 0; i < node->num_children; i++)
1930 if (ice_sched_is_leaf_node_present(node->children[i]))
1932 /* check for a leaf node */
1933 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
1937 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
1938 * @pi: port information structure
1939 * @vsi_handle: software VSI handle
1940 * @owner: LAN or RDMA
1942 * This function removes the VSI and its LAN or RDMA children nodes from the
1945 static enum ice_status
1946 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
1948 enum ice_status status = ICE_ERR_PARAM;
1949 struct ice_vsi_ctx *vsi_ctx;
1952 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
1953 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
1955 ice_acquire_lock(&pi->sched_lock);
1956 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1958 goto exit_sched_rm_vsi_cfg;
1960 ice_for_each_traffic_class(i) {
1961 struct ice_sched_node *vsi_node, *tc_node;
1964 tc_node = ice_sched_get_tc_node(pi, i);
1968 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1972 if (ice_sched_is_leaf_node_present(vsi_node)) {
1973 ice_debug(pi->hw, ICE_DBG_SCHED,
1974 "VSI has leaf nodes in TC %d\n", i);
1975 status = ICE_ERR_IN_USE;
1976 goto exit_sched_rm_vsi_cfg;
1978 while (j < vsi_node->num_children) {
1979 if (vsi_node->children[j]->owner == owner) {
1980 ice_free_sched_node(pi, vsi_node->children[j]);
1982 /* reset the counter again since the num
1983 * children will be updated after node removal
1990 /* remove the VSI if it has no children */
1991 if (!vsi_node->num_children) {
1992 ice_free_sched_node(pi, vsi_node);
1993 vsi_ctx->sched.vsi_node[i] = NULL;
1995 /* clean up aggregator related VSI info if any */
1996 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
1998 if (owner == ICE_SCHED_NODE_OWNER_LAN)
1999 vsi_ctx->sched.max_lanq[i] = 0;
2001 status = ICE_SUCCESS;
2003 exit_sched_rm_vsi_cfg:
2004 ice_release_lock(&pi->sched_lock);
2009 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2010 * @pi: port information structure
2011 * @vsi_handle: software VSI handle
2013 * This function clears the VSI and its LAN children nodes from scheduler tree
2016 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2018 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2023 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2024 * @hw: pointer to the HW struct
2025 * @node: pointer to the ice_sched_node struct
2027 * This function compares all the nodes for a given tree against HW DB nodes
2028 * This function needs to be called with the port_info->sched_lock held
2030 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2034 /* start from the leaf node */
2035 for (i = 0; i < node->num_children; i++)
2036 /* Fail if node doesn't match with the SW DB
2037 * this recursion is intentional, and wouldn't
2038 * go more than 9 calls
2040 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2043 return ice_sched_check_node(hw, node);
2047 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2048 * @hw: pointer to the HW struct
2049 * @node_teid: node TEID
2050 * @buf: pointer to buffer
2051 * @buf_size: buffer size in bytes
2052 * @cd: pointer to command details structure or NULL
2054 * This function retrieves the tree topology from the firmware for a given
2055 * node TEID to the root node.
2058 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2059 struct ice_aqc_get_elem *buf, u16 buf_size,
2060 struct ice_sq_cd *cd)
2062 struct ice_aqc_query_node_to_root *cmd;
2063 struct ice_aq_desc desc;
2065 cmd = &desc.params.query_node_to_root;
2066 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2067 cmd->teid = CPU_TO_LE32(node_teid);
2068 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2072 * ice_get_agg_info - get the aggregator ID
2073 * @hw: pointer to the hardware structure
2074 * @agg_id: aggregator ID
2076 * This function validates aggregator ID. The function returns info if
2077 * aggregator ID is present in list otherwise it returns null.
2079 static struct ice_sched_agg_info*
2080 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2082 struct ice_sched_agg_info *agg_info;
2084 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2086 if (agg_info->agg_id == agg_id)
2093 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2094 * @hw: pointer to the HW struct
2095 * @node: pointer to a child node
2096 * @num_nodes: num nodes count array
2098 * This function walks through the aggregator subtree to find a free parent
2101 static struct ice_sched_node *
2102 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2105 u8 l = node->tx_sched_layer;
2108 vsil = ice_sched_get_vsi_layer(hw);
2110 /* Is it VSI parent layer ? */
2112 return (node->num_children < hw->max_children[l]) ? node : NULL;
2114 /* We have intermediate nodes. Let's walk through the subtree. If the
2115 * intermediate node has space to add a new node then clear the count
2117 if (node->num_children < hw->max_children[l])
2119 /* The below recursive call is intentional and wouldn't go more than
2120 * 2 or 3 iterations.
2123 for (i = 0; i < node->num_children; i++) {
2124 struct ice_sched_node *parent;
2126 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2136 * ice_sched_update_parent - update the new parent in SW DB
2137 * @new_parent: pointer to a new parent node
2138 * @node: pointer to a child node
2140 * This function removes the child from the old parent and adds it to a new
2144 ice_sched_update_parent(struct ice_sched_node *new_parent,
2145 struct ice_sched_node *node)
2147 struct ice_sched_node *old_parent;
2150 old_parent = node->parent;
2152 /* update the old parent children */
2153 for (i = 0; i < old_parent->num_children; i++)
2154 if (old_parent->children[i] == node) {
2155 for (j = i + 1; j < old_parent->num_children; j++)
2156 old_parent->children[j - 1] =
2157 old_parent->children[j];
2158 old_parent->num_children--;
2162 /* now move the node to a new parent */
2163 new_parent->children[new_parent->num_children++] = node;
2164 node->parent = new_parent;
2165 node->info.parent_teid = new_parent->info.node_teid;
2169 * ice_sched_move_nodes - move child nodes to a given parent
2170 * @pi: port information structure
2171 * @parent: pointer to parent node
2172 * @num_items: number of child nodes to be moved
2173 * @list: pointer to child node teids
2175 * This function move the child nodes to a given parent.
2177 static enum ice_status
2178 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2179 u16 num_items, u32 *list)
2181 struct ice_aqc_move_elem *buf;
2182 struct ice_sched_node *node;
2183 enum ice_status status = ICE_SUCCESS;
2190 if (!parent || !num_items)
2191 return ICE_ERR_PARAM;
2193 /* Does parent have enough space */
2194 if (parent->num_children + num_items >=
2195 hw->max_children[parent->tx_sched_layer])
2196 return ICE_ERR_AQ_FULL;
2198 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
2200 return ICE_ERR_NO_MEMORY;
2202 for (i = 0; i < num_items; i++) {
2203 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2205 status = ICE_ERR_PARAM;
2209 buf->hdr.src_parent_teid = node->info.parent_teid;
2210 buf->hdr.dest_parent_teid = parent->info.node_teid;
2211 buf->teid[0] = node->info.node_teid;
2212 buf->hdr.num_elems = CPU_TO_LE16(1);
2213 status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
2215 if (status && grps_movd != 1) {
2216 status = ICE_ERR_CFG;
2220 /* update the SW DB */
2221 ice_sched_update_parent(parent, node);
2230 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2231 * @pi: port information structure
2232 * @vsi_handle: software VSI handle
2233 * @agg_id: aggregator ID
2236 * This function moves a VSI to an aggregator node or its subtree.
2237 * Intermediate nodes may be created if required.
2239 static enum ice_status
2240 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2243 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2244 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2245 u32 first_node_teid, vsi_teid;
2246 enum ice_status status;
2247 u16 num_nodes_added;
2250 tc_node = ice_sched_get_tc_node(pi, tc);
2254 agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
2256 return ICE_ERR_DOES_NOT_EXIST;
2258 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2260 return ICE_ERR_DOES_NOT_EXIST;
2262 aggl = ice_sched_get_agg_layer(pi->hw);
2263 vsil = ice_sched_get_vsi_layer(pi->hw);
2265 /* set intermediate node count to 1 between aggregator and VSI layers */
2266 for (i = aggl + 1; i < vsil; i++)
2269 /* Check if the aggregator subtree has any free node to add the VSI */
2270 for (i = 0; i < agg_node->num_children; i++) {
2271 parent = ice_sched_get_free_vsi_parent(pi->hw,
2272 agg_node->children[i],
2280 for (i = aggl + 1; i < vsil; i++) {
2281 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2285 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2288 /* The newly added node can be a new parent for the next
2291 if (num_nodes_added)
2292 parent = ice_sched_find_node_by_teid(tc_node,
2295 parent = parent->children[0];
2302 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2303 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2307 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2308 * @pi: port information structure
2309 * @agg_info: aggregator info
2310 * @tc: traffic class number
2311 * @rm_vsi_info: true or false
2313 * This function move all the VSI(s) to the default aggregator and delete
2314 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2315 * caller holds the scheduler lock.
2317 static enum ice_status
2318 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2319 struct ice_sched_agg_info *agg_info, u8 tc,
2322 struct ice_sched_agg_vsi_info *agg_vsi_info;
2323 struct ice_sched_agg_vsi_info *tmp;
2324 enum ice_status status = ICE_SUCCESS;
2326 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2327 ice_sched_agg_vsi_info, list_entry) {
2328 u16 vsi_handle = agg_vsi_info->vsi_handle;
2330 /* Move VSI to default aggregator */
2331 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2334 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2335 ICE_DFLT_AGG_ID, tc);
2339 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2340 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2341 LIST_DEL(&agg_vsi_info->list_entry);
2342 ice_free(pi->hw, agg_vsi_info);
2350 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2351 * @pi: port information structure
2352 * @node: node pointer
2354 * This function checks whether the aggregator is attached with any VSI or not.
2357 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2361 vsil = ice_sched_get_vsi_layer(pi->hw);
2362 if (node->tx_sched_layer < vsil - 1) {
2363 for (i = 0; i < node->num_children; i++)
2364 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2368 return node->num_children ? true : false;
2373 * ice_sched_rm_agg_cfg - remove the aggregator node
2374 * @pi: port information structure
2375 * @agg_id: aggregator ID
2378 * This function removes the aggregator node and intermediate nodes if any
2381 static enum ice_status
2382 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2384 struct ice_sched_node *tc_node, *agg_node;
2385 struct ice_hw *hw = pi->hw;
2387 tc_node = ice_sched_get_tc_node(pi, tc);
2391 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
2393 return ICE_ERR_DOES_NOT_EXIST;
2395 /* Can't remove the aggregator node if it has children */
2396 if (ice_sched_is_agg_inuse(pi, agg_node))
2397 return ICE_ERR_IN_USE;
2399 /* need to remove the whole subtree if aggregator node is the
2402 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2403 struct ice_sched_node *parent = agg_node->parent;
2408 if (parent->num_children > 1)
2414 ice_free_sched_node(pi, agg_node);
2419 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2420 * @pi: port information structure
2421 * @agg_info: aggregator ID
2423 * @rm_vsi_info: bool value true or false
2425 * This function removes aggregator reference to VSI of given TC. It removes
2426 * the aggregator configuration completely for requested TC. The caller needs
2427 * to hold the scheduler lock.
2429 static enum ice_status
2430 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2431 u8 tc, bool rm_vsi_info)
2433 enum ice_status status = ICE_SUCCESS;
2435 /* If nothing to remove - return success */
2436 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2437 goto exit_rm_agg_cfg_tc;
2439 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2441 goto exit_rm_agg_cfg_tc;
2443 /* Delete aggregator node(s) */
2444 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2446 goto exit_rm_agg_cfg_tc;
2448 ice_clear_bit(tc, agg_info->tc_bitmap);
2454 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2455 * @pi: port information structure
2456 * @agg_id: aggregator ID
2457 * @tc_bitmap: 8 bits TC bitmap
2459 * Save aggregator TC bitmap. This function needs to be called with scheduler
2462 static enum ice_status
2463 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2464 ice_bitmap_t *tc_bitmap)
2466 struct ice_sched_agg_info *agg_info;
2468 agg_info = ice_get_agg_info(pi->hw, agg_id);
2470 return ICE_ERR_PARAM;
2471 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2472 ICE_MAX_TRAFFIC_CLASS);
2477 * ice_sched_add_agg_cfg - create an aggregator node
2478 * @pi: port information structure
2479 * @agg_id: aggregator ID
2482 * This function creates an aggregator node and intermediate nodes if required
2485 static enum ice_status
2486 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2488 struct ice_sched_node *parent, *agg_node, *tc_node;
2489 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2490 enum ice_status status = ICE_SUCCESS;
2491 struct ice_hw *hw = pi->hw;
2492 u32 first_node_teid;
2493 u16 num_nodes_added;
2496 tc_node = ice_sched_get_tc_node(pi, tc);
2500 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
2501 /* Does Agg node already exist ? */
2505 aggl = ice_sched_get_agg_layer(hw);
2507 /* need one node in Agg layer */
2508 num_nodes[aggl] = 1;
2510 /* Check whether the intermediate nodes have space to add the
2511 * new aggregator. If they are full, then SW needs to allocate a new
2512 * intermediate node on those layers
2514 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2515 parent = ice_sched_get_first_node(pi, tc_node, i);
2517 /* scan all the siblings */
2519 if (parent->num_children < hw->max_children[i])
2521 parent = parent->sibling;
2524 /* all the nodes are full, reserve one for this layer */
2529 /* add the aggregator node */
2531 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2535 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2539 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2542 /* The newly added node can be a new parent for the next
2545 if (num_nodes_added) {
2546 parent = ice_sched_find_node_by_teid(tc_node,
2548 /* register aggregator ID with the aggregator node */
2549 if (parent && i == aggl)
2550 parent->agg_id = agg_id;
2552 parent = parent->children[0];
2560 * ice_sched_cfg_agg - configure aggregator node
2561 * @pi: port information structure
2562 * @agg_id: aggregator ID
2563 * @agg_type: aggregator type queue, VSI, or aggregator group
2564 * @tc_bitmap: bits TC bitmap
2566 * It registers a unique aggregator node into scheduler services. It
2567 * allows a user to register with a unique ID to track it's resources.
2568 * The aggregator type determines if this is a queue group, VSI group
2569 * or aggregator group. It then creates the aggregator node(s) for requested
2570 * TC(s) or removes an existing aggregator node including its configuration
2571 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2572 * resources and remove aggregator ID.
2573 * This function needs to be called with scheduler lock held.
2575 static enum ice_status
2576 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2577 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2579 struct ice_sched_agg_info *agg_info;
2580 enum ice_status status = ICE_SUCCESS;
2581 struct ice_hw *hw = pi->hw;
2584 agg_info = ice_get_agg_info(hw, agg_id);
2586 /* Create new entry for new aggregator ID */
2587 agg_info = (struct ice_sched_agg_info *)
2588 ice_malloc(hw, sizeof(*agg_info));
2590 status = ICE_ERR_NO_MEMORY;
2593 agg_info->agg_id = agg_id;
2594 agg_info->agg_type = agg_type;
2595 agg_info->tc_bitmap[0] = 0;
2597 /* Initialize the aggregator VSI list head */
2598 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2600 /* Add new entry in aggregator list */
2601 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2603 /* Create aggregator node(s) for requested TC(s) */
2604 ice_for_each_traffic_class(tc) {
2605 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2606 /* Delete aggregator cfg TC if it exists previously */
2607 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2613 /* Check if aggregator node for TC already exists */
2614 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2617 /* Create new aggregator node for TC */
2618 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2622 /* Save aggregator node's TC information */
2623 ice_set_bit(tc, agg_info->tc_bitmap);
2630 * ice_cfg_agg - config aggregator node
2631 * @pi: port information structure
2632 * @agg_id: aggregator ID
2633 * @agg_type: aggregator type queue, VSI, or aggregator group
2634 * @tc_bitmap: bits TC bitmap
2636 * This function configures aggregator node(s).
2639 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2642 ice_bitmap_t bitmap = tc_bitmap;
2643 enum ice_status status;
2645 ice_acquire_lock(&pi->sched_lock);
2646 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2647 (ice_bitmap_t *)&bitmap);
2649 status = ice_save_agg_tc_bitmap(pi, agg_id,
2650 (ice_bitmap_t *)&bitmap);
2651 ice_release_lock(&pi->sched_lock);
2656 * ice_get_agg_vsi_info - get the aggregator ID
2657 * @agg_info: aggregator info
2658 * @vsi_handle: software VSI handle
2660 * The function returns aggregator VSI info based on VSI handle. This function
2661 * needs to be called with scheduler lock held.
2663 static struct ice_sched_agg_vsi_info*
2664 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2666 struct ice_sched_agg_vsi_info *agg_vsi_info;
2668 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2669 ice_sched_agg_vsi_info, list_entry)
2670 if (agg_vsi_info->vsi_handle == vsi_handle)
2671 return agg_vsi_info;
2677 * ice_get_vsi_agg_info - get the aggregator info of VSI
2678 * @hw: pointer to the hardware structure
2679 * @vsi_handle: Sw VSI handle
2681 * The function returns aggregator info of VSI represented via vsi_handle. The
2682 * VSI has in this case a different aggregator than the default one. This
2683 * function needs to be called with scheduler lock held.
2685 static struct ice_sched_agg_info*
2686 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2688 struct ice_sched_agg_info *agg_info;
2690 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2692 struct ice_sched_agg_vsi_info *agg_vsi_info;
2694 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2702 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2703 * @pi: port information structure
2704 * @agg_id: aggregator ID
2705 * @vsi_handle: software VSI handle
2706 * @tc_bitmap: TC bitmap of enabled TC(s)
2708 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2711 static enum ice_status
2712 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2713 ice_bitmap_t *tc_bitmap)
2715 struct ice_sched_agg_vsi_info *agg_vsi_info;
2716 struct ice_sched_agg_info *agg_info;
2718 agg_info = ice_get_agg_info(pi->hw, agg_id);
2720 return ICE_ERR_PARAM;
2721 /* check if entry already exist */
2722 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2724 return ICE_ERR_PARAM;
2725 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2726 ICE_MAX_TRAFFIC_CLASS);
2731 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2732 * @pi: port information structure
2733 * @agg_id: aggregator ID
2734 * @vsi_handle: software VSI handle
2735 * @tc_bitmap: TC bitmap of enabled TC(s)
2737 * This function moves VSI to a new or default aggregator node. If VSI is
2738 * already associated to the aggregator node then no operation is performed on
2739 * the tree. This function needs to be called with scheduler lock held.
2741 static enum ice_status
2742 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2743 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2745 struct ice_sched_agg_vsi_info *agg_vsi_info;
2746 struct ice_sched_agg_info *agg_info;
2747 enum ice_status status = ICE_SUCCESS;
2748 struct ice_hw *hw = pi->hw;
2751 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2752 return ICE_ERR_PARAM;
2753 agg_info = ice_get_agg_info(hw, agg_id);
2755 return ICE_ERR_PARAM;
2756 /* check if entry already exist */
2757 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2758 if (!agg_vsi_info) {
2759 /* Create new entry for VSI under aggregator list */
2760 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2761 ice_malloc(hw, sizeof(*agg_vsi_info));
2763 return ICE_ERR_PARAM;
2765 /* add VSI ID into the aggregator list */
2766 agg_vsi_info->vsi_handle = vsi_handle;
2767 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2769 /* Move VSI node to new aggregator node for requested TC(s) */
2770 ice_for_each_traffic_class(tc) {
2771 if (!ice_is_tc_ena(*tc_bitmap, tc))
2774 /* Move VSI to new aggregator */
2775 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2779 if (agg_id != ICE_DFLT_AGG_ID)
2780 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2782 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2784 /* If VSI moved back to default aggregator, delete agg_vsi_info. */
2785 if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
2786 ICE_MAX_TRAFFIC_CLASS)) {
2787 LIST_DEL(&agg_vsi_info->list_entry);
2788 ice_free(hw, agg_vsi_info);
2794 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2795 * @pi: port information structure
2797 * This function removes unused rate limit profiles from the HW and
2798 * SW DB. The caller needs to hold scheduler lock.
2800 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
2804 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
2805 struct ice_aqc_rl_profile_info *rl_prof_elem;
2806 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2808 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2809 &pi->rl_prof_list[ln],
2810 ice_aqc_rl_profile_info, list_entry) {
2811 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
2812 ice_debug(pi->hw, ICE_DBG_SCHED,
2813 "Removed rl profile\n");
2819 * ice_sched_update_elem - update element
2820 * @hw: pointer to the HW struct
2821 * @node: pointer to node
2822 * @info: node info to update
2824 * It updates the HW DB, and local SW DB of node. It updates the scheduling
2825 * parameters of node from argument info data buffer (Info->data buf) and
2826 * returns success or error on config sched element failure. The caller
2827 * needs to hold scheduler lock.
2829 static enum ice_status
2830 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2831 struct ice_aqc_txsched_elem_data *info)
2833 struct ice_aqc_conf_elem buf;
2834 enum ice_status status;
2838 buf.generic[0] = *info;
2839 /* Parent TEID is reserved field in this aq call */
2840 buf.generic[0].parent_teid = 0;
2841 /* Element type is reserved field in this aq call */
2842 buf.generic[0].data.elem_type = 0;
2843 /* Flags is reserved field in this aq call */
2844 buf.generic[0].data.flags = 0;
2847 /* Configure element node */
2848 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2850 if (status || elem_cfgd != num_elems) {
2851 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2855 /* Config success case */
2856 /* Now update local SW DB */
2857 /* Only copy the data portion of info buffer */
2858 node->info.data = info->data;
2863 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2864 * @hw: pointer to the HW struct
2865 * @node: sched node to configure
2866 * @rl_type: rate limit type CIR, EIR, or shared
2867 * @bw_alloc: BW weight/allocation
2869 * This function configures node element's BW allocation.
2871 static enum ice_status
2872 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2873 enum ice_rl_type rl_type, u8 bw_alloc)
2875 struct ice_aqc_txsched_elem_data buf;
2876 struct ice_aqc_txsched_elem *data;
2877 enum ice_status status;
2881 if (rl_type == ICE_MIN_BW) {
2882 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2883 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2884 } else if (rl_type == ICE_MAX_BW) {
2885 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2886 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2888 return ICE_ERR_PARAM;
2891 /* Configure element */
2892 status = ice_sched_update_elem(hw, node, &buf);
2897 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2898 * @pi: port information structure
2899 * @agg_id: aggregator ID
2900 * @vsi_handle: software VSI handle
2901 * @tc_bitmap: TC bitmap of enabled TC(s)
2903 * Move or associate VSI to a new or default aggregator node.
2906 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2909 ice_bitmap_t bitmap = tc_bitmap;
2910 enum ice_status status;
2912 ice_acquire_lock(&pi->sched_lock);
2913 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2914 (ice_bitmap_t *)&bitmap);
2916 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2917 (ice_bitmap_t *)&bitmap);
2918 ice_release_lock(&pi->sched_lock);
2923 * ice_rm_agg_cfg - remove aggregator configuration
2924 * @pi: port information structure
2925 * @agg_id: aggregator ID
2927 * This function removes aggregator reference to VSI and delete aggregator ID
2928 * info. It removes the aggregator configuration completely.
2930 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
2932 struct ice_sched_agg_info *agg_info;
2933 enum ice_status status = ICE_SUCCESS;
2936 ice_acquire_lock(&pi->sched_lock);
2937 agg_info = ice_get_agg_info(pi->hw, agg_id);
2939 status = ICE_ERR_DOES_NOT_EXIST;
2940 goto exit_ice_rm_agg_cfg;
2943 ice_for_each_traffic_class(tc) {
2944 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
2946 goto exit_ice_rm_agg_cfg;
2949 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
2950 status = ICE_ERR_IN_USE;
2951 goto exit_ice_rm_agg_cfg;
2954 /* Safe to delete entry now */
2955 LIST_DEL(&agg_info->list_entry);
2956 ice_free(pi->hw, agg_info);
2958 /* Remove unused RL profile IDs from HW and SW DB */
2959 ice_sched_rm_unused_rl_prof(pi);
2961 exit_ice_rm_agg_cfg:
2962 ice_release_lock(&pi->sched_lock);
2967 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
2968 * @bw_t_info: bandwidth type information structure
2969 * @bw_alloc: Bandwidth allocation information
2971 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
2975 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
2977 bw_t_info->cir_bw.bw_alloc = bw_alloc;
2978 if (bw_t_info->cir_bw.bw_alloc)
2979 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
2981 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
2985 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
2986 * @bw_t_info: bandwidth type information structure
2987 * @bw_alloc: Bandwidth allocation information
2989 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
2993 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
2995 bw_t_info->eir_bw.bw_alloc = bw_alloc;
2996 if (bw_t_info->eir_bw.bw_alloc)
2997 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
2999 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3003 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3004 * @pi: port information structure
3005 * @vsi_handle: sw VSI handle
3006 * @tc: traffic class
3007 * @rl_type: rate limit type min or max
3008 * @bw_alloc: Bandwidth allocation information
3010 * Save BW alloc information of VSI type node for post replay use.
3012 static enum ice_status
3013 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3014 enum ice_rl_type rl_type, u16 bw_alloc)
3016 struct ice_vsi_ctx *vsi_ctx;
3018 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3019 return ICE_ERR_PARAM;
3020 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3022 return ICE_ERR_PARAM;
3025 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3029 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3033 return ICE_ERR_PARAM;
3039 * ice_set_clear_cir_bw - set or clear CIR BW
3040 * @bw_t_info: bandwidth type information structure
3041 * @bw: bandwidth in Kbps - Kilo bits per sec
3043 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3046 ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3048 if (bw == ICE_SCHED_DFLT_BW) {
3049 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3050 bw_t_info->cir_bw.bw = 0;
3052 /* Save type of BW information */
3053 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3054 bw_t_info->cir_bw.bw = bw;
3059 * ice_set_clear_eir_bw - set or clear EIR BW
3060 * @bw_t_info: bandwidth type information structure
3061 * @bw: bandwidth in Kbps - Kilo bits per sec
3063 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3066 ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3068 if (bw == ICE_SCHED_DFLT_BW) {
3069 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3070 bw_t_info->eir_bw.bw = 0;
3072 /* EIR BW and Shared BW profiles are mutually exclusive and
3073 * hence only one of them may be set for any given element.
3074 * First clear earlier saved shared BW information.
3076 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3077 bw_t_info->shared_bw = 0;
3078 /* save EIR BW information */
3079 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3080 bw_t_info->eir_bw.bw = bw;
3085 * ice_set_clear_shared_bw - set or clear shared BW
3086 * @bw_t_info: bandwidth type information structure
3087 * @bw: bandwidth in Kbps - Kilo bits per sec
3089 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3092 ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3094 if (bw == ICE_SCHED_DFLT_BW) {
3095 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3096 bw_t_info->shared_bw = 0;
3098 /* EIR BW and Shared BW profiles are mutually exclusive and
3099 * hence only one of them may be set for any given element.
3100 * First clear earlier saved EIR BW information.
3102 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3103 bw_t_info->eir_bw.bw = 0;
3104 /* save shared BW information */
3105 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3106 bw_t_info->shared_bw = bw;
3111 * ice_sched_save_vsi_bw - save VSI node's BW information
3112 * @pi: port information structure
3113 * @vsi_handle: sw VSI handle
3114 * @tc: traffic class
3115 * @rl_type: rate limit type min, max, or shared
3116 * @bw: bandwidth in Kbps - Kilo bits per sec
3118 * Save BW information of VSI type node for post replay use.
3120 static enum ice_status
3121 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3122 enum ice_rl_type rl_type, u32 bw)
3124 struct ice_vsi_ctx *vsi_ctx;
3126 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3127 return ICE_ERR_PARAM;
3128 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3130 return ICE_ERR_PARAM;
3133 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3136 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3139 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3142 return ICE_ERR_PARAM;
3148 * ice_set_clear_prio - set or clear priority information
3149 * @bw_t_info: bandwidth type information structure
3150 * @prio: priority to save
3152 * Save or clear priority (prio) in the passed param bw_t_info.
3155 ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3157 bw_t_info->generic = prio;
3158 if (bw_t_info->generic)
3159 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3161 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3165 * ice_sched_save_vsi_prio - save VSI node's priority information
3166 * @pi: port information structure
3167 * @vsi_handle: Software VSI handle
3168 * @tc: traffic class
3169 * @prio: priority to save
3171 * Save priority information of VSI type node for post replay use.
3173 static enum ice_status
3174 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3177 struct ice_vsi_ctx *vsi_ctx;
3179 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3180 return ICE_ERR_PARAM;
3181 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3183 return ICE_ERR_PARAM;
3184 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3185 return ICE_ERR_PARAM;
3186 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3191 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3192 * @pi: port information structure
3193 * @agg_id: node aggregator ID
3194 * @tc: traffic class
3195 * @rl_type: rate limit type min or max
3196 * @bw_alloc: bandwidth alloc information
3198 * Save BW alloc information of AGG type node for post replay use.
3200 static enum ice_status
3201 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3202 enum ice_rl_type rl_type, u16 bw_alloc)
3204 struct ice_sched_agg_info *agg_info;
3206 agg_info = ice_get_agg_info(pi->hw, agg_id);
3208 return ICE_ERR_PARAM;
3209 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3210 return ICE_ERR_PARAM;
3213 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3216 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3219 return ICE_ERR_PARAM;
3225 * ice_sched_save_agg_bw - save aggregator node's BW information
3226 * @pi: port information structure
3227 * @agg_id: node aggregator ID
3228 * @tc: traffic class
3229 * @rl_type: rate limit type min, max, or shared
3230 * @bw: bandwidth in Kbps - Kilo bits per sec
3232 * Save BW information of AGG type node for post replay use.
3234 static enum ice_status
3235 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3236 enum ice_rl_type rl_type, u32 bw)
3238 struct ice_sched_agg_info *agg_info;
3240 agg_info = ice_get_agg_info(pi->hw, agg_id);
3242 return ICE_ERR_PARAM;
3243 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3244 return ICE_ERR_PARAM;
3247 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3250 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3253 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3256 return ICE_ERR_PARAM;
3262 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3263 * @pi: port information structure
3264 * @vsi_handle: software VSI handle
3265 * @tc: traffic class
3266 * @rl_type: min or max
3267 * @bw: bandwidth in Kbps
3269 * This function configures BW limit of VSI scheduling node based on TC
3273 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3274 enum ice_rl_type rl_type, u32 bw)
3276 enum ice_status status;
3278 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3282 ice_acquire_lock(&pi->sched_lock);
3283 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3284 ice_release_lock(&pi->sched_lock);
3290 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3291 * @pi: port information structure
3292 * @vsi_handle: software VSI handle
3293 * @tc: traffic class
3294 * @rl_type: min or max
3296 * This function configures default BW limit of VSI scheduling node based on TC
3300 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3301 enum ice_rl_type rl_type)
3303 enum ice_status status;
3305 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3310 ice_acquire_lock(&pi->sched_lock);
3311 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3313 ice_release_lock(&pi->sched_lock);
3319 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3320 * @pi: port information structure
3321 * @agg_id: aggregator ID
3322 * @tc: traffic class
3323 * @rl_type: min or max
3324 * @bw: bandwidth in Kbps
3326 * This function applies BW limit to aggregator scheduling node based on TC
3330 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3331 enum ice_rl_type rl_type, u32 bw)
3333 enum ice_status status;
3335 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3338 ice_acquire_lock(&pi->sched_lock);
3339 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3340 ice_release_lock(&pi->sched_lock);
3346 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3347 * @pi: port information structure
3348 * @agg_id: aggregator ID
3349 * @tc: traffic class
3350 * @rl_type: min or max
3352 * This function applies default BW limit to aggregator scheduling node based
3353 * on TC information.
3356 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3357 enum ice_rl_type rl_type)
3359 enum ice_status status;
3361 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3365 ice_acquire_lock(&pi->sched_lock);
3366 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3368 ice_release_lock(&pi->sched_lock);
3374 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3375 * @pi: port information structure
3376 * @vsi_handle: software VSI handle
3377 * @bw: bandwidth in Kbps
3379 * This function Configures shared rate limiter(SRL) of all VSI type nodes
3380 * across all traffic classes for VSI matching handle.
3383 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
3385 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
3389 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3390 * @pi: port information structure
3391 * @vsi_handle: software VSI handle
3393 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3394 * across all traffic classes for VSI matching handle.
3397 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3399 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3404 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3405 * @pi: port information structure
3406 * @agg_id: aggregator ID
3407 * @bw: bandwidth in Kbps
3409 * This function configures the shared rate limiter(SRL) of all aggregator type
3410 * nodes across all traffic classes for aggregator matching agg_id.
3413 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
3415 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
3419 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3420 * @pi: port information structure
3421 * @agg_id: aggregator ID
3423 * This function removes the shared rate limiter(SRL) of all aggregator type
3424 * nodes across all traffic classes for aggregator matching agg_id.
3427 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3429 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
3433 * ice_config_vsi_queue_priority - config VSI queue priority of node
3434 * @pi: port information structure
3435 * @num_qs: number of VSI queues
3436 * @q_ids: queue IDs array
3437 * @q_ids: queue IDs array
3438 * @q_prio: queue priority array
3440 * This function configures the queue node priority (Sibling Priority) of the
3441 * passed in VSI's queue(s) for a given traffic class (TC).
3444 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3447 enum ice_status status = ICE_ERR_PARAM;
3448 struct ice_hw *hw = pi->hw;
3451 ice_acquire_lock(&pi->sched_lock);
3453 for (i = 0; i < num_qs; i++) {
3454 struct ice_sched_node *node;
3456 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3457 if (!node || node->info.data.elem_type !=
3458 ICE_AQC_ELEM_TYPE_LEAF) {
3459 status = ICE_ERR_PARAM;
3462 /* Configure Priority */
3463 status = ice_sched_cfg_sibl_node_prio(hw, node, q_prio[i]);
3468 ice_release_lock(&pi->sched_lock);
3473 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3474 * @pi: port information structure
3475 * @agg_id: Aggregator ID
3476 * @num_vsis: number of VSI(s)
3477 * @vsi_handle_arr: array of software VSI handles
3478 * @node_prio: pointer to node priority
3479 * @tc: traffic class
3481 * This function configures the node priority (Sibling Priority) of the
3482 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3485 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3486 u16 num_vsis, u16 *vsi_handle_arr,
3487 u8 *node_prio, u8 tc)
3489 struct ice_sched_agg_vsi_info *agg_vsi_info;
3490 struct ice_sched_node *tc_node, *agg_node;
3491 enum ice_status status = ICE_ERR_PARAM;
3492 struct ice_sched_agg_info *agg_info;
3493 bool agg_id_present = false;
3494 struct ice_hw *hw = pi->hw;
3497 ice_acquire_lock(&pi->sched_lock);
3498 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3500 if (agg_info->agg_id == agg_id) {
3501 agg_id_present = true;
3504 if (!agg_id_present)
3505 goto exit_agg_priority_per_tc;
3507 tc_node = ice_sched_get_tc_node(pi, tc);
3509 goto exit_agg_priority_per_tc;
3511 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
3513 goto exit_agg_priority_per_tc;
3515 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3516 goto exit_agg_priority_per_tc;
3518 for (i = 0; i < num_vsis; i++) {
3519 struct ice_sched_node *vsi_node;
3520 bool vsi_handle_valid = false;
3523 status = ICE_ERR_PARAM;
3524 vsi_handle = vsi_handle_arr[i];
3525 if (!ice_is_vsi_valid(hw, vsi_handle))
3526 goto exit_agg_priority_per_tc;
3527 /* Verify child nodes before applying settings */
3528 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3529 ice_sched_agg_vsi_info, list_entry)
3530 if (agg_vsi_info->vsi_handle == vsi_handle) {
3531 /* cppcheck-suppress unreadVariable */
3532 vsi_handle_valid = true;
3536 if (!vsi_handle_valid)
3537 goto exit_agg_priority_per_tc;
3539 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3541 goto exit_agg_priority_per_tc;
3543 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3544 /* Configure Priority */
3545 status = ice_sched_cfg_sibl_node_prio(hw, vsi_node,
3549 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3556 exit_agg_priority_per_tc:
3557 ice_release_lock(&pi->sched_lock);
3562 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3563 * @pi: port information structure
3564 * @vsi_handle: software VSI handle
3565 * @ena_tcmap: enabled TC map
3566 * @rl_type: Rate limit type CIR/EIR
3567 * @bw_alloc: Array of BW alloc
3569 * This function configures the BW allocation of the passed in VSI's
3570 * node(s) for enabled traffic class.
3573 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3574 enum ice_rl_type rl_type, u8 *bw_alloc)
3576 enum ice_status status = ICE_SUCCESS;
3579 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3580 return ICE_ERR_PARAM;
3582 ice_acquire_lock(&pi->sched_lock);
3584 /* Return success if no nodes are present across TC */
3585 ice_for_each_traffic_class(tc) {
3586 struct ice_sched_node *tc_node, *vsi_node;
3588 if (!ice_is_tc_ena(ena_tcmap, tc))
3591 tc_node = ice_sched_get_tc_node(pi, tc);
3595 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3599 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3603 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3604 rl_type, bw_alloc[tc]);
3609 ice_release_lock(&pi->sched_lock);
3614 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3615 * @pi: port information structure
3616 * @agg_id: aggregator ID
3617 * @ena_tcmap: enabled TC map
3618 * @rl_type: rate limit type CIR/EIR
3619 * @bw_alloc: array of BW alloc
3621 * This function configures the BW allocation of passed in aggregator for
3622 * enabled traffic class(s).
3625 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3626 enum ice_rl_type rl_type, u8 *bw_alloc)
3628 struct ice_sched_agg_info *agg_info;
3629 bool agg_id_present = false;
3630 enum ice_status status = ICE_SUCCESS;
3631 struct ice_hw *hw = pi->hw;
3634 ice_acquire_lock(&pi->sched_lock);
3635 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3637 if (agg_info->agg_id == agg_id) {
3638 agg_id_present = true;
3641 if (!agg_id_present) {
3642 status = ICE_ERR_PARAM;
3643 goto exit_cfg_agg_bw_alloc;
3646 /* Return success if no nodes are present across TC */
3647 ice_for_each_traffic_class(tc) {
3648 struct ice_sched_node *tc_node, *agg_node;
3650 if (!ice_is_tc_ena(ena_tcmap, tc))
3653 tc_node = ice_sched_get_tc_node(pi, tc);
3657 agg_node = ice_sched_get_agg_node(hw, tc_node, agg_id);
3661 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3665 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3671 exit_cfg_agg_bw_alloc:
3672 ice_release_lock(&pi->sched_lock);
3677 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3678 * @bw: bandwidth in Kbps
3680 * This function calculates the wakeup parameter of RL profile.
3682 static u16 ice_sched_calc_wakeup(s32 bw)
3684 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3688 /* Get the wakeup integer value */
3689 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3690 wakeup_int = DIV_64BIT(ICE_RL_PROF_FREQUENCY, bytes_per_sec);
3691 if (wakeup_int > 63) {
3692 wakeup = (u16)((1 << 15) | wakeup_int);
3694 /* Calculate fraction value up to 4 decimals
3695 * Convert Integer value to a constant multiplier
3697 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3698 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3699 ICE_RL_PROF_FREQUENCY, bytes_per_sec);
3701 /* Get Fraction value */
3702 wakeup_f = wakeup_a - wakeup_b;
3704 /* Round up the Fractional value via Ceil(Fractional value) */
3705 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3708 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3709 ICE_RL_PROF_MULTIPLIER);
3710 wakeup |= (u16)(wakeup_int << 9);
3711 wakeup |= (u16)(0x1ff & wakeup_f_int);
3718 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3719 * @bw: bandwidth in Kbps
3720 * @profile: profile parameters to return
3722 * This function converts the BW to profile structure format.
3724 static enum ice_status
3725 ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
3727 enum ice_status status = ICE_ERR_PARAM;
3728 s64 bytes_per_sec, ts_rate, mv_tmp;
3734 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3735 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3738 /* Bytes per second from Kbps */
3739 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3741 /* encode is 6 bits but really useful are 5 bits */
3742 for (i = 0; i < 64; i++) {
3743 u64 pow_result = BIT_ULL(i);
3745 ts_rate = DIV_64BIT((s64)ICE_RL_PROF_FREQUENCY,
3746 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3750 /* Multiplier value */
3751 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3754 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3755 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3757 /* First multiplier value greater than the given
3760 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3769 wm = ice_sched_calc_wakeup(bw);
3770 profile->rl_multiply = CPU_TO_LE16(mv);
3771 profile->wake_up_calc = CPU_TO_LE16(wm);
3772 profile->rl_encode = CPU_TO_LE16(encode);
3773 status = ICE_SUCCESS;
3775 status = ICE_ERR_DOES_NOT_EXIST;
3782 * ice_sched_add_rl_profile - add RL profile
3783 * @pi: port information structure
3784 * @rl_type: type of rate limit BW - min, max, or shared
3785 * @bw: bandwidth in Kbps - Kilo bits per sec
3786 * @layer_num: specifies in which layer to create profile
3788 * This function first checks the existing list for corresponding BW
3789 * parameter. If it exists, it returns the associated profile otherwise
3790 * it creates a new rate limit profile for requested BW, and adds it to
3791 * the HW DB and local list. It returns the new profile or null on error.
3792 * The caller needs to hold the scheduler lock.
3794 static struct ice_aqc_rl_profile_info *
3795 ice_sched_add_rl_profile(struct ice_port_info *pi,
3796 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3798 struct ice_aqc_rl_profile_generic_elem *buf;
3799 struct ice_aqc_rl_profile_info *rl_prof_elem;
3800 u16 profiles_added = 0, num_profiles = 1;
3801 enum ice_status status = ICE_ERR_PARAM;
3807 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3810 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3813 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3822 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3823 ice_aqc_rl_profile_info, list_entry)
3824 if (rl_prof_elem->profile.flags == profile_type &&
3825 rl_prof_elem->bw == bw)
3826 /* Return existing profile ID info */
3827 return rl_prof_elem;
3829 /* Create new profile ID */
3830 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3831 ice_malloc(hw, sizeof(*rl_prof_elem));
3836 status = ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile);
3837 if (status != ICE_SUCCESS)
3838 goto exit_add_rl_prof;
3840 rl_prof_elem->bw = bw;
3841 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3842 rl_prof_elem->profile.level = layer_num + 1;
3843 rl_prof_elem->profile.flags = profile_type;
3844 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3846 /* Create new entry in HW DB */
3847 buf = (struct ice_aqc_rl_profile_generic_elem *)
3848 &rl_prof_elem->profile;
3849 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3850 &profiles_added, NULL);
3851 if (status || profiles_added != num_profiles)
3852 goto exit_add_rl_prof;
3854 /* Good entry - add in the list */
3855 rl_prof_elem->prof_id_ref = 0;
3856 LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3857 return rl_prof_elem;
3860 ice_free(hw, rl_prof_elem);
3865 * ice_sched_cfg_node_bw_lmt - configure node sched params
3866 * @hw: pointer to the HW struct
3867 * @node: sched node to configure
3868 * @rl_type: rate limit type CIR, EIR, or shared
3869 * @rl_prof_id: rate limit profile ID
3871 * This function configures node element's BW limit.
3873 static enum ice_status
3874 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3875 enum ice_rl_type rl_type, u16 rl_prof_id)
3877 struct ice_aqc_txsched_elem_data buf;
3878 struct ice_aqc_txsched_elem *data;
3884 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3885 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3888 /* EIR BW and Shared BW profiles are mutually exclusive and
3889 * hence only one of them may be set for any given element
3891 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3893 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3894 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3897 /* Check for removing shared BW */
3898 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3899 /* remove shared profile */
3900 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3901 data->srl_id = 0; /* clear SRL field */
3903 /* enable back EIR to default profile */
3904 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3905 data->eir_bw.bw_profile_idx =
3906 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3909 /* EIR BW and Shared BW profiles are mutually exclusive and
3910 * hence only one of them may be set for any given element
3912 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3913 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3914 ICE_SCHED_DFLT_RL_PROF_ID))
3916 /* EIR BW is set to default, disable it */
3917 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3918 /* Okay to enable shared BW now */
3919 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
3920 data->srl_id = CPU_TO_LE16(rl_prof_id);
3923 /* Unknown rate limit type */
3924 return ICE_ERR_PARAM;
3927 /* Configure element */
3928 return ice_sched_update_elem(hw, node, &buf);
3932 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
3934 * @rl_type: rate limit type
3936 * If existing profile matches, it returns the corresponding rate
3937 * limit profile ID, otherwise it returns an invalid ID as error.
3940 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
3941 enum ice_rl_type rl_type)
3943 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
3944 struct ice_aqc_txsched_elem *data;
3946 data = &node->info.data;
3949 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
3950 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
3953 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
3954 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
3957 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3958 rl_prof_id = LE16_TO_CPU(data->srl_id);
3968 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
3969 * @pi: port information structure
3970 * @rl_type: type of rate limit BW - min, max, or shared
3971 * @layer_index: layer index
3973 * This function returns requested profile creation layer.
3976 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
3979 struct ice_hw *hw = pi->hw;
3981 if (layer_index >= hw->num_tx_sched_layers)
3982 return ICE_SCHED_INVAL_LAYER_NUM;
3985 if (hw->layer_info[layer_index].max_cir_rl_profiles)
3989 if (hw->layer_info[layer_index].max_eir_rl_profiles)
3993 /* if current layer doesn't support SRL profile creation
3994 * then try a layer up or down.
3996 if (hw->layer_info[layer_index].max_srl_profiles)
3998 else if (layer_index < hw->num_tx_sched_layers - 1 &&
3999 hw->layer_info[layer_index + 1].max_srl_profiles)
4000 return layer_index + 1;
4001 else if (layer_index > 0 &&
4002 hw->layer_info[layer_index - 1].max_srl_profiles)
4003 return layer_index - 1;
4008 return ICE_SCHED_INVAL_LAYER_NUM;
4012 * ice_sched_get_srl_node - get shared rate limit node
4014 * @srl_layer: shared rate limit layer
4016 * This function returns SRL node to be used for shared rate limit purpose.
4017 * The caller needs to hold scheduler lock.
4019 static struct ice_sched_node *
4020 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4022 if (srl_layer > node->tx_sched_layer)
4023 return node->children[0];
4024 else if (srl_layer < node->tx_sched_layer)
4025 /* Node can't be created without a parent. It will always
4026 * have a valid parent except root node.
4028 return node->parent;
4034 * ice_sched_rm_rl_profile - remove RL profile ID
4035 * @pi: port information structure
4036 * @layer_num: layer number where profiles are saved
4037 * @profile_type: profile type like EIR, CIR, or SRL
4038 * @profile_id: profile ID to remove
4040 * This function removes rate limit profile from layer 'layer_num' of type
4041 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4044 static enum ice_status
4045 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
4048 struct ice_aqc_rl_profile_info *rl_prof_elem;
4049 enum ice_status status = ICE_SUCCESS;
4051 /* Check the existing list for RL profile */
4052 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
4053 ice_aqc_rl_profile_info, list_entry)
4054 if (rl_prof_elem->profile.flags == profile_type &&
4055 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4057 if (rl_prof_elem->prof_id_ref)
4058 rl_prof_elem->prof_id_ref--;
4060 /* Remove old profile ID from database */
4061 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
4062 if (status && status != ICE_ERR_IN_USE)
4063 ice_debug(pi->hw, ICE_DBG_SCHED,
4064 "Remove rl profile failed\n");
4067 if (status == ICE_ERR_IN_USE)
4068 status = ICE_SUCCESS;
4073 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4074 * @pi: port information structure
4075 * @node: pointer to node structure
4076 * @rl_type: rate limit type min, max, or shared
4077 * @layer_num: layer number where RL profiles are saved
4079 * This function configures node element's BW rate limit profile ID of
4080 * type CIR, EIR, or SRL to default. This function needs to be called
4081 * with the scheduler lock held.
4083 static enum ice_status
4084 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4085 struct ice_sched_node *node,
4086 enum ice_rl_type rl_type, u8 layer_num)
4088 enum ice_status status;
4097 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4098 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4101 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4102 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4105 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4106 /* No SRL is configured for default case */
4107 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4110 return ICE_ERR_PARAM;
4112 /* Save existing RL prof ID for later clean up */
4113 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4114 /* Configure BW scheduling parameters */
4115 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4119 /* Remove stale RL profile ID */
4120 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4121 old_id == ICE_SCHED_INVAL_PROF_ID)
4124 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
4128 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
4129 * @pi: port information structure
4130 * @node: pointer to node structure
4131 * @layer_num: layer number where rate limit profiles are saved
4132 * @rl_type: rate limit type min, max, or shared
4133 * @bw: bandwidth value
4135 * This function prepares node element's bandwidth to SRL or EIR exclusively.
4136 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
4137 * them may be set for any given element. This function needs to be called
4138 * with the scheduler lock held.
4140 static enum ice_status
4141 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
4142 struct ice_sched_node *node,
4143 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
4145 if (rl_type == ICE_SHARED_BW) {
4146 /* SRL node passed in this case, it may be different node */
4147 if (bw == ICE_SCHED_DFLT_BW)
4148 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
4149 * enables EIR to default. EIR is not set in this
4150 * case, so no additional action is required.
4154 /* SRL being configured, set EIR to default here.
4155 * ice_sched_cfg_node_bw_lmt() disables EIR when it
4158 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
4160 } else if (rl_type == ICE_MAX_BW &&
4161 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
4162 /* Remove Shared profile. Set default shared BW call
4163 * removes shared profile for a node.
4165 return ice_sched_set_node_bw_dflt(pi, node,
4173 * ice_sched_set_node_bw - set node's bandwidth
4174 * @pi: port information structure
4176 * @rl_type: rate limit type min, max, or shared
4177 * @bw: bandwidth in Kbps - Kilo bits per sec
4178 * @layer_num: layer number
4180 * This function adds new profile corresponding to requested BW, configures
4181 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4182 * ID from local database. The caller needs to hold scheduler lock.
4184 static enum ice_status
4185 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4186 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4188 struct ice_aqc_rl_profile_info *rl_prof_info;
4189 enum ice_status status = ICE_ERR_PARAM;
4190 struct ice_hw *hw = pi->hw;
4191 u16 old_id, rl_prof_id;
4193 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
4197 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4199 /* Save existing RL prof ID for later clean up */
4200 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4201 /* Configure BW scheduling parameters */
4202 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4206 /* New changes has been applied */
4207 /* Increment the profile ID reference count */
4208 rl_prof_info->prof_id_ref++;
4210 /* Check for old ID removal */
4211 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4212 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4215 return ice_sched_rm_rl_profile(pi, layer_num,
4216 rl_prof_info->profile.flags,
4221 * ice_sched_set_node_bw_lmt - set node's BW limit
4222 * @pi: port information structure
4224 * @rl_type: rate limit type min, max, or shared
4225 * @bw: bandwidth in Kbps - Kilo bits per sec
4227 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4228 * EIR, or SRL. The caller needs to hold scheduler lock.
4230 static enum ice_status
4231 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4232 enum ice_rl_type rl_type, u32 bw)
4234 struct ice_sched_node *cfg_node = node;
4235 enum ice_status status;
4241 return ICE_ERR_PARAM;
4243 /* Remove unused RL profile IDs from HW and SW DB */
4244 ice_sched_rm_unused_rl_prof(pi);
4245 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4246 node->tx_sched_layer);
4247 if (layer_num >= hw->num_tx_sched_layers)
4248 return ICE_ERR_PARAM;
4250 if (rl_type == ICE_SHARED_BW) {
4251 /* SRL node may be different */
4252 cfg_node = ice_sched_get_srl_node(node, layer_num);
4256 /* EIR BW and Shared BW profiles are mutually exclusive and
4257 * hence only one of them may be set for any given element
4259 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
4263 if (bw == ICE_SCHED_DFLT_BW)
4264 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
4266 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
4270 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4271 * @pi: port information structure
4272 * @node: pointer to node structure
4273 * @rl_type: rate limit type min, max, or shared
4275 * This function configures node element's BW rate limit profile ID of
4276 * type CIR, EIR, or SRL to default. This function needs to be called
4277 * with the scheduler lock held.
4279 static enum ice_status
4280 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4281 struct ice_sched_node *node,
4282 enum ice_rl_type rl_type)
4284 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4289 * ice_sched_validate_srl_node - Check node for SRL applicability
4290 * @node: sched node to configure
4291 * @sel_layer: selected SRL layer
4293 * This function checks if the SRL can be applied to a selceted layer node on
4294 * behalf of the requested node (first argument). This function needs to be
4295 * called with scheduler lock held.
4297 static enum ice_status
4298 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4300 /* SRL profiles are not available on all layers. Check if the
4301 * SRL profile can be applied to a node above or below the
4302 * requested node. SRL configuration is possible only if the
4303 * selected layer's node has single child.
4305 if (sel_layer == node->tx_sched_layer ||
4306 ((sel_layer == node->tx_sched_layer + 1) &&
4307 node->num_children == 1) ||
4308 ((sel_layer == node->tx_sched_layer - 1) &&
4309 (node->parent && node->parent->num_children == 1)))
4316 * ice_sched_save_q_bw - save queue node's BW information
4317 * @q_ctx: queue context structure
4318 * @rl_type: rate limit type min, max, or shared
4319 * @bw: bandwidth in Kbps - Kilo bits per sec
4321 * Save BW information of queue type node for post replay use.
4323 static enum ice_status
4324 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4328 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4331 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4334 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4337 return ICE_ERR_PARAM;
4343 * ice_sched_set_q_bw_lmt - sets queue BW limit
4344 * @pi: port information structure
4345 * @vsi_handle: sw VSI handle
4346 * @tc: traffic class
4347 * @q_handle: software queue handle
4348 * @rl_type: min, max, or shared
4349 * @bw: bandwidth in Kbps
4351 * This function sets BW limit of queue scheduling node.
4353 static enum ice_status
4354 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4355 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4357 enum ice_status status = ICE_ERR_PARAM;
4358 struct ice_sched_node *node;
4359 struct ice_q_ctx *q_ctx;
4361 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4362 return ICE_ERR_PARAM;
4363 ice_acquire_lock(&pi->sched_lock);
4364 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4367 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4369 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4373 /* Return error if it is not a leaf node */
4374 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4377 /* SRL bandwidth layer selection */
4378 if (rl_type == ICE_SHARED_BW) {
4379 u8 sel_layer; /* selected layer */
4381 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4382 node->tx_sched_layer);
4383 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4384 status = ICE_ERR_PARAM;
4387 status = ice_sched_validate_srl_node(node, sel_layer);
4392 if (bw == ICE_SCHED_DFLT_BW)
4393 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4395 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4398 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4401 ice_release_lock(&pi->sched_lock);
4406 * ice_cfg_q_bw_lmt - configure queue BW limit
4407 * @pi: port information structure
4408 * @vsi_handle: sw VSI handle
4409 * @tc: traffic class
4410 * @q_handle: software queue handle
4411 * @rl_type: min, max, or shared
4412 * @bw: bandwidth in Kbps
4414 * This function configures BW limit of queue scheduling node.
4417 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4418 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4420 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4425 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4426 * @pi: port information structure
4427 * @vsi_handle: sw VSI handle
4428 * @tc: traffic class
4429 * @q_handle: software queue handle
4430 * @rl_type: min, max, or shared
4432 * This function configures BW default limit of queue scheduling node.
4435 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4436 u16 q_handle, enum ice_rl_type rl_type)
4438 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4443 * ice_sched_save_tc_node_bw - save TC node BW limit
4444 * @pi: port information structure
4446 * @rl_type: min or max
4447 * @bw: bandwidth in Kbps
4449 * This function saves the modified values of bandwidth settings for later
4450 * replay purpose (restore) after reset.
4452 static enum ice_status
4453 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4454 enum ice_rl_type rl_type, u32 bw)
4456 struct ice_hw *hw = pi->hw;
4458 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4459 return ICE_ERR_PARAM;
4462 ice_set_clear_cir_bw(&hw->tc_node_bw_t_info[tc], bw);
4465 ice_set_clear_eir_bw(&hw->tc_node_bw_t_info[tc], bw);
4468 ice_set_clear_shared_bw(&hw->tc_node_bw_t_info[tc], bw);
4471 return ICE_ERR_PARAM;
4477 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4478 * @pi: port information structure
4480 * @rl_type: min or max
4481 * @bw: bandwidth in Kbps
4483 * This function configures bandwidth limit of TC node.
4485 static enum ice_status
4486 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4487 enum ice_rl_type rl_type, u32 bw)
4489 enum ice_status status = ICE_ERR_PARAM;
4490 struct ice_sched_node *tc_node;
4492 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4494 ice_acquire_lock(&pi->sched_lock);
4495 tc_node = ice_sched_get_tc_node(pi, tc);
4497 goto exit_set_tc_node_bw;
4498 if (bw == ICE_SCHED_DFLT_BW)
4499 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4501 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4503 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4505 exit_set_tc_node_bw:
4506 ice_release_lock(&pi->sched_lock);
4511 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4512 * @pi: port information structure
4514 * @rl_type: min or max
4515 * @bw: bandwidth in Kbps
4517 * This function configures BW limit of TC node.
4518 * Note: The minimum guaranteed reservation is done via DCBX.
4521 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4522 enum ice_rl_type rl_type, u32 bw)
4524 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4528 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4529 * @pi: port information structure
4531 * @rl_type: min or max
4533 * This function configures BW default limit of TC node.
4536 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4537 enum ice_rl_type rl_type)
4539 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4543 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4544 * @pi: port information structure
4545 * @tc: traffic class
4546 * @rl_type: rate limit type min or max
4547 * @bw_alloc: Bandwidth allocation information
4549 * Save BW alloc information of VSI type node for post replay use.
4551 static enum ice_status
4552 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4553 enum ice_rl_type rl_type, u16 bw_alloc)
4555 struct ice_hw *hw = pi->hw;
4557 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4558 return ICE_ERR_PARAM;
4561 ice_set_clear_cir_bw_alloc(&hw->tc_node_bw_t_info[tc],
4565 ice_set_clear_eir_bw_alloc(&hw->tc_node_bw_t_info[tc],
4569 return ICE_ERR_PARAM;
4575 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4576 * @pi: port information structure
4578 * @rl_type: min or max
4579 * @bw_alloc: bandwidth alloc
4581 * This function configures bandwidth alloc of TC node, also saves the
4582 * changed settings for replay purpose, and return success if it succeeds
4583 * in modifying bandwidth alloc setting.
4585 static enum ice_status
4586 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4587 enum ice_rl_type rl_type, u8 bw_alloc)
4589 enum ice_status status = ICE_ERR_PARAM;
4590 struct ice_sched_node *tc_node;
4592 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4594 ice_acquire_lock(&pi->sched_lock);
4595 tc_node = ice_sched_get_tc_node(pi, tc);
4597 goto exit_set_tc_node_bw_alloc;
4598 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4601 goto exit_set_tc_node_bw_alloc;
4602 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4604 exit_set_tc_node_bw_alloc:
4605 ice_release_lock(&pi->sched_lock);
4610 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4611 * @pi: port information structure
4613 * @rl_type: min or max
4614 * @bw_alloc: bandwidth alloc
4616 * This function configures BW limit of TC node.
4617 * Note: The minimum guaranteed reservation is done via DCBX.
4620 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4621 enum ice_rl_type rl_type, u8 bw_alloc)
4623 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4627 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4628 * @pi: port information structure
4629 * @vsi_handle: software VSI handle
4631 * This function retrieves the aggregator ID based on VSI ID and TC,
4632 * and sets node's BW limit to default. This function needs to be
4633 * called with the scheduler lock held.
4636 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4638 struct ice_vsi_ctx *vsi_ctx;
4639 enum ice_status status = ICE_SUCCESS;
4642 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4643 return ICE_ERR_PARAM;
4644 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4646 return ICE_ERR_PARAM;
4648 ice_for_each_traffic_class(tc) {
4649 struct ice_sched_node *node;
4651 node = vsi_ctx->sched.ag_node[tc];
4655 /* Set min profile to default */
4656 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4660 /* Set max profile to default */
4661 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4665 /* Remove shared profile, if there is one */
4666 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4676 * ice_sched_get_node_by_id_type - get node from ID type
4677 * @pi: port information structure
4679 * @agg_type: type of aggregator
4680 * @tc: traffic class
4682 * This function returns node identified by ID of type aggregator, and
4683 * based on traffic class (TC). This function needs to be called with
4684 * the scheduler lock held.
4686 static struct ice_sched_node *
4687 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4688 enum ice_agg_type agg_type, u8 tc)
4690 struct ice_sched_node *node = NULL;
4691 struct ice_sched_node *child_node;
4694 case ICE_AGG_TYPE_VSI: {
4695 struct ice_vsi_ctx *vsi_ctx;
4696 u16 vsi_handle = (u16)id;
4698 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4700 /* Get sched_vsi_info */
4701 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4704 node = vsi_ctx->sched.vsi_node[tc];
4708 case ICE_AGG_TYPE_AGG: {
4709 struct ice_sched_node *tc_node;
4711 tc_node = ice_sched_get_tc_node(pi, tc);
4713 node = ice_sched_get_agg_node(pi->hw, tc_node, id);
4717 case ICE_AGG_TYPE_Q:
4718 /* The current implementation allows single queue to modify */
4719 node = ice_sched_get_node(pi, id);
4722 case ICE_AGG_TYPE_QG:
4723 /* The current implementation allows single qg to modify */
4724 child_node = ice_sched_get_node(pi, id);
4727 node = child_node->parent;
4738 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4739 * @pi: port information structure
4740 * @id: ID (software VSI handle or AGG ID)
4741 * @agg_type: aggregator type (VSI or AGG type node)
4742 * @tc: traffic class
4743 * @rl_type: min or max
4744 * @bw: bandwidth in Kbps
4746 * This function sets BW limit of VSI or Aggregator scheduling node
4747 * based on TC information from passed in argument BW.
4750 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4751 enum ice_agg_type agg_type, u8 tc,
4752 enum ice_rl_type rl_type, u32 bw)
4754 enum ice_status status = ICE_ERR_PARAM;
4755 struct ice_sched_node *node;
4760 if (rl_type == ICE_UNKNOWN_BW)
4763 ice_acquire_lock(&pi->sched_lock);
4764 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4766 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4767 goto exit_set_node_bw_lmt_per_tc;
4769 if (bw == ICE_SCHED_DFLT_BW)
4770 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4772 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4774 exit_set_node_bw_lmt_per_tc:
4775 ice_release_lock(&pi->sched_lock);
4780 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4781 * @pi: port information structure
4782 * @vsi_handle: software VSI handle
4784 * This function validates SRL node of the VSI node if available SRL layer is
4785 * different than the VSI node layer on all TC(s).This function needs to be
4786 * called with scheduler lock held.
4788 static enum ice_status
4789 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4791 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4794 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4795 return ICE_ERR_PARAM;
4797 /* Return success if no nodes are present across TC */
4798 ice_for_each_traffic_class(tc) {
4799 struct ice_sched_node *tc_node, *vsi_node;
4800 enum ice_rl_type rl_type = ICE_SHARED_BW;
4801 enum ice_status status;
4803 tc_node = ice_sched_get_tc_node(pi, tc);
4807 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4811 /* SRL bandwidth layer selection */
4812 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4813 u8 node_layer = vsi_node->tx_sched_layer;
4816 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4818 if (layer_num >= pi->hw->num_tx_sched_layers)
4819 return ICE_ERR_PARAM;
4820 sel_layer = layer_num;
4823 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4831 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4832 * @pi: port information structure
4833 * @vsi_handle: software VSI handle
4834 * @bw: bandwidth in Kbps
4836 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4837 * across all traffic classes for VSI matching handle. When BW value of
4838 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4841 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4844 enum ice_status status = ICE_SUCCESS;
4848 return ICE_ERR_PARAM;
4850 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4851 return ICE_ERR_PARAM;
4853 ice_acquire_lock(&pi->sched_lock);
4854 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4856 goto exit_set_vsi_bw_shared_lmt;
4857 /* Return success if no nodes are present across TC */
4858 ice_for_each_traffic_class(tc) {
4859 struct ice_sched_node *tc_node, *vsi_node;
4860 enum ice_rl_type rl_type = ICE_SHARED_BW;
4862 tc_node = ice_sched_get_tc_node(pi, tc);
4866 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4870 if (bw == ICE_SCHED_DFLT_BW)
4871 /* It removes existing SRL from the node */
4872 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4875 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4879 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4884 exit_set_vsi_bw_shared_lmt:
4885 ice_release_lock(&pi->sched_lock);
4890 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4891 * @pi: port information structure
4892 * @agg_id: aggregator ID
4894 * This function validates SRL node of the AGG node if available SRL layer is
4895 * different than the AGG node layer on all TC(s).This function needs to be
4896 * called with scheduler lock held.
4898 static enum ice_status
4899 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4901 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4902 struct ice_sched_agg_info *agg_info;
4903 bool agg_id_present = false;
4904 enum ice_status status = ICE_SUCCESS;
4907 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4909 if (agg_info->agg_id == agg_id) {
4910 agg_id_present = true;
4913 if (!agg_id_present)
4914 return ICE_ERR_PARAM;
4915 /* Return success if no nodes are present across TC */
4916 ice_for_each_traffic_class(tc) {
4917 struct ice_sched_node *tc_node, *agg_node;
4918 enum ice_rl_type rl_type = ICE_SHARED_BW;
4920 tc_node = ice_sched_get_tc_node(pi, tc);
4924 agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
4927 /* SRL bandwidth layer selection */
4928 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4929 u8 node_layer = agg_node->tx_sched_layer;
4932 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4934 if (layer_num >= pi->hw->num_tx_sched_layers)
4935 return ICE_ERR_PARAM;
4936 sel_layer = layer_num;
4939 status = ice_sched_validate_srl_node(agg_node, sel_layer);
4947 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
4948 * @pi: port information structure
4949 * @agg_id: aggregator ID
4950 * @bw: bandwidth in Kbps
4952 * This function configures the shared rate limiter(SRL) of all aggregator type
4953 * nodes across all traffic classes for aggregator matching agg_id. When
4954 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
4958 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
4960 struct ice_sched_agg_info *agg_info;
4961 struct ice_sched_agg_info *tmp;
4962 bool agg_id_present = false;
4963 enum ice_status status = ICE_SUCCESS;
4967 return ICE_ERR_PARAM;
4969 ice_acquire_lock(&pi->sched_lock);
4970 status = ice_sched_validate_agg_srl_node(pi, agg_id);
4972 goto exit_agg_bw_shared_lmt;
4974 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
4975 ice_sched_agg_info, list_entry)
4976 if (agg_info->agg_id == agg_id) {
4977 agg_id_present = true;
4981 if (!agg_id_present) {
4982 status = ICE_ERR_PARAM;
4983 goto exit_agg_bw_shared_lmt;
4986 /* Return success if no nodes are present across TC */
4987 ice_for_each_traffic_class(tc) {
4988 enum ice_rl_type rl_type = ICE_SHARED_BW;
4989 struct ice_sched_node *tc_node, *agg_node;
4991 tc_node = ice_sched_get_tc_node(pi, tc);
4995 agg_node = ice_sched_get_agg_node(pi->hw, tc_node, agg_id);
4999 if (bw == ICE_SCHED_DFLT_BW)
5000 /* It removes existing SRL from the node */
5001 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
5004 status = ice_sched_set_node_bw_lmt(pi, agg_node,
5008 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5013 exit_agg_bw_shared_lmt:
5014 ice_release_lock(&pi->sched_lock);
5019 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5020 * @hw: pointer to the HW struct
5021 * @node: sched node to configure
5022 * @priority: sibling priority
5024 * This function configures node element's sibling priority only. This
5025 * function needs to be called with scheduler lock held.
5028 ice_sched_cfg_sibl_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5031 struct ice_aqc_txsched_elem_data buf;
5032 struct ice_aqc_txsched_elem *data;
5033 enum ice_status status;
5037 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5038 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5039 ICE_AQC_ELEM_GENERIC_PRIO_M;
5040 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5041 data->generic |= priority;
5043 /* Configure element */
5044 status = ice_sched_update_elem(hw, node, &buf);
5049 * ice_cfg_rl_burst_size - Set burst size value
5050 * @hw: pointer to the HW struct
5051 * @bytes: burst size in bytes
5053 * This function configures/set the burst size to requested new value. The new
5054 * burst size value is used for future rate limit calls. It doesn't change the
5055 * existing or previously created RL profiles.
5057 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5059 u16 burst_size_to_prog;
5061 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5062 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5063 return ICE_ERR_PARAM;
5064 if (ice_round_to_num(bytes, 64) <=
5065 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5066 /* 64 byte granularity case */
5067 /* Disable MSB granularity bit */
5068 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5069 /* round number to nearest 64 byte granularity */
5070 bytes = ice_round_to_num(bytes, 64);
5071 /* The value is in 64 byte chunks */
5072 burst_size_to_prog |= (u16)(bytes / 64);
5074 /* k bytes granularity case */
5075 /* Enable MSB granularity bit */
5076 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5077 /* round number to nearest 1024 granularity */
5078 bytes = ice_round_to_num(bytes, 1024);
5079 /* check rounding doesn't go beyond allowed */
5080 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5081 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5082 /* The value is in k bytes */
5083 burst_size_to_prog |= (u16)(bytes / 1024);
5085 hw->max_burst_size = burst_size_to_prog;
5090 * ice_sched_replay_node_prio - re-configure node priority
5091 * @hw: pointer to the HW struct
5092 * @node: sched node to configure
5093 * @priority: priority value
5095 * This function configures node element's priority value. It
5096 * needs to be called with scheduler lock held.
5098 static enum ice_status
5099 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5102 struct ice_aqc_txsched_elem_data buf;
5103 struct ice_aqc_txsched_elem *data;
5104 enum ice_status status;
5108 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5109 data->generic = priority;
5111 /* Configure element */
5112 status = ice_sched_update_elem(hw, node, &buf);
5117 * ice_sched_replay_node_bw - replay node(s) BW
5118 * @hw: pointer to the HW struct
5119 * @node: sched node to configure
5120 * @bw_t_info: BW type information
5122 * This function restores node's BW from bw_t_info. The caller needs
5123 * to hold the scheduler lock.
5125 static enum ice_status
5126 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5127 struct ice_bw_type_info *bw_t_info)
5129 struct ice_port_info *pi = hw->port_info;
5130 enum ice_status status = ICE_ERR_PARAM;
5135 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5137 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5138 status = ice_sched_replay_node_prio(hw, node,
5139 bw_t_info->generic);
5143 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5144 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5145 bw_t_info->cir_bw.bw);
5149 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5150 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5151 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5156 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5157 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5158 bw_t_info->eir_bw.bw);
5162 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5163 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5164 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5169 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5170 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5171 bw_t_info->shared_bw);
5176 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5177 * @hw: pointer to the HW struct
5178 * @agg_info: aggregator data structure
5180 * This function re-creates aggregator type nodes. The caller needs to hold
5181 * the scheduler lock.
5183 static enum ice_status
5184 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5186 struct ice_sched_node *tc_node, *agg_node;
5187 enum ice_status status = ICE_SUCCESS;
5191 return ICE_ERR_PARAM;
5192 ice_for_each_traffic_class(tc) {
5193 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5196 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5198 status = ICE_ERR_PARAM;
5201 agg_node = ice_sched_get_agg_node(hw, tc_node,
5204 status = ICE_ERR_PARAM;
5207 status = ice_sched_replay_node_bw(hw, agg_node,
5208 &agg_info->bw_t_info[tc]);
5216 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5217 * @pi: port info struct
5218 * @tc_bitmap: 8 bits TC bitmap to check
5219 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5221 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5222 * may be missing, it returns enabled TCs. This function needs to be called with
5223 * scheduler lock held.
5226 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5227 ice_bitmap_t *ena_tc_bitmap)
5231 /* Some TC(s) may be missing after reset, adjust for replay */
5232 ice_for_each_traffic_class(tc)
5233 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5234 (ice_sched_get_tc_node(pi, tc)))
5235 ice_set_bit(tc, ena_tc_bitmap);
5239 * ice_sched_replay_agg - recreate aggregator node(s)
5240 * @hw: pointer to the HW struct
5242 * This function recreate aggregator type nodes which are not replayed earlier.
5243 * It also replay aggregator BW information. These aggregator nodes are not
5244 * associated with VSI type node yet.
5246 void ice_sched_replay_agg(struct ice_hw *hw)
5248 struct ice_port_info *pi = hw->port_info;
5249 struct ice_sched_agg_info *agg_info;
5251 ice_acquire_lock(&pi->sched_lock);
5252 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5254 /* replay aggregator (re-create aggregator node) */
5255 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5256 agg_info->replay_tc_bitmap,
5257 ICE_MAX_TRAFFIC_CLASS)) {
5258 ice_declare_bitmap(replay_bitmap,
5259 ICE_MAX_TRAFFIC_CLASS);
5260 enum ice_status status;
5262 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5263 ice_sched_get_ena_tc_bitmap(pi,
5264 agg_info->replay_tc_bitmap,
5266 status = ice_sched_cfg_agg(hw->port_info,
5271 ice_info(hw, "Replay agg id[%d] failed\n",
5273 /* Move on to next one */
5276 /* Replay aggregator node BW (restore aggregator BW) */
5277 status = ice_sched_replay_agg_bw(hw, agg_info);
5279 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5283 ice_release_lock(&pi->sched_lock);
5287 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5288 * @hw: pointer to the HW struct
5290 * This function initialize aggregator(s) TC bitmap to zero. A required
5291 * preinit step for replaying aggregators.
5293 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5295 struct ice_port_info *pi = hw->port_info;
5296 struct ice_sched_agg_info *agg_info;
5298 ice_acquire_lock(&pi->sched_lock);
5299 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5301 struct ice_sched_agg_vsi_info *agg_vsi_info;
5303 agg_info->tc_bitmap[0] = 0;
5304 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5305 ice_sched_agg_vsi_info, list_entry)
5306 agg_vsi_info->tc_bitmap[0] = 0;
5308 ice_release_lock(&pi->sched_lock);
5312 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5313 * @hw: pointer to the HW struct
5315 * This function replay TC nodes. The caller needs to hold the scheduler lock.
5318 ice_sched_replay_tc_node_bw(struct ice_hw *hw)
5320 struct ice_port_info *pi = hw->port_info;
5321 enum ice_status status = ICE_SUCCESS;
5324 ice_acquire_lock(&pi->sched_lock);
5325 ice_for_each_traffic_class(tc) {
5326 struct ice_sched_node *tc_node;
5328 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5330 continue; /* TC not present */
5331 status = ice_sched_replay_node_bw(hw, tc_node,
5332 &hw->tc_node_bw_t_info[tc]);
5336 ice_release_lock(&pi->sched_lock);
5341 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5342 * @hw: pointer to the HW struct
5343 * @vsi_handle: software VSI handle
5344 * @tc_bitmap: 8 bits TC bitmap
5346 * This function replays VSI type nodes bandwidth. This function needs to be
5347 * called with scheduler lock held.
5349 static enum ice_status
5350 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5351 ice_bitmap_t *tc_bitmap)
5353 struct ice_sched_node *vsi_node, *tc_node;
5354 struct ice_port_info *pi = hw->port_info;
5355 struct ice_bw_type_info *bw_t_info;
5356 struct ice_vsi_ctx *vsi_ctx;
5357 enum ice_status status = ICE_SUCCESS;
5360 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5362 return ICE_ERR_PARAM;
5363 ice_for_each_traffic_class(tc) {
5364 if (!ice_is_tc_ena(*tc_bitmap, tc))
5366 tc_node = ice_sched_get_tc_node(pi, tc);
5369 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5372 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5373 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5381 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5382 * @hw: pointer to the HW struct
5383 * @vsi_handle: software VSI handle
5385 * This function replays aggregator node, VSI to aggregator type nodes, and
5386 * their node bandwidth information. This function needs to be called with
5387 * scheduler lock held.
5389 static enum ice_status
5390 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5392 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5393 struct ice_sched_agg_vsi_info *agg_vsi_info;
5394 struct ice_port_info *pi = hw->port_info;
5395 struct ice_sched_agg_info *agg_info;
5396 enum ice_status status;
5398 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5399 if (!ice_is_vsi_valid(hw, vsi_handle))
5400 return ICE_ERR_PARAM;
5401 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5403 return ICE_SUCCESS; /* Not present in list - default Agg case */
5404 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5406 return ICE_SUCCESS; /* Not present in list - default Agg case */
5407 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5409 /* Replay aggregator node associated to vsi_handle */
5410 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5411 ICE_AGG_TYPE_AGG, replay_bitmap);
5414 /* Replay aggregator node BW (restore aggregator BW) */
5415 status = ice_sched_replay_agg_bw(hw, agg_info);
5419 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5420 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5422 /* Move this VSI (vsi_handle) to above aggregator */
5423 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5427 /* Replay VSI BW (restore VSI BW) */
5428 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5429 agg_vsi_info->tc_bitmap);
5433 * ice_replay_vsi_agg - replay VSI to aggregator node
5434 * @hw: pointer to the HW struct
5435 * @vsi_handle: software VSI handle
5437 * This function replays association of VSI to aggregator type nodes, and
5438 * node bandwidth information.
5441 ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5443 struct ice_port_info *pi = hw->port_info;
5444 enum ice_status status;
5446 ice_acquire_lock(&pi->sched_lock);
5447 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5448 ice_release_lock(&pi->sched_lock);
5453 * ice_sched_replay_q_bw - replay queue type node BW
5454 * @pi: port information structure
5455 * @q_ctx: queue context structure
5457 * This function replays queue type node bandwidth. This function needs to be
5458 * called with scheduler lock held.
5461 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5463 struct ice_sched_node *q_node;
5465 /* Following also checks the presence of node in tree */
5466 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5468 return ICE_ERR_PARAM;
5469 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);