1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2019
8 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
9 * @pi: port information structure
10 * @info: Scheduler element information from firmware
12 * This function inserts the root node of the scheduling tree topology
15 static enum ice_status
16 ice_sched_add_root_node(struct ice_port_info *pi,
17 struct ice_aqc_txsched_elem_data *info)
19 struct ice_sched_node *root;
27 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
29 return ICE_ERR_NO_MEMORY;
31 /* coverity[suspicious_sizeof] */
32 root->children = (struct ice_sched_node **)
33 ice_calloc(hw, hw->max_children[0], sizeof(*root));
34 if (!root->children) {
36 return ICE_ERR_NO_MEMORY;
39 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
45 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
46 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
47 * @teid: node TEID to search
49 * This function searches for a node matching the TEID in the scheduling tree
50 * from the SW DB. The search is recursive and is restricted by the number of
51 * layers it has searched through; stopping at the max supported layer.
53 * This function needs to be called when holding the port_info->sched_lock
55 struct ice_sched_node *
56 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
60 /* The TEID is same as that of the start_node */
61 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
64 /* The node has no children or is at the max layer */
65 if (!start_node->num_children ||
66 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
67 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
70 /* Check if TEID matches to any of the children nodes */
71 for (i = 0; i < start_node->num_children; i++)
72 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
73 return start_node->children[i];
75 /* Search within each child's sub-tree */
76 for (i = 0; i < start_node->num_children; i++) {
77 struct ice_sched_node *tmp;
79 tmp = ice_sched_find_node_by_teid(start_node->children[i],
89 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
90 * @hw: pointer to the HW struct
91 * @cmd_opc: cmd opcode
92 * @elems_req: number of elements to request
93 * @buf: pointer to buffer
94 * @buf_size: buffer size in bytes
95 * @elems_resp: returns total number of elements response
96 * @cd: pointer to command details structure or NULL
98 * This function sends a scheduling elements cmd (cmd_opc)
100 static enum ice_status
101 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
102 u16 elems_req, void *buf, u16 buf_size,
103 u16 *elems_resp, struct ice_sq_cd *cd)
105 struct ice_aqc_sched_elem_cmd *cmd;
106 struct ice_aq_desc desc;
107 enum ice_status status;
109 cmd = &desc.params.sched_elem_cmd;
110 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
111 cmd->num_elem_req = CPU_TO_LE16(elems_req);
112 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
113 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
114 if (!status && elems_resp)
115 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
121 * ice_aq_query_sched_elems - query scheduler elements
122 * @hw: pointer to the HW struct
123 * @elems_req: number of elements to query
124 * @buf: pointer to buffer
125 * @buf_size: buffer size in bytes
126 * @elems_ret: returns total number of elements returned
127 * @cd: pointer to command details structure or NULL
129 * Query scheduling elements (0x0404)
132 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
133 struct ice_aqc_get_elem *buf, u16 buf_size,
134 u16 *elems_ret, struct ice_sq_cd *cd)
136 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
137 elems_req, (void *)buf, buf_size,
142 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
143 * @pi: port information structure
144 * @layer: Scheduler layer of the node
145 * @info: Scheduler element information from firmware
147 * This function inserts a scheduler node to the SW DB.
150 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
151 struct ice_aqc_txsched_elem_data *info)
153 struct ice_sched_node *parent;
154 struct ice_aqc_get_elem elem;
155 struct ice_sched_node *node;
156 enum ice_status status;
160 return ICE_ERR_PARAM;
164 /* A valid parent node should be there */
165 parent = ice_sched_find_node_by_teid(pi->root,
166 LE32_TO_CPU(info->parent_teid));
168 ice_debug(hw, ICE_DBG_SCHED,
169 "Parent Node not found for parent_teid=0x%x\n",
170 LE32_TO_CPU(info->parent_teid));
171 return ICE_ERR_PARAM;
174 /* query the current node information from FW before additing it
177 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
180 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
182 return ICE_ERR_NO_MEMORY;
183 if (hw->max_children[layer]) {
184 /* coverity[suspicious_sizeof] */
185 node->children = (struct ice_sched_node **)
186 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
187 if (!node->children) {
189 return ICE_ERR_NO_MEMORY;
194 node->parent = parent;
195 node->tx_sched_layer = layer;
196 parent->children[parent->num_children++] = node;
197 node->info = elem.generic[0];
202 * ice_aq_delete_sched_elems - delete scheduler elements
203 * @hw: pointer to the HW struct
204 * @grps_req: number of groups to delete
205 * @buf: pointer to buffer
206 * @buf_size: buffer size in bytes
207 * @grps_del: returns total number of elements deleted
208 * @cd: pointer to command details structure or NULL
210 * Delete scheduling elements (0x040F)
212 static enum ice_status
213 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
214 struct ice_aqc_delete_elem *buf, u16 buf_size,
215 u16 *grps_del, struct ice_sq_cd *cd)
217 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
218 grps_req, (void *)buf, buf_size,
223 * ice_sched_remove_elems - remove nodes from HW
224 * @hw: pointer to the HW struct
225 * @parent: pointer to the parent node
226 * @num_nodes: number of nodes
227 * @node_teids: array of node teids to be deleted
229 * This function remove nodes from HW
231 static enum ice_status
232 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
233 u16 num_nodes, u32 *node_teids)
235 struct ice_aqc_delete_elem *buf;
236 u16 i, num_groups_removed = 0;
237 enum ice_status status;
240 buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
241 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
243 return ICE_ERR_NO_MEMORY;
245 buf->hdr.parent_teid = parent->info.node_teid;
246 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
247 for (i = 0; i < num_nodes; i++)
248 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
250 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
251 &num_groups_removed, NULL);
252 if (status != ICE_SUCCESS || num_groups_removed != 1)
253 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
254 hw->adminq.sq_last_status);
261 * ice_sched_get_first_node - get the first node of the given layer
262 * @pi: port information structure
263 * @parent: pointer the base node of the subtree
264 * @layer: layer number
266 * This function retrieves the first node of the given layer from the subtree
268 static struct ice_sched_node *
269 ice_sched_get_first_node(struct ice_port_info *pi,
270 struct ice_sched_node *parent, u8 layer)
272 return pi->sib_head[parent->tc_num][layer];
276 * ice_sched_get_tc_node - get pointer to TC node
277 * @pi: port information structure
280 * This function returns the TC node pointer
282 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
286 if (!pi || !pi->root)
288 for (i = 0; i < pi->root->num_children; i++)
289 if (pi->root->children[i]->tc_num == tc)
290 return pi->root->children[i];
295 * ice_free_sched_node - Free a Tx scheduler node from SW DB
296 * @pi: port information structure
297 * @node: pointer to the ice_sched_node struct
299 * This function frees up a node from SW DB as well as from HW
301 * This function needs to be called with the port_info->sched_lock held
303 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
305 struct ice_sched_node *parent;
306 struct ice_hw *hw = pi->hw;
309 /* Free the children before freeing up the parent node
310 * The parent array is updated below and that shifts the nodes
311 * in the array. So always pick the first child if num children > 0
313 while (node->num_children)
314 ice_free_sched_node(pi, node->children[0]);
316 /* Leaf, TC and root nodes can't be deleted by SW */
317 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
321 u32 teid = LE32_TO_CPU(node->info.node_teid);
323 ice_sched_remove_elems(hw, node->parent, 1, &teid);
325 parent = node->parent;
326 /* root has no parent */
328 struct ice_sched_node *p;
330 /* update the parent */
331 for (i = 0; i < parent->num_children; i++)
332 if (parent->children[i] == node) {
333 for (j = i + 1; j < parent->num_children; j++)
334 parent->children[j - 1] =
336 parent->num_children--;
340 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
342 if (p->sibling == node) {
343 p->sibling = node->sibling;
349 /* update the sibling head if head is getting removed */
350 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
351 pi->sib_head[node->tc_num][node->tx_sched_layer] =
355 /* leaf nodes have no children */
357 ice_free(hw, node->children);
362 * ice_aq_get_dflt_topo - gets default scheduler topology
363 * @hw: pointer to the HW struct
364 * @lport: logical port number
365 * @buf: pointer to buffer
366 * @buf_size: buffer size in bytes
367 * @num_branches: returns total number of queue to port branches
368 * @cd: pointer to command details structure or NULL
370 * Get default scheduler topology (0x400)
372 static enum ice_status
373 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
374 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
375 u8 *num_branches, struct ice_sq_cd *cd)
377 struct ice_aqc_get_topo *cmd;
378 struct ice_aq_desc desc;
379 enum ice_status status;
381 cmd = &desc.params.get_topo;
382 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
383 cmd->port_num = lport;
384 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
385 if (!status && num_branches)
386 *num_branches = cmd->num_branches;
392 * ice_aq_add_sched_elems - adds scheduling element
393 * @hw: pointer to the HW struct
394 * @grps_req: the number of groups that are requested to be added
395 * @buf: pointer to buffer
396 * @buf_size: buffer size in bytes
397 * @grps_added: returns total number of groups added
398 * @cd: pointer to command details structure or NULL
400 * Add scheduling elements (0x0401)
402 static enum ice_status
403 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
404 struct ice_aqc_add_elem *buf, u16 buf_size,
405 u16 *grps_added, struct ice_sq_cd *cd)
407 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
408 grps_req, (void *)buf, buf_size,
413 * ice_aq_cfg_sched_elems - configures scheduler elements
414 * @hw: pointer to the HW struct
415 * @elems_req: number of elements to configure
416 * @buf: pointer to buffer
417 * @buf_size: buffer size in bytes
418 * @elems_cfgd: returns total number of elements configured
419 * @cd: pointer to command details structure or NULL
421 * Configure scheduling elements (0x0403)
423 static enum ice_status
424 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
425 struct ice_aqc_conf_elem *buf, u16 buf_size,
426 u16 *elems_cfgd, struct ice_sq_cd *cd)
428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
429 elems_req, (void *)buf, buf_size,
434 * ice_aq_move_sched_elems - move scheduler elements
435 * @hw: pointer to the HW struct
436 * @grps_req: number of groups to move
437 * @buf: pointer to buffer
438 * @buf_size: buffer size in bytes
439 * @grps_movd: returns total number of groups moved
440 * @cd: pointer to command details structure or NULL
442 * Move scheduling elements (0x0408)
444 static enum ice_status
445 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
446 struct ice_aqc_move_elem *buf, u16 buf_size,
447 u16 *grps_movd, struct ice_sq_cd *cd)
449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
450 grps_req, (void *)buf, buf_size,
455 * ice_aq_suspend_sched_elems - suspend scheduler elements
456 * @hw: pointer to the HW struct
457 * @elems_req: number of elements to suspend
458 * @buf: pointer to buffer
459 * @buf_size: buffer size in bytes
460 * @elems_ret: returns total number of elements suspended
461 * @cd: pointer to command details structure or NULL
463 * Suspend scheduling elements (0x0409)
465 static enum ice_status
466 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
467 struct ice_aqc_suspend_resume_elem *buf,
468 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
470 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
471 elems_req, (void *)buf, buf_size,
476 * ice_aq_resume_sched_elems - resume scheduler elements
477 * @hw: pointer to the HW struct
478 * @elems_req: number of elements to resume
479 * @buf: pointer to buffer
480 * @buf_size: buffer size in bytes
481 * @elems_ret: returns total number of elements resumed
482 * @cd: pointer to command details structure or NULL
484 * resume scheduling elements (0x040A)
486 static enum ice_status
487 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
488 struct ice_aqc_suspend_resume_elem *buf,
489 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
491 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
492 elems_req, (void *)buf, buf_size,
497 * ice_aq_query_sched_res - query scheduler resource
498 * @hw: pointer to the HW struct
499 * @buf_size: buffer size in bytes
500 * @buf: pointer to buffer
501 * @cd: pointer to command details structure or NULL
503 * Query scheduler resource allocation (0x0412)
505 static enum ice_status
506 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
507 struct ice_aqc_query_txsched_res_resp *buf,
508 struct ice_sq_cd *cd)
510 struct ice_aq_desc desc;
512 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
513 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
517 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
518 * @hw: pointer to the HW struct
519 * @num_nodes: number of nodes
520 * @node_teids: array of node teids to be suspended or resumed
521 * @suspend: true means suspend / false means resume
523 * This function suspends or resumes HW nodes
525 static enum ice_status
526 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
529 struct ice_aqc_suspend_resume_elem *buf;
530 u16 i, buf_size, num_elem_ret = 0;
531 enum ice_status status;
533 buf_size = sizeof(*buf) * num_nodes;
534 buf = (struct ice_aqc_suspend_resume_elem *)
535 ice_malloc(hw, buf_size);
537 return ICE_ERR_NO_MEMORY;
539 for (i = 0; i < num_nodes; i++)
540 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
543 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
544 buf_size, &num_elem_ret,
547 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
548 buf_size, &num_elem_ret,
550 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
551 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
558 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
559 * @hw: pointer to the HW struct
560 * @vsi_handle: VSI handle
562 * @new_numqs: number of queues
564 static enum ice_status
565 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
567 struct ice_vsi_ctx *vsi_ctx;
568 struct ice_q_ctx *q_ctx;
570 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
572 return ICE_ERR_PARAM;
573 /* allocate LAN queue contexts */
574 if (!vsi_ctx->lan_q_ctx[tc]) {
575 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
576 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
577 if (!vsi_ctx->lan_q_ctx[tc])
578 return ICE_ERR_NO_MEMORY;
579 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
582 /* num queues are increased, update the queue contexts */
583 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
584 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
586 q_ctx = (struct ice_q_ctx *)
587 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
589 return ICE_ERR_NO_MEMORY;
590 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
591 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
592 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
593 vsi_ctx->lan_q_ctx[tc] = q_ctx;
594 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
600 * ice_aq_rl_profile - performs a rate limiting task
601 * @hw: pointer to the HW struct
602 * @opcode:opcode for add, query, or remove profile(s)
603 * @num_profiles: the number of profiles
604 * @buf: pointer to buffer
605 * @buf_size: buffer size in bytes
606 * @num_processed: number of processed add or remove profile(s) to return
607 * @cd: pointer to command details structure
609 * Rl profile function to add, query, or remove profile(s)
611 static enum ice_status
612 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
613 u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
614 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
616 struct ice_aqc_rl_profile *cmd;
617 struct ice_aq_desc desc;
618 enum ice_status status;
620 cmd = &desc.params.rl_profile;
622 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
623 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
624 cmd->num_profiles = CPU_TO_LE16(num_profiles);
625 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
626 if (!status && num_processed)
627 *num_processed = LE16_TO_CPU(cmd->num_processed);
632 * ice_aq_add_rl_profile - adds rate limiting profile(s)
633 * @hw: pointer to the HW struct
634 * @num_profiles: the number of profile(s) to be add
635 * @buf: pointer to buffer
636 * @buf_size: buffer size in bytes
637 * @num_profiles_added: total number of profiles added to return
638 * @cd: pointer to command details structure
640 * Add RL profile (0x0410)
642 static enum ice_status
643 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
644 struct ice_aqc_rl_profile_generic_elem *buf,
645 u16 buf_size, u16 *num_profiles_added,
646 struct ice_sq_cd *cd)
648 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
650 buf_size, num_profiles_added, cd);
654 * ice_aq_query_rl_profile - query rate limiting profile(s)
655 * @hw: pointer to the HW struct
656 * @num_profiles: the number of profile(s) to query
657 * @buf: pointer to buffer
658 * @buf_size: buffer size in bytes
659 * @cd: pointer to command details structure
661 * Query RL profile (0x0411)
664 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
665 struct ice_aqc_rl_profile_generic_elem *buf,
666 u16 buf_size, struct ice_sq_cd *cd)
668 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
669 num_profiles, buf, buf_size, NULL, cd);
673 * ice_aq_remove_rl_profile - removes RL profile(s)
674 * @hw: pointer to the HW struct
675 * @num_profiles: the number of profile(s) to remove
676 * @buf: pointer to buffer
677 * @buf_size: buffer size in bytes
678 * @num_profiles_removed: total number of profiles removed to return
679 * @cd: pointer to command details structure or NULL
681 * Remove RL profile (0x0415)
683 static enum ice_status
684 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
685 struct ice_aqc_rl_profile_generic_elem *buf,
686 u16 buf_size, u16 *num_profiles_removed,
687 struct ice_sq_cd *cd)
689 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
691 buf_size, num_profiles_removed, cd);
695 * ice_sched_del_rl_profile - remove RL profile
696 * @hw: pointer to the HW struct
697 * @rl_info: rate limit profile information
699 * If the profile ID is not referenced anymore, it removes profile ID with
700 * its associated parameters from HW DB,and locally. The caller needs to
701 * hold scheduler lock.
703 static enum ice_status
704 ice_sched_del_rl_profile(struct ice_hw *hw,
705 struct ice_aqc_rl_profile_info *rl_info)
707 struct ice_aqc_rl_profile_generic_elem *buf;
708 u16 num_profiles_removed;
709 enum ice_status status;
710 u16 num_profiles = 1;
712 if (rl_info->prof_id_ref != 0)
713 return ICE_ERR_IN_USE;
715 /* Safe to remove profile ID */
716 buf = (struct ice_aqc_rl_profile_generic_elem *)
718 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
719 &num_profiles_removed, NULL);
720 if (status || num_profiles_removed != num_profiles)
723 /* Delete stale entry now */
724 LIST_DEL(&rl_info->list_entry);
725 ice_free(hw, rl_info);
730 * ice_sched_clear_rl_prof - clears RL prof entries
731 * @pi: port information structure
733 * This function removes all RL profile from HW as well as from SW DB.
735 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
739 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
740 struct ice_aqc_rl_profile_info *rl_prof_elem;
741 struct ice_aqc_rl_profile_info *rl_prof_tmp;
743 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
744 &pi->rl_prof_list[ln],
745 ice_aqc_rl_profile_info, list_entry) {
746 struct ice_hw *hw = pi->hw;
747 enum ice_status status;
749 rl_prof_elem->prof_id_ref = 0;
750 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
752 ice_debug(hw, ICE_DBG_SCHED,
753 "Remove rl profile failed\n");
754 /* On error, free mem required */
755 LIST_DEL(&rl_prof_elem->list_entry);
756 ice_free(hw, rl_prof_elem);
763 * ice_sched_clear_agg - clears the aggregator related information
764 * @hw: pointer to the hardware structure
766 * This function removes aggregator list and free up aggregator related memory
767 * previously allocated.
769 void ice_sched_clear_agg(struct ice_hw *hw)
771 struct ice_sched_agg_info *agg_info;
772 struct ice_sched_agg_info *atmp;
774 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
777 struct ice_sched_agg_vsi_info *agg_vsi_info;
778 struct ice_sched_agg_vsi_info *vtmp;
780 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
781 &agg_info->agg_vsi_list,
782 ice_sched_agg_vsi_info, list_entry) {
783 LIST_DEL(&agg_vsi_info->list_entry);
784 ice_free(hw, agg_vsi_info);
786 LIST_DEL(&agg_info->list_entry);
787 ice_free(hw, agg_info);
792 * ice_sched_clear_tx_topo - clears the schduler tree nodes
793 * @pi: port information structure
795 * This function removes all the nodes from HW as well as from SW DB.
797 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
801 /* remove RL profiles related lists */
802 ice_sched_clear_rl_prof(pi);
804 ice_free_sched_node(pi, pi->root);
810 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
811 * @pi: port information structure
813 * Cleanup scheduling elements from SW DB
815 void ice_sched_clear_port(struct ice_port_info *pi)
817 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
820 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
821 ice_acquire_lock(&pi->sched_lock);
822 ice_sched_clear_tx_topo(pi);
823 ice_release_lock(&pi->sched_lock);
824 ice_destroy_lock(&pi->sched_lock);
828 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
829 * @hw: pointer to the HW struct
831 * Cleanup scheduling elements from SW DB for all the ports
833 void ice_sched_cleanup_all(struct ice_hw *hw)
838 if (hw->layer_info) {
839 ice_free(hw, hw->layer_info);
840 hw->layer_info = NULL;
843 ice_sched_clear_port(hw->port_info);
845 hw->num_tx_sched_layers = 0;
846 hw->num_tx_sched_phys_layers = 0;
847 hw->flattened_layers = 0;
852 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
853 * @hw: pointer to the HW struct
854 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
855 * @buf: pointer to buffer
856 * @buf_size: buffer size in bytes
857 * @cd: pointer to command details structure or NULL
859 * Configure L2 Node CGD (0x0414)
862 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
863 struct ice_aqc_cfg_l2_node_cgd_data *buf,
864 u16 buf_size, struct ice_sq_cd *cd)
866 struct ice_aqc_cfg_l2_node_cgd *cmd;
867 struct ice_aq_desc desc;
869 cmd = &desc.params.cfg_l2_node_cgd;
870 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
871 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
873 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
874 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
878 * ice_sched_add_elems - add nodes to HW and SW DB
879 * @pi: port information structure
880 * @tc_node: pointer to the branch node
881 * @parent: pointer to the parent node
882 * @layer: layer number to add nodes
883 * @num_nodes: number of nodes
884 * @num_nodes_added: pointer to num nodes added
885 * @first_node_teid: if new nodes are added then return the TEID of first node
887 * This function add nodes to HW as well as to SW DB for a given layer
889 static enum ice_status
890 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
891 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
892 u16 *num_nodes_added, u32 *first_node_teid)
894 struct ice_sched_node *prev, *new_node;
895 struct ice_aqc_add_elem *buf;
896 u16 i, num_groups_added = 0;
897 enum ice_status status = ICE_SUCCESS;
898 struct ice_hw *hw = pi->hw;
902 buf_size = ice_struct_size(buf, generic, num_nodes - 1);
903 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
905 return ICE_ERR_NO_MEMORY;
907 buf->hdr.parent_teid = parent->info.node_teid;
908 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
909 for (i = 0; i < num_nodes; i++) {
910 buf->generic[i].parent_teid = parent->info.node_teid;
911 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
912 buf->generic[i].data.valid_sections =
913 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
914 ICE_AQC_ELEM_VALID_EIR;
915 buf->generic[i].data.generic = 0;
916 buf->generic[i].data.cir_bw.bw_profile_idx =
917 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
918 buf->generic[i].data.cir_bw.bw_alloc =
919 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
920 buf->generic[i].data.eir_bw.bw_profile_idx =
921 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
922 buf->generic[i].data.eir_bw.bw_alloc =
923 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
926 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
927 &num_groups_added, NULL);
928 if (status != ICE_SUCCESS || num_groups_added != 1) {
929 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
930 hw->adminq.sq_last_status);
935 *num_nodes_added = num_nodes;
936 /* add nodes to the SW DB */
937 for (i = 0; i < num_nodes; i++) {
938 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
939 if (status != ICE_SUCCESS) {
940 ice_debug(hw, ICE_DBG_SCHED,
941 "add nodes in SW DB failed status =%d\n",
946 teid = LE32_TO_CPU(buf->generic[i].node_teid);
947 new_node = ice_sched_find_node_by_teid(parent, teid);
949 ice_debug(hw, ICE_DBG_SCHED,
950 "Node is missing for teid =%d\n", teid);
954 new_node->sibling = NULL;
955 new_node->tc_num = tc_node->tc_num;
957 /* add it to previous node sibling pointer */
958 /* Note: siblings are not linked across branches */
959 prev = ice_sched_get_first_node(pi, tc_node, layer);
960 if (prev && prev != new_node) {
961 while (prev->sibling)
962 prev = prev->sibling;
963 prev->sibling = new_node;
966 /* initialize the sibling head */
967 if (!pi->sib_head[tc_node->tc_num][layer])
968 pi->sib_head[tc_node->tc_num][layer] = new_node;
971 *first_node_teid = teid;
979 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
980 * @pi: port information structure
981 * @tc_node: pointer to TC node
982 * @parent: pointer to parent node
983 * @layer: layer number to add nodes
984 * @num_nodes: number of nodes to be added
985 * @first_node_teid: pointer to the first node TEID
986 * @num_nodes_added: pointer to number of nodes added
988 * This function add nodes to a given layer.
990 static enum ice_status
991 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
992 struct ice_sched_node *tc_node,
993 struct ice_sched_node *parent, u8 layer,
994 u16 num_nodes, u32 *first_node_teid,
995 u16 *num_nodes_added)
997 u32 *first_teid_ptr = first_node_teid;
998 u16 new_num_nodes, max_child_nodes;
999 enum ice_status status = ICE_SUCCESS;
1000 struct ice_hw *hw = pi->hw;
1004 *num_nodes_added = 0;
1009 if (!parent || layer < hw->sw_entry_point_layer)
1010 return ICE_ERR_PARAM;
1012 /* max children per node per layer */
1013 max_child_nodes = hw->max_children[parent->tx_sched_layer];
1015 /* current number of children + required nodes exceed max children ? */
1016 if ((parent->num_children + num_nodes) > max_child_nodes) {
1017 /* Fail if the parent is a TC node */
1018 if (parent == tc_node)
1021 /* utilize all the spaces if the parent is not full */
1022 if (parent->num_children < max_child_nodes) {
1023 new_num_nodes = max_child_nodes - parent->num_children;
1024 /* this recursion is intentional, and wouldn't
1025 * go more than 2 calls
1027 status = ice_sched_add_nodes_to_layer(pi, tc_node,
1032 if (status != ICE_SUCCESS)
1035 *num_nodes_added += num_added;
1037 /* Don't modify the first node TEID memory if the first node was
1038 * added already in the above call. Instead send some temp
1039 * memory for all other recursive calls.
1042 first_teid_ptr = &temp;
1044 new_num_nodes = num_nodes - num_added;
1046 /* This parent is full, try the next sibling */
1047 parent = parent->sibling;
1049 /* this recursion is intentional, for 1024 queues
1050 * per VSI, it goes max of 16 iterations.
1051 * 1024 / 8 = 128 layer 8 nodes
1052 * 128 /8 = 16 (add 8 nodes per iteration)
1054 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1055 layer, new_num_nodes,
1058 *num_nodes_added += num_added;
1062 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1063 num_nodes_added, first_node_teid);
1068 * ice_sched_get_qgrp_layer - get the current queue group layer number
1069 * @hw: pointer to the HW struct
1071 * This function returns the current queue group layer number
1073 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1075 /* It's always total layers - 1, the array is 0 relative so -2 */
1076 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1080 * ice_sched_get_vsi_layer - get the current VSI layer number
1081 * @hw: pointer to the HW struct
1083 * This function returns the current VSI layer number
1085 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1087 /* Num Layers VSI layer
1090 * 5 or less sw_entry_point_layer
1092 /* calculate the VSI layer based on number of layers. */
1093 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1094 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1096 if (layer > hw->sw_entry_point_layer)
1099 return hw->sw_entry_point_layer;
1103 * ice_sched_get_agg_layer - get the current aggregator layer number
1104 * @hw: pointer to the HW struct
1106 * This function returns the current aggregator layer number
1108 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1110 /* Num Layers aggregator layer
1112 * 7 or less sw_entry_point_layer
1114 /* calculate the aggregator layer based on number of layers. */
1115 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1116 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1118 if (layer > hw->sw_entry_point_layer)
1121 return hw->sw_entry_point_layer;
1125 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1126 * @pi: port information structure
1128 * This function removes the leaf node that was created by the FW
1129 * during initialization
1131 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1133 struct ice_sched_node *node;
1137 if (!node->num_children)
1139 node = node->children[0];
1141 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1142 u32 teid = LE32_TO_CPU(node->info.node_teid);
1143 enum ice_status status;
1145 /* remove the default leaf node */
1146 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1148 ice_free_sched_node(pi, node);
1153 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1154 * @pi: port information structure
1156 * This function frees all the nodes except root and TC that were created by
1157 * the FW during initialization
1159 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1161 struct ice_sched_node *node;
1163 ice_rm_dflt_leaf_node(pi);
1165 /* remove the default nodes except TC and root nodes */
1168 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1169 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1170 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1171 ice_free_sched_node(pi, node);
1175 if (!node->num_children)
1177 node = node->children[0];
1182 * ice_sched_init_port - Initialize scheduler by querying information from FW
1183 * @pi: port info structure for the tree to cleanup
1185 * This function is the initial call to find the total number of Tx scheduler
1186 * resources, default topology created by firmware and storing the information
1189 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1191 struct ice_aqc_get_topo_elem *buf;
1192 enum ice_status status;
1199 return ICE_ERR_PARAM;
1202 /* Query the Default Topology from FW */
1203 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1204 ICE_AQ_MAX_BUF_LEN);
1206 return ICE_ERR_NO_MEMORY;
1208 /* Query default scheduling tree topology */
1209 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1210 &num_branches, NULL);
1214 /* num_branches should be between 1-8 */
1215 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1216 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1218 status = ICE_ERR_PARAM;
1222 /* get the number of elements on the default/first branch */
1223 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1225 /* num_elems should always be between 1-9 */
1226 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1227 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1229 status = ICE_ERR_PARAM;
1233 /* If the last node is a leaf node then the index of the queue group
1234 * layer is two less than the number of elements.
1236 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1237 ICE_AQC_ELEM_TYPE_LEAF)
1238 pi->last_node_teid =
1239 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1241 pi->last_node_teid =
1242 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1244 /* Insert the Tx Sched root node */
1245 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1249 /* Parse the default tree and cache the information */
1250 for (i = 0; i < num_branches; i++) {
1251 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1253 /* Skip root element as already inserted */
1254 for (j = 1; j < num_elems; j++) {
1255 /* update the sw entry point */
1256 if (buf[0].generic[j].data.elem_type ==
1257 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1258 hw->sw_entry_point_layer = j;
1260 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1266 /* Remove the default nodes. */
1268 ice_sched_rm_dflt_nodes(pi);
1270 /* initialize the port for handling the scheduler tree */
1271 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1272 ice_init_lock(&pi->sched_lock);
1273 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1274 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1277 if (status && pi->root) {
1278 ice_free_sched_node(pi, pi->root);
1287 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1288 * @pi: port information structure
1289 * @teid: Scheduler node TEID
1291 * This function retrieves the ice_sched_node struct for given TEID from
1292 * the SW DB and returns it to the caller.
1294 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1296 struct ice_sched_node *node;
1301 /* Find the node starting from root */
1302 ice_acquire_lock(&pi->sched_lock);
1303 node = ice_sched_find_node_by_teid(pi->root, teid);
1304 ice_release_lock(&pi->sched_lock);
1307 ice_debug(pi->hw, ICE_DBG_SCHED,
1308 "Node not found for teid=0x%x\n", teid);
1314 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1315 * @hw: pointer to the HW struct
1317 * query FW for allocated scheduler resources and store in HW struct
1319 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1321 struct ice_aqc_query_txsched_res_resp *buf;
1322 enum ice_status status = ICE_SUCCESS;
1329 buf = (struct ice_aqc_query_txsched_res_resp *)
1330 ice_malloc(hw, sizeof(*buf));
1332 return ICE_ERR_NO_MEMORY;
1334 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1336 goto sched_query_out;
1338 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1339 hw->num_tx_sched_phys_layers =
1340 LE16_TO_CPU(buf->sched_props.phys_levels);
1341 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1342 hw->max_cgds = buf->sched_props.max_pf_cgds;
1344 /* max sibling group size of current layer refers to the max children
1345 * of the below layer node.
1346 * layer 1 node max children will be layer 2 max sibling group size
1347 * layer 2 node max children will be layer 3 max sibling group size
1348 * and so on. This array will be populated from root (index 0) to
1349 * qgroup layer 7. Leaf node has no children.
1351 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1352 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1353 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1356 hw->layer_info = (struct ice_aqc_layer_props *)
1357 ice_memdup(hw, buf->layer_props,
1358 (hw->num_tx_sched_layers *
1359 sizeof(*hw->layer_info)),
1361 if (!hw->layer_info) {
1362 status = ICE_ERR_NO_MEMORY;
1363 goto sched_query_out;
1372 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1373 * @hw: pointer to the HW struct
1375 * Determine the PSM clock frequency and store in HW struct
1377 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1381 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1382 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1383 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1385 #define PSM_CLK_SRC_367_MHZ 0x0
1386 #define PSM_CLK_SRC_416_MHZ 0x1
1387 #define PSM_CLK_SRC_446_MHZ 0x2
1388 #define PSM_CLK_SRC_390_MHZ 0x3
1391 case PSM_CLK_SRC_367_MHZ:
1392 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1394 case PSM_CLK_SRC_416_MHZ:
1395 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1397 case PSM_CLK_SRC_446_MHZ:
1398 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1400 case PSM_CLK_SRC_390_MHZ:
1401 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1404 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1406 /* fall back to a safe default */
1407 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1412 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1413 * @hw: pointer to the HW struct
1414 * @base: pointer to the base node
1415 * @node: pointer to the node to search
1417 * This function checks whether a given node is part of the base node
1421 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1422 struct ice_sched_node *node)
1426 for (i = 0; i < base->num_children; i++) {
1427 struct ice_sched_node *child = base->children[i];
1432 if (child->tx_sched_layer > node->tx_sched_layer)
1435 /* this recursion is intentional, and wouldn't
1436 * go more than 8 calls
1438 if (ice_sched_find_node_in_subtree(hw, child, node))
1445 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1446 * @pi: port information structure
1447 * @vsi_handle: software VSI handle
1448 * @tc: branch number
1449 * @owner: LAN or RDMA
1451 * This function retrieves a free LAN or RDMA queue group node
1453 struct ice_sched_node *
1454 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1457 struct ice_sched_node *vsi_node, *qgrp_node = NULL;
1458 struct ice_vsi_ctx *vsi_ctx;
1462 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1463 max_children = pi->hw->max_children[qgrp_layer];
1465 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1468 vsi_node = vsi_ctx->sched.vsi_node[tc];
1469 /* validate invalid VSI ID */
1473 /* get the first queue group node from VSI sub-tree */
1474 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1476 /* make sure the qgroup node is part of the VSI subtree */
1477 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1478 if (qgrp_node->num_children < max_children &&
1479 qgrp_node->owner == owner)
1481 qgrp_node = qgrp_node->sibling;
1489 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1490 * @pi: pointer to the port information structure
1491 * @tc_node: pointer to the TC node
1492 * @vsi_handle: software VSI handle
1494 * This function retrieves a VSI node for a given VSI ID from a given
1497 struct ice_sched_node *
1498 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1501 struct ice_sched_node *node;
1504 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1505 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1507 /* Check whether it already exists */
1509 if (node->vsi_handle == vsi_handle)
1511 node = node->sibling;
1518 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1519 * @pi: pointer to the port information structure
1520 * @tc_node: pointer to the TC node
1521 * @agg_id: aggregator ID
1523 * This function retrieves an aggregator node for a given aggregator ID from
1526 static struct ice_sched_node *
1527 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1530 struct ice_sched_node *node;
1531 struct ice_hw *hw = pi->hw;
1536 agg_layer = ice_sched_get_agg_layer(hw);
1537 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1539 /* Check whether it already exists */
1541 if (node->agg_id == agg_id)
1543 node = node->sibling;
1550 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1551 * @hw: pointer to the HW struct
1552 * @node: pointer to the ice_sched_node struct
1554 * This function queries and compares the HW element with SW DB node parameters
1556 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1558 struct ice_aqc_get_elem buf;
1559 enum ice_status status;
1562 node_teid = LE32_TO_CPU(node->info.node_teid);
1563 status = ice_sched_query_elem(hw, node_teid, &buf);
1564 if (status != ICE_SUCCESS)
1567 if (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {
1568 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1577 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1578 * @hw: pointer to the HW struct
1579 * @num_qs: number of queues
1580 * @num_nodes: num nodes array
1582 * This function calculates the number of VSI child nodes based on the
1586 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1591 qgl = ice_sched_get_qgrp_layer(hw);
1592 vsil = ice_sched_get_vsi_layer(hw);
1594 /* calculate num nodes from queue group to VSI layer */
1595 for (i = qgl; i > vsil; i--) {
1596 /* round to the next integer if there is a remainder */
1597 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1599 /* need at least one node */
1600 num_nodes[i] = num ? num : 1;
1605 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1606 * @pi: port information structure
1607 * @vsi_handle: software VSI handle
1608 * @tc_node: pointer to the TC node
1609 * @num_nodes: pointer to the num nodes that needs to be added per layer
1610 * @owner: node owner (LAN or RDMA)
1612 * This function adds the VSI child nodes to tree. It gets called for
1613 * LAN and RDMA separately.
1615 static enum ice_status
1616 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1617 struct ice_sched_node *tc_node, u16 *num_nodes,
1620 struct ice_sched_node *parent, *node;
1621 struct ice_hw *hw = pi->hw;
1622 enum ice_status status;
1623 u32 first_node_teid;
1627 qgl = ice_sched_get_qgrp_layer(hw);
1628 vsil = ice_sched_get_vsi_layer(hw);
1629 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1630 for (i = vsil + 1; i <= qgl; i++) {
1634 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1638 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1641 /* The newly added node can be a new parent for the next
1645 parent = ice_sched_find_node_by_teid(tc_node,
1649 node->owner = owner;
1650 node = node->sibling;
1653 parent = parent->children[0];
1661 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1662 * @pi: pointer to the port info structure
1663 * @tc_node: pointer to TC node
1664 * @num_nodes: pointer to num nodes array
1666 * This function calculates the number of supported nodes needed to add this
1667 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1671 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1672 struct ice_sched_node *tc_node, u16 *num_nodes)
1674 struct ice_sched_node *node;
1678 vsil = ice_sched_get_vsi_layer(pi->hw);
1679 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1680 /* Add intermediate nodes if TC has no children and
1681 * need at least one node for VSI
1683 if (!tc_node->num_children || i == vsil) {
1686 /* If intermediate nodes are reached max children
1687 * then add a new one.
1689 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1690 /* scan all the siblings */
1692 if (node->num_children <
1693 pi->hw->max_children[i])
1695 node = node->sibling;
1698 /* tree has one intermediate node to add this new VSI.
1699 * So no need to calculate supported nodes for below
1704 /* all the nodes are full, allocate a new one */
1710 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1711 * @pi: port information structure
1712 * @vsi_handle: software VSI handle
1713 * @tc_node: pointer to TC node
1714 * @num_nodes: pointer to num nodes array
1716 * This function adds the VSI supported nodes into Tx tree including the
1717 * VSI, its parent and intermediate nodes in below layers
1719 static enum ice_status
1720 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1721 struct ice_sched_node *tc_node, u16 *num_nodes)
1723 struct ice_sched_node *parent = tc_node;
1724 enum ice_status status;
1725 u32 first_node_teid;
1730 return ICE_ERR_PARAM;
1732 vsil = ice_sched_get_vsi_layer(pi->hw);
1733 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1734 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1738 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1741 /* The newly added node can be a new parent for the next
1745 parent = ice_sched_find_node_by_teid(tc_node,
1748 parent = parent->children[0];
1754 parent->vsi_handle = vsi_handle;
1761 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1762 * @pi: port information structure
1763 * @vsi_handle: software VSI handle
1766 * This function adds a new VSI into scheduler tree
1768 static enum ice_status
1769 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1771 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1772 struct ice_sched_node *tc_node;
1774 tc_node = ice_sched_get_tc_node(pi, tc);
1776 return ICE_ERR_PARAM;
1778 /* calculate number of supported nodes needed for this VSI */
1779 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1781 /* add VSI supported nodes to TC subtree */
1782 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1787 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1788 * @pi: port information structure
1789 * @vsi_handle: software VSI handle
1791 * @new_numqs: new number of max queues
1792 * @owner: owner of this subtree
1794 * This function updates the VSI child nodes based on the number of queues
1796 static enum ice_status
1797 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1798 u8 tc, u16 new_numqs, u8 owner)
1800 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1801 struct ice_sched_node *vsi_node;
1802 struct ice_sched_node *tc_node;
1803 struct ice_vsi_ctx *vsi_ctx;
1804 enum ice_status status = ICE_SUCCESS;
1805 struct ice_hw *hw = pi->hw;
1808 tc_node = ice_sched_get_tc_node(pi, tc);
1812 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1816 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1818 return ICE_ERR_PARAM;
1820 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1821 /* num queues are not changed or less than the previous number */
1822 if (new_numqs <= prev_numqs)
1824 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1829 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1830 /* Keep the max number of queue configuration all the time. Update the
1831 * tree only if number of queues > previous number of queues. This may
1832 * leave some extra nodes in the tree if number of queues < previous
1833 * number but that wouldn't harm anything. Removing those extra nodes
1834 * may complicate the code if those nodes are part of SRL or
1835 * individually rate limited.
1837 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1838 new_num_nodes, owner);
1841 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1847 * ice_sched_cfg_vsi - configure the new/existing VSI
1848 * @pi: port information structure
1849 * @vsi_handle: software VSI handle
1851 * @maxqs: max number of queues
1852 * @owner: LAN or RDMA
1853 * @enable: TC enabled or disabled
1855 * This function adds/updates VSI nodes based on the number of queues. If TC is
1856 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1857 * disabled then suspend the VSI if it is not already.
1860 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1861 u8 owner, bool enable)
1863 struct ice_sched_node *vsi_node, *tc_node;
1864 struct ice_vsi_ctx *vsi_ctx;
1865 enum ice_status status = ICE_SUCCESS;
1866 struct ice_hw *hw = pi->hw;
1868 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1869 tc_node = ice_sched_get_tc_node(pi, tc);
1871 return ICE_ERR_PARAM;
1872 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1874 return ICE_ERR_PARAM;
1875 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1877 /* suspend the VSI if TC is not enabled */
1879 if (vsi_node && vsi_node->in_use) {
1880 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1882 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1885 vsi_node->in_use = false;
1890 /* TC is enabled, if it is a new VSI then add it to the tree */
1892 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1896 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1900 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1901 vsi_node->in_use = true;
1902 /* invalidate the max queues whenever VSI gets added first time
1903 * into the scheduler tree (boot or after reset). We need to
1904 * recreate the child nodes all the time in these cases.
1906 vsi_ctx->sched.max_lanq[tc] = 0;
1909 /* update the VSI child nodes */
1910 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1915 /* TC is enabled, resume the VSI if it is in the suspend state */
1916 if (!vsi_node->in_use) {
1917 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1919 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1921 vsi_node->in_use = true;
1928 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1929 * @pi: port information structure
1930 * @vsi_handle: software VSI handle
1932 * This function removes single aggregator VSI info entry from
1936 ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1938 struct ice_sched_agg_info *agg_info;
1939 struct ice_sched_agg_info *atmp;
1941 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1944 struct ice_sched_agg_vsi_info *agg_vsi_info;
1945 struct ice_sched_agg_vsi_info *vtmp;
1947 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1948 &agg_info->agg_vsi_list,
1949 ice_sched_agg_vsi_info, list_entry)
1950 if (agg_vsi_info->vsi_handle == vsi_handle) {
1951 LIST_DEL(&agg_vsi_info->list_entry);
1952 ice_free(pi->hw, agg_vsi_info);
1959 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1960 * @node: pointer to the sub-tree node
1962 * This function checks for a leaf node presence in a given sub-tree node.
1964 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
1968 for (i = 0; i < node->num_children; i++)
1969 if (ice_sched_is_leaf_node_present(node->children[i]))
1971 /* check for a leaf node */
1972 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
1976 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
1977 * @pi: port information structure
1978 * @vsi_handle: software VSI handle
1979 * @owner: LAN or RDMA
1981 * This function removes the VSI and its LAN or RDMA children nodes from the
1984 static enum ice_status
1985 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
1987 enum ice_status status = ICE_ERR_PARAM;
1988 struct ice_vsi_ctx *vsi_ctx;
1991 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
1992 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
1994 ice_acquire_lock(&pi->sched_lock);
1995 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1997 goto exit_sched_rm_vsi_cfg;
1999 ice_for_each_traffic_class(i) {
2000 struct ice_sched_node *vsi_node, *tc_node;
2003 tc_node = ice_sched_get_tc_node(pi, i);
2007 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2011 if (ice_sched_is_leaf_node_present(vsi_node)) {
2012 ice_debug(pi->hw, ICE_DBG_SCHED,
2013 "VSI has leaf nodes in TC %d\n", i);
2014 status = ICE_ERR_IN_USE;
2015 goto exit_sched_rm_vsi_cfg;
2017 while (j < vsi_node->num_children) {
2018 if (vsi_node->children[j]->owner == owner) {
2019 ice_free_sched_node(pi, vsi_node->children[j]);
2021 /* reset the counter again since the num
2022 * children will be updated after node removal
2029 /* remove the VSI if it has no children */
2030 if (!vsi_node->num_children) {
2031 ice_free_sched_node(pi, vsi_node);
2032 vsi_ctx->sched.vsi_node[i] = NULL;
2034 /* clean up aggregator related VSI info if any */
2035 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2037 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2038 vsi_ctx->sched.max_lanq[i] = 0;
2040 status = ICE_SUCCESS;
2042 exit_sched_rm_vsi_cfg:
2043 ice_release_lock(&pi->sched_lock);
2048 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2049 * @pi: port information structure
2050 * @vsi_handle: software VSI handle
2052 * This function clears the VSI and its LAN children nodes from scheduler tree
2055 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2057 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2061 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2062 * @hw: pointer to the HW struct
2063 * @node: pointer to the ice_sched_node struct
2065 * This function compares all the nodes for a given tree against HW DB nodes
2066 * This function needs to be called with the port_info->sched_lock held
2068 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2072 /* start from the leaf node */
2073 for (i = 0; i < node->num_children; i++)
2074 /* Fail if node doesn't match with the SW DB
2075 * this recursion is intentional, and wouldn't
2076 * go more than 9 calls
2078 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2081 return ice_sched_check_node(hw, node);
2085 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2086 * @hw: pointer to the HW struct
2087 * @node_teid: node TEID
2088 * @buf: pointer to buffer
2089 * @buf_size: buffer size in bytes
2090 * @cd: pointer to command details structure or NULL
2092 * This function retrieves the tree topology from the firmware for a given
2093 * node TEID to the root node.
2096 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2097 struct ice_aqc_get_elem *buf, u16 buf_size,
2098 struct ice_sq_cd *cd)
2100 struct ice_aqc_query_node_to_root *cmd;
2101 struct ice_aq_desc desc;
2103 cmd = &desc.params.query_node_to_root;
2104 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2105 cmd->teid = CPU_TO_LE32(node_teid);
2106 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2110 * ice_get_agg_info - get the aggregator ID
2111 * @hw: pointer to the hardware structure
2112 * @agg_id: aggregator ID
2114 * This function validates aggregator ID. The function returns info if
2115 * aggregator ID is present in list otherwise it returns null.
2117 static struct ice_sched_agg_info*
2118 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2120 struct ice_sched_agg_info *agg_info;
2122 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2124 if (agg_info->agg_id == agg_id)
2131 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2132 * @hw: pointer to the HW struct
2133 * @node: pointer to a child node
2134 * @num_nodes: num nodes count array
2136 * This function walks through the aggregator subtree to find a free parent
2139 static struct ice_sched_node *
2140 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2143 u8 l = node->tx_sched_layer;
2146 vsil = ice_sched_get_vsi_layer(hw);
2148 /* Is it VSI parent layer ? */
2150 return (node->num_children < hw->max_children[l]) ? node : NULL;
2152 /* We have intermediate nodes. Let's walk through the subtree. If the
2153 * intermediate node has space to add a new node then clear the count
2155 if (node->num_children < hw->max_children[l])
2157 /* The below recursive call is intentional and wouldn't go more than
2158 * 2 or 3 iterations.
2161 for (i = 0; i < node->num_children; i++) {
2162 struct ice_sched_node *parent;
2164 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2174 * ice_sched_update_parent - update the new parent in SW DB
2175 * @new_parent: pointer to a new parent node
2176 * @node: pointer to a child node
2178 * This function removes the child from the old parent and adds it to a new
2182 ice_sched_update_parent(struct ice_sched_node *new_parent,
2183 struct ice_sched_node *node)
2185 struct ice_sched_node *old_parent;
2188 old_parent = node->parent;
2190 /* update the old parent children */
2191 for (i = 0; i < old_parent->num_children; i++)
2192 if (old_parent->children[i] == node) {
2193 for (j = i + 1; j < old_parent->num_children; j++)
2194 old_parent->children[j - 1] =
2195 old_parent->children[j];
2196 old_parent->num_children--;
2200 /* now move the node to a new parent */
2201 new_parent->children[new_parent->num_children++] = node;
2202 node->parent = new_parent;
2203 node->info.parent_teid = new_parent->info.node_teid;
2207 * ice_sched_move_nodes - move child nodes to a given parent
2208 * @pi: port information structure
2209 * @parent: pointer to parent node
2210 * @num_items: number of child nodes to be moved
2211 * @list: pointer to child node teids
2213 * This function move the child nodes to a given parent.
2215 static enum ice_status
2216 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2217 u16 num_items, u32 *list)
2219 enum ice_status status = ICE_SUCCESS;
2220 struct ice_aqc_move_elem *buf;
2221 struct ice_sched_node *node;
2222 u16 i, grps_movd = 0;
2227 if (!parent || !num_items)
2228 return ICE_ERR_PARAM;
2230 /* Does parent have enough space */
2231 if (parent->num_children + num_items >=
2232 hw->max_children[parent->tx_sched_layer])
2233 return ICE_ERR_AQ_FULL;
2235 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
2237 return ICE_ERR_NO_MEMORY;
2239 for (i = 0; i < num_items; i++) {
2240 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2242 status = ICE_ERR_PARAM;
2246 buf->hdr.src_parent_teid = node->info.parent_teid;
2247 buf->hdr.dest_parent_teid = parent->info.node_teid;
2248 buf->teid[0] = node->info.node_teid;
2249 buf->hdr.num_elems = CPU_TO_LE16(1);
2250 status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
2252 if (status && grps_movd != 1) {
2253 status = ICE_ERR_CFG;
2257 /* update the SW DB */
2258 ice_sched_update_parent(parent, node);
2267 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2268 * @pi: port information structure
2269 * @vsi_handle: software VSI handle
2270 * @agg_id: aggregator ID
2273 * This function moves a VSI to an aggregator node or its subtree.
2274 * Intermediate nodes may be created if required.
2276 static enum ice_status
2277 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2280 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2281 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2282 u32 first_node_teid, vsi_teid;
2283 enum ice_status status;
2284 u16 num_nodes_added;
2287 tc_node = ice_sched_get_tc_node(pi, tc);
2291 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2293 return ICE_ERR_DOES_NOT_EXIST;
2295 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2297 return ICE_ERR_DOES_NOT_EXIST;
2299 aggl = ice_sched_get_agg_layer(pi->hw);
2300 vsil = ice_sched_get_vsi_layer(pi->hw);
2302 /* set intermediate node count to 1 between aggregator and VSI layers */
2303 for (i = aggl + 1; i < vsil; i++)
2306 /* Check if the aggregator subtree has any free node to add the VSI */
2307 for (i = 0; i < agg_node->num_children; i++) {
2308 parent = ice_sched_get_free_vsi_parent(pi->hw,
2309 agg_node->children[i],
2317 for (i = aggl + 1; i < vsil; i++) {
2318 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2322 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2325 /* The newly added node can be a new parent for the next
2328 if (num_nodes_added)
2329 parent = ice_sched_find_node_by_teid(tc_node,
2332 parent = parent->children[0];
2339 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2340 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2344 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2345 * @pi: port information structure
2346 * @agg_info: aggregator info
2347 * @tc: traffic class number
2348 * @rm_vsi_info: true or false
2350 * This function move all the VSI(s) to the default aggregator and delete
2351 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2352 * caller holds the scheduler lock.
2354 static enum ice_status
2355 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2356 struct ice_sched_agg_info *agg_info, u8 tc,
2359 struct ice_sched_agg_vsi_info *agg_vsi_info;
2360 struct ice_sched_agg_vsi_info *tmp;
2361 enum ice_status status = ICE_SUCCESS;
2363 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2364 ice_sched_agg_vsi_info, list_entry) {
2365 u16 vsi_handle = agg_vsi_info->vsi_handle;
2367 /* Move VSI to default aggregator */
2368 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2371 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2372 ICE_DFLT_AGG_ID, tc);
2376 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2377 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2378 LIST_DEL(&agg_vsi_info->list_entry);
2379 ice_free(pi->hw, agg_vsi_info);
2387 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2388 * @pi: port information structure
2389 * @node: node pointer
2391 * This function checks whether the aggregator is attached with any VSI or not.
2394 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2398 vsil = ice_sched_get_vsi_layer(pi->hw);
2399 if (node->tx_sched_layer < vsil - 1) {
2400 for (i = 0; i < node->num_children; i++)
2401 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2405 return node->num_children ? true : false;
2410 * ice_sched_rm_agg_cfg - remove the aggregator node
2411 * @pi: port information structure
2412 * @agg_id: aggregator ID
2415 * This function removes the aggregator node and intermediate nodes if any
2418 static enum ice_status
2419 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2421 struct ice_sched_node *tc_node, *agg_node;
2422 struct ice_hw *hw = pi->hw;
2424 tc_node = ice_sched_get_tc_node(pi, tc);
2428 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2430 return ICE_ERR_DOES_NOT_EXIST;
2432 /* Can't remove the aggregator node if it has children */
2433 if (ice_sched_is_agg_inuse(pi, agg_node))
2434 return ICE_ERR_IN_USE;
2436 /* need to remove the whole subtree if aggregator node is the
2439 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2440 struct ice_sched_node *parent = agg_node->parent;
2445 if (parent->num_children > 1)
2451 ice_free_sched_node(pi, agg_node);
2456 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2457 * @pi: port information structure
2458 * @agg_info: aggregator ID
2460 * @rm_vsi_info: bool value true or false
2462 * This function removes aggregator reference to VSI of given TC. It removes
2463 * the aggregator configuration completely for requested TC. The caller needs
2464 * to hold the scheduler lock.
2466 static enum ice_status
2467 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2468 u8 tc, bool rm_vsi_info)
2470 enum ice_status status = ICE_SUCCESS;
2472 /* If nothing to remove - return success */
2473 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2474 goto exit_rm_agg_cfg_tc;
2476 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2478 goto exit_rm_agg_cfg_tc;
2480 /* Delete aggregator node(s) */
2481 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2483 goto exit_rm_agg_cfg_tc;
2485 ice_clear_bit(tc, agg_info->tc_bitmap);
2491 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2492 * @pi: port information structure
2493 * @agg_id: aggregator ID
2494 * @tc_bitmap: 8 bits TC bitmap
2496 * Save aggregator TC bitmap. This function needs to be called with scheduler
2499 static enum ice_status
2500 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2501 ice_bitmap_t *tc_bitmap)
2503 struct ice_sched_agg_info *agg_info;
2505 agg_info = ice_get_agg_info(pi->hw, agg_id);
2507 return ICE_ERR_PARAM;
2508 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2509 ICE_MAX_TRAFFIC_CLASS);
2514 * ice_sched_add_agg_cfg - create an aggregator node
2515 * @pi: port information structure
2516 * @agg_id: aggregator ID
2519 * This function creates an aggregator node and intermediate nodes if required
2522 static enum ice_status
2523 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2525 struct ice_sched_node *parent, *agg_node, *tc_node;
2526 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2527 enum ice_status status = ICE_SUCCESS;
2528 struct ice_hw *hw = pi->hw;
2529 u32 first_node_teid;
2530 u16 num_nodes_added;
2533 tc_node = ice_sched_get_tc_node(pi, tc);
2537 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2538 /* Does Agg node already exist ? */
2542 aggl = ice_sched_get_agg_layer(hw);
2544 /* need one node in Agg layer */
2545 num_nodes[aggl] = 1;
2547 /* Check whether the intermediate nodes have space to add the
2548 * new aggregator. If they are full, then SW needs to allocate a new
2549 * intermediate node on those layers
2551 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2552 parent = ice_sched_get_first_node(pi, tc_node, i);
2554 /* scan all the siblings */
2556 if (parent->num_children < hw->max_children[i])
2558 parent = parent->sibling;
2561 /* all the nodes are full, reserve one for this layer */
2566 /* add the aggregator node */
2568 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2572 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2576 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2579 /* The newly added node can be a new parent for the next
2582 if (num_nodes_added) {
2583 parent = ice_sched_find_node_by_teid(tc_node,
2585 /* register aggregator ID with the aggregator node */
2586 if (parent && i == aggl)
2587 parent->agg_id = agg_id;
2589 parent = parent->children[0];
2597 * ice_sched_cfg_agg - configure aggregator node
2598 * @pi: port information structure
2599 * @agg_id: aggregator ID
2600 * @agg_type: aggregator type queue, VSI, or aggregator group
2601 * @tc_bitmap: bits TC bitmap
2603 * It registers a unique aggregator node into scheduler services. It
2604 * allows a user to register with a unique ID to track it's resources.
2605 * The aggregator type determines if this is a queue group, VSI group
2606 * or aggregator group. It then creates the aggregator node(s) for requested
2607 * TC(s) or removes an existing aggregator node including its configuration
2608 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2609 * resources and remove aggregator ID.
2610 * This function needs to be called with scheduler lock held.
2612 static enum ice_status
2613 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2614 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2616 struct ice_sched_agg_info *agg_info;
2617 enum ice_status status = ICE_SUCCESS;
2618 struct ice_hw *hw = pi->hw;
2621 agg_info = ice_get_agg_info(hw, agg_id);
2623 /* Create new entry for new aggregator ID */
2624 agg_info = (struct ice_sched_agg_info *)
2625 ice_malloc(hw, sizeof(*agg_info));
2627 status = ICE_ERR_NO_MEMORY;
2630 agg_info->agg_id = agg_id;
2631 agg_info->agg_type = agg_type;
2632 agg_info->tc_bitmap[0] = 0;
2634 /* Initialize the aggregator VSI list head */
2635 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2637 /* Add new entry in aggregator list */
2638 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2640 /* Create aggregator node(s) for requested TC(s) */
2641 ice_for_each_traffic_class(tc) {
2642 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2643 /* Delete aggregator cfg TC if it exists previously */
2644 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2650 /* Check if aggregator node for TC already exists */
2651 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2654 /* Create new aggregator node for TC */
2655 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2659 /* Save aggregator node's TC information */
2660 ice_set_bit(tc, agg_info->tc_bitmap);
2667 * ice_cfg_agg - config aggregator node
2668 * @pi: port information structure
2669 * @agg_id: aggregator ID
2670 * @agg_type: aggregator type queue, VSI, or aggregator group
2671 * @tc_bitmap: bits TC bitmap
2673 * This function configures aggregator node(s).
2676 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2679 ice_bitmap_t bitmap = tc_bitmap;
2680 enum ice_status status;
2682 ice_acquire_lock(&pi->sched_lock);
2683 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2684 (ice_bitmap_t *)&bitmap);
2686 status = ice_save_agg_tc_bitmap(pi, agg_id,
2687 (ice_bitmap_t *)&bitmap);
2688 ice_release_lock(&pi->sched_lock);
2693 * ice_get_agg_vsi_info - get the aggregator ID
2694 * @agg_info: aggregator info
2695 * @vsi_handle: software VSI handle
2697 * The function returns aggregator VSI info based on VSI handle. This function
2698 * needs to be called with scheduler lock held.
2700 static struct ice_sched_agg_vsi_info*
2701 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2703 struct ice_sched_agg_vsi_info *agg_vsi_info;
2705 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2706 ice_sched_agg_vsi_info, list_entry)
2707 if (agg_vsi_info->vsi_handle == vsi_handle)
2708 return agg_vsi_info;
2714 * ice_get_vsi_agg_info - get the aggregator info of VSI
2715 * @hw: pointer to the hardware structure
2716 * @vsi_handle: Sw VSI handle
2718 * The function returns aggregator info of VSI represented via vsi_handle. The
2719 * VSI has in this case a different aggregator than the default one. This
2720 * function needs to be called with scheduler lock held.
2722 static struct ice_sched_agg_info*
2723 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2725 struct ice_sched_agg_info *agg_info;
2727 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2729 struct ice_sched_agg_vsi_info *agg_vsi_info;
2731 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2739 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2740 * @pi: port information structure
2741 * @agg_id: aggregator ID
2742 * @vsi_handle: software VSI handle
2743 * @tc_bitmap: TC bitmap of enabled TC(s)
2745 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2748 static enum ice_status
2749 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2750 ice_bitmap_t *tc_bitmap)
2752 struct ice_sched_agg_vsi_info *agg_vsi_info;
2753 struct ice_sched_agg_info *agg_info;
2755 agg_info = ice_get_agg_info(pi->hw, agg_id);
2757 return ICE_ERR_PARAM;
2758 /* check if entry already exist */
2759 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2761 return ICE_ERR_PARAM;
2762 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2763 ICE_MAX_TRAFFIC_CLASS);
2768 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2769 * @pi: port information structure
2770 * @agg_id: aggregator ID
2771 * @vsi_handle: software VSI handle
2772 * @tc_bitmap: TC bitmap of enabled TC(s)
2774 * This function moves VSI to a new or default aggregator node. If VSI is
2775 * already associated to the aggregator node then no operation is performed on
2776 * the tree. This function needs to be called with scheduler lock held.
2778 static enum ice_status
2779 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2780 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2782 struct ice_sched_agg_vsi_info *agg_vsi_info;
2783 struct ice_sched_agg_info *agg_info;
2784 enum ice_status status = ICE_SUCCESS;
2785 struct ice_hw *hw = pi->hw;
2788 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2789 return ICE_ERR_PARAM;
2790 agg_info = ice_get_agg_info(hw, agg_id);
2792 return ICE_ERR_PARAM;
2793 /* check if entry already exist */
2794 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2795 if (!agg_vsi_info) {
2796 /* Create new entry for VSI under aggregator list */
2797 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2798 ice_malloc(hw, sizeof(*agg_vsi_info));
2800 return ICE_ERR_PARAM;
2802 /* add VSI ID into the aggregator list */
2803 agg_vsi_info->vsi_handle = vsi_handle;
2804 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2806 /* Move VSI node to new aggregator node for requested TC(s) */
2807 ice_for_each_traffic_class(tc) {
2808 if (!ice_is_tc_ena(*tc_bitmap, tc))
2811 /* Move VSI to new aggregator */
2812 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2816 if (agg_id != ICE_DFLT_AGG_ID)
2817 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2819 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2821 /* If VSI moved back to default aggregator, delete agg_vsi_info. */
2822 if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
2823 ICE_MAX_TRAFFIC_CLASS)) {
2824 LIST_DEL(&agg_vsi_info->list_entry);
2825 ice_free(hw, agg_vsi_info);
2831 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2832 * @pi: port information structure
2834 * This function removes unused rate limit profiles from the HW and
2835 * SW DB. The caller needs to hold scheduler lock.
2837 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
2841 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
2842 struct ice_aqc_rl_profile_info *rl_prof_elem;
2843 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2845 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2846 &pi->rl_prof_list[ln],
2847 ice_aqc_rl_profile_info, list_entry) {
2848 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
2849 ice_debug(pi->hw, ICE_DBG_SCHED,
2850 "Removed rl profile\n");
2856 * ice_sched_update_elem - update element
2857 * @hw: pointer to the HW struct
2858 * @node: pointer to node
2859 * @info: node info to update
2861 * It updates the HW DB, and local SW DB of node. It updates the scheduling
2862 * parameters of node from argument info data buffer (Info->data buf) and
2863 * returns success or error on config sched element failure. The caller
2864 * needs to hold scheduler lock.
2866 static enum ice_status
2867 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2868 struct ice_aqc_txsched_elem_data *info)
2870 struct ice_aqc_conf_elem buf;
2871 enum ice_status status;
2875 buf.generic[0] = *info;
2876 /* Parent TEID is reserved field in this aq call */
2877 buf.generic[0].parent_teid = 0;
2878 /* Element type is reserved field in this aq call */
2879 buf.generic[0].data.elem_type = 0;
2880 /* Flags is reserved field in this aq call */
2881 buf.generic[0].data.flags = 0;
2884 /* Configure element node */
2885 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2887 if (status || elem_cfgd != num_elems) {
2888 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2892 /* Config success case */
2893 /* Now update local SW DB */
2894 /* Only copy the data portion of info buffer */
2895 node->info.data = info->data;
2900 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2901 * @hw: pointer to the HW struct
2902 * @node: sched node to configure
2903 * @rl_type: rate limit type CIR, EIR, or shared
2904 * @bw_alloc: BW weight/allocation
2906 * This function configures node element's BW allocation.
2908 static enum ice_status
2909 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2910 enum ice_rl_type rl_type, u16 bw_alloc)
2912 struct ice_aqc_txsched_elem_data buf;
2913 struct ice_aqc_txsched_elem *data;
2914 enum ice_status status;
2918 if (rl_type == ICE_MIN_BW) {
2919 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2920 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2921 } else if (rl_type == ICE_MAX_BW) {
2922 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2923 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2925 return ICE_ERR_PARAM;
2928 /* Configure element */
2929 status = ice_sched_update_elem(hw, node, &buf);
2934 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2935 * @pi: port information structure
2936 * @agg_id: aggregator ID
2937 * @vsi_handle: software VSI handle
2938 * @tc_bitmap: TC bitmap of enabled TC(s)
2940 * Move or associate VSI to a new or default aggregator node.
2943 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2946 ice_bitmap_t bitmap = tc_bitmap;
2947 enum ice_status status;
2949 ice_acquire_lock(&pi->sched_lock);
2950 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2951 (ice_bitmap_t *)&bitmap);
2953 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2954 (ice_bitmap_t *)&bitmap);
2955 ice_release_lock(&pi->sched_lock);
2960 * ice_rm_agg_cfg - remove aggregator configuration
2961 * @pi: port information structure
2962 * @agg_id: aggregator ID
2964 * This function removes aggregator reference to VSI and delete aggregator ID
2965 * info. It removes the aggregator configuration completely.
2967 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
2969 struct ice_sched_agg_info *agg_info;
2970 enum ice_status status = ICE_SUCCESS;
2973 ice_acquire_lock(&pi->sched_lock);
2974 agg_info = ice_get_agg_info(pi->hw, agg_id);
2976 status = ICE_ERR_DOES_NOT_EXIST;
2977 goto exit_ice_rm_agg_cfg;
2980 ice_for_each_traffic_class(tc) {
2981 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
2983 goto exit_ice_rm_agg_cfg;
2986 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
2987 status = ICE_ERR_IN_USE;
2988 goto exit_ice_rm_agg_cfg;
2991 /* Safe to delete entry now */
2992 LIST_DEL(&agg_info->list_entry);
2993 ice_free(pi->hw, agg_info);
2995 /* Remove unused RL profile IDs from HW and SW DB */
2996 ice_sched_rm_unused_rl_prof(pi);
2998 exit_ice_rm_agg_cfg:
2999 ice_release_lock(&pi->sched_lock);
3004 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
3005 * @bw_t_info: bandwidth type information structure
3006 * @bw_alloc: Bandwidth allocation information
3008 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
3012 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3014 bw_t_info->cir_bw.bw_alloc = bw_alloc;
3015 if (bw_t_info->cir_bw.bw_alloc)
3016 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3018 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3022 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
3023 * @bw_t_info: bandwidth type information structure
3024 * @bw_alloc: Bandwidth allocation information
3026 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
3030 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3032 bw_t_info->eir_bw.bw_alloc = bw_alloc;
3033 if (bw_t_info->eir_bw.bw_alloc)
3034 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3036 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3040 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3041 * @pi: port information structure
3042 * @vsi_handle: sw VSI handle
3043 * @tc: traffic class
3044 * @rl_type: rate limit type min or max
3045 * @bw_alloc: Bandwidth allocation information
3047 * Save BW alloc information of VSI type node for post replay use.
3049 static enum ice_status
3050 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3051 enum ice_rl_type rl_type, u16 bw_alloc)
3053 struct ice_vsi_ctx *vsi_ctx;
3055 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3056 return ICE_ERR_PARAM;
3057 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3059 return ICE_ERR_PARAM;
3062 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3066 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3070 return ICE_ERR_PARAM;
3076 * ice_set_clear_cir_bw - set or clear CIR BW
3077 * @bw_t_info: bandwidth type information structure
3078 * @bw: bandwidth in Kbps - Kilo bits per sec
3080 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3083 ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3085 if (bw == ICE_SCHED_DFLT_BW) {
3086 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3087 bw_t_info->cir_bw.bw = 0;
3089 /* Save type of BW information */
3090 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3091 bw_t_info->cir_bw.bw = bw;
3096 * ice_set_clear_eir_bw - set or clear EIR BW
3097 * @bw_t_info: bandwidth type information structure
3098 * @bw: bandwidth in Kbps - Kilo bits per sec
3100 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3103 ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3105 if (bw == ICE_SCHED_DFLT_BW) {
3106 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3107 bw_t_info->eir_bw.bw = 0;
3109 /* EIR BW and Shared BW profiles are mutually exclusive and
3110 * hence only one of them may be set for any given element.
3111 * First clear earlier saved shared BW information.
3113 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3114 bw_t_info->shared_bw = 0;
3115 /* save EIR BW information */
3116 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3117 bw_t_info->eir_bw.bw = bw;
3122 * ice_set_clear_shared_bw - set or clear shared BW
3123 * @bw_t_info: bandwidth type information structure
3124 * @bw: bandwidth in Kbps - Kilo bits per sec
3126 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3129 ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3131 if (bw == ICE_SCHED_DFLT_BW) {
3132 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3133 bw_t_info->shared_bw = 0;
3135 /* EIR BW and Shared BW profiles are mutually exclusive and
3136 * hence only one of them may be set for any given element.
3137 * First clear earlier saved EIR BW information.
3139 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3140 bw_t_info->eir_bw.bw = 0;
3141 /* save shared BW information */
3142 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3143 bw_t_info->shared_bw = bw;
3148 * ice_sched_save_vsi_bw - save VSI node's BW information
3149 * @pi: port information structure
3150 * @vsi_handle: sw VSI handle
3151 * @tc: traffic class
3152 * @rl_type: rate limit type min, max, or shared
3153 * @bw: bandwidth in Kbps - Kilo bits per sec
3155 * Save BW information of VSI type node for post replay use.
3157 static enum ice_status
3158 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3159 enum ice_rl_type rl_type, u32 bw)
3161 struct ice_vsi_ctx *vsi_ctx;
3163 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3164 return ICE_ERR_PARAM;
3165 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3167 return ICE_ERR_PARAM;
3170 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3173 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3176 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3179 return ICE_ERR_PARAM;
3185 * ice_set_clear_prio - set or clear priority information
3186 * @bw_t_info: bandwidth type information structure
3187 * @prio: priority to save
3189 * Save or clear priority (prio) in the passed param bw_t_info.
3192 ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3194 bw_t_info->generic = prio;
3195 if (bw_t_info->generic)
3196 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3198 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3202 * ice_sched_save_vsi_prio - save VSI node's priority information
3203 * @pi: port information structure
3204 * @vsi_handle: Software VSI handle
3205 * @tc: traffic class
3206 * @prio: priority to save
3208 * Save priority information of VSI type node for post replay use.
3210 static enum ice_status
3211 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3214 struct ice_vsi_ctx *vsi_ctx;
3216 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3217 return ICE_ERR_PARAM;
3218 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3220 return ICE_ERR_PARAM;
3221 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3222 return ICE_ERR_PARAM;
3223 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3228 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3229 * @pi: port information structure
3230 * @agg_id: node aggregator ID
3231 * @tc: traffic class
3232 * @rl_type: rate limit type min or max
3233 * @bw_alloc: bandwidth alloc information
3235 * Save BW alloc information of AGG type node for post replay use.
3237 static enum ice_status
3238 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3239 enum ice_rl_type rl_type, u16 bw_alloc)
3241 struct ice_sched_agg_info *agg_info;
3243 agg_info = ice_get_agg_info(pi->hw, agg_id);
3245 return ICE_ERR_PARAM;
3246 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3247 return ICE_ERR_PARAM;
3250 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3253 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3256 return ICE_ERR_PARAM;
3262 * ice_sched_save_agg_bw - save aggregator node's BW information
3263 * @pi: port information structure
3264 * @agg_id: node aggregator ID
3265 * @tc: traffic class
3266 * @rl_type: rate limit type min, max, or shared
3267 * @bw: bandwidth in Kbps - Kilo bits per sec
3269 * Save BW information of AGG type node for post replay use.
3271 static enum ice_status
3272 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3273 enum ice_rl_type rl_type, u32 bw)
3275 struct ice_sched_agg_info *agg_info;
3277 agg_info = ice_get_agg_info(pi->hw, agg_id);
3279 return ICE_ERR_PARAM;
3280 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3281 return ICE_ERR_PARAM;
3284 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3287 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3290 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3293 return ICE_ERR_PARAM;
3299 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3300 * @pi: port information structure
3301 * @vsi_handle: software VSI handle
3302 * @tc: traffic class
3303 * @rl_type: min or max
3304 * @bw: bandwidth in Kbps
3306 * This function configures BW limit of VSI scheduling node based on TC
3310 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3311 enum ice_rl_type rl_type, u32 bw)
3313 enum ice_status status;
3315 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3319 ice_acquire_lock(&pi->sched_lock);
3320 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3321 ice_release_lock(&pi->sched_lock);
3327 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3328 * @pi: port information structure
3329 * @vsi_handle: software VSI handle
3330 * @tc: traffic class
3331 * @rl_type: min or max
3333 * This function configures default BW limit of VSI scheduling node based on TC
3337 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3338 enum ice_rl_type rl_type)
3340 enum ice_status status;
3342 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3347 ice_acquire_lock(&pi->sched_lock);
3348 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3350 ice_release_lock(&pi->sched_lock);
3356 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3357 * @pi: port information structure
3358 * @agg_id: aggregator ID
3359 * @tc: traffic class
3360 * @rl_type: min or max
3361 * @bw: bandwidth in Kbps
3363 * This function applies BW limit to aggregator scheduling node based on TC
3367 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3368 enum ice_rl_type rl_type, u32 bw)
3370 enum ice_status status;
3372 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3375 ice_acquire_lock(&pi->sched_lock);
3376 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3377 ice_release_lock(&pi->sched_lock);
3383 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3384 * @pi: port information structure
3385 * @agg_id: aggregator ID
3386 * @tc: traffic class
3387 * @rl_type: min or max
3389 * This function applies default BW limit to aggregator scheduling node based
3390 * on TC information.
3393 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3394 enum ice_rl_type rl_type)
3396 enum ice_status status;
3398 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3402 ice_acquire_lock(&pi->sched_lock);
3403 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3405 ice_release_lock(&pi->sched_lock);
3411 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3412 * @pi: port information structure
3413 * @vsi_handle: software VSI handle
3414 * @bw: bandwidth in Kbps
3416 * This function Configures shared rate limiter(SRL) of all VSI type nodes
3417 * across all traffic classes for VSI matching handle.
3420 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
3422 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
3426 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3427 * @pi: port information structure
3428 * @vsi_handle: software VSI handle
3430 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3431 * across all traffic classes for VSI matching handle.
3434 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3436 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3441 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3442 * @pi: port information structure
3443 * @agg_id: aggregator ID
3444 * @bw: bandwidth in Kbps
3446 * This function configures the shared rate limiter(SRL) of all aggregator type
3447 * nodes across all traffic classes for aggregator matching agg_id.
3450 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
3452 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
3456 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3457 * @pi: port information structure
3458 * @agg_id: aggregator ID
3460 * This function removes the shared rate limiter(SRL) of all aggregator type
3461 * nodes across all traffic classes for aggregator matching agg_id.
3464 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3466 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
3470 * ice_config_vsi_queue_priority - config VSI queue priority of node
3471 * @pi: port information structure
3472 * @num_qs: number of VSI queues
3473 * @q_ids: queue IDs array
3474 * @q_ids: queue IDs array
3475 * @q_prio: queue priority array
3477 * This function configures the queue node priority (Sibling Priority) of the
3478 * passed in VSI's queue(s) for a given traffic class (TC).
3481 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3484 enum ice_status status = ICE_ERR_PARAM;
3487 ice_acquire_lock(&pi->sched_lock);
3489 for (i = 0; i < num_qs; i++) {
3490 struct ice_sched_node *node;
3492 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3493 if (!node || node->info.data.elem_type !=
3494 ICE_AQC_ELEM_TYPE_LEAF) {
3495 status = ICE_ERR_PARAM;
3498 /* Configure Priority */
3499 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3504 ice_release_lock(&pi->sched_lock);
3509 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3510 * @pi: port information structure
3511 * @agg_id: Aggregator ID
3512 * @num_vsis: number of VSI(s)
3513 * @vsi_handle_arr: array of software VSI handles
3514 * @node_prio: pointer to node priority
3515 * @tc: traffic class
3517 * This function configures the node priority (Sibling Priority) of the
3518 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3521 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3522 u16 num_vsis, u16 *vsi_handle_arr,
3523 u8 *node_prio, u8 tc)
3525 struct ice_sched_agg_vsi_info *agg_vsi_info;
3526 struct ice_sched_node *tc_node, *agg_node;
3527 enum ice_status status = ICE_ERR_PARAM;
3528 struct ice_sched_agg_info *agg_info;
3529 bool agg_id_present = false;
3530 struct ice_hw *hw = pi->hw;
3533 ice_acquire_lock(&pi->sched_lock);
3534 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3536 if (agg_info->agg_id == agg_id) {
3537 agg_id_present = true;
3540 if (!agg_id_present)
3541 goto exit_agg_priority_per_tc;
3543 tc_node = ice_sched_get_tc_node(pi, tc);
3545 goto exit_agg_priority_per_tc;
3547 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3549 goto exit_agg_priority_per_tc;
3551 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3552 goto exit_agg_priority_per_tc;
3554 for (i = 0; i < num_vsis; i++) {
3555 struct ice_sched_node *vsi_node;
3556 bool vsi_handle_valid = false;
3559 status = ICE_ERR_PARAM;
3560 vsi_handle = vsi_handle_arr[i];
3561 if (!ice_is_vsi_valid(hw, vsi_handle))
3562 goto exit_agg_priority_per_tc;
3563 /* Verify child nodes before applying settings */
3564 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3565 ice_sched_agg_vsi_info, list_entry)
3566 if (agg_vsi_info->vsi_handle == vsi_handle) {
3567 /* cppcheck-suppress unreadVariable */
3568 vsi_handle_valid = true;
3572 if (!vsi_handle_valid)
3573 goto exit_agg_priority_per_tc;
3575 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3577 goto exit_agg_priority_per_tc;
3579 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3580 /* Configure Priority */
3581 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3585 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3592 exit_agg_priority_per_tc:
3593 ice_release_lock(&pi->sched_lock);
3598 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3599 * @pi: port information structure
3600 * @vsi_handle: software VSI handle
3601 * @ena_tcmap: enabled TC map
3602 * @rl_type: Rate limit type CIR/EIR
3603 * @bw_alloc: Array of BW alloc
3605 * This function configures the BW allocation of the passed in VSI's
3606 * node(s) for enabled traffic class.
3609 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3610 enum ice_rl_type rl_type, u8 *bw_alloc)
3612 enum ice_status status = ICE_SUCCESS;
3615 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3616 return ICE_ERR_PARAM;
3618 ice_acquire_lock(&pi->sched_lock);
3620 /* Return success if no nodes are present across TC */
3621 ice_for_each_traffic_class(tc) {
3622 struct ice_sched_node *tc_node, *vsi_node;
3624 if (!ice_is_tc_ena(ena_tcmap, tc))
3627 tc_node = ice_sched_get_tc_node(pi, tc);
3631 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3635 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3639 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3640 rl_type, bw_alloc[tc]);
3645 ice_release_lock(&pi->sched_lock);
3650 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3651 * @pi: port information structure
3652 * @agg_id: aggregator ID
3653 * @ena_tcmap: enabled TC map
3654 * @rl_type: rate limit type CIR/EIR
3655 * @bw_alloc: array of BW alloc
3657 * This function configures the BW allocation of passed in aggregator for
3658 * enabled traffic class(s).
3661 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3662 enum ice_rl_type rl_type, u8 *bw_alloc)
3664 struct ice_sched_agg_info *agg_info;
3665 bool agg_id_present = false;
3666 enum ice_status status = ICE_SUCCESS;
3667 struct ice_hw *hw = pi->hw;
3670 ice_acquire_lock(&pi->sched_lock);
3671 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3673 if (agg_info->agg_id == agg_id) {
3674 agg_id_present = true;
3677 if (!agg_id_present) {
3678 status = ICE_ERR_PARAM;
3679 goto exit_cfg_agg_bw_alloc;
3682 /* Return success if no nodes are present across TC */
3683 ice_for_each_traffic_class(tc) {
3684 struct ice_sched_node *tc_node, *agg_node;
3686 if (!ice_is_tc_ena(ena_tcmap, tc))
3689 tc_node = ice_sched_get_tc_node(pi, tc);
3693 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3697 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3701 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3707 exit_cfg_agg_bw_alloc:
3708 ice_release_lock(&pi->sched_lock);
3713 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3714 * @hw: pointer to the HW struct
3715 * @bw: bandwidth in Kbps
3717 * This function calculates the wakeup parameter of RL profile.
3719 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3721 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3725 /* Get the wakeup integer value */
3726 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3727 wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
3728 if (wakeup_int > 63) {
3729 wakeup = (u16)((1 << 15) | wakeup_int);
3731 /* Calculate fraction value up to 4 decimals
3732 * Convert Integer value to a constant multiplier
3734 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3735 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3736 hw->psm_clk_freq, bytes_per_sec);
3738 /* Get Fraction value */
3739 wakeup_f = wakeup_a - wakeup_b;
3741 /* Round up the Fractional value via Ceil(Fractional value) */
3742 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3745 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3746 ICE_RL_PROF_MULTIPLIER);
3747 wakeup |= (u16)(wakeup_int << 9);
3748 wakeup |= (u16)(0x1ff & wakeup_f_int);
3755 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3756 * @hw: pointer to the HW struct
3757 * @bw: bandwidth in Kbps
3758 * @profile: profile parameters to return
3760 * This function converts the BW to profile structure format.
3762 static enum ice_status
3763 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3764 struct ice_aqc_rl_profile_elem *profile)
3766 enum ice_status status = ICE_ERR_PARAM;
3767 s64 bytes_per_sec, ts_rate, mv_tmp;
3773 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3774 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3777 /* Bytes per second from Kbps */
3778 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3780 /* encode is 6 bits but really useful are 5 bits */
3781 for (i = 0; i < 64; i++) {
3782 u64 pow_result = BIT_ULL(i);
3784 ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
3785 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3789 /* Multiplier value */
3790 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3793 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3794 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3796 /* First multiplier value greater than the given
3799 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3808 wm = ice_sched_calc_wakeup(hw, bw);
3809 profile->rl_multiply = CPU_TO_LE16(mv);
3810 profile->wake_up_calc = CPU_TO_LE16(wm);
3811 profile->rl_encode = CPU_TO_LE16(encode);
3812 status = ICE_SUCCESS;
3814 status = ICE_ERR_DOES_NOT_EXIST;
3821 * ice_sched_add_rl_profile - add RL profile
3822 * @pi: port information structure
3823 * @rl_type: type of rate limit BW - min, max, or shared
3824 * @bw: bandwidth in Kbps - Kilo bits per sec
3825 * @layer_num: specifies in which layer to create profile
3827 * This function first checks the existing list for corresponding BW
3828 * parameter. If it exists, it returns the associated profile otherwise
3829 * it creates a new rate limit profile for requested BW, and adds it to
3830 * the HW DB and local list. It returns the new profile or null on error.
3831 * The caller needs to hold the scheduler lock.
3833 static struct ice_aqc_rl_profile_info *
3834 ice_sched_add_rl_profile(struct ice_port_info *pi,
3835 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3837 struct ice_aqc_rl_profile_generic_elem *buf;
3838 struct ice_aqc_rl_profile_info *rl_prof_elem;
3839 u16 profiles_added = 0, num_profiles = 1;
3840 enum ice_status status;
3844 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3848 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3851 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3854 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3863 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3864 ice_aqc_rl_profile_info, list_entry)
3865 if (rl_prof_elem->profile.flags == profile_type &&
3866 rl_prof_elem->bw == bw)
3867 /* Return existing profile ID info */
3868 return rl_prof_elem;
3870 /* Create new profile ID */
3871 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3872 ice_malloc(hw, sizeof(*rl_prof_elem));
3877 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
3878 if (status != ICE_SUCCESS)
3879 goto exit_add_rl_prof;
3881 rl_prof_elem->bw = bw;
3882 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3883 rl_prof_elem->profile.level = layer_num + 1;
3884 rl_prof_elem->profile.flags = profile_type;
3885 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3887 /* Create new entry in HW DB */
3888 buf = (struct ice_aqc_rl_profile_generic_elem *)
3889 &rl_prof_elem->profile;
3890 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3891 &profiles_added, NULL);
3892 if (status || profiles_added != num_profiles)
3893 goto exit_add_rl_prof;
3895 /* Good entry - add in the list */
3896 rl_prof_elem->prof_id_ref = 0;
3897 LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3898 return rl_prof_elem;
3901 ice_free(hw, rl_prof_elem);
3906 * ice_sched_cfg_node_bw_lmt - configure node sched params
3907 * @hw: pointer to the HW struct
3908 * @node: sched node to configure
3909 * @rl_type: rate limit type CIR, EIR, or shared
3910 * @rl_prof_id: rate limit profile ID
3912 * This function configures node element's BW limit.
3914 static enum ice_status
3915 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3916 enum ice_rl_type rl_type, u16 rl_prof_id)
3918 struct ice_aqc_txsched_elem_data buf;
3919 struct ice_aqc_txsched_elem *data;
3925 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3926 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3929 /* EIR BW and Shared BW profiles are mutually exclusive and
3930 * hence only one of them may be set for any given element
3932 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3934 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3935 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3938 /* Check for removing shared BW */
3939 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3940 /* remove shared profile */
3941 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3942 data->srl_id = 0; /* clear SRL field */
3944 /* enable back EIR to default profile */
3945 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3946 data->eir_bw.bw_profile_idx =
3947 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3950 /* EIR BW and Shared BW profiles are mutually exclusive and
3951 * hence only one of them may be set for any given element
3953 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3954 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3955 ICE_SCHED_DFLT_RL_PROF_ID))
3957 /* EIR BW is set to default, disable it */
3958 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3959 /* Okay to enable shared BW now */
3960 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
3961 data->srl_id = CPU_TO_LE16(rl_prof_id);
3964 /* Unknown rate limit type */
3965 return ICE_ERR_PARAM;
3968 /* Configure element */
3969 return ice_sched_update_elem(hw, node, &buf);
3973 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
3975 * @rl_type: rate limit type
3977 * If existing profile matches, it returns the corresponding rate
3978 * limit profile ID, otherwise it returns an invalid ID as error.
3981 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
3982 enum ice_rl_type rl_type)
3984 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
3985 struct ice_aqc_txsched_elem *data;
3987 data = &node->info.data;
3990 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
3991 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
3994 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
3995 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
3998 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3999 rl_prof_id = LE16_TO_CPU(data->srl_id);
4009 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
4010 * @pi: port information structure
4011 * @rl_type: type of rate limit BW - min, max, or shared
4012 * @layer_index: layer index
4014 * This function returns requested profile creation layer.
4017 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
4020 struct ice_hw *hw = pi->hw;
4022 if (layer_index >= hw->num_tx_sched_layers)
4023 return ICE_SCHED_INVAL_LAYER_NUM;
4026 if (hw->layer_info[layer_index].max_cir_rl_profiles)
4030 if (hw->layer_info[layer_index].max_eir_rl_profiles)
4034 /* if current layer doesn't support SRL profile creation
4035 * then try a layer up or down.
4037 if (hw->layer_info[layer_index].max_srl_profiles)
4039 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4040 hw->layer_info[layer_index + 1].max_srl_profiles)
4041 return layer_index + 1;
4042 else if (layer_index > 0 &&
4043 hw->layer_info[layer_index - 1].max_srl_profiles)
4044 return layer_index - 1;
4049 return ICE_SCHED_INVAL_LAYER_NUM;
4053 * ice_sched_get_srl_node - get shared rate limit node
4055 * @srl_layer: shared rate limit layer
4057 * This function returns SRL node to be used for shared rate limit purpose.
4058 * The caller needs to hold scheduler lock.
4060 static struct ice_sched_node *
4061 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4063 if (srl_layer > node->tx_sched_layer)
4064 return node->children[0];
4065 else if (srl_layer < node->tx_sched_layer)
4066 /* Node can't be created without a parent. It will always
4067 * have a valid parent except root node.
4069 return node->parent;
4075 * ice_sched_rm_rl_profile - remove RL profile ID
4076 * @pi: port information structure
4077 * @layer_num: layer number where profiles are saved
4078 * @profile_type: profile type like EIR, CIR, or SRL
4079 * @profile_id: profile ID to remove
4081 * This function removes rate limit profile from layer 'layer_num' of type
4082 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4085 static enum ice_status
4086 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
4089 struct ice_aqc_rl_profile_info *rl_prof_elem;
4090 enum ice_status status = ICE_SUCCESS;
4092 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4093 return ICE_ERR_PARAM;
4094 /* Check the existing list for RL profile */
4095 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
4096 ice_aqc_rl_profile_info, list_entry)
4097 if (rl_prof_elem->profile.flags == profile_type &&
4098 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4100 if (rl_prof_elem->prof_id_ref)
4101 rl_prof_elem->prof_id_ref--;
4103 /* Remove old profile ID from database */
4104 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
4105 if (status && status != ICE_ERR_IN_USE)
4106 ice_debug(pi->hw, ICE_DBG_SCHED,
4107 "Remove rl profile failed\n");
4110 if (status == ICE_ERR_IN_USE)
4111 status = ICE_SUCCESS;
4116 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4117 * @pi: port information structure
4118 * @node: pointer to node structure
4119 * @rl_type: rate limit type min, max, or shared
4120 * @layer_num: layer number where RL profiles are saved
4122 * This function configures node element's BW rate limit profile ID of
4123 * type CIR, EIR, or SRL to default. This function needs to be called
4124 * with the scheduler lock held.
4126 static enum ice_status
4127 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4128 struct ice_sched_node *node,
4129 enum ice_rl_type rl_type, u8 layer_num)
4131 enum ice_status status;
4140 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4141 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4144 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4145 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4148 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4149 /* No SRL is configured for default case */
4150 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4153 return ICE_ERR_PARAM;
4155 /* Save existing RL prof ID for later clean up */
4156 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4157 /* Configure BW scheduling parameters */
4158 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4162 /* Remove stale RL profile ID */
4163 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4164 old_id == ICE_SCHED_INVAL_PROF_ID)
4167 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
4171 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
4172 * @pi: port information structure
4173 * @node: pointer to node structure
4174 * @layer_num: layer number where rate limit profiles are saved
4175 * @rl_type: rate limit type min, max, or shared
4176 * @bw: bandwidth value
4178 * This function prepares node element's bandwidth to SRL or EIR exclusively.
4179 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
4180 * them may be set for any given element. This function needs to be called
4181 * with the scheduler lock held.
4183 static enum ice_status
4184 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
4185 struct ice_sched_node *node,
4186 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
4188 if (rl_type == ICE_SHARED_BW) {
4189 /* SRL node passed in this case, it may be different node */
4190 if (bw == ICE_SCHED_DFLT_BW)
4191 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
4192 * enables EIR to default. EIR is not set in this
4193 * case, so no additional action is required.
4197 /* SRL being configured, set EIR to default here.
4198 * ice_sched_cfg_node_bw_lmt() disables EIR when it
4201 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
4203 } else if (rl_type == ICE_MAX_BW &&
4204 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
4205 /* Remove Shared profile. Set default shared BW call
4206 * removes shared profile for a node.
4208 return ice_sched_set_node_bw_dflt(pi, node,
4216 * ice_sched_set_node_bw - set node's bandwidth
4217 * @pi: port information structure
4219 * @rl_type: rate limit type min, max, or shared
4220 * @bw: bandwidth in Kbps - Kilo bits per sec
4221 * @layer_num: layer number
4223 * This function adds new profile corresponding to requested BW, configures
4224 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4225 * ID from local database. The caller needs to hold scheduler lock.
4227 static enum ice_status
4228 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4229 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4231 struct ice_aqc_rl_profile_info *rl_prof_info;
4232 enum ice_status status = ICE_ERR_PARAM;
4233 struct ice_hw *hw = pi->hw;
4234 u16 old_id, rl_prof_id;
4236 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
4240 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4242 /* Save existing RL prof ID for later clean up */
4243 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4244 /* Configure BW scheduling parameters */
4245 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4249 /* New changes has been applied */
4250 /* Increment the profile ID reference count */
4251 rl_prof_info->prof_id_ref++;
4253 /* Check for old ID removal */
4254 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4255 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4258 return ice_sched_rm_rl_profile(pi, layer_num,
4259 rl_prof_info->profile.flags,
4264 * ice_sched_set_node_bw_lmt - set node's BW limit
4265 * @pi: port information structure
4267 * @rl_type: rate limit type min, max, or shared
4268 * @bw: bandwidth in Kbps - Kilo bits per sec
4270 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4271 * EIR, or SRL. The caller needs to hold scheduler lock.
4273 static enum ice_status
4274 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4275 enum ice_rl_type rl_type, u32 bw)
4277 struct ice_sched_node *cfg_node = node;
4278 enum ice_status status;
4284 return ICE_ERR_PARAM;
4286 /* Remove unused RL profile IDs from HW and SW DB */
4287 ice_sched_rm_unused_rl_prof(pi);
4288 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4289 node->tx_sched_layer);
4290 if (layer_num >= hw->num_tx_sched_layers)
4291 return ICE_ERR_PARAM;
4293 if (rl_type == ICE_SHARED_BW) {
4294 /* SRL node may be different */
4295 cfg_node = ice_sched_get_srl_node(node, layer_num);
4299 /* EIR BW and Shared BW profiles are mutually exclusive and
4300 * hence only one of them may be set for any given element
4302 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
4306 if (bw == ICE_SCHED_DFLT_BW)
4307 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
4309 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
4313 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4314 * @pi: port information structure
4315 * @node: pointer to node structure
4316 * @rl_type: rate limit type min, max, or shared
4318 * This function configures node element's BW rate limit profile ID of
4319 * type CIR, EIR, or SRL to default. This function needs to be called
4320 * with the scheduler lock held.
4322 static enum ice_status
4323 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4324 struct ice_sched_node *node,
4325 enum ice_rl_type rl_type)
4327 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4332 * ice_sched_validate_srl_node - Check node for SRL applicability
4333 * @node: sched node to configure
4334 * @sel_layer: selected SRL layer
4336 * This function checks if the SRL can be applied to a selceted layer node on
4337 * behalf of the requested node (first argument). This function needs to be
4338 * called with scheduler lock held.
4340 static enum ice_status
4341 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4343 /* SRL profiles are not available on all layers. Check if the
4344 * SRL profile can be applied to a node above or below the
4345 * requested node. SRL configuration is possible only if the
4346 * selected layer's node has single child.
4348 if (sel_layer == node->tx_sched_layer ||
4349 ((sel_layer == node->tx_sched_layer + 1) &&
4350 node->num_children == 1) ||
4351 ((sel_layer == node->tx_sched_layer - 1) &&
4352 (node->parent && node->parent->num_children == 1)))
4359 * ice_sched_save_q_bw - save queue node's BW information
4360 * @q_ctx: queue context structure
4361 * @rl_type: rate limit type min, max, or shared
4362 * @bw: bandwidth in Kbps - Kilo bits per sec
4364 * Save BW information of queue type node for post replay use.
4366 static enum ice_status
4367 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4371 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4374 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4377 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4380 return ICE_ERR_PARAM;
4386 * ice_sched_set_q_bw_lmt - sets queue BW limit
4387 * @pi: port information structure
4388 * @vsi_handle: sw VSI handle
4389 * @tc: traffic class
4390 * @q_handle: software queue handle
4391 * @rl_type: min, max, or shared
4392 * @bw: bandwidth in Kbps
4394 * This function sets BW limit of queue scheduling node.
4396 static enum ice_status
4397 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4398 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4400 enum ice_status status = ICE_ERR_PARAM;
4401 struct ice_sched_node *node;
4402 struct ice_q_ctx *q_ctx;
4404 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4405 return ICE_ERR_PARAM;
4406 ice_acquire_lock(&pi->sched_lock);
4407 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4410 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4412 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4416 /* Return error if it is not a leaf node */
4417 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4420 /* SRL bandwidth layer selection */
4421 if (rl_type == ICE_SHARED_BW) {
4422 u8 sel_layer; /* selected layer */
4424 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4425 node->tx_sched_layer);
4426 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4427 status = ICE_ERR_PARAM;
4430 status = ice_sched_validate_srl_node(node, sel_layer);
4435 if (bw == ICE_SCHED_DFLT_BW)
4436 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4438 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4441 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4444 ice_release_lock(&pi->sched_lock);
4449 * ice_cfg_q_bw_lmt - configure queue BW limit
4450 * @pi: port information structure
4451 * @vsi_handle: sw VSI handle
4452 * @tc: traffic class
4453 * @q_handle: software queue handle
4454 * @rl_type: min, max, or shared
4455 * @bw: bandwidth in Kbps
4457 * This function configures BW limit of queue scheduling node.
4460 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4461 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4463 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4468 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4469 * @pi: port information structure
4470 * @vsi_handle: sw VSI handle
4471 * @tc: traffic class
4472 * @q_handle: software queue handle
4473 * @rl_type: min, max, or shared
4475 * This function configures BW default limit of queue scheduling node.
4478 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4479 u16 q_handle, enum ice_rl_type rl_type)
4481 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4486 * ice_sched_save_tc_node_bw - save TC node BW limit
4487 * @pi: port information structure
4489 * @rl_type: min or max
4490 * @bw: bandwidth in Kbps
4492 * This function saves the modified values of bandwidth settings for later
4493 * replay purpose (restore) after reset.
4495 static enum ice_status
4496 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4497 enum ice_rl_type rl_type, u32 bw)
4499 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4500 return ICE_ERR_PARAM;
4503 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4506 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4509 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4512 return ICE_ERR_PARAM;
4518 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4519 * @pi: port information structure
4521 * @rl_type: min or max
4522 * @bw: bandwidth in Kbps
4524 * This function configures bandwidth limit of TC node.
4526 static enum ice_status
4527 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4528 enum ice_rl_type rl_type, u32 bw)
4530 enum ice_status status = ICE_ERR_PARAM;
4531 struct ice_sched_node *tc_node;
4533 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4535 ice_acquire_lock(&pi->sched_lock);
4536 tc_node = ice_sched_get_tc_node(pi, tc);
4538 goto exit_set_tc_node_bw;
4539 if (bw == ICE_SCHED_DFLT_BW)
4540 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4542 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4544 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4546 exit_set_tc_node_bw:
4547 ice_release_lock(&pi->sched_lock);
4552 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4553 * @pi: port information structure
4555 * @rl_type: min or max
4556 * @bw: bandwidth in Kbps
4558 * This function configures BW limit of TC node.
4559 * Note: The minimum guaranteed reservation is done via DCBX.
4562 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4563 enum ice_rl_type rl_type, u32 bw)
4565 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4569 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4570 * @pi: port information structure
4572 * @rl_type: min or max
4574 * This function configures BW default limit of TC node.
4577 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4578 enum ice_rl_type rl_type)
4580 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4584 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4585 * @pi: port information structure
4586 * @tc: traffic class
4587 * @rl_type: rate limit type min or max
4588 * @bw_alloc: Bandwidth allocation information
4590 * Save BW alloc information of VSI type node for post replay use.
4592 static enum ice_status
4593 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4594 enum ice_rl_type rl_type, u16 bw_alloc)
4596 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4597 return ICE_ERR_PARAM;
4600 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4604 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4608 return ICE_ERR_PARAM;
4614 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4615 * @pi: port information structure
4617 * @rl_type: min or max
4618 * @bw_alloc: bandwidth alloc
4620 * This function configures bandwidth alloc of TC node, also saves the
4621 * changed settings for replay purpose, and return success if it succeeds
4622 * in modifying bandwidth alloc setting.
4624 static enum ice_status
4625 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4626 enum ice_rl_type rl_type, u8 bw_alloc)
4628 enum ice_status status = ICE_ERR_PARAM;
4629 struct ice_sched_node *tc_node;
4631 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4633 ice_acquire_lock(&pi->sched_lock);
4634 tc_node = ice_sched_get_tc_node(pi, tc);
4636 goto exit_set_tc_node_bw_alloc;
4637 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4640 goto exit_set_tc_node_bw_alloc;
4641 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4643 exit_set_tc_node_bw_alloc:
4644 ice_release_lock(&pi->sched_lock);
4649 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4650 * @pi: port information structure
4652 * @rl_type: min or max
4653 * @bw_alloc: bandwidth alloc
4655 * This function configures BW limit of TC node.
4656 * Note: The minimum guaranteed reservation is done via DCBX.
4659 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4660 enum ice_rl_type rl_type, u8 bw_alloc)
4662 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4666 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4667 * @pi: port information structure
4668 * @vsi_handle: software VSI handle
4670 * This function retrieves the aggregator ID based on VSI ID and TC,
4671 * and sets node's BW limit to default. This function needs to be
4672 * called with the scheduler lock held.
4675 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4677 struct ice_vsi_ctx *vsi_ctx;
4678 enum ice_status status = ICE_SUCCESS;
4681 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4682 return ICE_ERR_PARAM;
4683 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4685 return ICE_ERR_PARAM;
4687 ice_for_each_traffic_class(tc) {
4688 struct ice_sched_node *node;
4690 node = vsi_ctx->sched.ag_node[tc];
4694 /* Set min profile to default */
4695 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4699 /* Set max profile to default */
4700 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4704 /* Remove shared profile, if there is one */
4705 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4715 * ice_sched_get_node_by_id_type - get node from ID type
4716 * @pi: port information structure
4718 * @agg_type: type of aggregator
4719 * @tc: traffic class
4721 * This function returns node identified by ID of type aggregator, and
4722 * based on traffic class (TC). This function needs to be called with
4723 * the scheduler lock held.
4725 static struct ice_sched_node *
4726 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4727 enum ice_agg_type agg_type, u8 tc)
4729 struct ice_sched_node *node = NULL;
4730 struct ice_sched_node *child_node;
4733 case ICE_AGG_TYPE_VSI: {
4734 struct ice_vsi_ctx *vsi_ctx;
4735 u16 vsi_handle = (u16)id;
4737 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4739 /* Get sched_vsi_info */
4740 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4743 node = vsi_ctx->sched.vsi_node[tc];
4747 case ICE_AGG_TYPE_AGG: {
4748 struct ice_sched_node *tc_node;
4750 tc_node = ice_sched_get_tc_node(pi, tc);
4752 node = ice_sched_get_agg_node(pi, tc_node, id);
4756 case ICE_AGG_TYPE_Q:
4757 /* The current implementation allows single queue to modify */
4758 node = ice_sched_get_node(pi, id);
4761 case ICE_AGG_TYPE_QG:
4762 /* The current implementation allows single qg to modify */
4763 child_node = ice_sched_get_node(pi, id);
4766 node = child_node->parent;
4777 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4778 * @pi: port information structure
4779 * @id: ID (software VSI handle or AGG ID)
4780 * @agg_type: aggregator type (VSI or AGG type node)
4781 * @tc: traffic class
4782 * @rl_type: min or max
4783 * @bw: bandwidth in Kbps
4785 * This function sets BW limit of VSI or Aggregator scheduling node
4786 * based on TC information from passed in argument BW.
4789 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4790 enum ice_agg_type agg_type, u8 tc,
4791 enum ice_rl_type rl_type, u32 bw)
4793 enum ice_status status = ICE_ERR_PARAM;
4794 struct ice_sched_node *node;
4799 if (rl_type == ICE_UNKNOWN_BW)
4802 ice_acquire_lock(&pi->sched_lock);
4803 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4805 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4806 goto exit_set_node_bw_lmt_per_tc;
4808 if (bw == ICE_SCHED_DFLT_BW)
4809 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4811 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4813 exit_set_node_bw_lmt_per_tc:
4814 ice_release_lock(&pi->sched_lock);
4819 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4820 * @pi: port information structure
4821 * @vsi_handle: software VSI handle
4823 * This function validates SRL node of the VSI node if available SRL layer is
4824 * different than the VSI node layer on all TC(s).This function needs to be
4825 * called with scheduler lock held.
4827 static enum ice_status
4828 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4830 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4833 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4834 return ICE_ERR_PARAM;
4836 /* Return success if no nodes are present across TC */
4837 ice_for_each_traffic_class(tc) {
4838 struct ice_sched_node *tc_node, *vsi_node;
4839 enum ice_rl_type rl_type = ICE_SHARED_BW;
4840 enum ice_status status;
4842 tc_node = ice_sched_get_tc_node(pi, tc);
4846 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4850 /* SRL bandwidth layer selection */
4851 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4852 u8 node_layer = vsi_node->tx_sched_layer;
4855 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4857 if (layer_num >= pi->hw->num_tx_sched_layers)
4858 return ICE_ERR_PARAM;
4859 sel_layer = layer_num;
4862 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4870 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4871 * @pi: port information structure
4872 * @vsi_handle: software VSI handle
4873 * @bw: bandwidth in Kbps
4875 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4876 * across all traffic classes for VSI matching handle. When BW value of
4877 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4880 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4883 enum ice_status status = ICE_SUCCESS;
4887 return ICE_ERR_PARAM;
4889 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4890 return ICE_ERR_PARAM;
4892 ice_acquire_lock(&pi->sched_lock);
4893 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4895 goto exit_set_vsi_bw_shared_lmt;
4896 /* Return success if no nodes are present across TC */
4897 ice_for_each_traffic_class(tc) {
4898 struct ice_sched_node *tc_node, *vsi_node;
4899 enum ice_rl_type rl_type = ICE_SHARED_BW;
4901 tc_node = ice_sched_get_tc_node(pi, tc);
4905 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4909 if (bw == ICE_SCHED_DFLT_BW)
4910 /* It removes existing SRL from the node */
4911 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4914 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4918 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4923 exit_set_vsi_bw_shared_lmt:
4924 ice_release_lock(&pi->sched_lock);
4929 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4930 * @pi: port information structure
4931 * @agg_id: aggregator ID
4933 * This function validates SRL node of the AGG node if available SRL layer is
4934 * different than the AGG node layer on all TC(s).This function needs to be
4935 * called with scheduler lock held.
4937 static enum ice_status
4938 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4940 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4941 struct ice_sched_agg_info *agg_info;
4942 bool agg_id_present = false;
4943 enum ice_status status = ICE_SUCCESS;
4946 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4948 if (agg_info->agg_id == agg_id) {
4949 agg_id_present = true;
4952 if (!agg_id_present)
4953 return ICE_ERR_PARAM;
4954 /* Return success if no nodes are present across TC */
4955 ice_for_each_traffic_class(tc) {
4956 struct ice_sched_node *tc_node, *agg_node;
4957 enum ice_rl_type rl_type = ICE_SHARED_BW;
4959 tc_node = ice_sched_get_tc_node(pi, tc);
4963 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
4966 /* SRL bandwidth layer selection */
4967 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4968 u8 node_layer = agg_node->tx_sched_layer;
4971 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4973 if (layer_num >= pi->hw->num_tx_sched_layers)
4974 return ICE_ERR_PARAM;
4975 sel_layer = layer_num;
4978 status = ice_sched_validate_srl_node(agg_node, sel_layer);
4986 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
4987 * @pi: port information structure
4988 * @agg_id: aggregator ID
4989 * @bw: bandwidth in Kbps
4991 * This function configures the shared rate limiter(SRL) of all aggregator type
4992 * nodes across all traffic classes for aggregator matching agg_id. When
4993 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
4997 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
4999 struct ice_sched_agg_info *agg_info;
5000 struct ice_sched_agg_info *tmp;
5001 bool agg_id_present = false;
5002 enum ice_status status = ICE_SUCCESS;
5006 return ICE_ERR_PARAM;
5008 ice_acquire_lock(&pi->sched_lock);
5009 status = ice_sched_validate_agg_srl_node(pi, agg_id);
5011 goto exit_agg_bw_shared_lmt;
5013 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
5014 ice_sched_agg_info, list_entry)
5015 if (agg_info->agg_id == agg_id) {
5016 agg_id_present = true;
5020 if (!agg_id_present) {
5021 status = ICE_ERR_PARAM;
5022 goto exit_agg_bw_shared_lmt;
5025 /* Return success if no nodes are present across TC */
5026 ice_for_each_traffic_class(tc) {
5027 enum ice_rl_type rl_type = ICE_SHARED_BW;
5028 struct ice_sched_node *tc_node, *agg_node;
5030 tc_node = ice_sched_get_tc_node(pi, tc);
5034 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5038 if (bw == ICE_SCHED_DFLT_BW)
5039 /* It removes existing SRL from the node */
5040 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
5043 status = ice_sched_set_node_bw_lmt(pi, agg_node,
5047 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5052 exit_agg_bw_shared_lmt:
5053 ice_release_lock(&pi->sched_lock);
5058 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5059 * @pi: port information structure
5060 * @node: sched node to configure
5061 * @priority: sibling priority
5063 * This function configures node element's sibling priority only. This
5064 * function needs to be called with scheduler lock held.
5067 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5068 struct ice_sched_node *node, u8 priority)
5070 struct ice_aqc_txsched_elem_data buf;
5071 struct ice_aqc_txsched_elem *data;
5072 struct ice_hw *hw = pi->hw;
5073 enum ice_status status;
5076 return ICE_ERR_PARAM;
5079 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5080 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5081 ICE_AQC_ELEM_GENERIC_PRIO_M;
5082 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5083 data->generic |= priority;
5085 /* Configure element */
5086 status = ice_sched_update_elem(hw, node, &buf);
5091 * ice_cfg_rl_burst_size - Set burst size value
5092 * @hw: pointer to the HW struct
5093 * @bytes: burst size in bytes
5095 * This function configures/set the burst size to requested new value. The new
5096 * burst size value is used for future rate limit calls. It doesn't change the
5097 * existing or previously created RL profiles.
5099 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5101 u16 burst_size_to_prog;
5103 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5104 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5105 return ICE_ERR_PARAM;
5106 if (ice_round_to_num(bytes, 64) <=
5107 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5108 /* 64 byte granularity case */
5109 /* Disable MSB granularity bit */
5110 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5111 /* round number to nearest 64 byte granularity */
5112 bytes = ice_round_to_num(bytes, 64);
5113 /* The value is in 64 byte chunks */
5114 burst_size_to_prog |= (u16)(bytes / 64);
5116 /* k bytes granularity case */
5117 /* Enable MSB granularity bit */
5118 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5119 /* round number to nearest 1024 granularity */
5120 bytes = ice_round_to_num(bytes, 1024);
5121 /* check rounding doesn't go beyond allowed */
5122 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5123 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5124 /* The value is in k bytes */
5125 burst_size_to_prog |= (u16)(bytes / 1024);
5127 hw->max_burst_size = burst_size_to_prog;
5132 * ice_sched_replay_node_prio - re-configure node priority
5133 * @hw: pointer to the HW struct
5134 * @node: sched node to configure
5135 * @priority: priority value
5137 * This function configures node element's priority value. It
5138 * needs to be called with scheduler lock held.
5140 static enum ice_status
5141 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5144 struct ice_aqc_txsched_elem_data buf;
5145 struct ice_aqc_txsched_elem *data;
5146 enum ice_status status;
5150 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5151 data->generic = priority;
5153 /* Configure element */
5154 status = ice_sched_update_elem(hw, node, &buf);
5159 * ice_sched_replay_node_bw - replay node(s) BW
5160 * @hw: pointer to the HW struct
5161 * @node: sched node to configure
5162 * @bw_t_info: BW type information
5164 * This function restores node's BW from bw_t_info. The caller needs
5165 * to hold the scheduler lock.
5167 static enum ice_status
5168 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5169 struct ice_bw_type_info *bw_t_info)
5171 struct ice_port_info *pi = hw->port_info;
5172 enum ice_status status = ICE_ERR_PARAM;
5177 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5179 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5180 status = ice_sched_replay_node_prio(hw, node,
5181 bw_t_info->generic);
5185 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5186 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5187 bw_t_info->cir_bw.bw);
5191 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5192 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5193 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5198 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5199 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5200 bw_t_info->eir_bw.bw);
5204 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5205 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5206 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5211 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5212 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5213 bw_t_info->shared_bw);
5218 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5219 * @hw: pointer to the HW struct
5220 * @agg_info: aggregator data structure
5222 * This function re-creates aggregator type nodes. The caller needs to hold
5223 * the scheduler lock.
5225 static enum ice_status
5226 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5228 struct ice_sched_node *tc_node, *agg_node;
5229 enum ice_status status = ICE_SUCCESS;
5233 return ICE_ERR_PARAM;
5234 ice_for_each_traffic_class(tc) {
5235 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5238 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5240 status = ICE_ERR_PARAM;
5243 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5246 status = ICE_ERR_PARAM;
5249 status = ice_sched_replay_node_bw(hw, agg_node,
5250 &agg_info->bw_t_info[tc]);
5258 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5259 * @pi: port info struct
5260 * @tc_bitmap: 8 bits TC bitmap to check
5261 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5263 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5264 * may be missing, it returns enabled TCs. This function needs to be called with
5265 * scheduler lock held.
5268 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5269 ice_bitmap_t *ena_tc_bitmap)
5273 /* Some TC(s) may be missing after reset, adjust for replay */
5274 ice_for_each_traffic_class(tc)
5275 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5276 (ice_sched_get_tc_node(pi, tc)))
5277 ice_set_bit(tc, ena_tc_bitmap);
5281 * ice_sched_replay_agg - recreate aggregator node(s)
5282 * @hw: pointer to the HW struct
5284 * This function recreate aggregator type nodes which are not replayed earlier.
5285 * It also replay aggregator BW information. These aggregator nodes are not
5286 * associated with VSI type node yet.
5288 void ice_sched_replay_agg(struct ice_hw *hw)
5290 struct ice_port_info *pi = hw->port_info;
5291 struct ice_sched_agg_info *agg_info;
5293 ice_acquire_lock(&pi->sched_lock);
5294 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5296 /* replay aggregator (re-create aggregator node) */
5297 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5298 agg_info->replay_tc_bitmap,
5299 ICE_MAX_TRAFFIC_CLASS)) {
5300 ice_declare_bitmap(replay_bitmap,
5301 ICE_MAX_TRAFFIC_CLASS);
5302 enum ice_status status;
5304 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5305 ice_sched_get_ena_tc_bitmap(pi,
5306 agg_info->replay_tc_bitmap,
5308 status = ice_sched_cfg_agg(hw->port_info,
5313 ice_info(hw, "Replay agg id[%d] failed\n",
5315 /* Move on to next one */
5318 /* Replay aggregator node BW (restore aggregator BW) */
5319 status = ice_sched_replay_agg_bw(hw, agg_info);
5321 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5325 ice_release_lock(&pi->sched_lock);
5329 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5330 * @hw: pointer to the HW struct
5332 * This function initialize aggregator(s) TC bitmap to zero. A required
5333 * preinit step for replaying aggregators.
5335 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5337 struct ice_port_info *pi = hw->port_info;
5338 struct ice_sched_agg_info *agg_info;
5340 ice_acquire_lock(&pi->sched_lock);
5341 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5343 struct ice_sched_agg_vsi_info *agg_vsi_info;
5345 agg_info->tc_bitmap[0] = 0;
5346 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5347 ice_sched_agg_vsi_info, list_entry)
5348 agg_vsi_info->tc_bitmap[0] = 0;
5350 ice_release_lock(&pi->sched_lock);
5354 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5355 * @pi: port information structure
5357 * This function replay TC nodes.
5360 ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5362 enum ice_status status = ICE_SUCCESS;
5366 return ICE_ERR_PARAM;
5367 ice_acquire_lock(&pi->sched_lock);
5368 ice_for_each_traffic_class(tc) {
5369 struct ice_sched_node *tc_node;
5371 tc_node = ice_sched_get_tc_node(pi, tc);
5373 continue; /* TC not present */
5374 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5375 &pi->tc_node_bw_t_info[tc]);
5379 ice_release_lock(&pi->sched_lock);
5384 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5385 * @hw: pointer to the HW struct
5386 * @vsi_handle: software VSI handle
5387 * @tc_bitmap: 8 bits TC bitmap
5389 * This function replays VSI type nodes bandwidth. This function needs to be
5390 * called with scheduler lock held.
5392 static enum ice_status
5393 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5394 ice_bitmap_t *tc_bitmap)
5396 struct ice_sched_node *vsi_node, *tc_node;
5397 struct ice_port_info *pi = hw->port_info;
5398 struct ice_bw_type_info *bw_t_info;
5399 struct ice_vsi_ctx *vsi_ctx;
5400 enum ice_status status = ICE_SUCCESS;
5403 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5405 return ICE_ERR_PARAM;
5406 ice_for_each_traffic_class(tc) {
5407 if (!ice_is_tc_ena(*tc_bitmap, tc))
5409 tc_node = ice_sched_get_tc_node(pi, tc);
5412 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5415 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5416 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5424 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5425 * @hw: pointer to the HW struct
5426 * @vsi_handle: software VSI handle
5428 * This function replays aggregator node, VSI to aggregator type nodes, and
5429 * their node bandwidth information. This function needs to be called with
5430 * scheduler lock held.
5432 static enum ice_status
5433 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5435 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5436 struct ice_sched_agg_vsi_info *agg_vsi_info;
5437 struct ice_port_info *pi = hw->port_info;
5438 struct ice_sched_agg_info *agg_info;
5439 enum ice_status status;
5441 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5442 if (!ice_is_vsi_valid(hw, vsi_handle))
5443 return ICE_ERR_PARAM;
5444 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5446 return ICE_SUCCESS; /* Not present in list - default Agg case */
5447 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5449 return ICE_SUCCESS; /* Not present in list - default Agg case */
5450 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5452 /* Replay aggregator node associated to vsi_handle */
5453 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5454 ICE_AGG_TYPE_AGG, replay_bitmap);
5457 /* Replay aggregator node BW (restore aggregator BW) */
5458 status = ice_sched_replay_agg_bw(hw, agg_info);
5462 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5463 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5465 /* Move this VSI (vsi_handle) to above aggregator */
5466 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5470 /* Replay VSI BW (restore VSI BW) */
5471 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5472 agg_vsi_info->tc_bitmap);
5476 * ice_replay_vsi_agg - replay VSI to aggregator node
5477 * @hw: pointer to the HW struct
5478 * @vsi_handle: software VSI handle
5480 * This function replays association of VSI to aggregator type nodes, and
5481 * node bandwidth information.
5484 ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5486 struct ice_port_info *pi = hw->port_info;
5487 enum ice_status status;
5489 ice_acquire_lock(&pi->sched_lock);
5490 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5491 ice_release_lock(&pi->sched_lock);
5496 * ice_sched_replay_q_bw - replay queue type node BW
5497 * @pi: port information structure
5498 * @q_ctx: queue context structure
5500 * This function replays queue type node bandwidth. This function needs to be
5501 * called with scheduler lock held.
5504 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5506 struct ice_sched_node *q_node;
5508 /* Following also checks the presence of node in tree */
5509 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5511 return ICE_ERR_PARAM;
5512 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);