1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2020 Intel Corporation
8 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
9 * @pi: port information structure
10 * @info: Scheduler element information from firmware
12 * This function inserts the root node of the scheduling tree topology
15 static enum ice_status
16 ice_sched_add_root_node(struct ice_port_info *pi,
17 struct ice_aqc_txsched_elem_data *info)
19 struct ice_sched_node *root;
27 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
29 return ICE_ERR_NO_MEMORY;
31 /* coverity[suspicious_sizeof] */
32 root->children = (struct ice_sched_node **)
33 ice_calloc(hw, hw->max_children[0], sizeof(*root));
34 if (!root->children) {
36 return ICE_ERR_NO_MEMORY;
39 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
45 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
46 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
47 * @teid: node TEID to search
49 * This function searches for a node matching the TEID in the scheduling tree
50 * from the SW DB. The search is recursive and is restricted by the number of
51 * layers it has searched through; stopping at the max supported layer.
53 * This function needs to be called when holding the port_info->sched_lock
55 struct ice_sched_node *
56 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
60 /* The TEID is same as that of the start_node */
61 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
64 /* The node has no children or is at the max layer */
65 if (!start_node->num_children ||
66 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
67 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
70 /* Check if TEID matches to any of the children nodes */
71 for (i = 0; i < start_node->num_children; i++)
72 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
73 return start_node->children[i];
75 /* Search within each child's sub-tree */
76 for (i = 0; i < start_node->num_children; i++) {
77 struct ice_sched_node *tmp;
79 tmp = ice_sched_find_node_by_teid(start_node->children[i],
89 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
90 * @hw: pointer to the HW struct
91 * @cmd_opc: cmd opcode
92 * @elems_req: number of elements to request
93 * @buf: pointer to buffer
94 * @buf_size: buffer size in bytes
95 * @elems_resp: returns total number of elements response
96 * @cd: pointer to command details structure or NULL
98 * This function sends a scheduling elements cmd (cmd_opc)
100 static enum ice_status
101 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
102 u16 elems_req, void *buf, u16 buf_size,
103 u16 *elems_resp, struct ice_sq_cd *cd)
105 struct ice_aqc_sched_elem_cmd *cmd;
106 struct ice_aq_desc desc;
107 enum ice_status status;
109 cmd = &desc.params.sched_elem_cmd;
110 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
111 cmd->num_elem_req = CPU_TO_LE16(elems_req);
112 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
113 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
114 if (!status && elems_resp)
115 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
121 * ice_aq_query_sched_elems - query scheduler elements
122 * @hw: pointer to the HW struct
123 * @elems_req: number of elements to query
124 * @buf: pointer to buffer
125 * @buf_size: buffer size in bytes
126 * @elems_ret: returns total number of elements returned
127 * @cd: pointer to command details structure or NULL
129 * Query scheduling elements (0x0404)
132 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
133 struct ice_aqc_get_elem *buf, u16 buf_size,
134 u16 *elems_ret, struct ice_sq_cd *cd)
136 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
137 elems_req, (void *)buf, buf_size,
142 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
143 * @pi: port information structure
144 * @layer: Scheduler layer of the node
145 * @info: Scheduler element information from firmware
147 * This function inserts a scheduler node to the SW DB.
150 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
151 struct ice_aqc_txsched_elem_data *info)
153 struct ice_sched_node *parent;
154 struct ice_aqc_get_elem elem;
155 struct ice_sched_node *node;
156 enum ice_status status;
160 return ICE_ERR_PARAM;
164 /* A valid parent node should be there */
165 parent = ice_sched_find_node_by_teid(pi->root,
166 LE32_TO_CPU(info->parent_teid));
168 ice_debug(hw, ICE_DBG_SCHED,
169 "Parent Node not found for parent_teid=0x%x\n",
170 LE32_TO_CPU(info->parent_teid));
171 return ICE_ERR_PARAM;
174 /* query the current node information from FW before adding it
177 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
180 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
182 return ICE_ERR_NO_MEMORY;
183 if (hw->max_children[layer]) {
184 /* coverity[suspicious_sizeof] */
185 node->children = (struct ice_sched_node **)
186 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
187 if (!node->children) {
189 return ICE_ERR_NO_MEMORY;
194 node->parent = parent;
195 node->tx_sched_layer = layer;
196 parent->children[parent->num_children++] = node;
197 node->info = elem.generic[0];
202 * ice_aq_delete_sched_elems - delete scheduler elements
203 * @hw: pointer to the HW struct
204 * @grps_req: number of groups to delete
205 * @buf: pointer to buffer
206 * @buf_size: buffer size in bytes
207 * @grps_del: returns total number of elements deleted
208 * @cd: pointer to command details structure or NULL
210 * Delete scheduling elements (0x040F)
212 static enum ice_status
213 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
214 struct ice_aqc_delete_elem *buf, u16 buf_size,
215 u16 *grps_del, struct ice_sq_cd *cd)
217 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
218 grps_req, (void *)buf, buf_size,
223 * ice_sched_remove_elems - remove nodes from HW
224 * @hw: pointer to the HW struct
225 * @parent: pointer to the parent node
226 * @num_nodes: number of nodes
227 * @node_teids: array of node teids to be deleted
229 * This function remove nodes from HW
231 static enum ice_status
232 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
233 u16 num_nodes, u32 *node_teids)
235 struct ice_aqc_delete_elem *buf;
236 u16 i, num_groups_removed = 0;
237 enum ice_status status;
240 buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
241 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
243 return ICE_ERR_NO_MEMORY;
245 buf->hdr.parent_teid = parent->info.node_teid;
246 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
247 for (i = 0; i < num_nodes; i++)
248 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
250 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
251 &num_groups_removed, NULL);
252 if (status != ICE_SUCCESS || num_groups_removed != 1)
253 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
254 hw->adminq.sq_last_status);
261 * ice_sched_get_first_node - get the first node of the given layer
262 * @pi: port information structure
263 * @parent: pointer the base node of the subtree
264 * @layer: layer number
266 * This function retrieves the first node of the given layer from the subtree
268 static struct ice_sched_node *
269 ice_sched_get_first_node(struct ice_port_info *pi,
270 struct ice_sched_node *parent, u8 layer)
272 return pi->sib_head[parent->tc_num][layer];
276 * ice_sched_get_tc_node - get pointer to TC node
277 * @pi: port information structure
280 * This function returns the TC node pointer
282 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
286 if (!pi || !pi->root)
288 for (i = 0; i < pi->root->num_children; i++)
289 if (pi->root->children[i]->tc_num == tc)
290 return pi->root->children[i];
295 * ice_free_sched_node - Free a Tx scheduler node from SW DB
296 * @pi: port information structure
297 * @node: pointer to the ice_sched_node struct
299 * This function frees up a node from SW DB as well as from HW
301 * This function needs to be called with the port_info->sched_lock held
303 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
305 struct ice_sched_node *parent;
306 struct ice_hw *hw = pi->hw;
309 /* Free the children before freeing up the parent node
310 * The parent array is updated below and that shifts the nodes
311 * in the array. So always pick the first child if num children > 0
313 while (node->num_children)
314 ice_free_sched_node(pi, node->children[0]);
316 /* Leaf, TC and root nodes can't be deleted by SW */
317 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
321 u32 teid = LE32_TO_CPU(node->info.node_teid);
323 ice_sched_remove_elems(hw, node->parent, 1, &teid);
325 parent = node->parent;
326 /* root has no parent */
328 struct ice_sched_node *p;
330 /* update the parent */
331 for (i = 0; i < parent->num_children; i++)
332 if (parent->children[i] == node) {
333 for (j = i + 1; j < parent->num_children; j++)
334 parent->children[j - 1] =
336 parent->num_children--;
340 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
342 if (p->sibling == node) {
343 p->sibling = node->sibling;
349 /* update the sibling head if head is getting removed */
350 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
351 pi->sib_head[node->tc_num][node->tx_sched_layer] =
355 /* leaf nodes have no children */
357 ice_free(hw, node->children);
362 * ice_aq_get_dflt_topo - gets default scheduler topology
363 * @hw: pointer to the HW struct
364 * @lport: logical port number
365 * @buf: pointer to buffer
366 * @buf_size: buffer size in bytes
367 * @num_branches: returns total number of queue to port branches
368 * @cd: pointer to command details structure or NULL
370 * Get default scheduler topology (0x400)
372 static enum ice_status
373 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
374 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
375 u8 *num_branches, struct ice_sq_cd *cd)
377 struct ice_aqc_get_topo *cmd;
378 struct ice_aq_desc desc;
379 enum ice_status status;
381 cmd = &desc.params.get_topo;
382 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
383 cmd->port_num = lport;
384 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
385 if (!status && num_branches)
386 *num_branches = cmd->num_branches;
392 * ice_aq_add_sched_elems - adds scheduling element
393 * @hw: pointer to the HW struct
394 * @grps_req: the number of groups that are requested to be added
395 * @buf: pointer to buffer
396 * @buf_size: buffer size in bytes
397 * @grps_added: returns total number of groups added
398 * @cd: pointer to command details structure or NULL
400 * Add scheduling elements (0x0401)
402 static enum ice_status
403 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
404 struct ice_aqc_add_elem *buf, u16 buf_size,
405 u16 *grps_added, struct ice_sq_cd *cd)
407 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
408 grps_req, (void *)buf, buf_size,
413 * ice_aq_cfg_sched_elems - configures scheduler elements
414 * @hw: pointer to the HW struct
415 * @elems_req: number of elements to configure
416 * @buf: pointer to buffer
417 * @buf_size: buffer size in bytes
418 * @elems_cfgd: returns total number of elements configured
419 * @cd: pointer to command details structure or NULL
421 * Configure scheduling elements (0x0403)
423 static enum ice_status
424 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
425 struct ice_aqc_conf_elem *buf, u16 buf_size,
426 u16 *elems_cfgd, struct ice_sq_cd *cd)
428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
429 elems_req, (void *)buf, buf_size,
434 * ice_aq_move_sched_elems - move scheduler elements
435 * @hw: pointer to the HW struct
436 * @grps_req: number of groups to move
437 * @buf: pointer to buffer
438 * @buf_size: buffer size in bytes
439 * @grps_movd: returns total number of groups moved
440 * @cd: pointer to command details structure or NULL
442 * Move scheduling elements (0x0408)
444 static enum ice_status
445 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
446 struct ice_aqc_move_elem *buf, u16 buf_size,
447 u16 *grps_movd, struct ice_sq_cd *cd)
449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
450 grps_req, (void *)buf, buf_size,
455 * ice_aq_suspend_sched_elems - suspend scheduler elements
456 * @hw: pointer to the HW struct
457 * @elems_req: number of elements to suspend
458 * @buf: pointer to buffer
459 * @buf_size: buffer size in bytes
460 * @elems_ret: returns total number of elements suspended
461 * @cd: pointer to command details structure or NULL
463 * Suspend scheduling elements (0x0409)
465 static enum ice_status
466 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
467 struct ice_aqc_suspend_resume_elem *buf,
468 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
470 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
471 elems_req, (void *)buf, buf_size,
476 * ice_aq_resume_sched_elems - resume scheduler elements
477 * @hw: pointer to the HW struct
478 * @elems_req: number of elements to resume
479 * @buf: pointer to buffer
480 * @buf_size: buffer size in bytes
481 * @elems_ret: returns total number of elements resumed
482 * @cd: pointer to command details structure or NULL
484 * resume scheduling elements (0x040A)
486 static enum ice_status
487 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
488 struct ice_aqc_suspend_resume_elem *buf,
489 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
491 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
492 elems_req, (void *)buf, buf_size,
497 * ice_aq_query_sched_res - query scheduler resource
498 * @hw: pointer to the HW struct
499 * @buf_size: buffer size in bytes
500 * @buf: pointer to buffer
501 * @cd: pointer to command details structure or NULL
503 * Query scheduler resource allocation (0x0412)
505 static enum ice_status
506 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
507 struct ice_aqc_query_txsched_res_resp *buf,
508 struct ice_sq_cd *cd)
510 struct ice_aq_desc desc;
512 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
513 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
517 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
518 * @hw: pointer to the HW struct
519 * @num_nodes: number of nodes
520 * @node_teids: array of node teids to be suspended or resumed
521 * @suspend: true means suspend / false means resume
523 * This function suspends or resumes HW nodes
525 static enum ice_status
526 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
529 struct ice_aqc_suspend_resume_elem *buf;
530 u16 i, buf_size, num_elem_ret = 0;
531 enum ice_status status;
533 buf_size = sizeof(*buf) * num_nodes;
534 buf = (struct ice_aqc_suspend_resume_elem *)
535 ice_malloc(hw, buf_size);
537 return ICE_ERR_NO_MEMORY;
539 for (i = 0; i < num_nodes; i++)
540 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
543 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
544 buf_size, &num_elem_ret,
547 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
548 buf_size, &num_elem_ret,
550 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
551 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
558 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
559 * @hw: pointer to the HW struct
560 * @vsi_handle: VSI handle
562 * @new_numqs: number of queues
564 static enum ice_status
565 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
567 struct ice_vsi_ctx *vsi_ctx;
568 struct ice_q_ctx *q_ctx;
570 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
572 return ICE_ERR_PARAM;
573 /* allocate LAN queue contexts */
574 if (!vsi_ctx->lan_q_ctx[tc]) {
575 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
576 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
577 if (!vsi_ctx->lan_q_ctx[tc])
578 return ICE_ERR_NO_MEMORY;
579 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
582 /* num queues are increased, update the queue contexts */
583 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
584 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
586 q_ctx = (struct ice_q_ctx *)
587 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
589 return ICE_ERR_NO_MEMORY;
590 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
591 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
592 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
593 vsi_ctx->lan_q_ctx[tc] = q_ctx;
594 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
600 * ice_aq_rl_profile - performs a rate limiting task
601 * @hw: pointer to the HW struct
602 * @opcode: opcode for add, query, or remove profile(s)
603 * @num_profiles: the number of profiles
604 * @buf: pointer to buffer
605 * @buf_size: buffer size in bytes
606 * @num_processed: number of processed add or remove profile(s) to return
607 * @cd: pointer to command details structure
609 * RL profile function to add, query, or remove profile(s)
611 static enum ice_status
612 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
613 u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
614 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
616 struct ice_aqc_rl_profile *cmd;
617 struct ice_aq_desc desc;
618 enum ice_status status;
620 cmd = &desc.params.rl_profile;
622 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
623 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
624 cmd->num_profiles = CPU_TO_LE16(num_profiles);
625 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
626 if (!status && num_processed)
627 *num_processed = LE16_TO_CPU(cmd->num_processed);
632 * ice_aq_add_rl_profile - adds rate limiting profile(s)
633 * @hw: pointer to the HW struct
634 * @num_profiles: the number of profile(s) to be add
635 * @buf: pointer to buffer
636 * @buf_size: buffer size in bytes
637 * @num_profiles_added: total number of profiles added to return
638 * @cd: pointer to command details structure
640 * Add RL profile (0x0410)
642 static enum ice_status
643 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
644 struct ice_aqc_rl_profile_generic_elem *buf,
645 u16 buf_size, u16 *num_profiles_added,
646 struct ice_sq_cd *cd)
648 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
650 buf_size, num_profiles_added, cd);
654 * ice_aq_query_rl_profile - query rate limiting profile(s)
655 * @hw: pointer to the HW struct
656 * @num_profiles: the number of profile(s) to query
657 * @buf: pointer to buffer
658 * @buf_size: buffer size in bytes
659 * @cd: pointer to command details structure
661 * Query RL profile (0x0411)
664 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
665 struct ice_aqc_rl_profile_generic_elem *buf,
666 u16 buf_size, struct ice_sq_cd *cd)
668 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
669 num_profiles, buf, buf_size, NULL, cd);
673 * ice_aq_remove_rl_profile - removes RL profile(s)
674 * @hw: pointer to the HW struct
675 * @num_profiles: the number of profile(s) to remove
676 * @buf: pointer to buffer
677 * @buf_size: buffer size in bytes
678 * @num_profiles_removed: total number of profiles removed to return
679 * @cd: pointer to command details structure or NULL
681 * Remove RL profile (0x0415)
683 static enum ice_status
684 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
685 struct ice_aqc_rl_profile_generic_elem *buf,
686 u16 buf_size, u16 *num_profiles_removed,
687 struct ice_sq_cd *cd)
689 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
691 buf_size, num_profiles_removed, cd);
695 * ice_sched_del_rl_profile - remove RL profile
696 * @hw: pointer to the HW struct
697 * @rl_info: rate limit profile information
699 * If the profile ID is not referenced anymore, it removes profile ID with
700 * its associated parameters from HW DB,and locally. The caller needs to
701 * hold scheduler lock.
703 static enum ice_status
704 ice_sched_del_rl_profile(struct ice_hw *hw,
705 struct ice_aqc_rl_profile_info *rl_info)
707 struct ice_aqc_rl_profile_generic_elem *buf;
708 u16 num_profiles_removed;
709 enum ice_status status;
710 u16 num_profiles = 1;
712 if (rl_info->prof_id_ref != 0)
713 return ICE_ERR_IN_USE;
715 /* Safe to remove profile ID */
716 buf = (struct ice_aqc_rl_profile_generic_elem *)
718 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
719 &num_profiles_removed, NULL);
720 if (status || num_profiles_removed != num_profiles)
723 /* Delete stale entry now */
724 LIST_DEL(&rl_info->list_entry);
725 ice_free(hw, rl_info);
730 * ice_sched_clear_rl_prof - clears RL prof entries
731 * @pi: port information structure
733 * This function removes all RL profile from HW as well as from SW DB.
735 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
739 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
740 struct ice_aqc_rl_profile_info *rl_prof_elem;
741 struct ice_aqc_rl_profile_info *rl_prof_tmp;
743 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
744 &pi->rl_prof_list[ln],
745 ice_aqc_rl_profile_info, list_entry) {
746 struct ice_hw *hw = pi->hw;
747 enum ice_status status;
749 rl_prof_elem->prof_id_ref = 0;
750 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
752 ice_debug(hw, ICE_DBG_SCHED,
753 "Remove rl profile failed\n");
754 /* On error, free mem required */
755 LIST_DEL(&rl_prof_elem->list_entry);
756 ice_free(hw, rl_prof_elem);
763 * ice_sched_clear_agg - clears the aggregator related information
764 * @hw: pointer to the hardware structure
766 * This function removes aggregator list and free up aggregator related memory
767 * previously allocated.
769 void ice_sched_clear_agg(struct ice_hw *hw)
771 struct ice_sched_agg_info *agg_info;
772 struct ice_sched_agg_info *atmp;
774 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
777 struct ice_sched_agg_vsi_info *agg_vsi_info;
778 struct ice_sched_agg_vsi_info *vtmp;
780 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
781 &agg_info->agg_vsi_list,
782 ice_sched_agg_vsi_info, list_entry) {
783 LIST_DEL(&agg_vsi_info->list_entry);
784 ice_free(hw, agg_vsi_info);
786 LIST_DEL(&agg_info->list_entry);
787 ice_free(hw, agg_info);
792 * ice_sched_clear_tx_topo - clears the scheduler tree nodes
793 * @pi: port information structure
795 * This function removes all the nodes from HW as well as from SW DB.
797 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
801 /* remove RL profiles related lists */
802 ice_sched_clear_rl_prof(pi);
804 ice_free_sched_node(pi, pi->root);
810 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
811 * @pi: port information structure
813 * Cleanup scheduling elements from SW DB
815 void ice_sched_clear_port(struct ice_port_info *pi)
817 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
820 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
821 ice_acquire_lock(&pi->sched_lock);
822 ice_sched_clear_tx_topo(pi);
823 ice_release_lock(&pi->sched_lock);
824 ice_destroy_lock(&pi->sched_lock);
828 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
829 * @hw: pointer to the HW struct
831 * Cleanup scheduling elements from SW DB for all the ports
833 void ice_sched_cleanup_all(struct ice_hw *hw)
838 if (hw->layer_info) {
839 ice_free(hw, hw->layer_info);
840 hw->layer_info = NULL;
843 ice_sched_clear_port(hw->port_info);
845 hw->num_tx_sched_layers = 0;
846 hw->num_tx_sched_phys_layers = 0;
847 hw->flattened_layers = 0;
852 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
853 * @hw: pointer to the HW struct
854 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
855 * @buf: pointer to buffer
856 * @buf_size: buffer size in bytes
857 * @cd: pointer to command details structure or NULL
859 * Configure L2 Node CGD (0x0414)
862 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
863 struct ice_aqc_cfg_l2_node_cgd_data *buf,
864 u16 buf_size, struct ice_sq_cd *cd)
866 struct ice_aqc_cfg_l2_node_cgd *cmd;
867 struct ice_aq_desc desc;
869 cmd = &desc.params.cfg_l2_node_cgd;
870 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
871 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
873 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
874 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
878 * ice_sched_add_elems - add nodes to HW and SW DB
879 * @pi: port information structure
880 * @tc_node: pointer to the branch node
881 * @parent: pointer to the parent node
882 * @layer: layer number to add nodes
883 * @num_nodes: number of nodes
884 * @num_nodes_added: pointer to num nodes added
885 * @first_node_teid: if new nodes are added then return the TEID of first node
887 * This function add nodes to HW as well as to SW DB for a given layer
889 static enum ice_status
890 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
891 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
892 u16 *num_nodes_added, u32 *first_node_teid)
894 struct ice_sched_node *prev, *new_node;
895 struct ice_aqc_add_elem *buf;
896 u16 i, num_groups_added = 0;
897 enum ice_status status = ICE_SUCCESS;
898 struct ice_hw *hw = pi->hw;
902 buf_size = ice_struct_size(buf, generic, num_nodes - 1);
903 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
905 return ICE_ERR_NO_MEMORY;
907 buf->hdr.parent_teid = parent->info.node_teid;
908 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
909 for (i = 0; i < num_nodes; i++) {
910 buf->generic[i].parent_teid = parent->info.node_teid;
911 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
912 buf->generic[i].data.valid_sections =
913 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
914 ICE_AQC_ELEM_VALID_EIR;
915 buf->generic[i].data.generic = 0;
916 buf->generic[i].data.cir_bw.bw_profile_idx =
917 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
918 buf->generic[i].data.cir_bw.bw_alloc =
919 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
920 buf->generic[i].data.eir_bw.bw_profile_idx =
921 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
922 buf->generic[i].data.eir_bw.bw_alloc =
923 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
926 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
927 &num_groups_added, NULL);
928 if (status != ICE_SUCCESS || num_groups_added != 1) {
929 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
930 hw->adminq.sq_last_status);
935 *num_nodes_added = num_nodes;
936 /* add nodes to the SW DB */
937 for (i = 0; i < num_nodes; i++) {
938 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
939 if (status != ICE_SUCCESS) {
940 ice_debug(hw, ICE_DBG_SCHED,
941 "add nodes in SW DB failed status =%d\n",
946 teid = LE32_TO_CPU(buf->generic[i].node_teid);
947 new_node = ice_sched_find_node_by_teid(parent, teid);
949 ice_debug(hw, ICE_DBG_SCHED,
950 "Node is missing for teid =%d\n", teid);
954 new_node->sibling = NULL;
955 new_node->tc_num = tc_node->tc_num;
957 /* add it to previous node sibling pointer */
958 /* Note: siblings are not linked across branches */
959 prev = ice_sched_get_first_node(pi, tc_node, layer);
960 if (prev && prev != new_node) {
961 while (prev->sibling)
962 prev = prev->sibling;
963 prev->sibling = new_node;
966 /* initialize the sibling head */
967 if (!pi->sib_head[tc_node->tc_num][layer])
968 pi->sib_head[tc_node->tc_num][layer] = new_node;
971 *first_node_teid = teid;
979 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
980 * @pi: port information structure
981 * @tc_node: pointer to TC node
982 * @parent: pointer to parent node
983 * @layer: layer number to add nodes
984 * @num_nodes: number of nodes to be added
985 * @first_node_teid: pointer to the first node TEID
986 * @num_nodes_added: pointer to number of nodes added
988 * This function add nodes to a given layer.
990 static enum ice_status
991 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
992 struct ice_sched_node *tc_node,
993 struct ice_sched_node *parent, u8 layer,
994 u16 num_nodes, u32 *first_node_teid,
995 u16 *num_nodes_added)
997 u32 *first_teid_ptr = first_node_teid;
998 u16 new_num_nodes, max_child_nodes;
999 enum ice_status status = ICE_SUCCESS;
1000 struct ice_hw *hw = pi->hw;
1004 *num_nodes_added = 0;
1009 if (!parent || layer < hw->sw_entry_point_layer)
1010 return ICE_ERR_PARAM;
1012 /* max children per node per layer */
1013 max_child_nodes = hw->max_children[parent->tx_sched_layer];
1015 /* current number of children + required nodes exceed max children ? */
1016 if ((parent->num_children + num_nodes) > max_child_nodes) {
1017 /* Fail if the parent is a TC node */
1018 if (parent == tc_node)
1021 /* utilize all the spaces if the parent is not full */
1022 if (parent->num_children < max_child_nodes) {
1023 new_num_nodes = max_child_nodes - parent->num_children;
1024 /* this recursion is intentional, and wouldn't
1025 * go more than 2 calls
1027 status = ice_sched_add_nodes_to_layer(pi, tc_node,
1032 if (status != ICE_SUCCESS)
1035 *num_nodes_added += num_added;
1037 /* Don't modify the first node TEID memory if the first node was
1038 * added already in the above call. Instead send some temp
1039 * memory for all other recursive calls.
1042 first_teid_ptr = &temp;
1044 new_num_nodes = num_nodes - num_added;
1046 /* This parent is full, try the next sibling */
1047 parent = parent->sibling;
1049 /* this recursion is intentional, for 1024 queues
1050 * per VSI, it goes max of 16 iterations.
1051 * 1024 / 8 = 128 layer 8 nodes
1052 * 128 /8 = 16 (add 8 nodes per iteration)
1054 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1055 layer, new_num_nodes,
1058 *num_nodes_added += num_added;
1062 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1063 num_nodes_added, first_node_teid);
1068 * ice_sched_get_qgrp_layer - get the current queue group layer number
1069 * @hw: pointer to the HW struct
1071 * This function returns the current queue group layer number
1073 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1075 /* It's always total layers - 1, the array is 0 relative so -2 */
1076 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1080 * ice_sched_get_vsi_layer - get the current VSI layer number
1081 * @hw: pointer to the HW struct
1083 * This function returns the current VSI layer number
1085 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1087 /* Num Layers VSI layer
1090 * 5 or less sw_entry_point_layer
1092 /* calculate the VSI layer based on number of layers. */
1093 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1094 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1096 if (layer > hw->sw_entry_point_layer)
1099 return hw->sw_entry_point_layer;
1103 * ice_sched_get_agg_layer - get the current aggregator layer number
1104 * @hw: pointer to the HW struct
1106 * This function returns the current aggregator layer number
1108 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1110 /* Num Layers aggregator layer
1112 * 7 or less sw_entry_point_layer
1114 /* calculate the aggregator layer based on number of layers. */
1115 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1116 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1118 if (layer > hw->sw_entry_point_layer)
1121 return hw->sw_entry_point_layer;
1125 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1126 * @pi: port information structure
1128 * This function removes the leaf node that was created by the FW
1129 * during initialization
1131 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1133 struct ice_sched_node *node;
1137 if (!node->num_children)
1139 node = node->children[0];
1141 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1142 u32 teid = LE32_TO_CPU(node->info.node_teid);
1143 enum ice_status status;
1145 /* remove the default leaf node */
1146 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1148 ice_free_sched_node(pi, node);
1153 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1154 * @pi: port information structure
1156 * This function frees all the nodes except root and TC that were created by
1157 * the FW during initialization
1159 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1161 struct ice_sched_node *node;
1163 ice_rm_dflt_leaf_node(pi);
1165 /* remove the default nodes except TC and root nodes */
1168 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1169 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1170 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1171 ice_free_sched_node(pi, node);
1175 if (!node->num_children)
1177 node = node->children[0];
1182 * ice_sched_init_port - Initialize scheduler by querying information from FW
1183 * @pi: port info structure for the tree to cleanup
1185 * This function is the initial call to find the total number of Tx scheduler
1186 * resources, default topology created by firmware and storing the information
1189 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1191 struct ice_aqc_get_topo_elem *buf;
1192 enum ice_status status;
1199 return ICE_ERR_PARAM;
1202 /* Query the Default Topology from FW */
1203 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1204 ICE_AQ_MAX_BUF_LEN);
1206 return ICE_ERR_NO_MEMORY;
1208 /* Query default scheduling tree topology */
1209 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1210 &num_branches, NULL);
1214 /* num_branches should be between 1-8 */
1215 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1216 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1218 status = ICE_ERR_PARAM;
1222 /* get the number of elements on the default/first branch */
1223 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1225 /* num_elems should always be between 1-9 */
1226 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1227 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1229 status = ICE_ERR_PARAM;
1233 /* If the last node is a leaf node then the index of the queue group
1234 * layer is two less than the number of elements.
1236 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1237 ICE_AQC_ELEM_TYPE_LEAF)
1238 pi->last_node_teid =
1239 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1241 pi->last_node_teid =
1242 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1244 /* Insert the Tx Sched root node */
1245 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1249 /* Parse the default tree and cache the information */
1250 for (i = 0; i < num_branches; i++) {
1251 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1253 /* Skip root element as already inserted */
1254 for (j = 1; j < num_elems; j++) {
1255 /* update the sw entry point */
1256 if (buf[0].generic[j].data.elem_type ==
1257 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1258 hw->sw_entry_point_layer = j;
1260 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1266 /* Remove the default nodes. */
1268 ice_sched_rm_dflt_nodes(pi);
1270 /* initialize the port for handling the scheduler tree */
1271 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1272 ice_init_lock(&pi->sched_lock);
1273 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1274 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1277 if (status && pi->root) {
1278 ice_free_sched_node(pi, pi->root);
1287 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1288 * @pi: port information structure
1289 * @teid: Scheduler node TEID
1291 * This function retrieves the ice_sched_node struct for given TEID from
1292 * the SW DB and returns it to the caller.
1294 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1296 struct ice_sched_node *node;
1301 /* Find the node starting from root */
1302 ice_acquire_lock(&pi->sched_lock);
1303 node = ice_sched_find_node_by_teid(pi->root, teid);
1304 ice_release_lock(&pi->sched_lock);
1307 ice_debug(pi->hw, ICE_DBG_SCHED,
1308 "Node not found for teid=0x%x\n", teid);
1314 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1315 * @hw: pointer to the HW struct
1317 * query FW for allocated scheduler resources and store in HW struct
1319 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1321 struct ice_aqc_query_txsched_res_resp *buf;
1322 enum ice_status status = ICE_SUCCESS;
1329 buf = (struct ice_aqc_query_txsched_res_resp *)
1330 ice_malloc(hw, sizeof(*buf));
1332 return ICE_ERR_NO_MEMORY;
1334 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1336 goto sched_query_out;
1338 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1339 hw->num_tx_sched_phys_layers =
1340 LE16_TO_CPU(buf->sched_props.phys_levels);
1341 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1342 hw->max_cgds = buf->sched_props.max_pf_cgds;
1344 /* max sibling group size of current layer refers to the max children
1345 * of the below layer node.
1346 * layer 1 node max children will be layer 2 max sibling group size
1347 * layer 2 node max children will be layer 3 max sibling group size
1348 * and so on. This array will be populated from root (index 0) to
1349 * qgroup layer 7. Leaf node has no children.
1351 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1352 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1353 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1356 hw->layer_info = (struct ice_aqc_layer_props *)
1357 ice_memdup(hw, buf->layer_props,
1358 (hw->num_tx_sched_layers *
1359 sizeof(*hw->layer_info)),
1361 if (!hw->layer_info) {
1362 status = ICE_ERR_NO_MEMORY;
1363 goto sched_query_out;
1372 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1373 * @hw: pointer to the HW struct
1375 * Determine the PSM clock frequency and store in HW struct
1377 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1381 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1382 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1383 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1385 #define PSM_CLK_SRC_367_MHZ 0x0
1386 #define PSM_CLK_SRC_416_MHZ 0x1
1387 #define PSM_CLK_SRC_446_MHZ 0x2
1388 #define PSM_CLK_SRC_390_MHZ 0x3
1391 case PSM_CLK_SRC_367_MHZ:
1392 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1394 case PSM_CLK_SRC_416_MHZ:
1395 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1397 case PSM_CLK_SRC_446_MHZ:
1398 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1400 case PSM_CLK_SRC_390_MHZ:
1401 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1404 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1406 /* fall back to a safe default */
1407 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1412 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1413 * @hw: pointer to the HW struct
1414 * @base: pointer to the base node
1415 * @node: pointer to the node to search
1417 * This function checks whether a given node is part of the base node
1421 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1422 struct ice_sched_node *node)
1426 for (i = 0; i < base->num_children; i++) {
1427 struct ice_sched_node *child = base->children[i];
1432 if (child->tx_sched_layer > node->tx_sched_layer)
1435 /* this recursion is intentional, and wouldn't
1436 * go more than 8 calls
1438 if (ice_sched_find_node_in_subtree(hw, child, node))
1445 * ice_sched_get_free_qgrp - Scan all Q group siblings and find a free node
1446 * @pi: port information structure
1447 * @vsi_node: software VSI handle
1448 * @qgrp_node: first Q group node identified for scanning
1449 * @owner: LAN or RDMA
1451 * This function retrieves a free LAN or RDMA Q group node by scanning
1452 * qgrp_node and its siblings for the Q group with the fewest number
1453 * of queues currently assigned.
1455 static struct ice_sched_node *
1456 ice_sched_get_free_qgrp(struct ice_port_info *pi,
1457 struct ice_sched_node *vsi_node,
1458 struct ice_sched_node *qgrp_node, u8 owner)
1460 struct ice_sched_node *min_qgrp;
1465 min_children = qgrp_node->num_children;
1468 min_qgrp = qgrp_node;
1469 /* scan all Q groups until find a node which has less than the
1470 * minimum number of children. This way all Q group nodes get
1471 * equal number of shares and active. The bandwidth will be equally
1472 * distributed across all Qs.
1475 /* make sure the qgroup node is part of the VSI subtree */
1476 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1477 if (qgrp_node->num_children < min_children &&
1478 qgrp_node->owner == owner) {
1479 /* replace the new min Q group node */
1480 min_qgrp = qgrp_node;
1481 min_children = min_qgrp->num_children;
1482 /* break if it has no children, */
1486 qgrp_node = qgrp_node->sibling;
1492 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1493 * @pi: port information structure
1494 * @vsi_handle: software VSI handle
1495 * @tc: branch number
1496 * @owner: LAN or RDMA
1498 * This function retrieves a free LAN or RDMA queue group node
1500 struct ice_sched_node *
1501 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1504 struct ice_sched_node *vsi_node, *qgrp_node;
1505 struct ice_vsi_ctx *vsi_ctx;
1509 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1510 max_children = pi->hw->max_children[qgrp_layer];
1512 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1515 vsi_node = vsi_ctx->sched.vsi_node[tc];
1516 /* validate invalid VSI ID */
1520 /* get the first queue group node from VSI sub-tree */
1521 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1523 /* make sure the qgroup node is part of the VSI subtree */
1524 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1525 if (qgrp_node->num_children < max_children &&
1526 qgrp_node->owner == owner)
1528 qgrp_node = qgrp_node->sibling;
1531 /* Select the best queue group */
1532 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
1536 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1537 * @pi: pointer to the port information structure
1538 * @tc_node: pointer to the TC node
1539 * @vsi_handle: software VSI handle
1541 * This function retrieves a VSI node for a given VSI ID from a given
1544 struct ice_sched_node *
1545 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1548 struct ice_sched_node *node;
1551 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1552 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1554 /* Check whether it already exists */
1556 if (node->vsi_handle == vsi_handle)
1558 node = node->sibling;
1565 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1566 * @pi: pointer to the port information structure
1567 * @tc_node: pointer to the TC node
1568 * @agg_id: aggregator ID
1570 * This function retrieves an aggregator node for a given aggregator ID from
1573 static struct ice_sched_node *
1574 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1577 struct ice_sched_node *node;
1578 struct ice_hw *hw = pi->hw;
1583 agg_layer = ice_sched_get_agg_layer(hw);
1584 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1586 /* Check whether it already exists */
1588 if (node->agg_id == agg_id)
1590 node = node->sibling;
1597 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1598 * @hw: pointer to the HW struct
1599 * @node: pointer to the ice_sched_node struct
1601 * This function queries and compares the HW element with SW DB node parameters
1603 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1605 struct ice_aqc_get_elem buf;
1606 enum ice_status status;
1609 node_teid = LE32_TO_CPU(node->info.node_teid);
1610 status = ice_sched_query_elem(hw, node_teid, &buf);
1611 if (status != ICE_SUCCESS)
1614 if (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {
1615 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1624 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1625 * @hw: pointer to the HW struct
1626 * @num_qs: number of queues
1627 * @num_nodes: num nodes array
1629 * This function calculates the number of VSI child nodes based on the
1633 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1638 qgl = ice_sched_get_qgrp_layer(hw);
1639 vsil = ice_sched_get_vsi_layer(hw);
1641 /* calculate num nodes from queue group to VSI layer */
1642 for (i = qgl; i > vsil; i--) {
1643 /* round to the next integer if there is a remainder */
1644 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1646 /* need at least one node */
1647 num_nodes[i] = num ? num : 1;
1652 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1653 * @pi: port information structure
1654 * @vsi_handle: software VSI handle
1655 * @tc_node: pointer to the TC node
1656 * @num_nodes: pointer to the num nodes that needs to be added per layer
1657 * @owner: node owner (LAN or RDMA)
1659 * This function adds the VSI child nodes to tree. It gets called for
1660 * LAN and RDMA separately.
1662 static enum ice_status
1663 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1664 struct ice_sched_node *tc_node, u16 *num_nodes,
1667 struct ice_sched_node *parent, *node;
1668 struct ice_hw *hw = pi->hw;
1669 enum ice_status status;
1670 u32 first_node_teid;
1674 qgl = ice_sched_get_qgrp_layer(hw);
1675 vsil = ice_sched_get_vsi_layer(hw);
1676 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1677 for (i = vsil + 1; i <= qgl; i++) {
1681 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1685 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1688 /* The newly added node can be a new parent for the next
1692 parent = ice_sched_find_node_by_teid(tc_node,
1696 node->owner = owner;
1697 node = node->sibling;
1700 parent = parent->children[0];
1708 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1709 * @pi: pointer to the port info structure
1710 * @tc_node: pointer to TC node
1711 * @num_nodes: pointer to num nodes array
1713 * This function calculates the number of supported nodes needed to add this
1714 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1718 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1719 struct ice_sched_node *tc_node, u16 *num_nodes)
1721 struct ice_sched_node *node;
1725 vsil = ice_sched_get_vsi_layer(pi->hw);
1726 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1727 /* Add intermediate nodes if TC has no children and
1728 * need at least one node for VSI
1730 if (!tc_node->num_children || i == vsil) {
1733 /* If intermediate nodes are reached max children
1734 * then add a new one.
1736 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1737 /* scan all the siblings */
1739 if (node->num_children <
1740 pi->hw->max_children[i])
1742 node = node->sibling;
1745 /* tree has one intermediate node to add this new VSI.
1746 * So no need to calculate supported nodes for below
1751 /* all the nodes are full, allocate a new one */
1757 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1758 * @pi: port information structure
1759 * @vsi_handle: software VSI handle
1760 * @tc_node: pointer to TC node
1761 * @num_nodes: pointer to num nodes array
1763 * This function adds the VSI supported nodes into Tx tree including the
1764 * VSI, its parent and intermediate nodes in below layers
1766 static enum ice_status
1767 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1768 struct ice_sched_node *tc_node, u16 *num_nodes)
1770 struct ice_sched_node *parent = tc_node;
1771 enum ice_status status;
1772 u32 first_node_teid;
1777 return ICE_ERR_PARAM;
1779 vsil = ice_sched_get_vsi_layer(pi->hw);
1780 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1781 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1785 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1788 /* The newly added node can be a new parent for the next
1792 parent = ice_sched_find_node_by_teid(tc_node,
1795 parent = parent->children[0];
1801 parent->vsi_handle = vsi_handle;
1808 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1809 * @pi: port information structure
1810 * @vsi_handle: software VSI handle
1813 * This function adds a new VSI into scheduler tree
1815 static enum ice_status
1816 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1818 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1819 struct ice_sched_node *tc_node;
1821 tc_node = ice_sched_get_tc_node(pi, tc);
1823 return ICE_ERR_PARAM;
1825 /* calculate number of supported nodes needed for this VSI */
1826 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1828 /* add VSI supported nodes to TC subtree */
1829 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1834 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1835 * @pi: port information structure
1836 * @vsi_handle: software VSI handle
1838 * @new_numqs: new number of max queues
1839 * @owner: owner of this subtree
1841 * This function updates the VSI child nodes based on the number of queues
1843 static enum ice_status
1844 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1845 u8 tc, u16 new_numqs, u8 owner)
1847 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1848 struct ice_sched_node *vsi_node;
1849 struct ice_sched_node *tc_node;
1850 struct ice_vsi_ctx *vsi_ctx;
1851 enum ice_status status = ICE_SUCCESS;
1852 struct ice_hw *hw = pi->hw;
1855 tc_node = ice_sched_get_tc_node(pi, tc);
1859 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1863 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1865 return ICE_ERR_PARAM;
1867 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1868 /* num queues are not changed or less than the previous number */
1869 if (new_numqs <= prev_numqs)
1871 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1876 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1877 /* Keep the max number of queue configuration all the time. Update the
1878 * tree only if number of queues > previous number of queues. This may
1879 * leave some extra nodes in the tree if number of queues < previous
1880 * number but that wouldn't harm anything. Removing those extra nodes
1881 * may complicate the code if those nodes are part of SRL or
1882 * individually rate limited.
1884 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1885 new_num_nodes, owner);
1888 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1894 * ice_sched_cfg_vsi - configure the new/existing VSI
1895 * @pi: port information structure
1896 * @vsi_handle: software VSI handle
1898 * @maxqs: max number of queues
1899 * @owner: LAN or RDMA
1900 * @enable: TC enabled or disabled
1902 * This function adds/updates VSI nodes based on the number of queues. If TC is
1903 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1904 * disabled then suspend the VSI if it is not already.
1907 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1908 u8 owner, bool enable)
1910 struct ice_sched_node *vsi_node, *tc_node;
1911 struct ice_vsi_ctx *vsi_ctx;
1912 enum ice_status status = ICE_SUCCESS;
1913 struct ice_hw *hw = pi->hw;
1915 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1916 tc_node = ice_sched_get_tc_node(pi, tc);
1918 return ICE_ERR_PARAM;
1919 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1921 return ICE_ERR_PARAM;
1922 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1924 /* suspend the VSI if TC is not enabled */
1926 if (vsi_node && vsi_node->in_use) {
1927 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1929 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1932 vsi_node->in_use = false;
1937 /* TC is enabled, if it is a new VSI then add it to the tree */
1939 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1943 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1947 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1948 vsi_node->in_use = true;
1949 /* invalidate the max queues whenever VSI gets added first time
1950 * into the scheduler tree (boot or after reset). We need to
1951 * recreate the child nodes all the time in these cases.
1953 vsi_ctx->sched.max_lanq[tc] = 0;
1956 /* update the VSI child nodes */
1957 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1962 /* TC is enabled, resume the VSI if it is in the suspend state */
1963 if (!vsi_node->in_use) {
1964 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1966 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1968 vsi_node->in_use = true;
1975 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1976 * @pi: port information structure
1977 * @vsi_handle: software VSI handle
1979 * This function removes single aggregator VSI info entry from
1982 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1984 struct ice_sched_agg_info *agg_info;
1985 struct ice_sched_agg_info *atmp;
1987 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1990 struct ice_sched_agg_vsi_info *agg_vsi_info;
1991 struct ice_sched_agg_vsi_info *vtmp;
1993 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1994 &agg_info->agg_vsi_list,
1995 ice_sched_agg_vsi_info, list_entry)
1996 if (agg_vsi_info->vsi_handle == vsi_handle) {
1997 LIST_DEL(&agg_vsi_info->list_entry);
1998 ice_free(pi->hw, agg_vsi_info);
2005 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
2006 * @node: pointer to the sub-tree node
2008 * This function checks for a leaf node presence in a given sub-tree node.
2010 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
2014 for (i = 0; i < node->num_children; i++)
2015 if (ice_sched_is_leaf_node_present(node->children[i]))
2017 /* check for a leaf node */
2018 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
2022 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
2023 * @pi: port information structure
2024 * @vsi_handle: software VSI handle
2025 * @owner: LAN or RDMA
2027 * This function removes the VSI and its LAN or RDMA children nodes from the
2030 static enum ice_status
2031 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
2033 enum ice_status status = ICE_ERR_PARAM;
2034 struct ice_vsi_ctx *vsi_ctx;
2037 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
2038 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2040 ice_acquire_lock(&pi->sched_lock);
2041 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2043 goto exit_sched_rm_vsi_cfg;
2045 ice_for_each_traffic_class(i) {
2046 struct ice_sched_node *vsi_node, *tc_node;
2049 tc_node = ice_sched_get_tc_node(pi, i);
2053 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2057 if (ice_sched_is_leaf_node_present(vsi_node)) {
2058 ice_debug(pi->hw, ICE_DBG_SCHED,
2059 "VSI has leaf nodes in TC %d\n", i);
2060 status = ICE_ERR_IN_USE;
2061 goto exit_sched_rm_vsi_cfg;
2063 while (j < vsi_node->num_children) {
2064 if (vsi_node->children[j]->owner == owner) {
2065 ice_free_sched_node(pi, vsi_node->children[j]);
2067 /* reset the counter again since the num
2068 * children will be updated after node removal
2075 /* remove the VSI if it has no children */
2076 if (!vsi_node->num_children) {
2077 ice_free_sched_node(pi, vsi_node);
2078 vsi_ctx->sched.vsi_node[i] = NULL;
2080 /* clean up aggregator related VSI info if any */
2081 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2083 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2084 vsi_ctx->sched.max_lanq[i] = 0;
2086 status = ICE_SUCCESS;
2088 exit_sched_rm_vsi_cfg:
2089 ice_release_lock(&pi->sched_lock);
2094 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2095 * @pi: port information structure
2096 * @vsi_handle: software VSI handle
2098 * This function clears the VSI and its LAN children nodes from scheduler tree
2101 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2103 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2107 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2108 * @hw: pointer to the HW struct
2109 * @node: pointer to the ice_sched_node struct
2111 * This function compares all the nodes for a given tree against HW DB nodes
2112 * This function needs to be called with the port_info->sched_lock held
2114 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2118 /* start from the leaf node */
2119 for (i = 0; i < node->num_children; i++)
2120 /* Fail if node doesn't match with the SW DB
2121 * this recursion is intentional, and wouldn't
2122 * go more than 9 calls
2124 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2127 return ice_sched_check_node(hw, node);
2131 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2132 * @hw: pointer to the HW struct
2133 * @node_teid: node TEID
2134 * @buf: pointer to buffer
2135 * @buf_size: buffer size in bytes
2136 * @cd: pointer to command details structure or NULL
2138 * This function retrieves the tree topology from the firmware for a given
2139 * node TEID to the root node.
2142 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2143 struct ice_aqc_get_elem *buf, u16 buf_size,
2144 struct ice_sq_cd *cd)
2146 struct ice_aqc_query_node_to_root *cmd;
2147 struct ice_aq_desc desc;
2149 cmd = &desc.params.query_node_to_root;
2150 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2151 cmd->teid = CPU_TO_LE32(node_teid);
2152 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2156 * ice_get_agg_info - get the aggregator ID
2157 * @hw: pointer to the hardware structure
2158 * @agg_id: aggregator ID
2160 * This function validates aggregator ID. The function returns info if
2161 * aggregator ID is present in list otherwise it returns null.
2163 static struct ice_sched_agg_info *
2164 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2166 struct ice_sched_agg_info *agg_info;
2168 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2170 if (agg_info->agg_id == agg_id)
2177 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2178 * @hw: pointer to the HW struct
2179 * @node: pointer to a child node
2180 * @num_nodes: num nodes count array
2182 * This function walks through the aggregator subtree to find a free parent
2185 static struct ice_sched_node *
2186 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2189 u8 l = node->tx_sched_layer;
2192 vsil = ice_sched_get_vsi_layer(hw);
2194 /* Is it VSI parent layer ? */
2196 return (node->num_children < hw->max_children[l]) ? node : NULL;
2198 /* We have intermediate nodes. Let's walk through the subtree. If the
2199 * intermediate node has space to add a new node then clear the count
2201 if (node->num_children < hw->max_children[l])
2203 /* The below recursive call is intentional and wouldn't go more than
2204 * 2 or 3 iterations.
2207 for (i = 0; i < node->num_children; i++) {
2208 struct ice_sched_node *parent;
2210 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2220 * ice_sched_update_parent - update the new parent in SW DB
2221 * @new_parent: pointer to a new parent node
2222 * @node: pointer to a child node
2224 * This function removes the child from the old parent and adds it to a new
2228 ice_sched_update_parent(struct ice_sched_node *new_parent,
2229 struct ice_sched_node *node)
2231 struct ice_sched_node *old_parent;
2234 old_parent = node->parent;
2236 /* update the old parent children */
2237 for (i = 0; i < old_parent->num_children; i++)
2238 if (old_parent->children[i] == node) {
2239 for (j = i + 1; j < old_parent->num_children; j++)
2240 old_parent->children[j - 1] =
2241 old_parent->children[j];
2242 old_parent->num_children--;
2246 /* now move the node to a new parent */
2247 new_parent->children[new_parent->num_children++] = node;
2248 node->parent = new_parent;
2249 node->info.parent_teid = new_parent->info.node_teid;
2253 * ice_sched_move_nodes - move child nodes to a given parent
2254 * @pi: port information structure
2255 * @parent: pointer to parent node
2256 * @num_items: number of child nodes to be moved
2257 * @list: pointer to child node teids
2259 * This function move the child nodes to a given parent.
2261 static enum ice_status
2262 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2263 u16 num_items, u32 *list)
2265 enum ice_status status = ICE_SUCCESS;
2266 struct ice_aqc_move_elem *buf;
2267 struct ice_sched_node *node;
2268 u16 i, grps_movd = 0;
2273 if (!parent || !num_items)
2274 return ICE_ERR_PARAM;
2276 /* Does parent have enough space */
2277 if (parent->num_children + num_items >=
2278 hw->max_children[parent->tx_sched_layer])
2279 return ICE_ERR_AQ_FULL;
2281 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
2283 return ICE_ERR_NO_MEMORY;
2285 for (i = 0; i < num_items; i++) {
2286 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2288 status = ICE_ERR_PARAM;
2292 buf->hdr.src_parent_teid = node->info.parent_teid;
2293 buf->hdr.dest_parent_teid = parent->info.node_teid;
2294 buf->teid[0] = node->info.node_teid;
2295 buf->hdr.num_elems = CPU_TO_LE16(1);
2296 status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
2298 if (status && grps_movd != 1) {
2299 status = ICE_ERR_CFG;
2303 /* update the SW DB */
2304 ice_sched_update_parent(parent, node);
2313 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2314 * @pi: port information structure
2315 * @vsi_handle: software VSI handle
2316 * @agg_id: aggregator ID
2319 * This function moves a VSI to an aggregator node or its subtree.
2320 * Intermediate nodes may be created if required.
2322 static enum ice_status
2323 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2326 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2327 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2328 u32 first_node_teid, vsi_teid;
2329 enum ice_status status;
2330 u16 num_nodes_added;
2333 tc_node = ice_sched_get_tc_node(pi, tc);
2337 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2339 return ICE_ERR_DOES_NOT_EXIST;
2341 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2343 return ICE_ERR_DOES_NOT_EXIST;
2345 aggl = ice_sched_get_agg_layer(pi->hw);
2346 vsil = ice_sched_get_vsi_layer(pi->hw);
2348 /* set intermediate node count to 1 between aggregator and VSI layers */
2349 for (i = aggl + 1; i < vsil; i++)
2352 /* Check if the aggregator subtree has any free node to add the VSI */
2353 for (i = 0; i < agg_node->num_children; i++) {
2354 parent = ice_sched_get_free_vsi_parent(pi->hw,
2355 agg_node->children[i],
2363 for (i = aggl + 1; i < vsil; i++) {
2364 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2368 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2371 /* The newly added node can be a new parent for the next
2374 if (num_nodes_added)
2375 parent = ice_sched_find_node_by_teid(tc_node,
2378 parent = parent->children[0];
2385 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2386 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2390 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2391 * @pi: port information structure
2392 * @agg_info: aggregator info
2393 * @tc: traffic class number
2394 * @rm_vsi_info: true or false
2396 * This function move all the VSI(s) to the default aggregator and delete
2397 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2398 * caller holds the scheduler lock.
2400 static enum ice_status
2401 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2402 struct ice_sched_agg_info *agg_info, u8 tc,
2405 struct ice_sched_agg_vsi_info *agg_vsi_info;
2406 struct ice_sched_agg_vsi_info *tmp;
2407 enum ice_status status = ICE_SUCCESS;
2409 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2410 ice_sched_agg_vsi_info, list_entry) {
2411 u16 vsi_handle = agg_vsi_info->vsi_handle;
2413 /* Move VSI to default aggregator */
2414 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2417 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2418 ICE_DFLT_AGG_ID, tc);
2422 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2423 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2424 LIST_DEL(&agg_vsi_info->list_entry);
2425 ice_free(pi->hw, agg_vsi_info);
2433 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2434 * @pi: port information structure
2435 * @node: node pointer
2437 * This function checks whether the aggregator is attached with any VSI or not.
2440 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2444 vsil = ice_sched_get_vsi_layer(pi->hw);
2445 if (node->tx_sched_layer < vsil - 1) {
2446 for (i = 0; i < node->num_children; i++)
2447 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2451 return node->num_children ? true : false;
2456 * ice_sched_rm_agg_cfg - remove the aggregator node
2457 * @pi: port information structure
2458 * @agg_id: aggregator ID
2461 * This function removes the aggregator node and intermediate nodes if any
2464 static enum ice_status
2465 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2467 struct ice_sched_node *tc_node, *agg_node;
2468 struct ice_hw *hw = pi->hw;
2470 tc_node = ice_sched_get_tc_node(pi, tc);
2474 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2476 return ICE_ERR_DOES_NOT_EXIST;
2478 /* Can't remove the aggregator node if it has children */
2479 if (ice_sched_is_agg_inuse(pi, agg_node))
2480 return ICE_ERR_IN_USE;
2482 /* need to remove the whole subtree if aggregator node is the
2485 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2486 struct ice_sched_node *parent = agg_node->parent;
2491 if (parent->num_children > 1)
2497 ice_free_sched_node(pi, agg_node);
2502 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2503 * @pi: port information structure
2504 * @agg_info: aggregator ID
2506 * @rm_vsi_info: bool value true or false
2508 * This function removes aggregator reference to VSI of given TC. It removes
2509 * the aggregator configuration completely for requested TC. The caller needs
2510 * to hold the scheduler lock.
2512 static enum ice_status
2513 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2514 u8 tc, bool rm_vsi_info)
2516 enum ice_status status = ICE_SUCCESS;
2518 /* If nothing to remove - return success */
2519 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2520 goto exit_rm_agg_cfg_tc;
2522 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2524 goto exit_rm_agg_cfg_tc;
2526 /* Delete aggregator node(s) */
2527 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2529 goto exit_rm_agg_cfg_tc;
2531 ice_clear_bit(tc, agg_info->tc_bitmap);
2537 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2538 * @pi: port information structure
2539 * @agg_id: aggregator ID
2540 * @tc_bitmap: 8 bits TC bitmap
2542 * Save aggregator TC bitmap. This function needs to be called with scheduler
2545 static enum ice_status
2546 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2547 ice_bitmap_t *tc_bitmap)
2549 struct ice_sched_agg_info *agg_info;
2551 agg_info = ice_get_agg_info(pi->hw, agg_id);
2553 return ICE_ERR_PARAM;
2554 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2555 ICE_MAX_TRAFFIC_CLASS);
2560 * ice_sched_add_agg_cfg - create an aggregator node
2561 * @pi: port information structure
2562 * @agg_id: aggregator ID
2565 * This function creates an aggregator node and intermediate nodes if required
2568 static enum ice_status
2569 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2571 struct ice_sched_node *parent, *agg_node, *tc_node;
2572 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2573 enum ice_status status = ICE_SUCCESS;
2574 struct ice_hw *hw = pi->hw;
2575 u32 first_node_teid;
2576 u16 num_nodes_added;
2579 tc_node = ice_sched_get_tc_node(pi, tc);
2583 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2584 /* Does Agg node already exist ? */
2588 aggl = ice_sched_get_agg_layer(hw);
2590 /* need one node in Agg layer */
2591 num_nodes[aggl] = 1;
2593 /* Check whether the intermediate nodes have space to add the
2594 * new aggregator. If they are full, then SW needs to allocate a new
2595 * intermediate node on those layers
2597 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2598 parent = ice_sched_get_first_node(pi, tc_node, i);
2600 /* scan all the siblings */
2602 if (parent->num_children < hw->max_children[i])
2604 parent = parent->sibling;
2607 /* all the nodes are full, reserve one for this layer */
2612 /* add the aggregator node */
2614 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2618 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2622 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2625 /* The newly added node can be a new parent for the next
2628 if (num_nodes_added) {
2629 parent = ice_sched_find_node_by_teid(tc_node,
2631 /* register aggregator ID with the aggregator node */
2632 if (parent && i == aggl)
2633 parent->agg_id = agg_id;
2635 parent = parent->children[0];
2643 * ice_sched_cfg_agg - configure aggregator node
2644 * @pi: port information structure
2645 * @agg_id: aggregator ID
2646 * @agg_type: aggregator type queue, VSI, or aggregator group
2647 * @tc_bitmap: bits TC bitmap
2649 * It registers a unique aggregator node into scheduler services. It
2650 * allows a user to register with a unique ID to track it's resources.
2651 * The aggregator type determines if this is a queue group, VSI group
2652 * or aggregator group. It then creates the aggregator node(s) for requested
2653 * TC(s) or removes an existing aggregator node including its configuration
2654 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2655 * resources and remove aggregator ID.
2656 * This function needs to be called with scheduler lock held.
2658 static enum ice_status
2659 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2660 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2662 struct ice_sched_agg_info *agg_info;
2663 enum ice_status status = ICE_SUCCESS;
2664 struct ice_hw *hw = pi->hw;
2667 agg_info = ice_get_agg_info(hw, agg_id);
2669 /* Create new entry for new aggregator ID */
2670 agg_info = (struct ice_sched_agg_info *)
2671 ice_malloc(hw, sizeof(*agg_info));
2673 status = ICE_ERR_NO_MEMORY;
2676 agg_info->agg_id = agg_id;
2677 agg_info->agg_type = agg_type;
2678 agg_info->tc_bitmap[0] = 0;
2680 /* Initialize the aggregator VSI list head */
2681 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2683 /* Add new entry in aggregator list */
2684 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2686 /* Create aggregator node(s) for requested TC(s) */
2687 ice_for_each_traffic_class(tc) {
2688 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2689 /* Delete aggregator cfg TC if it exists previously */
2690 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2696 /* Check if aggregator node for TC already exists */
2697 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2700 /* Create new aggregator node for TC */
2701 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2705 /* Save aggregator node's TC information */
2706 ice_set_bit(tc, agg_info->tc_bitmap);
2713 * ice_cfg_agg - config aggregator node
2714 * @pi: port information structure
2715 * @agg_id: aggregator ID
2716 * @agg_type: aggregator type queue, VSI, or aggregator group
2717 * @tc_bitmap: bits TC bitmap
2719 * This function configures aggregator node(s).
2722 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2725 ice_bitmap_t bitmap = tc_bitmap;
2726 enum ice_status status;
2728 ice_acquire_lock(&pi->sched_lock);
2729 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2730 (ice_bitmap_t *)&bitmap);
2732 status = ice_save_agg_tc_bitmap(pi, agg_id,
2733 (ice_bitmap_t *)&bitmap);
2734 ice_release_lock(&pi->sched_lock);
2739 * ice_get_agg_vsi_info - get the aggregator ID
2740 * @agg_info: aggregator info
2741 * @vsi_handle: software VSI handle
2743 * The function returns aggregator VSI info based on VSI handle. This function
2744 * needs to be called with scheduler lock held.
2746 static struct ice_sched_agg_vsi_info *
2747 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2749 struct ice_sched_agg_vsi_info *agg_vsi_info;
2751 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2752 ice_sched_agg_vsi_info, list_entry)
2753 if (agg_vsi_info->vsi_handle == vsi_handle)
2754 return agg_vsi_info;
2760 * ice_get_vsi_agg_info - get the aggregator info of VSI
2761 * @hw: pointer to the hardware structure
2762 * @vsi_handle: Sw VSI handle
2764 * The function returns aggregator info of VSI represented via vsi_handle. The
2765 * VSI has in this case a different aggregator than the default one. This
2766 * function needs to be called with scheduler lock held.
2768 static struct ice_sched_agg_info *
2769 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2771 struct ice_sched_agg_info *agg_info;
2773 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2775 struct ice_sched_agg_vsi_info *agg_vsi_info;
2777 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2785 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2786 * @pi: port information structure
2787 * @agg_id: aggregator ID
2788 * @vsi_handle: software VSI handle
2789 * @tc_bitmap: TC bitmap of enabled TC(s)
2791 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2794 static enum ice_status
2795 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2796 ice_bitmap_t *tc_bitmap)
2798 struct ice_sched_agg_vsi_info *agg_vsi_info;
2799 struct ice_sched_agg_info *agg_info;
2801 agg_info = ice_get_agg_info(pi->hw, agg_id);
2803 return ICE_ERR_PARAM;
2804 /* check if entry already exist */
2805 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2807 return ICE_ERR_PARAM;
2808 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2809 ICE_MAX_TRAFFIC_CLASS);
2814 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2815 * @pi: port information structure
2816 * @agg_id: aggregator ID
2817 * @vsi_handle: software VSI handle
2818 * @tc_bitmap: TC bitmap of enabled TC(s)
2820 * This function moves VSI to a new or default aggregator node. If VSI is
2821 * already associated to the aggregator node then no operation is performed on
2822 * the tree. This function needs to be called with scheduler lock held.
2824 static enum ice_status
2825 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2826 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2828 struct ice_sched_agg_vsi_info *agg_vsi_info;
2829 struct ice_sched_agg_info *agg_info;
2830 enum ice_status status = ICE_SUCCESS;
2831 struct ice_hw *hw = pi->hw;
2834 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2835 return ICE_ERR_PARAM;
2836 agg_info = ice_get_agg_info(hw, agg_id);
2838 return ICE_ERR_PARAM;
2839 /* check if entry already exist */
2840 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2841 if (!agg_vsi_info) {
2842 /* Create new entry for VSI under aggregator list */
2843 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2844 ice_malloc(hw, sizeof(*agg_vsi_info));
2846 return ICE_ERR_PARAM;
2848 /* add VSI ID into the aggregator list */
2849 agg_vsi_info->vsi_handle = vsi_handle;
2850 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2852 /* Move VSI node to new aggregator node for requested TC(s) */
2853 ice_for_each_traffic_class(tc) {
2854 if (!ice_is_tc_ena(*tc_bitmap, tc))
2857 /* Move VSI to new aggregator */
2858 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2862 if (agg_id != ICE_DFLT_AGG_ID)
2863 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2865 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2867 /* If VSI moved back to default aggregator, delete agg_vsi_info. */
2868 if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
2869 ICE_MAX_TRAFFIC_CLASS)) {
2870 LIST_DEL(&agg_vsi_info->list_entry);
2871 ice_free(hw, agg_vsi_info);
2877 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2878 * @pi: port information structure
2880 * This function removes unused rate limit profiles from the HW and
2881 * SW DB. The caller needs to hold scheduler lock.
2883 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
2887 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
2888 struct ice_aqc_rl_profile_info *rl_prof_elem;
2889 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2891 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2892 &pi->rl_prof_list[ln],
2893 ice_aqc_rl_profile_info, list_entry) {
2894 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
2895 ice_debug(pi->hw, ICE_DBG_SCHED,
2896 "Removed rl profile\n");
2902 * ice_sched_update_elem - update element
2903 * @hw: pointer to the HW struct
2904 * @node: pointer to node
2905 * @info: node info to update
2907 * It updates the HW DB, and local SW DB of node. It updates the scheduling
2908 * parameters of node from argument info data buffer (Info->data buf) and
2909 * returns success or error on config sched element failure. The caller
2910 * needs to hold scheduler lock.
2912 static enum ice_status
2913 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2914 struct ice_aqc_txsched_elem_data *info)
2916 struct ice_aqc_conf_elem buf;
2917 enum ice_status status;
2921 buf.generic[0] = *info;
2922 /* Parent TEID is reserved field in this aq call */
2923 buf.generic[0].parent_teid = 0;
2924 /* Element type is reserved field in this aq call */
2925 buf.generic[0].data.elem_type = 0;
2926 /* Flags is reserved field in this aq call */
2927 buf.generic[0].data.flags = 0;
2930 /* Configure element node */
2931 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2933 if (status || elem_cfgd != num_elems) {
2934 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2938 /* Config success case */
2939 /* Now update local SW DB */
2940 /* Only copy the data portion of info buffer */
2941 node->info.data = info->data;
2946 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2947 * @hw: pointer to the HW struct
2948 * @node: sched node to configure
2949 * @rl_type: rate limit type CIR, EIR, or shared
2950 * @bw_alloc: BW weight/allocation
2952 * This function configures node element's BW allocation.
2954 static enum ice_status
2955 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2956 enum ice_rl_type rl_type, u16 bw_alloc)
2958 struct ice_aqc_txsched_elem_data buf;
2959 struct ice_aqc_txsched_elem *data;
2960 enum ice_status status;
2964 if (rl_type == ICE_MIN_BW) {
2965 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2966 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2967 } else if (rl_type == ICE_MAX_BW) {
2968 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2969 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2971 return ICE_ERR_PARAM;
2974 /* Configure element */
2975 status = ice_sched_update_elem(hw, node, &buf);
2980 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2981 * @pi: port information structure
2982 * @agg_id: aggregator ID
2983 * @vsi_handle: software VSI handle
2984 * @tc_bitmap: TC bitmap of enabled TC(s)
2986 * Move or associate VSI to a new or default aggregator node.
2989 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2992 ice_bitmap_t bitmap = tc_bitmap;
2993 enum ice_status status;
2995 ice_acquire_lock(&pi->sched_lock);
2996 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2997 (ice_bitmap_t *)&bitmap);
2999 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
3000 (ice_bitmap_t *)&bitmap);
3001 ice_release_lock(&pi->sched_lock);
3006 * ice_rm_agg_cfg - remove aggregator configuration
3007 * @pi: port information structure
3008 * @agg_id: aggregator ID
3010 * This function removes aggregator reference to VSI and delete aggregator ID
3011 * info. It removes the aggregator configuration completely.
3013 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
3015 struct ice_sched_agg_info *agg_info;
3016 enum ice_status status = ICE_SUCCESS;
3019 ice_acquire_lock(&pi->sched_lock);
3020 agg_info = ice_get_agg_info(pi->hw, agg_id);
3022 status = ICE_ERR_DOES_NOT_EXIST;
3023 goto exit_ice_rm_agg_cfg;
3026 ice_for_each_traffic_class(tc) {
3027 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
3029 goto exit_ice_rm_agg_cfg;
3032 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
3033 status = ICE_ERR_IN_USE;
3034 goto exit_ice_rm_agg_cfg;
3037 /* Safe to delete entry now */
3038 LIST_DEL(&agg_info->list_entry);
3039 ice_free(pi->hw, agg_info);
3041 /* Remove unused RL profile IDs from HW and SW DB */
3042 ice_sched_rm_unused_rl_prof(pi);
3044 exit_ice_rm_agg_cfg:
3045 ice_release_lock(&pi->sched_lock);
3050 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
3051 * @bw_t_info: bandwidth type information structure
3052 * @bw_alloc: Bandwidth allocation information
3054 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
3058 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3060 bw_t_info->cir_bw.bw_alloc = bw_alloc;
3061 if (bw_t_info->cir_bw.bw_alloc)
3062 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3064 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3068 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
3069 * @bw_t_info: bandwidth type information structure
3070 * @bw_alloc: Bandwidth allocation information
3072 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
3076 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3078 bw_t_info->eir_bw.bw_alloc = bw_alloc;
3079 if (bw_t_info->eir_bw.bw_alloc)
3080 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3082 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3086 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3087 * @pi: port information structure
3088 * @vsi_handle: sw VSI handle
3089 * @tc: traffic class
3090 * @rl_type: rate limit type min or max
3091 * @bw_alloc: Bandwidth allocation information
3093 * Save BW alloc information of VSI type node for post replay use.
3095 static enum ice_status
3096 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3097 enum ice_rl_type rl_type, u16 bw_alloc)
3099 struct ice_vsi_ctx *vsi_ctx;
3101 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3102 return ICE_ERR_PARAM;
3103 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3105 return ICE_ERR_PARAM;
3108 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3112 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3116 return ICE_ERR_PARAM;
3122 * ice_set_clear_cir_bw - set or clear CIR BW
3123 * @bw_t_info: bandwidth type information structure
3124 * @bw: bandwidth in Kbps - Kilo bits per sec
3126 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3128 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3130 if (bw == ICE_SCHED_DFLT_BW) {
3131 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3132 bw_t_info->cir_bw.bw = 0;
3134 /* Save type of BW information */
3135 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3136 bw_t_info->cir_bw.bw = bw;
3141 * ice_set_clear_eir_bw - set or clear EIR BW
3142 * @bw_t_info: bandwidth type information structure
3143 * @bw: bandwidth in Kbps - Kilo bits per sec
3145 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3147 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3149 if (bw == ICE_SCHED_DFLT_BW) {
3150 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3151 bw_t_info->eir_bw.bw = 0;
3153 /* EIR BW and Shared BW profiles are mutually exclusive and
3154 * hence only one of them may be set for any given element.
3155 * First clear earlier saved shared BW information.
3157 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3158 bw_t_info->shared_bw = 0;
3159 /* save EIR BW information */
3160 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3161 bw_t_info->eir_bw.bw = bw;
3166 * ice_set_clear_shared_bw - set or clear shared BW
3167 * @bw_t_info: bandwidth type information structure
3168 * @bw: bandwidth in Kbps - Kilo bits per sec
3170 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3172 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3174 if (bw == ICE_SCHED_DFLT_BW) {
3175 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3176 bw_t_info->shared_bw = 0;
3178 /* EIR BW and Shared BW profiles are mutually exclusive and
3179 * hence only one of them may be set for any given element.
3180 * First clear earlier saved EIR BW information.
3182 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3183 bw_t_info->eir_bw.bw = 0;
3184 /* save shared BW information */
3185 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3186 bw_t_info->shared_bw = bw;
3191 * ice_sched_save_vsi_bw - save VSI node's BW information
3192 * @pi: port information structure
3193 * @vsi_handle: sw VSI handle
3194 * @tc: traffic class
3195 * @rl_type: rate limit type min, max, or shared
3196 * @bw: bandwidth in Kbps - Kilo bits per sec
3198 * Save BW information of VSI type node for post replay use.
3200 static enum ice_status
3201 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3202 enum ice_rl_type rl_type, u32 bw)
3204 struct ice_vsi_ctx *vsi_ctx;
3206 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3207 return ICE_ERR_PARAM;
3208 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3210 return ICE_ERR_PARAM;
3213 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3216 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3219 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3222 return ICE_ERR_PARAM;
3228 * ice_set_clear_prio - set or clear priority information
3229 * @bw_t_info: bandwidth type information structure
3230 * @prio: priority to save
3232 * Save or clear priority (prio) in the passed param bw_t_info.
3234 static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3236 bw_t_info->generic = prio;
3237 if (bw_t_info->generic)
3238 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3240 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3244 * ice_sched_save_vsi_prio - save VSI node's priority information
3245 * @pi: port information structure
3246 * @vsi_handle: Software VSI handle
3247 * @tc: traffic class
3248 * @prio: priority to save
3250 * Save priority information of VSI type node for post replay use.
3252 static enum ice_status
3253 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3256 struct ice_vsi_ctx *vsi_ctx;
3258 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3259 return ICE_ERR_PARAM;
3260 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3262 return ICE_ERR_PARAM;
3263 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3264 return ICE_ERR_PARAM;
3265 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3270 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3271 * @pi: port information structure
3272 * @agg_id: node aggregator ID
3273 * @tc: traffic class
3274 * @rl_type: rate limit type min or max
3275 * @bw_alloc: bandwidth alloc information
3277 * Save BW alloc information of AGG type node for post replay use.
3279 static enum ice_status
3280 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3281 enum ice_rl_type rl_type, u16 bw_alloc)
3283 struct ice_sched_agg_info *agg_info;
3285 agg_info = ice_get_agg_info(pi->hw, agg_id);
3287 return ICE_ERR_PARAM;
3288 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3289 return ICE_ERR_PARAM;
3292 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3295 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3298 return ICE_ERR_PARAM;
3304 * ice_sched_save_agg_bw - save aggregator node's BW information
3305 * @pi: port information structure
3306 * @agg_id: node aggregator ID
3307 * @tc: traffic class
3308 * @rl_type: rate limit type min, max, or shared
3309 * @bw: bandwidth in Kbps - Kilo bits per sec
3311 * Save BW information of AGG type node for post replay use.
3313 static enum ice_status
3314 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3315 enum ice_rl_type rl_type, u32 bw)
3317 struct ice_sched_agg_info *agg_info;
3319 agg_info = ice_get_agg_info(pi->hw, agg_id);
3321 return ICE_ERR_PARAM;
3322 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3323 return ICE_ERR_PARAM;
3326 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3329 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3332 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3335 return ICE_ERR_PARAM;
3341 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3342 * @pi: port information structure
3343 * @vsi_handle: software VSI handle
3344 * @tc: traffic class
3345 * @rl_type: min or max
3346 * @bw: bandwidth in Kbps
3348 * This function configures BW limit of VSI scheduling node based on TC
3352 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3353 enum ice_rl_type rl_type, u32 bw)
3355 enum ice_status status;
3357 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3361 ice_acquire_lock(&pi->sched_lock);
3362 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3363 ice_release_lock(&pi->sched_lock);
3369 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3370 * @pi: port information structure
3371 * @vsi_handle: software VSI handle
3372 * @tc: traffic class
3373 * @rl_type: min or max
3375 * This function configures default BW limit of VSI scheduling node based on TC
3379 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3380 enum ice_rl_type rl_type)
3382 enum ice_status status;
3384 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3389 ice_acquire_lock(&pi->sched_lock);
3390 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3392 ice_release_lock(&pi->sched_lock);
3398 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3399 * @pi: port information structure
3400 * @agg_id: aggregator ID
3401 * @tc: traffic class
3402 * @rl_type: min or max
3403 * @bw: bandwidth in Kbps
3405 * This function applies BW limit to aggregator scheduling node based on TC
3409 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3410 enum ice_rl_type rl_type, u32 bw)
3412 enum ice_status status;
3414 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3417 ice_acquire_lock(&pi->sched_lock);
3418 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3419 ice_release_lock(&pi->sched_lock);
3425 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3426 * @pi: port information structure
3427 * @agg_id: aggregator ID
3428 * @tc: traffic class
3429 * @rl_type: min or max
3431 * This function applies default BW limit to aggregator scheduling node based
3432 * on TC information.
3435 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3436 enum ice_rl_type rl_type)
3438 enum ice_status status;
3440 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3444 ice_acquire_lock(&pi->sched_lock);
3445 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3447 ice_release_lock(&pi->sched_lock);
3453 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3454 * @pi: port information structure
3455 * @vsi_handle: software VSI handle
3456 * @bw: bandwidth in Kbps
3458 * This function Configures shared rate limiter(SRL) of all VSI type nodes
3459 * across all traffic classes for VSI matching handle.
3462 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
3464 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
3468 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3469 * @pi: port information structure
3470 * @vsi_handle: software VSI handle
3472 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3473 * across all traffic classes for VSI matching handle.
3476 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3478 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3483 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3484 * @pi: port information structure
3485 * @agg_id: aggregator ID
3486 * @bw: bandwidth in Kbps
3488 * This function configures the shared rate limiter(SRL) of all aggregator type
3489 * nodes across all traffic classes for aggregator matching agg_id.
3492 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
3494 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
3498 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3499 * @pi: port information structure
3500 * @agg_id: aggregator ID
3502 * This function removes the shared rate limiter(SRL) of all aggregator type
3503 * nodes across all traffic classes for aggregator matching agg_id.
3506 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3508 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
3512 * ice_config_vsi_queue_priority - config VSI queue priority of node
3513 * @pi: port information structure
3514 * @num_qs: number of VSI queues
3515 * @q_ids: queue IDs array
3516 * @q_prio: queue priority array
3518 * This function configures the queue node priority (Sibling Priority) of the
3519 * passed in VSI's queue(s) for a given traffic class (TC).
3522 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3525 enum ice_status status = ICE_ERR_PARAM;
3528 ice_acquire_lock(&pi->sched_lock);
3530 for (i = 0; i < num_qs; i++) {
3531 struct ice_sched_node *node;
3533 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3534 if (!node || node->info.data.elem_type !=
3535 ICE_AQC_ELEM_TYPE_LEAF) {
3536 status = ICE_ERR_PARAM;
3539 /* Configure Priority */
3540 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3545 ice_release_lock(&pi->sched_lock);
3550 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3551 * @pi: port information structure
3552 * @agg_id: Aggregator ID
3553 * @num_vsis: number of VSI(s)
3554 * @vsi_handle_arr: array of software VSI handles
3555 * @node_prio: pointer to node priority
3556 * @tc: traffic class
3558 * This function configures the node priority (Sibling Priority) of the
3559 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3562 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3563 u16 num_vsis, u16 *vsi_handle_arr,
3564 u8 *node_prio, u8 tc)
3566 struct ice_sched_agg_vsi_info *agg_vsi_info;
3567 struct ice_sched_node *tc_node, *agg_node;
3568 enum ice_status status = ICE_ERR_PARAM;
3569 struct ice_sched_agg_info *agg_info;
3570 bool agg_id_present = false;
3571 struct ice_hw *hw = pi->hw;
3574 ice_acquire_lock(&pi->sched_lock);
3575 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3577 if (agg_info->agg_id == agg_id) {
3578 agg_id_present = true;
3581 if (!agg_id_present)
3582 goto exit_agg_priority_per_tc;
3584 tc_node = ice_sched_get_tc_node(pi, tc);
3586 goto exit_agg_priority_per_tc;
3588 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3590 goto exit_agg_priority_per_tc;
3592 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3593 goto exit_agg_priority_per_tc;
3595 for (i = 0; i < num_vsis; i++) {
3596 struct ice_sched_node *vsi_node;
3597 bool vsi_handle_valid = false;
3600 status = ICE_ERR_PARAM;
3601 vsi_handle = vsi_handle_arr[i];
3602 if (!ice_is_vsi_valid(hw, vsi_handle))
3603 goto exit_agg_priority_per_tc;
3604 /* Verify child nodes before applying settings */
3605 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3606 ice_sched_agg_vsi_info, list_entry)
3607 if (agg_vsi_info->vsi_handle == vsi_handle) {
3608 /* cppcheck-suppress unreadVariable */
3609 vsi_handle_valid = true;
3613 if (!vsi_handle_valid)
3614 goto exit_agg_priority_per_tc;
3616 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3618 goto exit_agg_priority_per_tc;
3620 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3621 /* Configure Priority */
3622 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3626 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3633 exit_agg_priority_per_tc:
3634 ice_release_lock(&pi->sched_lock);
3639 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3640 * @pi: port information structure
3641 * @vsi_handle: software VSI handle
3642 * @ena_tcmap: enabled TC map
3643 * @rl_type: Rate limit type CIR/EIR
3644 * @bw_alloc: Array of BW alloc
3646 * This function configures the BW allocation of the passed in VSI's
3647 * node(s) for enabled traffic class.
3650 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3651 enum ice_rl_type rl_type, u8 *bw_alloc)
3653 enum ice_status status = ICE_SUCCESS;
3656 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3657 return ICE_ERR_PARAM;
3659 ice_acquire_lock(&pi->sched_lock);
3661 /* Return success if no nodes are present across TC */
3662 ice_for_each_traffic_class(tc) {
3663 struct ice_sched_node *tc_node, *vsi_node;
3665 if (!ice_is_tc_ena(ena_tcmap, tc))
3668 tc_node = ice_sched_get_tc_node(pi, tc);
3672 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3676 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3680 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3681 rl_type, bw_alloc[tc]);
3686 ice_release_lock(&pi->sched_lock);
3691 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3692 * @pi: port information structure
3693 * @agg_id: aggregator ID
3694 * @ena_tcmap: enabled TC map
3695 * @rl_type: rate limit type CIR/EIR
3696 * @bw_alloc: array of BW alloc
3698 * This function configures the BW allocation of passed in aggregator for
3699 * enabled traffic class(s).
3702 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3703 enum ice_rl_type rl_type, u8 *bw_alloc)
3705 struct ice_sched_agg_info *agg_info;
3706 bool agg_id_present = false;
3707 enum ice_status status = ICE_SUCCESS;
3708 struct ice_hw *hw = pi->hw;
3711 ice_acquire_lock(&pi->sched_lock);
3712 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3714 if (agg_info->agg_id == agg_id) {
3715 agg_id_present = true;
3718 if (!agg_id_present) {
3719 status = ICE_ERR_PARAM;
3720 goto exit_cfg_agg_bw_alloc;
3723 /* Return success if no nodes are present across TC */
3724 ice_for_each_traffic_class(tc) {
3725 struct ice_sched_node *tc_node, *agg_node;
3727 if (!ice_is_tc_ena(ena_tcmap, tc))
3730 tc_node = ice_sched_get_tc_node(pi, tc);
3734 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3738 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3742 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3748 exit_cfg_agg_bw_alloc:
3749 ice_release_lock(&pi->sched_lock);
3754 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3755 * @hw: pointer to the HW struct
3756 * @bw: bandwidth in Kbps
3758 * This function calculates the wakeup parameter of RL profile.
3760 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3762 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3766 /* Get the wakeup integer value */
3767 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3768 wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
3769 if (wakeup_int > 63) {
3770 wakeup = (u16)((1 << 15) | wakeup_int);
3772 /* Calculate fraction value up to 4 decimals
3773 * Convert Integer value to a constant multiplier
3775 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3776 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3777 hw->psm_clk_freq, bytes_per_sec);
3779 /* Get Fraction value */
3780 wakeup_f = wakeup_a - wakeup_b;
3782 /* Round up the Fractional value via Ceil(Fractional value) */
3783 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3786 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3787 ICE_RL_PROF_MULTIPLIER);
3788 wakeup |= (u16)(wakeup_int << 9);
3789 wakeup |= (u16)(0x1ff & wakeup_f_int);
3796 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3797 * @hw: pointer to the HW struct
3798 * @bw: bandwidth in Kbps
3799 * @profile: profile parameters to return
3801 * This function converts the BW to profile structure format.
3803 static enum ice_status
3804 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3805 struct ice_aqc_rl_profile_elem *profile)
3807 enum ice_status status = ICE_ERR_PARAM;
3808 s64 bytes_per_sec, ts_rate, mv_tmp;
3814 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3815 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3818 /* Bytes per second from Kbps */
3819 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3821 /* encode is 6 bits but really useful are 5 bits */
3822 for (i = 0; i < 64; i++) {
3823 u64 pow_result = BIT_ULL(i);
3825 ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
3826 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3830 /* Multiplier value */
3831 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3834 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3835 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3837 /* First multiplier value greater than the given
3840 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3849 wm = ice_sched_calc_wakeup(hw, bw);
3850 profile->rl_multiply = CPU_TO_LE16(mv);
3851 profile->wake_up_calc = CPU_TO_LE16(wm);
3852 profile->rl_encode = CPU_TO_LE16(encode);
3853 status = ICE_SUCCESS;
3855 status = ICE_ERR_DOES_NOT_EXIST;
3862 * ice_sched_add_rl_profile - add RL profile
3863 * @pi: port information structure
3864 * @rl_type: type of rate limit BW - min, max, or shared
3865 * @bw: bandwidth in Kbps - Kilo bits per sec
3866 * @layer_num: specifies in which layer to create profile
3868 * This function first checks the existing list for corresponding BW
3869 * parameter. If it exists, it returns the associated profile otherwise
3870 * it creates a new rate limit profile for requested BW, and adds it to
3871 * the HW DB and local list. It returns the new profile or null on error.
3872 * The caller needs to hold the scheduler lock.
3874 static struct ice_aqc_rl_profile_info *
3875 ice_sched_add_rl_profile(struct ice_port_info *pi,
3876 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3878 struct ice_aqc_rl_profile_generic_elem *buf;
3879 struct ice_aqc_rl_profile_info *rl_prof_elem;
3880 u16 profiles_added = 0, num_profiles = 1;
3881 enum ice_status status;
3885 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3889 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3892 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3895 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3904 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3905 ice_aqc_rl_profile_info, list_entry)
3906 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
3907 profile_type && rl_prof_elem->bw == bw)
3908 /* Return existing profile ID info */
3909 return rl_prof_elem;
3911 /* Create new profile ID */
3912 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3913 ice_malloc(hw, sizeof(*rl_prof_elem));
3918 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
3919 if (status != ICE_SUCCESS)
3920 goto exit_add_rl_prof;
3922 rl_prof_elem->bw = bw;
3923 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3924 rl_prof_elem->profile.level = layer_num + 1;
3925 rl_prof_elem->profile.flags = profile_type;
3926 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3928 /* Create new entry in HW DB */
3929 buf = (struct ice_aqc_rl_profile_generic_elem *)
3930 &rl_prof_elem->profile;
3931 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3932 &profiles_added, NULL);
3933 if (status || profiles_added != num_profiles)
3934 goto exit_add_rl_prof;
3936 /* Good entry - add in the list */
3937 rl_prof_elem->prof_id_ref = 0;
3938 LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3939 return rl_prof_elem;
3942 ice_free(hw, rl_prof_elem);
3947 * ice_sched_cfg_node_bw_lmt - configure node sched params
3948 * @hw: pointer to the HW struct
3949 * @node: sched node to configure
3950 * @rl_type: rate limit type CIR, EIR, or shared
3951 * @rl_prof_id: rate limit profile ID
3953 * This function configures node element's BW limit.
3955 static enum ice_status
3956 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3957 enum ice_rl_type rl_type, u16 rl_prof_id)
3959 struct ice_aqc_txsched_elem_data buf;
3960 struct ice_aqc_txsched_elem *data;
3966 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3967 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3970 /* EIR BW and Shared BW profiles are mutually exclusive and
3971 * hence only one of them may be set for any given element
3973 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3975 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3976 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3979 /* Check for removing shared BW */
3980 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3981 /* remove shared profile */
3982 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3983 data->srl_id = 0; /* clear SRL field */
3985 /* enable back EIR to default profile */
3986 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3987 data->eir_bw.bw_profile_idx =
3988 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3991 /* EIR BW and Shared BW profiles are mutually exclusive and
3992 * hence only one of them may be set for any given element
3994 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3995 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3996 ICE_SCHED_DFLT_RL_PROF_ID))
3998 /* EIR BW is set to default, disable it */
3999 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
4000 /* Okay to enable shared BW now */
4001 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
4002 data->srl_id = CPU_TO_LE16(rl_prof_id);
4005 /* Unknown rate limit type */
4006 return ICE_ERR_PARAM;
4009 /* Configure element */
4010 return ice_sched_update_elem(hw, node, &buf);
4014 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
4016 * @rl_type: rate limit type
4018 * If existing profile matches, it returns the corresponding rate
4019 * limit profile ID, otherwise it returns an invalid ID as error.
4022 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
4023 enum ice_rl_type rl_type)
4025 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
4026 struct ice_aqc_txsched_elem *data;
4028 data = &node->info.data;
4031 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
4032 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
4035 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
4036 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
4039 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
4040 rl_prof_id = LE16_TO_CPU(data->srl_id);
4050 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
4051 * @pi: port information structure
4052 * @rl_type: type of rate limit BW - min, max, or shared
4053 * @layer_index: layer index
4055 * This function returns requested profile creation layer.
4058 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
4061 struct ice_hw *hw = pi->hw;
4063 if (layer_index >= hw->num_tx_sched_layers)
4064 return ICE_SCHED_INVAL_LAYER_NUM;
4067 if (hw->layer_info[layer_index].max_cir_rl_profiles)
4071 if (hw->layer_info[layer_index].max_eir_rl_profiles)
4075 /* if current layer doesn't support SRL profile creation
4076 * then try a layer up or down.
4078 if (hw->layer_info[layer_index].max_srl_profiles)
4080 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4081 hw->layer_info[layer_index + 1].max_srl_profiles)
4082 return layer_index + 1;
4083 else if (layer_index > 0 &&
4084 hw->layer_info[layer_index - 1].max_srl_profiles)
4085 return layer_index - 1;
4090 return ICE_SCHED_INVAL_LAYER_NUM;
4094 * ice_sched_get_srl_node - get shared rate limit node
4096 * @srl_layer: shared rate limit layer
4098 * This function returns SRL node to be used for shared rate limit purpose.
4099 * The caller needs to hold scheduler lock.
4101 static struct ice_sched_node *
4102 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4104 if (srl_layer > node->tx_sched_layer)
4105 return node->children[0];
4106 else if (srl_layer < node->tx_sched_layer)
4107 /* Node can't be created without a parent. It will always
4108 * have a valid parent except root node.
4110 return node->parent;
4116 * ice_sched_rm_rl_profile - remove RL profile ID
4117 * @pi: port information structure
4118 * @layer_num: layer number where profiles are saved
4119 * @profile_type: profile type like EIR, CIR, or SRL
4120 * @profile_id: profile ID to remove
4122 * This function removes rate limit profile from layer 'layer_num' of type
4123 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4126 static enum ice_status
4127 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
4130 struct ice_aqc_rl_profile_info *rl_prof_elem;
4131 enum ice_status status = ICE_SUCCESS;
4133 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4134 return ICE_ERR_PARAM;
4135 /* Check the existing list for RL profile */
4136 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
4137 ice_aqc_rl_profile_info, list_entry)
4138 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
4140 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4142 if (rl_prof_elem->prof_id_ref)
4143 rl_prof_elem->prof_id_ref--;
4145 /* Remove old profile ID from database */
4146 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
4147 if (status && status != ICE_ERR_IN_USE)
4148 ice_debug(pi->hw, ICE_DBG_SCHED,
4149 "Remove rl profile failed\n");
4152 if (status == ICE_ERR_IN_USE)
4153 status = ICE_SUCCESS;
4158 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4159 * @pi: port information structure
4160 * @node: pointer to node structure
4161 * @rl_type: rate limit type min, max, or shared
4162 * @layer_num: layer number where RL profiles are saved
4164 * This function configures node element's BW rate limit profile ID of
4165 * type CIR, EIR, or SRL to default. This function needs to be called
4166 * with the scheduler lock held.
4168 static enum ice_status
4169 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4170 struct ice_sched_node *node,
4171 enum ice_rl_type rl_type, u8 layer_num)
4173 enum ice_status status;
4182 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4183 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4186 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4187 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4190 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4191 /* No SRL is configured for default case */
4192 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4195 return ICE_ERR_PARAM;
4197 /* Save existing RL prof ID for later clean up */
4198 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4199 /* Configure BW scheduling parameters */
4200 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4204 /* Remove stale RL profile ID */
4205 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4206 old_id == ICE_SCHED_INVAL_PROF_ID)
4209 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
4213 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
4214 * @pi: port information structure
4215 * @node: pointer to node structure
4216 * @layer_num: layer number where rate limit profiles are saved
4217 * @rl_type: rate limit type min, max, or shared
4218 * @bw: bandwidth value
4220 * This function prepares node element's bandwidth to SRL or EIR exclusively.
4221 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
4222 * them may be set for any given element. This function needs to be called
4223 * with the scheduler lock held.
4225 static enum ice_status
4226 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
4227 struct ice_sched_node *node,
4228 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
4230 if (rl_type == ICE_SHARED_BW) {
4231 /* SRL node passed in this case, it may be different node */
4232 if (bw == ICE_SCHED_DFLT_BW)
4233 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
4234 * enables EIR to default. EIR is not set in this
4235 * case, so no additional action is required.
4239 /* SRL being configured, set EIR to default here.
4240 * ice_sched_cfg_node_bw_lmt() disables EIR when it
4243 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
4245 } else if (rl_type == ICE_MAX_BW &&
4246 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
4247 /* Remove Shared profile. Set default shared BW call
4248 * removes shared profile for a node.
4250 return ice_sched_set_node_bw_dflt(pi, node,
4258 * ice_sched_set_node_bw - set node's bandwidth
4259 * @pi: port information structure
4261 * @rl_type: rate limit type min, max, or shared
4262 * @bw: bandwidth in Kbps - Kilo bits per sec
4263 * @layer_num: layer number
4265 * This function adds new profile corresponding to requested BW, configures
4266 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4267 * ID from local database. The caller needs to hold scheduler lock.
4269 static enum ice_status
4270 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4271 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4273 struct ice_aqc_rl_profile_info *rl_prof_info;
4274 enum ice_status status = ICE_ERR_PARAM;
4275 struct ice_hw *hw = pi->hw;
4276 u16 old_id, rl_prof_id;
4278 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
4282 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4284 /* Save existing RL prof ID for later clean up */
4285 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4286 /* Configure BW scheduling parameters */
4287 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4291 /* New changes has been applied */
4292 /* Increment the profile ID reference count */
4293 rl_prof_info->prof_id_ref++;
4295 /* Check for old ID removal */
4296 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4297 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4300 return ice_sched_rm_rl_profile(pi, layer_num,
4301 rl_prof_info->profile.flags &
4302 ICE_AQC_RL_PROFILE_TYPE_M, old_id);
4306 * ice_sched_set_node_bw_lmt - set node's BW limit
4307 * @pi: port information structure
4309 * @rl_type: rate limit type min, max, or shared
4310 * @bw: bandwidth in Kbps - Kilo bits per sec
4312 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4313 * EIR, or SRL. The caller needs to hold scheduler lock.
4315 static enum ice_status
4316 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4317 enum ice_rl_type rl_type, u32 bw)
4319 struct ice_sched_node *cfg_node = node;
4320 enum ice_status status;
4326 return ICE_ERR_PARAM;
4328 /* Remove unused RL profile IDs from HW and SW DB */
4329 ice_sched_rm_unused_rl_prof(pi);
4330 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4331 node->tx_sched_layer);
4332 if (layer_num >= hw->num_tx_sched_layers)
4333 return ICE_ERR_PARAM;
4335 if (rl_type == ICE_SHARED_BW) {
4336 /* SRL node may be different */
4337 cfg_node = ice_sched_get_srl_node(node, layer_num);
4341 /* EIR BW and Shared BW profiles are mutually exclusive and
4342 * hence only one of them may be set for any given element
4344 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
4348 if (bw == ICE_SCHED_DFLT_BW)
4349 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
4351 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
4355 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4356 * @pi: port information structure
4357 * @node: pointer to node structure
4358 * @rl_type: rate limit type min, max, or shared
4360 * This function configures node element's BW rate limit profile ID of
4361 * type CIR, EIR, or SRL to default. This function needs to be called
4362 * with the scheduler lock held.
4364 static enum ice_status
4365 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4366 struct ice_sched_node *node,
4367 enum ice_rl_type rl_type)
4369 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4374 * ice_sched_validate_srl_node - Check node for SRL applicability
4375 * @node: sched node to configure
4376 * @sel_layer: selected SRL layer
4378 * This function checks if the SRL can be applied to a selceted layer node on
4379 * behalf of the requested node (first argument). This function needs to be
4380 * called with scheduler lock held.
4382 static enum ice_status
4383 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4385 /* SRL profiles are not available on all layers. Check if the
4386 * SRL profile can be applied to a node above or below the
4387 * requested node. SRL configuration is possible only if the
4388 * selected layer's node has single child.
4390 if (sel_layer == node->tx_sched_layer ||
4391 ((sel_layer == node->tx_sched_layer + 1) &&
4392 node->num_children == 1) ||
4393 ((sel_layer == node->tx_sched_layer - 1) &&
4394 (node->parent && node->parent->num_children == 1)))
4401 * ice_sched_save_q_bw - save queue node's BW information
4402 * @q_ctx: queue context structure
4403 * @rl_type: rate limit type min, max, or shared
4404 * @bw: bandwidth in Kbps - Kilo bits per sec
4406 * Save BW information of queue type node for post replay use.
4408 static enum ice_status
4409 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4413 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4416 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4419 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4422 return ICE_ERR_PARAM;
4428 * ice_sched_set_q_bw_lmt - sets queue BW limit
4429 * @pi: port information structure
4430 * @vsi_handle: sw VSI handle
4431 * @tc: traffic class
4432 * @q_handle: software queue handle
4433 * @rl_type: min, max, or shared
4434 * @bw: bandwidth in Kbps
4436 * This function sets BW limit of queue scheduling node.
4438 static enum ice_status
4439 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4440 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4442 enum ice_status status = ICE_ERR_PARAM;
4443 struct ice_sched_node *node;
4444 struct ice_q_ctx *q_ctx;
4446 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4447 return ICE_ERR_PARAM;
4448 ice_acquire_lock(&pi->sched_lock);
4449 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4452 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4454 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4458 /* Return error if it is not a leaf node */
4459 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4462 /* SRL bandwidth layer selection */
4463 if (rl_type == ICE_SHARED_BW) {
4464 u8 sel_layer; /* selected layer */
4466 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4467 node->tx_sched_layer);
4468 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4469 status = ICE_ERR_PARAM;
4472 status = ice_sched_validate_srl_node(node, sel_layer);
4477 if (bw == ICE_SCHED_DFLT_BW)
4478 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4480 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4483 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4486 ice_release_lock(&pi->sched_lock);
4491 * ice_cfg_q_bw_lmt - configure queue BW limit
4492 * @pi: port information structure
4493 * @vsi_handle: sw VSI handle
4494 * @tc: traffic class
4495 * @q_handle: software queue handle
4496 * @rl_type: min, max, or shared
4497 * @bw: bandwidth in Kbps
4499 * This function configures BW limit of queue scheduling node.
4502 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4503 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4505 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4510 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4511 * @pi: port information structure
4512 * @vsi_handle: sw VSI handle
4513 * @tc: traffic class
4514 * @q_handle: software queue handle
4515 * @rl_type: min, max, or shared
4517 * This function configures BW default limit of queue scheduling node.
4520 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4521 u16 q_handle, enum ice_rl_type rl_type)
4523 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4528 * ice_sched_save_tc_node_bw - save TC node BW limit
4529 * @pi: port information structure
4531 * @rl_type: min or max
4532 * @bw: bandwidth in Kbps
4534 * This function saves the modified values of bandwidth settings for later
4535 * replay purpose (restore) after reset.
4537 static enum ice_status
4538 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4539 enum ice_rl_type rl_type, u32 bw)
4541 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4542 return ICE_ERR_PARAM;
4545 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4548 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4551 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4554 return ICE_ERR_PARAM;
4560 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4561 * @pi: port information structure
4563 * @rl_type: min or max
4564 * @bw: bandwidth in Kbps
4566 * This function configures bandwidth limit of TC node.
4568 static enum ice_status
4569 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4570 enum ice_rl_type rl_type, u32 bw)
4572 enum ice_status status = ICE_ERR_PARAM;
4573 struct ice_sched_node *tc_node;
4575 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4577 ice_acquire_lock(&pi->sched_lock);
4578 tc_node = ice_sched_get_tc_node(pi, tc);
4580 goto exit_set_tc_node_bw;
4581 if (bw == ICE_SCHED_DFLT_BW)
4582 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4584 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4586 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4588 exit_set_tc_node_bw:
4589 ice_release_lock(&pi->sched_lock);
4594 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4595 * @pi: port information structure
4597 * @rl_type: min or max
4598 * @bw: bandwidth in Kbps
4600 * This function configures BW limit of TC node.
4601 * Note: The minimum guaranteed reservation is done via DCBX.
4604 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4605 enum ice_rl_type rl_type, u32 bw)
4607 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4611 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4612 * @pi: port information structure
4614 * @rl_type: min or max
4616 * This function configures BW default limit of TC node.
4619 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4620 enum ice_rl_type rl_type)
4622 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4626 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4627 * @pi: port information structure
4628 * @tc: traffic class
4629 * @rl_type: rate limit type min or max
4630 * @bw_alloc: Bandwidth allocation information
4632 * Save BW alloc information of VSI type node for post replay use.
4634 static enum ice_status
4635 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4636 enum ice_rl_type rl_type, u16 bw_alloc)
4638 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4639 return ICE_ERR_PARAM;
4642 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4646 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4650 return ICE_ERR_PARAM;
4656 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4657 * @pi: port information structure
4659 * @rl_type: min or max
4660 * @bw_alloc: bandwidth alloc
4662 * This function configures bandwidth alloc of TC node, also saves the
4663 * changed settings for replay purpose, and return success if it succeeds
4664 * in modifying bandwidth alloc setting.
4666 static enum ice_status
4667 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4668 enum ice_rl_type rl_type, u8 bw_alloc)
4670 enum ice_status status = ICE_ERR_PARAM;
4671 struct ice_sched_node *tc_node;
4673 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4675 ice_acquire_lock(&pi->sched_lock);
4676 tc_node = ice_sched_get_tc_node(pi, tc);
4678 goto exit_set_tc_node_bw_alloc;
4679 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4682 goto exit_set_tc_node_bw_alloc;
4683 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4685 exit_set_tc_node_bw_alloc:
4686 ice_release_lock(&pi->sched_lock);
4691 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4692 * @pi: port information structure
4694 * @rl_type: min or max
4695 * @bw_alloc: bandwidth alloc
4697 * This function configures BW limit of TC node.
4698 * Note: The minimum guaranteed reservation is done via DCBX.
4701 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4702 enum ice_rl_type rl_type, u8 bw_alloc)
4704 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4708 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4709 * @pi: port information structure
4710 * @vsi_handle: software VSI handle
4712 * This function retrieves the aggregator ID based on VSI ID and TC,
4713 * and sets node's BW limit to default. This function needs to be
4714 * called with the scheduler lock held.
4717 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4719 struct ice_vsi_ctx *vsi_ctx;
4720 enum ice_status status = ICE_SUCCESS;
4723 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4724 return ICE_ERR_PARAM;
4725 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4727 return ICE_ERR_PARAM;
4729 ice_for_each_traffic_class(tc) {
4730 struct ice_sched_node *node;
4732 node = vsi_ctx->sched.ag_node[tc];
4736 /* Set min profile to default */
4737 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4741 /* Set max profile to default */
4742 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4746 /* Remove shared profile, if there is one */
4747 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4757 * ice_sched_get_node_by_id_type - get node from ID type
4758 * @pi: port information structure
4760 * @agg_type: type of aggregator
4761 * @tc: traffic class
4763 * This function returns node identified by ID of type aggregator, and
4764 * based on traffic class (TC). This function needs to be called with
4765 * the scheduler lock held.
4767 static struct ice_sched_node *
4768 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4769 enum ice_agg_type agg_type, u8 tc)
4771 struct ice_sched_node *node = NULL;
4772 struct ice_sched_node *child_node;
4775 case ICE_AGG_TYPE_VSI: {
4776 struct ice_vsi_ctx *vsi_ctx;
4777 u16 vsi_handle = (u16)id;
4779 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4781 /* Get sched_vsi_info */
4782 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4785 node = vsi_ctx->sched.vsi_node[tc];
4789 case ICE_AGG_TYPE_AGG: {
4790 struct ice_sched_node *tc_node;
4792 tc_node = ice_sched_get_tc_node(pi, tc);
4794 node = ice_sched_get_agg_node(pi, tc_node, id);
4798 case ICE_AGG_TYPE_Q:
4799 /* The current implementation allows single queue to modify */
4800 node = ice_sched_get_node(pi, id);
4803 case ICE_AGG_TYPE_QG:
4804 /* The current implementation allows single qg to modify */
4805 child_node = ice_sched_get_node(pi, id);
4808 node = child_node->parent;
4819 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4820 * @pi: port information structure
4821 * @id: ID (software VSI handle or AGG ID)
4822 * @agg_type: aggregator type (VSI or AGG type node)
4823 * @tc: traffic class
4824 * @rl_type: min or max
4825 * @bw: bandwidth in Kbps
4827 * This function sets BW limit of VSI or Aggregator scheduling node
4828 * based on TC information from passed in argument BW.
4831 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4832 enum ice_agg_type agg_type, u8 tc,
4833 enum ice_rl_type rl_type, u32 bw)
4835 enum ice_status status = ICE_ERR_PARAM;
4836 struct ice_sched_node *node;
4841 if (rl_type == ICE_UNKNOWN_BW)
4844 ice_acquire_lock(&pi->sched_lock);
4845 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4847 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4848 goto exit_set_node_bw_lmt_per_tc;
4850 if (bw == ICE_SCHED_DFLT_BW)
4851 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4853 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4855 exit_set_node_bw_lmt_per_tc:
4856 ice_release_lock(&pi->sched_lock);
4861 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4862 * @pi: port information structure
4863 * @vsi_handle: software VSI handle
4865 * This function validates SRL node of the VSI node if available SRL layer is
4866 * different than the VSI node layer on all TC(s).This function needs to be
4867 * called with scheduler lock held.
4869 static enum ice_status
4870 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4872 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4875 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4876 return ICE_ERR_PARAM;
4878 /* Return success if no nodes are present across TC */
4879 ice_for_each_traffic_class(tc) {
4880 struct ice_sched_node *tc_node, *vsi_node;
4881 enum ice_rl_type rl_type = ICE_SHARED_BW;
4882 enum ice_status status;
4884 tc_node = ice_sched_get_tc_node(pi, tc);
4888 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4892 /* SRL bandwidth layer selection */
4893 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4894 u8 node_layer = vsi_node->tx_sched_layer;
4897 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4899 if (layer_num >= pi->hw->num_tx_sched_layers)
4900 return ICE_ERR_PARAM;
4901 sel_layer = layer_num;
4904 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4912 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4913 * @pi: port information structure
4914 * @vsi_handle: software VSI handle
4915 * @bw: bandwidth in Kbps
4917 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4918 * across all traffic classes for VSI matching handle. When BW value of
4919 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4922 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4925 enum ice_status status = ICE_SUCCESS;
4929 return ICE_ERR_PARAM;
4931 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4932 return ICE_ERR_PARAM;
4934 ice_acquire_lock(&pi->sched_lock);
4935 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4937 goto exit_set_vsi_bw_shared_lmt;
4938 /* Return success if no nodes are present across TC */
4939 ice_for_each_traffic_class(tc) {
4940 struct ice_sched_node *tc_node, *vsi_node;
4941 enum ice_rl_type rl_type = ICE_SHARED_BW;
4943 tc_node = ice_sched_get_tc_node(pi, tc);
4947 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4951 if (bw == ICE_SCHED_DFLT_BW)
4952 /* It removes existing SRL from the node */
4953 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4956 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4960 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4965 exit_set_vsi_bw_shared_lmt:
4966 ice_release_lock(&pi->sched_lock);
4971 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4972 * @pi: port information structure
4973 * @agg_id: aggregator ID
4975 * This function validates SRL node of the AGG node if available SRL layer is
4976 * different than the AGG node layer on all TC(s).This function needs to be
4977 * called with scheduler lock held.
4979 static enum ice_status
4980 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4982 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4983 struct ice_sched_agg_info *agg_info;
4984 bool agg_id_present = false;
4985 enum ice_status status = ICE_SUCCESS;
4988 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4990 if (agg_info->agg_id == agg_id) {
4991 agg_id_present = true;
4994 if (!agg_id_present)
4995 return ICE_ERR_PARAM;
4996 /* Return success if no nodes are present across TC */
4997 ice_for_each_traffic_class(tc) {
4998 struct ice_sched_node *tc_node, *agg_node;
4999 enum ice_rl_type rl_type = ICE_SHARED_BW;
5001 tc_node = ice_sched_get_tc_node(pi, tc);
5005 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5008 /* SRL bandwidth layer selection */
5009 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
5010 u8 node_layer = agg_node->tx_sched_layer;
5013 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
5015 if (layer_num >= pi->hw->num_tx_sched_layers)
5016 return ICE_ERR_PARAM;
5017 sel_layer = layer_num;
5020 status = ice_sched_validate_srl_node(agg_node, sel_layer);
5028 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
5029 * @pi: port information structure
5030 * @agg_id: aggregator ID
5031 * @bw: bandwidth in Kbps
5033 * This function configures the shared rate limiter(SRL) of all aggregator type
5034 * nodes across all traffic classes for aggregator matching agg_id. When
5035 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
5039 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
5041 struct ice_sched_agg_info *agg_info;
5042 struct ice_sched_agg_info *tmp;
5043 bool agg_id_present = false;
5044 enum ice_status status = ICE_SUCCESS;
5048 return ICE_ERR_PARAM;
5050 ice_acquire_lock(&pi->sched_lock);
5051 status = ice_sched_validate_agg_srl_node(pi, agg_id);
5053 goto exit_agg_bw_shared_lmt;
5055 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
5056 ice_sched_agg_info, list_entry)
5057 if (agg_info->agg_id == agg_id) {
5058 agg_id_present = true;
5062 if (!agg_id_present) {
5063 status = ICE_ERR_PARAM;
5064 goto exit_agg_bw_shared_lmt;
5067 /* Return success if no nodes are present across TC */
5068 ice_for_each_traffic_class(tc) {
5069 enum ice_rl_type rl_type = ICE_SHARED_BW;
5070 struct ice_sched_node *tc_node, *agg_node;
5072 tc_node = ice_sched_get_tc_node(pi, tc);
5076 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5080 if (bw == ICE_SCHED_DFLT_BW)
5081 /* It removes existing SRL from the node */
5082 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
5085 status = ice_sched_set_node_bw_lmt(pi, agg_node,
5089 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5094 exit_agg_bw_shared_lmt:
5095 ice_release_lock(&pi->sched_lock);
5100 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5101 * @pi: port information structure
5102 * @node: sched node to configure
5103 * @priority: sibling priority
5105 * This function configures node element's sibling priority only. This
5106 * function needs to be called with scheduler lock held.
5109 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5110 struct ice_sched_node *node, u8 priority)
5112 struct ice_aqc_txsched_elem_data buf;
5113 struct ice_aqc_txsched_elem *data;
5114 struct ice_hw *hw = pi->hw;
5115 enum ice_status status;
5118 return ICE_ERR_PARAM;
5121 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5122 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5123 ICE_AQC_ELEM_GENERIC_PRIO_M;
5124 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5125 data->generic |= priority;
5127 /* Configure element */
5128 status = ice_sched_update_elem(hw, node, &buf);
5133 * ice_cfg_rl_burst_size - Set burst size value
5134 * @hw: pointer to the HW struct
5135 * @bytes: burst size in bytes
5137 * This function configures/set the burst size to requested new value. The new
5138 * burst size value is used for future rate limit calls. It doesn't change the
5139 * existing or previously created RL profiles.
5141 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5143 u16 burst_size_to_prog;
5145 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5146 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5147 return ICE_ERR_PARAM;
5148 if (ice_round_to_num(bytes, 64) <=
5149 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5150 /* 64 byte granularity case */
5151 /* Disable MSB granularity bit */
5152 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5153 /* round number to nearest 64 byte granularity */
5154 bytes = ice_round_to_num(bytes, 64);
5155 /* The value is in 64 byte chunks */
5156 burst_size_to_prog |= (u16)(bytes / 64);
5158 /* k bytes granularity case */
5159 /* Enable MSB granularity bit */
5160 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5161 /* round number to nearest 1024 granularity */
5162 bytes = ice_round_to_num(bytes, 1024);
5163 /* check rounding doesn't go beyond allowed */
5164 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5165 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5166 /* The value is in k bytes */
5167 burst_size_to_prog |= (u16)(bytes / 1024);
5169 hw->max_burst_size = burst_size_to_prog;
5174 * ice_sched_replay_node_prio - re-configure node priority
5175 * @hw: pointer to the HW struct
5176 * @node: sched node to configure
5177 * @priority: priority value
5179 * This function configures node element's priority value. It
5180 * needs to be called with scheduler lock held.
5182 static enum ice_status
5183 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5186 struct ice_aqc_txsched_elem_data buf;
5187 struct ice_aqc_txsched_elem *data;
5188 enum ice_status status;
5192 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5193 data->generic = priority;
5195 /* Configure element */
5196 status = ice_sched_update_elem(hw, node, &buf);
5201 * ice_sched_replay_node_bw - replay node(s) BW
5202 * @hw: pointer to the HW struct
5203 * @node: sched node to configure
5204 * @bw_t_info: BW type information
5206 * This function restores node's BW from bw_t_info. The caller needs
5207 * to hold the scheduler lock.
5209 static enum ice_status
5210 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5211 struct ice_bw_type_info *bw_t_info)
5213 struct ice_port_info *pi = hw->port_info;
5214 enum ice_status status = ICE_ERR_PARAM;
5219 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5221 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5222 status = ice_sched_replay_node_prio(hw, node,
5223 bw_t_info->generic);
5227 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5228 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5229 bw_t_info->cir_bw.bw);
5233 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5234 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5235 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5240 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5241 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5242 bw_t_info->eir_bw.bw);
5246 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5247 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5248 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5253 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5254 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5255 bw_t_info->shared_bw);
5260 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5261 * @hw: pointer to the HW struct
5262 * @agg_info: aggregator data structure
5264 * This function re-creates aggregator type nodes. The caller needs to hold
5265 * the scheduler lock.
5267 static enum ice_status
5268 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5270 struct ice_sched_node *tc_node, *agg_node;
5271 enum ice_status status = ICE_SUCCESS;
5275 return ICE_ERR_PARAM;
5276 ice_for_each_traffic_class(tc) {
5277 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5280 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5282 status = ICE_ERR_PARAM;
5285 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5288 status = ICE_ERR_PARAM;
5291 status = ice_sched_replay_node_bw(hw, agg_node,
5292 &agg_info->bw_t_info[tc]);
5300 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5301 * @pi: port info struct
5302 * @tc_bitmap: 8 bits TC bitmap to check
5303 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5305 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5306 * may be missing, it returns enabled TCs. This function needs to be called with
5307 * scheduler lock held.
5310 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5311 ice_bitmap_t *ena_tc_bitmap)
5315 /* Some TC(s) may be missing after reset, adjust for replay */
5316 ice_for_each_traffic_class(tc)
5317 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5318 (ice_sched_get_tc_node(pi, tc)))
5319 ice_set_bit(tc, ena_tc_bitmap);
5323 * ice_sched_replay_agg - recreate aggregator node(s)
5324 * @hw: pointer to the HW struct
5326 * This function recreate aggregator type nodes which are not replayed earlier.
5327 * It also replay aggregator BW information. These aggregator nodes are not
5328 * associated with VSI type node yet.
5330 void ice_sched_replay_agg(struct ice_hw *hw)
5332 struct ice_port_info *pi = hw->port_info;
5333 struct ice_sched_agg_info *agg_info;
5335 ice_acquire_lock(&pi->sched_lock);
5336 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5338 /* replay aggregator (re-create aggregator node) */
5339 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5340 agg_info->replay_tc_bitmap,
5341 ICE_MAX_TRAFFIC_CLASS)) {
5342 ice_declare_bitmap(replay_bitmap,
5343 ICE_MAX_TRAFFIC_CLASS);
5344 enum ice_status status;
5346 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5347 ice_sched_get_ena_tc_bitmap(pi,
5348 agg_info->replay_tc_bitmap,
5350 status = ice_sched_cfg_agg(hw->port_info,
5355 ice_info(hw, "Replay agg id[%d] failed\n",
5357 /* Move on to next one */
5360 /* Replay aggregator node BW (restore aggregator BW) */
5361 status = ice_sched_replay_agg_bw(hw, agg_info);
5363 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5366 ice_release_lock(&pi->sched_lock);
5370 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5371 * @hw: pointer to the HW struct
5373 * This function initialize aggregator(s) TC bitmap to zero. A required
5374 * preinit step for replaying aggregators.
5376 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5378 struct ice_port_info *pi = hw->port_info;
5379 struct ice_sched_agg_info *agg_info;
5381 ice_acquire_lock(&pi->sched_lock);
5382 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5384 struct ice_sched_agg_vsi_info *agg_vsi_info;
5386 agg_info->tc_bitmap[0] = 0;
5387 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5388 ice_sched_agg_vsi_info, list_entry)
5389 agg_vsi_info->tc_bitmap[0] = 0;
5391 ice_release_lock(&pi->sched_lock);
5395 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5396 * @pi: port information structure
5398 * This function replay TC nodes.
5400 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5402 enum ice_status status = ICE_SUCCESS;
5406 return ICE_ERR_PARAM;
5407 ice_acquire_lock(&pi->sched_lock);
5408 ice_for_each_traffic_class(tc) {
5409 struct ice_sched_node *tc_node;
5411 tc_node = ice_sched_get_tc_node(pi, tc);
5413 continue; /* TC not present */
5414 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5415 &pi->tc_node_bw_t_info[tc]);
5419 ice_release_lock(&pi->sched_lock);
5424 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5425 * @hw: pointer to the HW struct
5426 * @vsi_handle: software VSI handle
5427 * @tc_bitmap: 8 bits TC bitmap
5429 * This function replays VSI type nodes bandwidth. This function needs to be
5430 * called with scheduler lock held.
5432 static enum ice_status
5433 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5434 ice_bitmap_t *tc_bitmap)
5436 struct ice_sched_node *vsi_node, *tc_node;
5437 struct ice_port_info *pi = hw->port_info;
5438 struct ice_bw_type_info *bw_t_info;
5439 struct ice_vsi_ctx *vsi_ctx;
5440 enum ice_status status = ICE_SUCCESS;
5443 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5445 return ICE_ERR_PARAM;
5446 ice_for_each_traffic_class(tc) {
5447 if (!ice_is_tc_ena(*tc_bitmap, tc))
5449 tc_node = ice_sched_get_tc_node(pi, tc);
5452 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5455 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5456 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5464 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5465 * @hw: pointer to the HW struct
5466 * @vsi_handle: software VSI handle
5468 * This function replays aggregator node, VSI to aggregator type nodes, and
5469 * their node bandwidth information. This function needs to be called with
5470 * scheduler lock held.
5472 static enum ice_status
5473 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5475 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5476 struct ice_sched_agg_vsi_info *agg_vsi_info;
5477 struct ice_port_info *pi = hw->port_info;
5478 struct ice_sched_agg_info *agg_info;
5479 enum ice_status status;
5481 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5482 if (!ice_is_vsi_valid(hw, vsi_handle))
5483 return ICE_ERR_PARAM;
5484 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5486 return ICE_SUCCESS; /* Not present in list - default Agg case */
5487 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5489 return ICE_SUCCESS; /* Not present in list - default Agg case */
5490 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5492 /* Replay aggregator node associated to vsi_handle */
5493 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5494 ICE_AGG_TYPE_AGG, replay_bitmap);
5497 /* Replay aggregator node BW (restore aggregator BW) */
5498 status = ice_sched_replay_agg_bw(hw, agg_info);
5502 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5503 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5505 /* Move this VSI (vsi_handle) to above aggregator */
5506 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5510 /* Replay VSI BW (restore VSI BW) */
5511 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5512 agg_vsi_info->tc_bitmap);
5516 * ice_replay_vsi_agg - replay VSI to aggregator node
5517 * @hw: pointer to the HW struct
5518 * @vsi_handle: software VSI handle
5520 * This function replays association of VSI to aggregator type nodes, and
5521 * node bandwidth information.
5523 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5525 struct ice_port_info *pi = hw->port_info;
5526 enum ice_status status;
5528 ice_acquire_lock(&pi->sched_lock);
5529 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5530 ice_release_lock(&pi->sched_lock);
5535 * ice_sched_replay_q_bw - replay queue type node BW
5536 * @pi: port information structure
5537 * @q_ctx: queue context structure
5539 * This function replays queue type node bandwidth. This function needs to be
5540 * called with scheduler lock held.
5543 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5545 struct ice_sched_node *q_node;
5547 /* Following also checks the presence of node in tree */
5548 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5550 return ICE_ERR_PARAM;
5551 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);