1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2020 Intel Corporation
8 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
9 * @pi: port information structure
10 * @info: Scheduler element information from firmware
12 * This function inserts the root node of the scheduling tree topology
15 static enum ice_status
16 ice_sched_add_root_node(struct ice_port_info *pi,
17 struct ice_aqc_txsched_elem_data *info)
19 struct ice_sched_node *root;
27 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
29 return ICE_ERR_NO_MEMORY;
31 /* coverity[suspicious_sizeof] */
32 root->children = (struct ice_sched_node **)
33 ice_calloc(hw, hw->max_children[0], sizeof(*root));
34 if (!root->children) {
36 return ICE_ERR_NO_MEMORY;
39 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
45 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
46 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
47 * @teid: node TEID to search
49 * This function searches for a node matching the TEID in the scheduling tree
50 * from the SW DB. The search is recursive and is restricted by the number of
51 * layers it has searched through; stopping at the max supported layer.
53 * This function needs to be called when holding the port_info->sched_lock
55 struct ice_sched_node *
56 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
60 /* The TEID is same as that of the start_node */
61 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
64 /* The node has no children or is at the max layer */
65 if (!start_node->num_children ||
66 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
67 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
70 /* Check if TEID matches to any of the children nodes */
71 for (i = 0; i < start_node->num_children; i++)
72 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
73 return start_node->children[i];
75 /* Search within each child's sub-tree */
76 for (i = 0; i < start_node->num_children; i++) {
77 struct ice_sched_node *tmp;
79 tmp = ice_sched_find_node_by_teid(start_node->children[i],
89 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
90 * @hw: pointer to the HW struct
91 * @cmd_opc: cmd opcode
92 * @elems_req: number of elements to request
93 * @buf: pointer to buffer
94 * @buf_size: buffer size in bytes
95 * @elems_resp: returns total number of elements response
96 * @cd: pointer to command details structure or NULL
98 * This function sends a scheduling elements cmd (cmd_opc)
100 static enum ice_status
101 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
102 u16 elems_req, void *buf, u16 buf_size,
103 u16 *elems_resp, struct ice_sq_cd *cd)
105 struct ice_aqc_sched_elem_cmd *cmd;
106 struct ice_aq_desc desc;
107 enum ice_status status;
109 cmd = &desc.params.sched_elem_cmd;
110 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
111 cmd->num_elem_req = CPU_TO_LE16(elems_req);
112 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
113 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
114 if (!status && elems_resp)
115 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
121 * ice_aq_query_sched_elems - query scheduler elements
122 * @hw: pointer to the HW struct
123 * @elems_req: number of elements to query
124 * @buf: pointer to buffer
125 * @buf_size: buffer size in bytes
126 * @elems_ret: returns total number of elements returned
127 * @cd: pointer to command details structure or NULL
129 * Query scheduling elements (0x0404)
132 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
133 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
134 u16 *elems_ret, struct ice_sq_cd *cd)
136 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
137 elems_req, (void *)buf, buf_size,
142 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
143 * @pi: port information structure
144 * @layer: Scheduler layer of the node
145 * @info: Scheduler element information from firmware
147 * This function inserts a scheduler node to the SW DB.
150 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
151 struct ice_aqc_txsched_elem_data *info)
153 struct ice_aqc_txsched_elem_data elem;
154 struct ice_sched_node *parent;
155 struct ice_sched_node *node;
156 enum ice_status status;
160 return ICE_ERR_PARAM;
164 /* A valid parent node should be there */
165 parent = ice_sched_find_node_by_teid(pi->root,
166 LE32_TO_CPU(info->parent_teid));
168 ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n",
169 LE32_TO_CPU(info->parent_teid));
170 return ICE_ERR_PARAM;
173 /* query the current node information from FW before adding it
176 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
179 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
181 return ICE_ERR_NO_MEMORY;
182 if (hw->max_children[layer]) {
183 /* coverity[suspicious_sizeof] */
184 node->children = (struct ice_sched_node **)
185 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
186 if (!node->children) {
188 return ICE_ERR_NO_MEMORY;
193 node->parent = parent;
194 node->tx_sched_layer = layer;
195 parent->children[parent->num_children++] = node;
201 * ice_aq_delete_sched_elems - delete scheduler elements
202 * @hw: pointer to the HW struct
203 * @grps_req: number of groups to delete
204 * @buf: pointer to buffer
205 * @buf_size: buffer size in bytes
206 * @grps_del: returns total number of elements deleted
207 * @cd: pointer to command details structure or NULL
209 * Delete scheduling elements (0x040F)
211 static enum ice_status
212 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
213 struct ice_aqc_delete_elem *buf, u16 buf_size,
214 u16 *grps_del, struct ice_sq_cd *cd)
216 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
217 grps_req, (void *)buf, buf_size,
222 * ice_sched_remove_elems - remove nodes from HW
223 * @hw: pointer to the HW struct
224 * @parent: pointer to the parent node
225 * @num_nodes: number of nodes
226 * @node_teids: array of node teids to be deleted
228 * This function remove nodes from HW
230 static enum ice_status
231 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
232 u16 num_nodes, u32 *node_teids)
234 struct ice_aqc_delete_elem *buf;
235 u16 i, num_groups_removed = 0;
236 enum ice_status status;
239 buf_size = ice_struct_size(buf, teid, num_nodes);
240 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
242 return ICE_ERR_NO_MEMORY;
244 buf->hdr.parent_teid = parent->info.node_teid;
245 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
246 for (i = 0; i < num_nodes; i++)
247 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
249 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
250 &num_groups_removed, NULL);
251 if (status != ICE_SUCCESS || num_groups_removed != 1)
252 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
253 hw->adminq.sq_last_status);
260 * ice_sched_get_first_node - get the first node of the given layer
261 * @pi: port information structure
262 * @parent: pointer the base node of the subtree
263 * @layer: layer number
265 * This function retrieves the first node of the given layer from the subtree
267 static struct ice_sched_node *
268 ice_sched_get_first_node(struct ice_port_info *pi,
269 struct ice_sched_node *parent, u8 layer)
271 return pi->sib_head[parent->tc_num][layer];
275 * ice_sched_get_tc_node - get pointer to TC node
276 * @pi: port information structure
279 * This function returns the TC node pointer
281 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
285 if (!pi || !pi->root)
287 for (i = 0; i < pi->root->num_children; i++)
288 if (pi->root->children[i]->tc_num == tc)
289 return pi->root->children[i];
294 * ice_free_sched_node - Free a Tx scheduler node from SW DB
295 * @pi: port information structure
296 * @node: pointer to the ice_sched_node struct
298 * This function frees up a node from SW DB as well as from HW
300 * This function needs to be called with the port_info->sched_lock held
302 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
304 struct ice_sched_node *parent;
305 struct ice_hw *hw = pi->hw;
308 /* Free the children before freeing up the parent node
309 * The parent array is updated below and that shifts the nodes
310 * in the array. So always pick the first child if num children > 0
312 while (node->num_children)
313 ice_free_sched_node(pi, node->children[0]);
315 /* Leaf, TC and root nodes can't be deleted by SW */
316 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
317 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
320 u32 teid = LE32_TO_CPU(node->info.node_teid);
322 ice_sched_remove_elems(hw, node->parent, 1, &teid);
324 parent = node->parent;
325 /* root has no parent */
327 struct ice_sched_node *p;
329 /* update the parent */
330 for (i = 0; i < parent->num_children; i++)
331 if (parent->children[i] == node) {
332 for (j = i + 1; j < parent->num_children; j++)
333 parent->children[j - 1] =
335 parent->num_children--;
339 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
341 if (p->sibling == node) {
342 p->sibling = node->sibling;
348 /* update the sibling head if head is getting removed */
349 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
350 pi->sib_head[node->tc_num][node->tx_sched_layer] =
354 /* leaf nodes have no children */
356 ice_free(hw, node->children);
361 * ice_aq_get_dflt_topo - gets default scheduler topology
362 * @hw: pointer to the HW struct
363 * @lport: logical port number
364 * @buf: pointer to buffer
365 * @buf_size: buffer size in bytes
366 * @num_branches: returns total number of queue to port branches
367 * @cd: pointer to command details structure or NULL
369 * Get default scheduler topology (0x400)
371 static enum ice_status
372 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
373 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
374 u8 *num_branches, struct ice_sq_cd *cd)
376 struct ice_aqc_get_topo *cmd;
377 struct ice_aq_desc desc;
378 enum ice_status status;
380 cmd = &desc.params.get_topo;
381 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
382 cmd->port_num = lport;
383 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
384 if (!status && num_branches)
385 *num_branches = cmd->num_branches;
391 * ice_aq_add_sched_elems - adds scheduling element
392 * @hw: pointer to the HW struct
393 * @grps_req: the number of groups that are requested to be added
394 * @buf: pointer to buffer
395 * @buf_size: buffer size in bytes
396 * @grps_added: returns total number of groups added
397 * @cd: pointer to command details structure or NULL
399 * Add scheduling elements (0x0401)
401 static enum ice_status
402 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
403 struct ice_aqc_add_elem *buf, u16 buf_size,
404 u16 *grps_added, struct ice_sq_cd *cd)
406 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
407 grps_req, (void *)buf, buf_size,
412 * ice_aq_cfg_sched_elems - configures scheduler elements
413 * @hw: pointer to the HW struct
414 * @elems_req: number of elements to configure
415 * @buf: pointer to buffer
416 * @buf_size: buffer size in bytes
417 * @elems_cfgd: returns total number of elements configured
418 * @cd: pointer to command details structure or NULL
420 * Configure scheduling elements (0x0403)
422 static enum ice_status
423 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
424 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
425 u16 *elems_cfgd, struct ice_sq_cd *cd)
427 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
428 elems_req, (void *)buf, buf_size,
433 * ice_aq_move_sched_elems - move scheduler elements
434 * @hw: pointer to the HW struct
435 * @grps_req: number of groups to move
436 * @buf: pointer to buffer
437 * @buf_size: buffer size in bytes
438 * @grps_movd: returns total number of groups moved
439 * @cd: pointer to command details structure or NULL
441 * Move scheduling elements (0x0408)
443 static enum ice_status
444 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
445 struct ice_aqc_move_elem *buf, u16 buf_size,
446 u16 *grps_movd, struct ice_sq_cd *cd)
448 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
449 grps_req, (void *)buf, buf_size,
454 * ice_aq_suspend_sched_elems - suspend scheduler elements
455 * @hw: pointer to the HW struct
456 * @elems_req: number of elements to suspend
457 * @buf: pointer to buffer
458 * @buf_size: buffer size in bytes
459 * @elems_ret: returns total number of elements suspended
460 * @cd: pointer to command details structure or NULL
462 * Suspend scheduling elements (0x0409)
464 static enum ice_status
465 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
466 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
468 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
469 elems_req, (void *)buf, buf_size,
474 * ice_aq_resume_sched_elems - resume scheduler elements
475 * @hw: pointer to the HW struct
476 * @elems_req: number of elements to resume
477 * @buf: pointer to buffer
478 * @buf_size: buffer size in bytes
479 * @elems_ret: returns total number of elements resumed
480 * @cd: pointer to command details structure or NULL
482 * resume scheduling elements (0x040A)
484 static enum ice_status
485 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
486 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
488 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
489 elems_req, (void *)buf, buf_size,
494 * ice_aq_query_sched_res - query scheduler resource
495 * @hw: pointer to the HW struct
496 * @buf_size: buffer size in bytes
497 * @buf: pointer to buffer
498 * @cd: pointer to command details structure or NULL
500 * Query scheduler resource allocation (0x0412)
502 static enum ice_status
503 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
504 struct ice_aqc_query_txsched_res_resp *buf,
505 struct ice_sq_cd *cd)
507 struct ice_aq_desc desc;
509 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
510 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
514 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
515 * @hw: pointer to the HW struct
516 * @num_nodes: number of nodes
517 * @node_teids: array of node teids to be suspended or resumed
518 * @suspend: true means suspend / false means resume
520 * This function suspends or resumes HW nodes
522 static enum ice_status
523 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
526 u16 i, buf_size, num_elem_ret = 0;
527 enum ice_status status;
530 buf_size = sizeof(*buf) * num_nodes;
531 buf = (__le32 *)ice_malloc(hw, buf_size);
533 return ICE_ERR_NO_MEMORY;
535 for (i = 0; i < num_nodes; i++)
536 buf[i] = CPU_TO_LE32(node_teids[i]);
539 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
540 buf_size, &num_elem_ret,
543 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
544 buf_size, &num_elem_ret,
546 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
547 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
554 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
555 * @hw: pointer to the HW struct
556 * @vsi_handle: VSI handle
558 * @new_numqs: number of queues
560 static enum ice_status
561 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
563 struct ice_vsi_ctx *vsi_ctx;
564 struct ice_q_ctx *q_ctx;
566 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
568 return ICE_ERR_PARAM;
569 /* allocate LAN queue contexts */
570 if (!vsi_ctx->lan_q_ctx[tc]) {
571 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
572 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
573 if (!vsi_ctx->lan_q_ctx[tc])
574 return ICE_ERR_NO_MEMORY;
575 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
578 /* num queues are increased, update the queue contexts */
579 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
580 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
582 q_ctx = (struct ice_q_ctx *)
583 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
585 return ICE_ERR_NO_MEMORY;
586 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
587 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
588 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
589 vsi_ctx->lan_q_ctx[tc] = q_ctx;
590 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
596 * ice_aq_rl_profile - performs a rate limiting task
597 * @hw: pointer to the HW struct
598 * @opcode: opcode for add, query, or remove profile(s)
599 * @num_profiles: the number of profiles
600 * @buf: pointer to buffer
601 * @buf_size: buffer size in bytes
602 * @num_processed: number of processed add or remove profile(s) to return
603 * @cd: pointer to command details structure
605 * RL profile function to add, query, or remove profile(s)
607 static enum ice_status
608 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
609 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
610 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
612 struct ice_aqc_rl_profile *cmd;
613 struct ice_aq_desc desc;
614 enum ice_status status;
616 cmd = &desc.params.rl_profile;
618 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
619 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
620 cmd->num_profiles = CPU_TO_LE16(num_profiles);
621 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
622 if (!status && num_processed)
623 *num_processed = LE16_TO_CPU(cmd->num_processed);
628 * ice_aq_add_rl_profile - adds rate limiting profile(s)
629 * @hw: pointer to the HW struct
630 * @num_profiles: the number of profile(s) to be add
631 * @buf: pointer to buffer
632 * @buf_size: buffer size in bytes
633 * @num_profiles_added: total number of profiles added to return
634 * @cd: pointer to command details structure
636 * Add RL profile (0x0410)
638 static enum ice_status
639 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
640 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
641 u16 *num_profiles_added, struct ice_sq_cd *cd)
643 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
644 buf, buf_size, num_profiles_added, cd);
648 * ice_aq_query_rl_profile - query rate limiting profile(s)
649 * @hw: pointer to the HW struct
650 * @num_profiles: the number of profile(s) to query
651 * @buf: pointer to buffer
652 * @buf_size: buffer size in bytes
653 * @cd: pointer to command details structure
655 * Query RL profile (0x0411)
658 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
659 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
660 struct ice_sq_cd *cd)
662 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
663 num_profiles, buf, buf_size, NULL, cd);
667 * ice_aq_remove_rl_profile - removes RL profile(s)
668 * @hw: pointer to the HW struct
669 * @num_profiles: the number of profile(s) to remove
670 * @buf: pointer to buffer
671 * @buf_size: buffer size in bytes
672 * @num_profiles_removed: total number of profiles removed to return
673 * @cd: pointer to command details structure or NULL
675 * Remove RL profile (0x0415)
677 static enum ice_status
678 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
679 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
680 u16 *num_profiles_removed, struct ice_sq_cd *cd)
682 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
683 num_profiles, buf, buf_size,
684 num_profiles_removed, cd);
688 * ice_sched_del_rl_profile - remove RL profile
689 * @hw: pointer to the HW struct
690 * @rl_info: rate limit profile information
692 * If the profile ID is not referenced anymore, it removes profile ID with
693 * its associated parameters from HW DB,and locally. The caller needs to
694 * hold scheduler lock.
696 static enum ice_status
697 ice_sched_del_rl_profile(struct ice_hw *hw,
698 struct ice_aqc_rl_profile_info *rl_info)
700 struct ice_aqc_rl_profile_elem *buf;
701 u16 num_profiles_removed;
702 enum ice_status status;
703 u16 num_profiles = 1;
705 if (rl_info->prof_id_ref != 0)
706 return ICE_ERR_IN_USE;
708 /* Safe to remove profile ID */
709 buf = &rl_info->profile;
710 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
711 &num_profiles_removed, NULL);
712 if (status || num_profiles_removed != num_profiles)
715 /* Delete stale entry now */
716 LIST_DEL(&rl_info->list_entry);
717 ice_free(hw, rl_info);
722 * ice_sched_clear_rl_prof - clears RL prof entries
723 * @pi: port information structure
725 * This function removes all RL profile from HW as well as from SW DB.
727 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
730 struct ice_hw *hw = pi->hw;
732 for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
733 struct ice_aqc_rl_profile_info *rl_prof_elem;
734 struct ice_aqc_rl_profile_info *rl_prof_tmp;
736 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
737 &hw->rl_prof_list[ln],
738 ice_aqc_rl_profile_info, list_entry) {
739 enum ice_status status;
741 rl_prof_elem->prof_id_ref = 0;
742 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
744 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
745 /* On error, free mem required */
746 LIST_DEL(&rl_prof_elem->list_entry);
747 ice_free(hw, rl_prof_elem);
754 * ice_sched_clear_agg - clears the aggregator related information
755 * @hw: pointer to the hardware structure
757 * This function removes aggregator list and free up aggregator related memory
758 * previously allocated.
760 void ice_sched_clear_agg(struct ice_hw *hw)
762 struct ice_sched_agg_info *agg_info;
763 struct ice_sched_agg_info *atmp;
765 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
768 struct ice_sched_agg_vsi_info *agg_vsi_info;
769 struct ice_sched_agg_vsi_info *vtmp;
771 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
772 &agg_info->agg_vsi_list,
773 ice_sched_agg_vsi_info, list_entry) {
774 LIST_DEL(&agg_vsi_info->list_entry);
775 ice_free(hw, agg_vsi_info);
777 LIST_DEL(&agg_info->list_entry);
778 ice_free(hw, agg_info);
783 * ice_sched_clear_tx_topo - clears the scheduler tree nodes
784 * @pi: port information structure
786 * This function removes all the nodes from HW as well as from SW DB.
788 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
792 /* remove RL profiles related lists */
793 ice_sched_clear_rl_prof(pi);
795 ice_free_sched_node(pi, pi->root);
801 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
802 * @pi: port information structure
804 * Cleanup scheduling elements from SW DB
806 void ice_sched_clear_port(struct ice_port_info *pi)
808 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
811 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
812 ice_acquire_lock(&pi->sched_lock);
813 ice_sched_clear_tx_topo(pi);
814 ice_release_lock(&pi->sched_lock);
815 ice_destroy_lock(&pi->sched_lock);
819 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
820 * @hw: pointer to the HW struct
822 * Cleanup scheduling elements from SW DB for all the ports
824 void ice_sched_cleanup_all(struct ice_hw *hw)
829 if (hw->layer_info) {
830 ice_free(hw, hw->layer_info);
831 hw->layer_info = NULL;
834 ice_sched_clear_port(hw->port_info);
836 hw->num_tx_sched_layers = 0;
837 hw->num_tx_sched_phys_layers = 0;
838 hw->flattened_layers = 0;
843 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
844 * @hw: pointer to the HW struct
845 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
846 * @buf: pointer to buffer
847 * @buf_size: buffer size in bytes
848 * @cd: pointer to command details structure or NULL
850 * Configure L2 Node CGD (0x0414)
853 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
854 struct ice_aqc_cfg_l2_node_cgd_elem *buf,
855 u16 buf_size, struct ice_sq_cd *cd)
857 struct ice_aqc_cfg_l2_node_cgd *cmd;
858 struct ice_aq_desc desc;
860 cmd = &desc.params.cfg_l2_node_cgd;
861 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
862 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
864 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
865 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
869 * ice_sched_add_elems - add nodes to HW and SW DB
870 * @pi: port information structure
871 * @tc_node: pointer to the branch node
872 * @parent: pointer to the parent node
873 * @layer: layer number to add nodes
874 * @num_nodes: number of nodes
875 * @num_nodes_added: pointer to num nodes added
876 * @first_node_teid: if new nodes are added then return the TEID of first node
878 * This function add nodes to HW as well as to SW DB for a given layer
880 static enum ice_status
881 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
882 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
883 u16 *num_nodes_added, u32 *first_node_teid)
885 struct ice_sched_node *prev, *new_node;
886 struct ice_aqc_add_elem *buf;
887 u16 i, num_groups_added = 0;
888 enum ice_status status = ICE_SUCCESS;
889 struct ice_hw *hw = pi->hw;
893 buf_size = ice_struct_size(buf, generic, num_nodes);
894 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
896 return ICE_ERR_NO_MEMORY;
898 buf->hdr.parent_teid = parent->info.node_teid;
899 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
900 for (i = 0; i < num_nodes; i++) {
901 buf->generic[i].parent_teid = parent->info.node_teid;
902 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
903 buf->generic[i].data.valid_sections =
904 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
905 ICE_AQC_ELEM_VALID_EIR;
906 buf->generic[i].data.generic = 0;
907 buf->generic[i].data.cir_bw.bw_profile_idx =
908 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
909 buf->generic[i].data.cir_bw.bw_alloc =
910 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
911 buf->generic[i].data.eir_bw.bw_profile_idx =
912 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
913 buf->generic[i].data.eir_bw.bw_alloc =
914 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
917 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
918 &num_groups_added, NULL);
919 if (status != ICE_SUCCESS || num_groups_added != 1) {
920 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
921 hw->adminq.sq_last_status);
926 *num_nodes_added = num_nodes;
927 /* add nodes to the SW DB */
928 for (i = 0; i < num_nodes; i++) {
929 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
930 if (status != ICE_SUCCESS) {
931 ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n",
936 teid = LE32_TO_CPU(buf->generic[i].node_teid);
937 new_node = ice_sched_find_node_by_teid(parent, teid);
939 ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);
943 new_node->sibling = NULL;
944 new_node->tc_num = tc_node->tc_num;
946 /* add it to previous node sibling pointer */
947 /* Note: siblings are not linked across branches */
948 prev = ice_sched_get_first_node(pi, tc_node, layer);
949 if (prev && prev != new_node) {
950 while (prev->sibling)
951 prev = prev->sibling;
952 prev->sibling = new_node;
955 /* initialize the sibling head */
956 if (!pi->sib_head[tc_node->tc_num][layer])
957 pi->sib_head[tc_node->tc_num][layer] = new_node;
960 *first_node_teid = teid;
968 * ice_sched_add_nodes_to_hw_layer - Add nodes to hw layer
969 * @pi: port information structure
970 * @tc_node: pointer to TC node
971 * @parent: pointer to parent node
972 * @layer: layer number to add nodes
973 * @num_nodes: number of nodes to be added
974 * @first_node_teid: pointer to the first node TEID
975 * @num_nodes_added: pointer to number of nodes added
977 * Add nodes into specific hw layer.
979 static enum ice_status
980 ice_sched_add_nodes_to_hw_layer(struct ice_port_info *pi,
981 struct ice_sched_node *tc_node,
982 struct ice_sched_node *parent, u8 layer,
983 u16 num_nodes, u32 *first_node_teid,
984 u16 *num_nodes_added)
988 *num_nodes_added = 0;
993 if (!parent || layer < pi->hw->sw_entry_point_layer)
994 return ICE_ERR_PARAM;
996 /* max children per node per layer */
997 max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];
999 /* current number of children + required nodes exceed max children */
1000 if ((parent->num_children + num_nodes) > max_child_nodes) {
1001 /* Fail if the parent is a TC node */
1002 if (parent == tc_node)
1004 return ICE_ERR_MAX_LIMIT;
1007 return ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1008 num_nodes_added, first_node_teid);
1012 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
1013 * @pi: port information structure
1014 * @tc_node: pointer to TC node
1015 * @parent: pointer to parent node
1016 * @layer: layer number to add nodes
1017 * @num_nodes: number of nodes to be added
1018 * @first_node_teid: pointer to the first node TEID
1019 * @num_nodes_added: pointer to number of nodes added
1021 * This function add nodes to a given layer.
1023 static enum ice_status
1024 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
1025 struct ice_sched_node *tc_node,
1026 struct ice_sched_node *parent, u8 layer,
1027 u16 num_nodes, u32 *first_node_teid,
1028 u16 *num_nodes_added)
1030 u32 *first_teid_ptr = first_node_teid;
1031 u16 new_num_nodes = num_nodes;
1032 enum ice_status status = ICE_SUCCESS;
1034 *num_nodes_added = 0;
1035 while (*num_nodes_added < num_nodes) {
1036 u16 max_child_nodes, num_added = 0;
1039 status = ice_sched_add_nodes_to_hw_layer(pi, tc_node, parent,
1040 layer, new_num_nodes,
1043 *num_nodes_added += num_added;
1044 /* break if all the nodes are added successfully */
1045 if (status == ICE_SUCCESS && (*num_nodes_added == num_nodes))
1047 /* break if the error is not max limit */
1048 if (status != ICE_SUCCESS && status != ICE_ERR_MAX_LIMIT)
1050 /* Exceeded the max children */
1051 max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];
1052 /* utilize all the spaces if the parent is not full */
1053 if (parent->num_children < max_child_nodes) {
1054 new_num_nodes = max_child_nodes - parent->num_children;
1056 /* This parent is full, try the next sibling */
1057 parent = parent->sibling;
1058 /* Don't modify the first node TEID memory if the
1059 * first node was added already in the above call.
1060 * Instead send some temp memory for all other
1064 first_teid_ptr = &temp;
1066 new_num_nodes = num_nodes - num_added;
1073 * ice_sched_get_qgrp_layer - get the current queue group layer number
1074 * @hw: pointer to the HW struct
1076 * This function returns the current queue group layer number
1078 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1080 /* It's always total layers - 1, the array is 0 relative so -2 */
1081 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1085 * ice_sched_get_vsi_layer - get the current VSI layer number
1086 * @hw: pointer to the HW struct
1088 * This function returns the current VSI layer number
1090 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1092 /* Num Layers VSI layer
1095 * 5 or less sw_entry_point_layer
1097 /* calculate the VSI layer based on number of layers. */
1098 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1099 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1101 if (layer > hw->sw_entry_point_layer)
1104 return hw->sw_entry_point_layer;
1108 * ice_sched_get_agg_layer - get the current aggregator layer number
1109 * @hw: pointer to the HW struct
1111 * This function returns the current aggregator layer number
1113 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1115 /* Num Layers aggregator layer
1117 * 7 or less sw_entry_point_layer
1119 /* calculate the aggregator layer based on number of layers. */
1120 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1121 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1123 if (layer > hw->sw_entry_point_layer)
1126 return hw->sw_entry_point_layer;
1130 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1131 * @pi: port information structure
1133 * This function removes the leaf node that was created by the FW
1134 * during initialization
1136 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1138 struct ice_sched_node *node;
1142 if (!node->num_children)
1144 node = node->children[0];
1146 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1147 u32 teid = LE32_TO_CPU(node->info.node_teid);
1148 enum ice_status status;
1150 /* remove the default leaf node */
1151 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1153 ice_free_sched_node(pi, node);
1158 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1159 * @pi: port information structure
1161 * This function frees all the nodes except root and TC that were created by
1162 * the FW during initialization
1164 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1166 struct ice_sched_node *node;
1168 ice_rm_dflt_leaf_node(pi);
1170 /* remove the default nodes except TC and root nodes */
1173 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1174 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1175 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1176 ice_free_sched_node(pi, node);
1180 if (!node->num_children)
1182 node = node->children[0];
1187 * ice_sched_init_port - Initialize scheduler by querying information from FW
1188 * @pi: port info structure for the tree to cleanup
1190 * This function is the initial call to find the total number of Tx scheduler
1191 * resources, default topology created by firmware and storing the information
1194 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1196 struct ice_aqc_get_topo_elem *buf;
1197 enum ice_status status;
1204 return ICE_ERR_PARAM;
1207 /* Query the Default Topology from FW */
1208 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1209 ICE_AQ_MAX_BUF_LEN);
1211 return ICE_ERR_NO_MEMORY;
1213 /* Query default scheduling tree topology */
1214 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1215 &num_branches, NULL);
1219 /* num_branches should be between 1-8 */
1220 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1221 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1223 status = ICE_ERR_PARAM;
1227 /* get the number of elements on the default/first branch */
1228 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1230 /* num_elems should always be between 1-9 */
1231 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1232 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1234 status = ICE_ERR_PARAM;
1238 /* If the last node is a leaf node then the index of the queue group
1239 * layer is two less than the number of elements.
1241 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1242 ICE_AQC_ELEM_TYPE_LEAF)
1243 pi->last_node_teid =
1244 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1246 pi->last_node_teid =
1247 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1249 /* Insert the Tx Sched root node */
1250 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1254 /* Parse the default tree and cache the information */
1255 for (i = 0; i < num_branches; i++) {
1256 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1258 /* Skip root element as already inserted */
1259 for (j = 1; j < num_elems; j++) {
1260 /* update the sw entry point */
1261 if (buf[0].generic[j].data.elem_type ==
1262 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1263 hw->sw_entry_point_layer = j;
1265 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1271 /* Remove the default nodes. */
1273 ice_sched_rm_dflt_nodes(pi);
1275 /* initialize the port for handling the scheduler tree */
1276 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1277 ice_init_lock(&pi->sched_lock);
1278 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1279 INIT_LIST_HEAD(&hw->rl_prof_list[i]);
1282 if (status && pi->root) {
1283 ice_free_sched_node(pi, pi->root);
1292 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1293 * @pi: port information structure
1294 * @teid: Scheduler node TEID
1296 * This function retrieves the ice_sched_node struct for given TEID from
1297 * the SW DB and returns it to the caller.
1299 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1301 struct ice_sched_node *node;
1306 /* Find the node starting from root */
1307 ice_acquire_lock(&pi->sched_lock);
1308 node = ice_sched_find_node_by_teid(pi->root, teid);
1309 ice_release_lock(&pi->sched_lock);
1312 ice_debug(pi->hw, ICE_DBG_SCHED, "Node not found for teid=0x%x\n", teid);
1318 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1319 * @hw: pointer to the HW struct
1321 * query FW for allocated scheduler resources and store in HW struct
1323 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1325 struct ice_aqc_query_txsched_res_resp *buf;
1326 enum ice_status status = ICE_SUCCESS;
1333 buf = (struct ice_aqc_query_txsched_res_resp *)
1334 ice_malloc(hw, sizeof(*buf));
1336 return ICE_ERR_NO_MEMORY;
1338 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1340 goto sched_query_out;
1342 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1343 hw->num_tx_sched_phys_layers =
1344 LE16_TO_CPU(buf->sched_props.phys_levels);
1345 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1346 hw->max_cgds = buf->sched_props.max_pf_cgds;
1348 /* max sibling group size of current layer refers to the max children
1349 * of the below layer node.
1350 * layer 1 node max children will be layer 2 max sibling group size
1351 * layer 2 node max children will be layer 3 max sibling group size
1352 * and so on. This array will be populated from root (index 0) to
1353 * qgroup layer 7. Leaf node has no children.
1355 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1356 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1357 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1360 hw->layer_info = (struct ice_aqc_layer_props *)
1361 ice_memdup(hw, buf->layer_props,
1362 (hw->num_tx_sched_layers *
1363 sizeof(*hw->layer_info)),
1365 if (!hw->layer_info) {
1366 status = ICE_ERR_NO_MEMORY;
1367 goto sched_query_out;
1376 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1377 * @hw: pointer to the HW struct
1379 * Determine the PSM clock frequency and store in HW struct
1381 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1385 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1386 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1387 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1389 #define PSM_CLK_SRC_367_MHZ 0x0
1390 #define PSM_CLK_SRC_416_MHZ 0x1
1391 #define PSM_CLK_SRC_446_MHZ 0x2
1392 #define PSM_CLK_SRC_390_MHZ 0x3
1395 case PSM_CLK_SRC_367_MHZ:
1396 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1398 case PSM_CLK_SRC_416_MHZ:
1399 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1401 case PSM_CLK_SRC_446_MHZ:
1402 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1404 case PSM_CLK_SRC_390_MHZ:
1405 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1408 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1410 /* fall back to a safe default */
1411 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1416 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1417 * @hw: pointer to the HW struct
1418 * @base: pointer to the base node
1419 * @node: pointer to the node to search
1421 * This function checks whether a given node is part of the base node
1425 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1426 struct ice_sched_node *node)
1430 for (i = 0; i < base->num_children; i++) {
1431 struct ice_sched_node *child = base->children[i];
1436 if (child->tx_sched_layer > node->tx_sched_layer)
1439 /* this recursion is intentional, and wouldn't
1440 * go more than 8 calls
1442 if (ice_sched_find_node_in_subtree(hw, child, node))
1449 * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node
1450 * @pi: port information structure
1451 * @vsi_node: software VSI handle
1452 * @qgrp_node: first queue group node identified for scanning
1453 * @owner: LAN or RDMA
1455 * This function retrieves a free LAN or RDMA queue group node by scanning
1456 * qgrp_node and its siblings for the queue group with the fewest number
1457 * of queues currently assigned.
1459 static struct ice_sched_node *
1460 ice_sched_get_free_qgrp(struct ice_port_info *pi,
1461 struct ice_sched_node *vsi_node,
1462 struct ice_sched_node *qgrp_node, u8 owner)
1464 struct ice_sched_node *min_qgrp;
1469 min_children = qgrp_node->num_children;
1472 min_qgrp = qgrp_node;
1473 /* scan all queue groups until find a node which has less than the
1474 * minimum number of children. This way all queue group nodes get
1475 * equal number of shares and active. The bandwidth will be equally
1476 * distributed across all queues.
1479 /* make sure the qgroup node is part of the VSI subtree */
1480 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1481 if (qgrp_node->num_children < min_children &&
1482 qgrp_node->owner == owner) {
1483 /* replace the new min queue group node */
1484 min_qgrp = qgrp_node;
1485 min_children = min_qgrp->num_children;
1486 /* break if it has no children, */
1490 qgrp_node = qgrp_node->sibling;
1496 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1497 * @pi: port information structure
1498 * @vsi_handle: software VSI handle
1499 * @tc: branch number
1500 * @owner: LAN or RDMA
1502 * This function retrieves a free LAN or RDMA queue group node
1504 struct ice_sched_node *
1505 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1508 struct ice_sched_node *vsi_node, *qgrp_node;
1509 struct ice_vsi_ctx *vsi_ctx;
1513 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1514 max_children = pi->hw->max_children[qgrp_layer];
1516 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1519 vsi_node = vsi_ctx->sched.vsi_node[tc];
1520 /* validate invalid VSI ID */
1524 /* get the first queue group node from VSI sub-tree */
1525 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1527 /* make sure the qgroup node is part of the VSI subtree */
1528 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1529 if (qgrp_node->num_children < max_children &&
1530 qgrp_node->owner == owner)
1532 qgrp_node = qgrp_node->sibling;
1535 /* Select the best queue group */
1536 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
1540 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1541 * @pi: pointer to the port information structure
1542 * @tc_node: pointer to the TC node
1543 * @vsi_handle: software VSI handle
1545 * This function retrieves a VSI node for a given VSI ID from a given
1548 struct ice_sched_node *
1549 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1552 struct ice_sched_node *node;
1555 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1556 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1558 /* Check whether it already exists */
1560 if (node->vsi_handle == vsi_handle)
1562 node = node->sibling;
1569 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1570 * @pi: pointer to the port information structure
1571 * @tc_node: pointer to the TC node
1572 * @agg_id: aggregator ID
1574 * This function retrieves an aggregator node for a given aggregator ID from
1577 static struct ice_sched_node *
1578 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1581 struct ice_sched_node *node;
1582 struct ice_hw *hw = pi->hw;
1587 agg_layer = ice_sched_get_agg_layer(hw);
1588 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1590 /* Check whether it already exists */
1592 if (node->agg_id == agg_id)
1594 node = node->sibling;
1601 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1602 * @hw: pointer to the HW struct
1603 * @node: pointer to the ice_sched_node struct
1605 * This function queries and compares the HW element with SW DB node parameters
1607 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1609 struct ice_aqc_txsched_elem_data buf;
1610 enum ice_status status;
1613 node_teid = LE32_TO_CPU(node->info.node_teid);
1614 status = ice_sched_query_elem(hw, node_teid, &buf);
1615 if (status != ICE_SUCCESS)
1618 if (memcmp(&buf, &node->info, sizeof(buf))) {
1619 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1628 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1629 * @hw: pointer to the HW struct
1630 * @num_qs: number of queues
1631 * @num_nodes: num nodes array
1633 * This function calculates the number of VSI child nodes based on the
1637 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1642 qgl = ice_sched_get_qgrp_layer(hw);
1643 vsil = ice_sched_get_vsi_layer(hw);
1645 /* calculate num nodes from queue group to VSI layer */
1646 for (i = qgl; i > vsil; i--) {
1647 /* round to the next integer if there is a remainder */
1648 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1650 /* need at least one node */
1651 num_nodes[i] = num ? num : 1;
1656 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1657 * @pi: port information structure
1658 * @vsi_handle: software VSI handle
1659 * @tc_node: pointer to the TC node
1660 * @num_nodes: pointer to the num nodes that needs to be added per layer
1661 * @owner: node owner (LAN or RDMA)
1663 * This function adds the VSI child nodes to tree. It gets called for
1664 * LAN and RDMA separately.
1666 static enum ice_status
1667 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1668 struct ice_sched_node *tc_node, u16 *num_nodes,
1671 struct ice_sched_node *parent, *node;
1672 struct ice_hw *hw = pi->hw;
1673 enum ice_status status;
1674 u32 first_node_teid;
1678 qgl = ice_sched_get_qgrp_layer(hw);
1679 vsil = ice_sched_get_vsi_layer(hw);
1680 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1681 for (i = vsil + 1; i <= qgl; i++) {
1685 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1689 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1692 /* The newly added node can be a new parent for the next
1696 parent = ice_sched_find_node_by_teid(tc_node,
1700 node->owner = owner;
1701 node = node->sibling;
1704 parent = parent->children[0];
1712 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1713 * @pi: pointer to the port info structure
1714 * @tc_node: pointer to TC node
1715 * @num_nodes: pointer to num nodes array
1717 * This function calculates the number of supported nodes needed to add this
1718 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1722 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1723 struct ice_sched_node *tc_node, u16 *num_nodes)
1725 struct ice_sched_node *node;
1729 vsil = ice_sched_get_vsi_layer(pi->hw);
1730 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1731 /* Add intermediate nodes if TC has no children and
1732 * need at least one node for VSI
1734 if (!tc_node->num_children || i == vsil) {
1737 /* If intermediate nodes are reached max children
1738 * then add a new one.
1740 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1741 /* scan all the siblings */
1743 if (node->num_children <
1744 pi->hw->max_children[i])
1746 node = node->sibling;
1749 /* tree has one intermediate node to add this new VSI.
1750 * So no need to calculate supported nodes for below
1755 /* all the nodes are full, allocate a new one */
1761 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1762 * @pi: port information structure
1763 * @vsi_handle: software VSI handle
1764 * @tc_node: pointer to TC node
1765 * @num_nodes: pointer to num nodes array
1767 * This function adds the VSI supported nodes into Tx tree including the
1768 * VSI, its parent and intermediate nodes in below layers
1770 static enum ice_status
1771 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1772 struct ice_sched_node *tc_node, u16 *num_nodes)
1774 struct ice_sched_node *parent = tc_node;
1775 enum ice_status status;
1776 u32 first_node_teid;
1781 return ICE_ERR_PARAM;
1783 vsil = ice_sched_get_vsi_layer(pi->hw);
1784 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1785 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1789 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1792 /* The newly added node can be a new parent for the next
1796 parent = ice_sched_find_node_by_teid(tc_node,
1799 parent = parent->children[0];
1805 parent->vsi_handle = vsi_handle;
1812 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1813 * @pi: port information structure
1814 * @vsi_handle: software VSI handle
1817 * This function adds a new VSI into scheduler tree
1819 static enum ice_status
1820 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1822 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1823 struct ice_sched_node *tc_node;
1825 tc_node = ice_sched_get_tc_node(pi, tc);
1827 return ICE_ERR_PARAM;
1829 /* calculate number of supported nodes needed for this VSI */
1830 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1832 /* add VSI supported nodes to TC subtree */
1833 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1838 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1839 * @pi: port information structure
1840 * @vsi_handle: software VSI handle
1842 * @new_numqs: new number of max queues
1843 * @owner: owner of this subtree
1845 * This function updates the VSI child nodes based on the number of queues
1847 static enum ice_status
1848 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1849 u8 tc, u16 new_numqs, u8 owner)
1851 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1852 struct ice_sched_node *vsi_node;
1853 struct ice_sched_node *tc_node;
1854 struct ice_vsi_ctx *vsi_ctx;
1855 enum ice_status status = ICE_SUCCESS;
1856 struct ice_hw *hw = pi->hw;
1859 tc_node = ice_sched_get_tc_node(pi, tc);
1863 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1867 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1869 return ICE_ERR_PARAM;
1871 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1872 /* num queues are not changed or less than the previous number */
1873 if (new_numqs <= prev_numqs)
1875 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1880 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1881 /* Keep the max number of queue configuration all the time. Update the
1882 * tree only if number of queues > previous number of queues. This may
1883 * leave some extra nodes in the tree if number of queues < previous
1884 * number but that wouldn't harm anything. Removing those extra nodes
1885 * may complicate the code if those nodes are part of SRL or
1886 * individually rate limited.
1888 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1889 new_num_nodes, owner);
1892 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1898 * ice_sched_cfg_vsi - configure the new/existing VSI
1899 * @pi: port information structure
1900 * @vsi_handle: software VSI handle
1902 * @maxqs: max number of queues
1903 * @owner: LAN or RDMA
1904 * @enable: TC enabled or disabled
1906 * This function adds/updates VSI nodes based on the number of queues. If TC is
1907 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1908 * disabled then suspend the VSI if it is not already.
1911 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1912 u8 owner, bool enable)
1914 struct ice_sched_node *vsi_node, *tc_node;
1915 struct ice_vsi_ctx *vsi_ctx;
1916 enum ice_status status = ICE_SUCCESS;
1917 struct ice_hw *hw = pi->hw;
1919 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1920 tc_node = ice_sched_get_tc_node(pi, tc);
1922 return ICE_ERR_PARAM;
1923 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1925 return ICE_ERR_PARAM;
1926 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1928 /* suspend the VSI if TC is not enabled */
1930 if (vsi_node && vsi_node->in_use) {
1931 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1933 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1936 vsi_node->in_use = false;
1941 /* TC is enabled, if it is a new VSI then add it to the tree */
1943 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1947 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1951 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1952 vsi_node->in_use = true;
1953 /* invalidate the max queues whenever VSI gets added first time
1954 * into the scheduler tree (boot or after reset). We need to
1955 * recreate the child nodes all the time in these cases.
1957 vsi_ctx->sched.max_lanq[tc] = 0;
1960 /* update the VSI child nodes */
1961 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1966 /* TC is enabled, resume the VSI if it is in the suspend state */
1967 if (!vsi_node->in_use) {
1968 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1970 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1972 vsi_node->in_use = true;
1979 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1980 * @pi: port information structure
1981 * @vsi_handle: software VSI handle
1983 * This function removes single aggregator VSI info entry from
1986 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1988 struct ice_sched_agg_info *agg_info;
1989 struct ice_sched_agg_info *atmp;
1991 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1994 struct ice_sched_agg_vsi_info *agg_vsi_info;
1995 struct ice_sched_agg_vsi_info *vtmp;
1997 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1998 &agg_info->agg_vsi_list,
1999 ice_sched_agg_vsi_info, list_entry)
2000 if (agg_vsi_info->vsi_handle == vsi_handle) {
2001 LIST_DEL(&agg_vsi_info->list_entry);
2002 ice_free(pi->hw, agg_vsi_info);
2009 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
2010 * @node: pointer to the sub-tree node
2012 * This function checks for a leaf node presence in a given sub-tree node.
2014 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
2018 for (i = 0; i < node->num_children; i++)
2019 if (ice_sched_is_leaf_node_present(node->children[i]))
2021 /* check for a leaf node */
2022 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
2026 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
2027 * @pi: port information structure
2028 * @vsi_handle: software VSI handle
2029 * @owner: LAN or RDMA
2031 * This function removes the VSI and its LAN or RDMA children nodes from the
2034 static enum ice_status
2035 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
2037 enum ice_status status = ICE_ERR_PARAM;
2038 struct ice_vsi_ctx *vsi_ctx;
2041 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
2042 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2044 ice_acquire_lock(&pi->sched_lock);
2045 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2047 goto exit_sched_rm_vsi_cfg;
2049 ice_for_each_traffic_class(i) {
2050 struct ice_sched_node *vsi_node, *tc_node;
2053 tc_node = ice_sched_get_tc_node(pi, i);
2057 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2061 if (ice_sched_is_leaf_node_present(vsi_node)) {
2062 ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);
2063 status = ICE_ERR_IN_USE;
2064 goto exit_sched_rm_vsi_cfg;
2066 while (j < vsi_node->num_children) {
2067 if (vsi_node->children[j]->owner == owner) {
2068 ice_free_sched_node(pi, vsi_node->children[j]);
2070 /* reset the counter again since the num
2071 * children will be updated after node removal
2078 /* remove the VSI if it has no children */
2079 if (!vsi_node->num_children) {
2080 ice_free_sched_node(pi, vsi_node);
2081 vsi_ctx->sched.vsi_node[i] = NULL;
2083 /* clean up aggregator related VSI info if any */
2084 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2086 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2087 vsi_ctx->sched.max_lanq[i] = 0;
2089 status = ICE_SUCCESS;
2091 exit_sched_rm_vsi_cfg:
2092 ice_release_lock(&pi->sched_lock);
2097 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2098 * @pi: port information structure
2099 * @vsi_handle: software VSI handle
2101 * This function clears the VSI and its LAN children nodes from scheduler tree
2104 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2106 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2110 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2111 * @hw: pointer to the HW struct
2112 * @node: pointer to the ice_sched_node struct
2114 * This function compares all the nodes for a given tree against HW DB nodes
2115 * This function needs to be called with the port_info->sched_lock held
2117 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2121 /* start from the leaf node */
2122 for (i = 0; i < node->num_children; i++)
2123 /* Fail if node doesn't match with the SW DB
2124 * this recursion is intentional, and wouldn't
2125 * go more than 9 calls
2127 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2130 return ice_sched_check_node(hw, node);
2134 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2135 * @hw: pointer to the HW struct
2136 * @node_teid: node TEID
2137 * @buf: pointer to buffer
2138 * @buf_size: buffer size in bytes
2139 * @cd: pointer to command details structure or NULL
2141 * This function retrieves the tree topology from the firmware for a given
2142 * node TEID to the root node.
2145 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2146 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
2147 struct ice_sq_cd *cd)
2149 struct ice_aqc_query_node_to_root *cmd;
2150 struct ice_aq_desc desc;
2152 cmd = &desc.params.query_node_to_root;
2153 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2154 cmd->teid = CPU_TO_LE32(node_teid);
2155 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2159 * ice_get_agg_info - get the aggregator ID
2160 * @hw: pointer to the hardware structure
2161 * @agg_id: aggregator ID
2163 * This function validates aggregator ID. The function returns info if
2164 * aggregator ID is present in list otherwise it returns null.
2166 static struct ice_sched_agg_info *
2167 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2169 struct ice_sched_agg_info *agg_info;
2171 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2173 if (agg_info->agg_id == agg_id)
2180 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2181 * @hw: pointer to the HW struct
2182 * @node: pointer to a child node
2183 * @num_nodes: num nodes count array
2185 * This function walks through the aggregator subtree to find a free parent
2188 static struct ice_sched_node *
2189 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2192 u8 l = node->tx_sched_layer;
2195 vsil = ice_sched_get_vsi_layer(hw);
2197 /* Is it VSI parent layer ? */
2199 return (node->num_children < hw->max_children[l]) ? node : NULL;
2201 /* We have intermediate nodes. Let's walk through the subtree. If the
2202 * intermediate node has space to add a new node then clear the count
2204 if (node->num_children < hw->max_children[l])
2206 /* The below recursive call is intentional and wouldn't go more than
2207 * 2 or 3 iterations.
2210 for (i = 0; i < node->num_children; i++) {
2211 struct ice_sched_node *parent;
2213 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2223 * ice_sched_update_parent - update the new parent in SW DB
2224 * @new_parent: pointer to a new parent node
2225 * @node: pointer to a child node
2227 * This function removes the child from the old parent and adds it to a new
2231 ice_sched_update_parent(struct ice_sched_node *new_parent,
2232 struct ice_sched_node *node)
2234 struct ice_sched_node *old_parent;
2237 old_parent = node->parent;
2239 /* update the old parent children */
2240 for (i = 0; i < old_parent->num_children; i++)
2241 if (old_parent->children[i] == node) {
2242 for (j = i + 1; j < old_parent->num_children; j++)
2243 old_parent->children[j - 1] =
2244 old_parent->children[j];
2245 old_parent->num_children--;
2249 /* now move the node to a new parent */
2250 new_parent->children[new_parent->num_children++] = node;
2251 node->parent = new_parent;
2252 node->info.parent_teid = new_parent->info.node_teid;
2256 * ice_sched_move_nodes - move child nodes to a given parent
2257 * @pi: port information structure
2258 * @parent: pointer to parent node
2259 * @num_items: number of child nodes to be moved
2260 * @list: pointer to child node teids
2262 * This function move the child nodes to a given parent.
2264 static enum ice_status
2265 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2266 u16 num_items, u32 *list)
2268 enum ice_status status = ICE_SUCCESS;
2269 struct ice_aqc_move_elem *buf;
2270 struct ice_sched_node *node;
2271 u16 i, grps_movd = 0;
2277 if (!parent || !num_items)
2278 return ICE_ERR_PARAM;
2280 /* Does parent have enough space */
2281 if (parent->num_children + num_items >
2282 hw->max_children[parent->tx_sched_layer])
2283 return ICE_ERR_AQ_FULL;
2285 buf_len = ice_struct_size(buf, teid, 1);
2286 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);
2288 return ICE_ERR_NO_MEMORY;
2290 for (i = 0; i < num_items; i++) {
2291 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2293 status = ICE_ERR_PARAM;
2297 buf->hdr.src_parent_teid = node->info.parent_teid;
2298 buf->hdr.dest_parent_teid = parent->info.node_teid;
2299 buf->teid[0] = node->info.node_teid;
2300 buf->hdr.num_elems = CPU_TO_LE16(1);
2301 status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,
2303 if (status && grps_movd != 1) {
2304 status = ICE_ERR_CFG;
2308 /* update the SW DB */
2309 ice_sched_update_parent(parent, node);
2318 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2319 * @pi: port information structure
2320 * @vsi_handle: software VSI handle
2321 * @agg_id: aggregator ID
2324 * This function moves a VSI to an aggregator node or its subtree.
2325 * Intermediate nodes may be created if required.
2327 static enum ice_status
2328 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2331 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2332 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2333 u32 first_node_teid, vsi_teid;
2334 enum ice_status status;
2335 u16 num_nodes_added;
2338 tc_node = ice_sched_get_tc_node(pi, tc);
2342 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2344 return ICE_ERR_DOES_NOT_EXIST;
2346 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2348 return ICE_ERR_DOES_NOT_EXIST;
2350 /* Is this VSI already part of given aggregator? */
2351 if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))
2354 aggl = ice_sched_get_agg_layer(pi->hw);
2355 vsil = ice_sched_get_vsi_layer(pi->hw);
2357 /* set intermediate node count to 1 between aggregator and VSI layers */
2358 for (i = aggl + 1; i < vsil; i++)
2361 /* Check if the aggregator subtree has any free node to add the VSI */
2362 for (i = 0; i < agg_node->num_children; i++) {
2363 parent = ice_sched_get_free_vsi_parent(pi->hw,
2364 agg_node->children[i],
2372 for (i = aggl + 1; i < vsil; i++) {
2373 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2377 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2380 /* The newly added node can be a new parent for the next
2383 if (num_nodes_added)
2384 parent = ice_sched_find_node_by_teid(tc_node,
2387 parent = parent->children[0];
2394 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2395 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2399 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2400 * @pi: port information structure
2401 * @agg_info: aggregator info
2402 * @tc: traffic class number
2403 * @rm_vsi_info: true or false
2405 * This function move all the VSI(s) to the default aggregator and delete
2406 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2407 * caller holds the scheduler lock.
2409 static enum ice_status
2410 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2411 struct ice_sched_agg_info *agg_info, u8 tc,
2414 struct ice_sched_agg_vsi_info *agg_vsi_info;
2415 struct ice_sched_agg_vsi_info *tmp;
2416 enum ice_status status = ICE_SUCCESS;
2418 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2419 ice_sched_agg_vsi_info, list_entry) {
2420 u16 vsi_handle = agg_vsi_info->vsi_handle;
2422 /* Move VSI to default aggregator */
2423 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2426 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2427 ICE_DFLT_AGG_ID, tc);
2431 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2432 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2433 LIST_DEL(&agg_vsi_info->list_entry);
2434 ice_free(pi->hw, agg_vsi_info);
2442 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2443 * @pi: port information structure
2444 * @node: node pointer
2446 * This function checks whether the aggregator is attached with any VSI or not.
2449 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2453 vsil = ice_sched_get_vsi_layer(pi->hw);
2454 if (node->tx_sched_layer < vsil - 1) {
2455 for (i = 0; i < node->num_children; i++)
2456 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2460 return node->num_children ? true : false;
2465 * ice_sched_rm_agg_cfg - remove the aggregator node
2466 * @pi: port information structure
2467 * @agg_id: aggregator ID
2470 * This function removes the aggregator node and intermediate nodes if any
2473 static enum ice_status
2474 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2476 struct ice_sched_node *tc_node, *agg_node;
2477 struct ice_hw *hw = pi->hw;
2479 tc_node = ice_sched_get_tc_node(pi, tc);
2483 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2485 return ICE_ERR_DOES_NOT_EXIST;
2487 /* Can't remove the aggregator node if it has children */
2488 if (ice_sched_is_agg_inuse(pi, agg_node))
2489 return ICE_ERR_IN_USE;
2491 /* need to remove the whole subtree if aggregator node is the
2494 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2495 struct ice_sched_node *parent = agg_node->parent;
2500 if (parent->num_children > 1)
2506 ice_free_sched_node(pi, agg_node);
2511 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2512 * @pi: port information structure
2513 * @agg_info: aggregator ID
2515 * @rm_vsi_info: bool value true or false
2517 * This function removes aggregator reference to VSI of given TC. It removes
2518 * the aggregator configuration completely for requested TC. The caller needs
2519 * to hold the scheduler lock.
2521 static enum ice_status
2522 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2523 u8 tc, bool rm_vsi_info)
2525 enum ice_status status = ICE_SUCCESS;
2527 /* If nothing to remove - return success */
2528 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2529 goto exit_rm_agg_cfg_tc;
2531 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2533 goto exit_rm_agg_cfg_tc;
2535 /* Delete aggregator node(s) */
2536 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2538 goto exit_rm_agg_cfg_tc;
2540 ice_clear_bit(tc, agg_info->tc_bitmap);
2546 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2547 * @pi: port information structure
2548 * @agg_id: aggregator ID
2549 * @tc_bitmap: 8 bits TC bitmap
2551 * Save aggregator TC bitmap. This function needs to be called with scheduler
2554 static enum ice_status
2555 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2556 ice_bitmap_t *tc_bitmap)
2558 struct ice_sched_agg_info *agg_info;
2560 agg_info = ice_get_agg_info(pi->hw, agg_id);
2562 return ICE_ERR_PARAM;
2563 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2564 ICE_MAX_TRAFFIC_CLASS);
2569 * ice_sched_add_agg_cfg - create an aggregator node
2570 * @pi: port information structure
2571 * @agg_id: aggregator ID
2574 * This function creates an aggregator node and intermediate nodes if required
2577 static enum ice_status
2578 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2580 struct ice_sched_node *parent, *agg_node, *tc_node;
2581 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2582 enum ice_status status = ICE_SUCCESS;
2583 struct ice_hw *hw = pi->hw;
2584 u32 first_node_teid;
2585 u16 num_nodes_added;
2588 tc_node = ice_sched_get_tc_node(pi, tc);
2592 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2593 /* Does Agg node already exist ? */
2597 aggl = ice_sched_get_agg_layer(hw);
2599 /* need one node in Agg layer */
2600 num_nodes[aggl] = 1;
2602 /* Check whether the intermediate nodes have space to add the
2603 * new aggregator. If they are full, then SW needs to allocate a new
2604 * intermediate node on those layers
2606 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2607 parent = ice_sched_get_first_node(pi, tc_node, i);
2609 /* scan all the siblings */
2611 if (parent->num_children < hw->max_children[i])
2613 parent = parent->sibling;
2616 /* all the nodes are full, reserve one for this layer */
2621 /* add the aggregator node */
2623 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2627 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2631 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2634 /* The newly added node can be a new parent for the next
2637 if (num_nodes_added) {
2638 parent = ice_sched_find_node_by_teid(tc_node,
2640 /* register aggregator ID with the aggregator node */
2641 if (parent && i == aggl)
2642 parent->agg_id = agg_id;
2644 parent = parent->children[0];
2652 * ice_sched_cfg_agg - configure aggregator node
2653 * @pi: port information structure
2654 * @agg_id: aggregator ID
2655 * @agg_type: aggregator type queue, VSI, or aggregator group
2656 * @tc_bitmap: bits TC bitmap
2658 * It registers a unique aggregator node into scheduler services. It
2659 * allows a user to register with a unique ID to track it's resources.
2660 * The aggregator type determines if this is a queue group, VSI group
2661 * or aggregator group. It then creates the aggregator node(s) for requested
2662 * TC(s) or removes an existing aggregator node including its configuration
2663 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2664 * resources and remove aggregator ID.
2665 * This function needs to be called with scheduler lock held.
2667 static enum ice_status
2668 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2669 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2671 struct ice_sched_agg_info *agg_info;
2672 enum ice_status status = ICE_SUCCESS;
2673 struct ice_hw *hw = pi->hw;
2676 agg_info = ice_get_agg_info(hw, agg_id);
2678 /* Create new entry for new aggregator ID */
2679 agg_info = (struct ice_sched_agg_info *)
2680 ice_malloc(hw, sizeof(*agg_info));
2682 return ICE_ERR_NO_MEMORY;
2684 agg_info->agg_id = agg_id;
2685 agg_info->agg_type = agg_type;
2686 agg_info->tc_bitmap[0] = 0;
2688 /* Initialize the aggregator VSI list head */
2689 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2691 /* Add new entry in aggregator list */
2692 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2694 /* Create aggregator node(s) for requested TC(s) */
2695 ice_for_each_traffic_class(tc) {
2696 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2697 /* Delete aggregator cfg TC if it exists previously */
2698 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2704 /* Check if aggregator node for TC already exists */
2705 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2708 /* Create new aggregator node for TC */
2709 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2713 /* Save aggregator node's TC information */
2714 ice_set_bit(tc, agg_info->tc_bitmap);
2721 * ice_cfg_agg - config aggregator node
2722 * @pi: port information structure
2723 * @agg_id: aggregator ID
2724 * @agg_type: aggregator type queue, VSI, or aggregator group
2725 * @tc_bitmap: bits TC bitmap
2727 * This function configures aggregator node(s).
2730 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2733 ice_bitmap_t bitmap = tc_bitmap;
2734 enum ice_status status;
2736 ice_acquire_lock(&pi->sched_lock);
2737 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2738 (ice_bitmap_t *)&bitmap);
2740 status = ice_save_agg_tc_bitmap(pi, agg_id,
2741 (ice_bitmap_t *)&bitmap);
2742 ice_release_lock(&pi->sched_lock);
2747 * ice_get_agg_vsi_info - get the aggregator ID
2748 * @agg_info: aggregator info
2749 * @vsi_handle: software VSI handle
2751 * The function returns aggregator VSI info based on VSI handle. This function
2752 * needs to be called with scheduler lock held.
2754 static struct ice_sched_agg_vsi_info *
2755 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2757 struct ice_sched_agg_vsi_info *agg_vsi_info;
2759 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2760 ice_sched_agg_vsi_info, list_entry)
2761 if (agg_vsi_info->vsi_handle == vsi_handle)
2762 return agg_vsi_info;
2768 * ice_get_vsi_agg_info - get the aggregator info of VSI
2769 * @hw: pointer to the hardware structure
2770 * @vsi_handle: Sw VSI handle
2772 * The function returns aggregator info of VSI represented via vsi_handle. The
2773 * VSI has in this case a different aggregator than the default one. This
2774 * function needs to be called with scheduler lock held.
2776 static struct ice_sched_agg_info *
2777 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2779 struct ice_sched_agg_info *agg_info;
2781 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2783 struct ice_sched_agg_vsi_info *agg_vsi_info;
2785 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2793 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2794 * @pi: port information structure
2795 * @agg_id: aggregator ID
2796 * @vsi_handle: software VSI handle
2797 * @tc_bitmap: TC bitmap of enabled TC(s)
2799 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2802 static enum ice_status
2803 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2804 ice_bitmap_t *tc_bitmap)
2806 struct ice_sched_agg_vsi_info *agg_vsi_info;
2807 struct ice_sched_agg_info *agg_info;
2809 agg_info = ice_get_agg_info(pi->hw, agg_id);
2811 return ICE_ERR_PARAM;
2812 /* check if entry already exist */
2813 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2815 return ICE_ERR_PARAM;
2816 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2817 ICE_MAX_TRAFFIC_CLASS);
2822 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2823 * @pi: port information structure
2824 * @agg_id: aggregator ID
2825 * @vsi_handle: software VSI handle
2826 * @tc_bitmap: TC bitmap of enabled TC(s)
2828 * This function moves VSI to a new or default aggregator node. If VSI is
2829 * already associated to the aggregator node then no operation is performed on
2830 * the tree. This function needs to be called with scheduler lock held.
2832 static enum ice_status
2833 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2834 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2836 struct ice_sched_agg_vsi_info *agg_vsi_info;
2837 struct ice_sched_agg_info *agg_info;
2838 enum ice_status status = ICE_SUCCESS;
2839 struct ice_hw *hw = pi->hw;
2842 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2843 return ICE_ERR_PARAM;
2844 agg_info = ice_get_agg_info(hw, agg_id);
2846 return ICE_ERR_PARAM;
2847 /* check if entry already exist */
2848 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2849 if (!agg_vsi_info) {
2850 /* Create new entry for VSI under aggregator list */
2851 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2852 ice_malloc(hw, sizeof(*agg_vsi_info));
2854 return ICE_ERR_PARAM;
2856 /* add VSI ID into the aggregator list */
2857 agg_vsi_info->vsi_handle = vsi_handle;
2858 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2860 /* Move VSI node to new aggregator node for requested TC(s) */
2861 ice_for_each_traffic_class(tc) {
2862 if (!ice_is_tc_ena(*tc_bitmap, tc))
2865 /* Move VSI to new aggregator */
2866 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2870 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2876 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2877 * @hw: pointer to the hardware structure
2879 * This function removes unused rate limit profiles from the HW and
2880 * SW DB. The caller needs to hold scheduler lock.
2882 static void ice_sched_rm_unused_rl_prof(struct ice_hw *hw)
2886 for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
2887 struct ice_aqc_rl_profile_info *rl_prof_elem;
2888 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2890 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2891 &hw->rl_prof_list[ln],
2892 ice_aqc_rl_profile_info, list_entry) {
2893 if (!ice_sched_del_rl_profile(hw, rl_prof_elem))
2894 ice_debug(hw, ICE_DBG_SCHED, "Removed rl profile\n");
2900 * ice_sched_update_elem - update element
2901 * @hw: pointer to the HW struct
2902 * @node: pointer to node
2903 * @info: node info to update
2905 * Update the HW DB, and local SW DB of node. Update the scheduling
2906 * parameters of node from argument info data buffer (Info->data buf) and
2907 * returns success or error on config sched element failure. The caller
2908 * needs to hold scheduler lock.
2910 static enum ice_status
2911 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2912 struct ice_aqc_txsched_elem_data *info)
2914 struct ice_aqc_txsched_elem_data buf;
2915 enum ice_status status;
2920 /* Parent TEID is reserved field in this aq call */
2921 buf.parent_teid = 0;
2922 /* Element type is reserved field in this aq call */
2923 buf.data.elem_type = 0;
2924 /* Flags is reserved field in this aq call */
2928 /* Configure element node */
2929 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2931 if (status || elem_cfgd != num_elems) {
2932 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2936 /* Config success case */
2937 /* Now update local SW DB */
2938 /* Only copy the data portion of info buffer */
2939 node->info.data = info->data;
2944 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2945 * @hw: pointer to the HW struct
2946 * @node: sched node to configure
2947 * @rl_type: rate limit type CIR, EIR, or shared
2948 * @bw_alloc: BW weight/allocation
2950 * This function configures node element's BW allocation.
2952 static enum ice_status
2953 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2954 enum ice_rl_type rl_type, u16 bw_alloc)
2956 struct ice_aqc_txsched_elem_data buf;
2957 struct ice_aqc_txsched_elem *data;
2958 enum ice_status status;
2962 if (rl_type == ICE_MIN_BW) {
2963 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2964 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2965 } else if (rl_type == ICE_MAX_BW) {
2966 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2967 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2969 return ICE_ERR_PARAM;
2972 /* Configure element */
2973 status = ice_sched_update_elem(hw, node, &buf);
2978 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2979 * @pi: port information structure
2980 * @agg_id: aggregator ID
2981 * @vsi_handle: software VSI handle
2982 * @tc_bitmap: TC bitmap of enabled TC(s)
2984 * Move or associate VSI to a new or default aggregator node.
2987 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2990 ice_bitmap_t bitmap = tc_bitmap;
2991 enum ice_status status;
2993 ice_acquire_lock(&pi->sched_lock);
2994 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2995 (ice_bitmap_t *)&bitmap);
2997 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2998 (ice_bitmap_t *)&bitmap);
2999 ice_release_lock(&pi->sched_lock);
3004 * ice_rm_agg_cfg - remove aggregator configuration
3005 * @pi: port information structure
3006 * @agg_id: aggregator ID
3008 * This function removes aggregator reference to VSI and delete aggregator ID
3009 * info. It removes the aggregator configuration completely.
3011 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
3013 struct ice_sched_agg_info *agg_info;
3014 enum ice_status status = ICE_SUCCESS;
3017 ice_acquire_lock(&pi->sched_lock);
3018 agg_info = ice_get_agg_info(pi->hw, agg_id);
3020 status = ICE_ERR_DOES_NOT_EXIST;
3021 goto exit_ice_rm_agg_cfg;
3024 ice_for_each_traffic_class(tc) {
3025 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
3027 goto exit_ice_rm_agg_cfg;
3030 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
3031 status = ICE_ERR_IN_USE;
3032 goto exit_ice_rm_agg_cfg;
3035 /* Safe to delete entry now */
3036 LIST_DEL(&agg_info->list_entry);
3037 ice_free(pi->hw, agg_info);
3039 /* Remove unused RL profile IDs from HW and SW DB */
3040 ice_sched_rm_unused_rl_prof(pi->hw);
3042 exit_ice_rm_agg_cfg:
3043 ice_release_lock(&pi->sched_lock);
3048 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
3049 * @bw_t_info: bandwidth type information structure
3050 * @bw_alloc: Bandwidth allocation information
3052 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
3056 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3058 bw_t_info->cir_bw.bw_alloc = bw_alloc;
3059 if (bw_t_info->cir_bw.bw_alloc)
3060 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3062 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3066 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
3067 * @bw_t_info: bandwidth type information structure
3068 * @bw_alloc: Bandwidth allocation information
3070 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
3074 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3076 bw_t_info->eir_bw.bw_alloc = bw_alloc;
3077 if (bw_t_info->eir_bw.bw_alloc)
3078 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3080 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3084 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3085 * @pi: port information structure
3086 * @vsi_handle: sw VSI handle
3087 * @tc: traffic class
3088 * @rl_type: rate limit type min or max
3089 * @bw_alloc: Bandwidth allocation information
3091 * Save BW alloc information of VSI type node for post replay use.
3093 static enum ice_status
3094 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3095 enum ice_rl_type rl_type, u16 bw_alloc)
3097 struct ice_vsi_ctx *vsi_ctx;
3099 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3100 return ICE_ERR_PARAM;
3101 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3103 return ICE_ERR_PARAM;
3106 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3110 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3114 return ICE_ERR_PARAM;
3120 * ice_set_clear_cir_bw - set or clear CIR BW
3121 * @bw_t_info: bandwidth type information structure
3122 * @bw: bandwidth in Kbps - Kilo bits per sec
3124 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3126 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3128 if (bw == ICE_SCHED_DFLT_BW) {
3129 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3130 bw_t_info->cir_bw.bw = 0;
3132 /* Save type of BW information */
3133 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3134 bw_t_info->cir_bw.bw = bw;
3139 * ice_set_clear_eir_bw - set or clear EIR BW
3140 * @bw_t_info: bandwidth type information structure
3141 * @bw: bandwidth in Kbps - Kilo bits per sec
3143 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3145 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3147 if (bw == ICE_SCHED_DFLT_BW) {
3148 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3149 bw_t_info->eir_bw.bw = 0;
3151 /* save EIR BW information */
3152 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3153 bw_t_info->eir_bw.bw = bw;
3158 * ice_set_clear_shared_bw - set or clear shared BW
3159 * @bw_t_info: bandwidth type information structure
3160 * @bw: bandwidth in Kbps - Kilo bits per sec
3162 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3164 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3166 if (bw == ICE_SCHED_DFLT_BW) {
3167 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3168 bw_t_info->shared_bw = 0;
3170 /* save shared BW information */
3171 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3172 bw_t_info->shared_bw = bw;
3177 * ice_sched_save_vsi_bw - save VSI node's BW information
3178 * @pi: port information structure
3179 * @vsi_handle: sw VSI handle
3180 * @tc: traffic class
3181 * @rl_type: rate limit type min, max, or shared
3182 * @bw: bandwidth in Kbps - Kilo bits per sec
3184 * Save BW information of VSI type node for post replay use.
3186 static enum ice_status
3187 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3188 enum ice_rl_type rl_type, u32 bw)
3190 struct ice_vsi_ctx *vsi_ctx;
3192 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3193 return ICE_ERR_PARAM;
3194 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3196 return ICE_ERR_PARAM;
3199 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3202 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3205 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3208 return ICE_ERR_PARAM;
3214 * ice_set_clear_prio - set or clear priority information
3215 * @bw_t_info: bandwidth type information structure
3216 * @prio: priority to save
3218 * Save or clear priority (prio) in the passed param bw_t_info.
3220 static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3222 bw_t_info->generic = prio;
3223 if (bw_t_info->generic)
3224 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3226 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3230 * ice_sched_save_vsi_prio - save VSI node's priority information
3231 * @pi: port information structure
3232 * @vsi_handle: Software VSI handle
3233 * @tc: traffic class
3234 * @prio: priority to save
3236 * Save priority information of VSI type node for post replay use.
3238 static enum ice_status
3239 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3242 struct ice_vsi_ctx *vsi_ctx;
3244 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3245 return ICE_ERR_PARAM;
3246 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3248 return ICE_ERR_PARAM;
3249 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3250 return ICE_ERR_PARAM;
3251 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3256 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3257 * @pi: port information structure
3258 * @agg_id: node aggregator ID
3259 * @tc: traffic class
3260 * @rl_type: rate limit type min or max
3261 * @bw_alloc: bandwidth alloc information
3263 * Save BW alloc information of AGG type node for post replay use.
3265 static enum ice_status
3266 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3267 enum ice_rl_type rl_type, u16 bw_alloc)
3269 struct ice_sched_agg_info *agg_info;
3271 agg_info = ice_get_agg_info(pi->hw, agg_id);
3273 return ICE_ERR_PARAM;
3274 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3275 return ICE_ERR_PARAM;
3278 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3281 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3284 return ICE_ERR_PARAM;
3290 * ice_sched_save_agg_bw - save aggregator node's BW information
3291 * @pi: port information structure
3292 * @agg_id: node aggregator ID
3293 * @tc: traffic class
3294 * @rl_type: rate limit type min, max, or shared
3295 * @bw: bandwidth in Kbps - Kilo bits per sec
3297 * Save BW information of AGG type node for post replay use.
3299 static enum ice_status
3300 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3301 enum ice_rl_type rl_type, u32 bw)
3303 struct ice_sched_agg_info *agg_info;
3305 agg_info = ice_get_agg_info(pi->hw, agg_id);
3307 return ICE_ERR_PARAM;
3308 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3309 return ICE_ERR_PARAM;
3312 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3315 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3318 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3321 return ICE_ERR_PARAM;
3327 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3328 * @pi: port information structure
3329 * @vsi_handle: software VSI handle
3330 * @tc: traffic class
3331 * @rl_type: min or max
3332 * @bw: bandwidth in Kbps
3334 * This function configures BW limit of VSI scheduling node based on TC
3338 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3339 enum ice_rl_type rl_type, u32 bw)
3341 enum ice_status status;
3343 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3347 ice_acquire_lock(&pi->sched_lock);
3348 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3349 ice_release_lock(&pi->sched_lock);
3355 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3356 * @pi: port information structure
3357 * @vsi_handle: software VSI handle
3358 * @tc: traffic class
3359 * @rl_type: min or max
3361 * This function configures default BW limit of VSI scheduling node based on TC
3365 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3366 enum ice_rl_type rl_type)
3368 enum ice_status status;
3370 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3375 ice_acquire_lock(&pi->sched_lock);
3376 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3378 ice_release_lock(&pi->sched_lock);
3384 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3385 * @pi: port information structure
3386 * @agg_id: aggregator ID
3387 * @tc: traffic class
3388 * @rl_type: min or max
3389 * @bw: bandwidth in Kbps
3391 * This function applies BW limit to aggregator scheduling node based on TC
3395 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3396 enum ice_rl_type rl_type, u32 bw)
3398 enum ice_status status;
3400 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3403 ice_acquire_lock(&pi->sched_lock);
3404 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3405 ice_release_lock(&pi->sched_lock);
3411 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3412 * @pi: port information structure
3413 * @agg_id: aggregator ID
3414 * @tc: traffic class
3415 * @rl_type: min or max
3417 * This function applies default BW limit to aggregator scheduling node based
3418 * on TC information.
3421 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3422 enum ice_rl_type rl_type)
3424 enum ice_status status;
3426 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3430 ice_acquire_lock(&pi->sched_lock);
3431 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3433 ice_release_lock(&pi->sched_lock);
3439 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3440 * @pi: port information structure
3441 * @vsi_handle: software VSI handle
3442 * @min_bw: minimum bandwidth in Kbps
3443 * @max_bw: maximum bandwidth in Kbps
3444 * @shared_bw: shared bandwidth in Kbps
3446 * Configure shared rate limiter(SRL) of all VSI type nodes across all traffic
3447 * classes for VSI matching handle.
3450 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
3451 u32 max_bw, u32 shared_bw)
3453 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, min_bw, max_bw,
3458 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3459 * @pi: port information structure
3460 * @vsi_handle: software VSI handle
3462 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3463 * across all traffic classes for VSI matching handle.
3466 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3468 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3475 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3476 * @pi: port information structure
3477 * @agg_id: aggregator ID
3478 * @min_bw: minimum bandwidth in Kbps
3479 * @max_bw: maximum bandwidth in Kbps
3480 * @shared_bw: shared bandwidth in Kbps
3482 * This function configures the shared rate limiter(SRL) of all aggregator type
3483 * nodes across all traffic classes for aggregator matching agg_id.
3486 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
3487 u32 max_bw, u32 shared_bw)
3489 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, min_bw, max_bw,
3494 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3495 * @pi: port information structure
3496 * @agg_id: aggregator ID
3498 * This function removes the shared rate limiter(SRL) of all aggregator type
3499 * nodes across all traffic classes for aggregator matching agg_id.
3502 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3504 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW,
3510 * ice_cfg_agg_bw_shared_lmt_per_tc - configure aggregator BW shared limit per tc
3511 * @pi: port information structure
3512 * @agg_id: aggregator ID
3513 * @tc: traffic class
3514 * @min_bw: minimum bandwidth in Kbps
3515 * @max_bw: maximum bandwidth in Kbps
3516 * @shared_bw: shared bandwidth in Kbps
3518 * This function configures the shared rate limiter(SRL) of all aggregator type
3519 * nodes across all traffic classes for aggregator matching agg_id.
3522 ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3523 u32 min_bw, u32 max_bw, u32 shared_bw)
3525 return ice_sched_set_agg_bw_shared_lmt_per_tc(pi, agg_id, tc, min_bw,
3530 * ice_cfg_agg_bw_shared_lmt_per_tc - configure aggregator BW shared limit per tc
3531 * @pi: port information structure
3532 * @agg_id: aggregator ID
3533 * @tc: traffic class
3535 * This function configures the shared rate limiter(SRL) of all aggregator type
3536 * nodes across all traffic classes for aggregator matching agg_id.
3539 ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc)
3541 return ice_sched_set_agg_bw_shared_lmt_per_tc(pi, agg_id, tc,
3548 * ice_config_vsi_queue_priority - config VSI queue priority of node
3549 * @pi: port information structure
3550 * @num_qs: number of VSI queues
3551 * @q_ids: queue IDs array
3552 * @q_prio: queue priority array
3554 * This function configures the queue node priority (Sibling Priority) of the
3555 * passed in VSI's queue(s) for a given traffic class (TC).
3558 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3561 enum ice_status status = ICE_ERR_PARAM;
3564 ice_acquire_lock(&pi->sched_lock);
3566 for (i = 0; i < num_qs; i++) {
3567 struct ice_sched_node *node;
3569 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3570 if (!node || node->info.data.elem_type !=
3571 ICE_AQC_ELEM_TYPE_LEAF) {
3572 status = ICE_ERR_PARAM;
3575 /* Configure Priority */
3576 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3581 ice_release_lock(&pi->sched_lock);
3586 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3587 * @pi: port information structure
3588 * @agg_id: Aggregator ID
3589 * @num_vsis: number of VSI(s)
3590 * @vsi_handle_arr: array of software VSI handles
3591 * @node_prio: pointer to node priority
3592 * @tc: traffic class
3594 * This function configures the node priority (Sibling Priority) of the
3595 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3598 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3599 u16 num_vsis, u16 *vsi_handle_arr,
3600 u8 *node_prio, u8 tc)
3602 struct ice_sched_agg_vsi_info *agg_vsi_info;
3603 struct ice_sched_node *tc_node, *agg_node;
3604 enum ice_status status = ICE_ERR_PARAM;
3605 struct ice_sched_agg_info *agg_info;
3606 bool agg_id_present = false;
3607 struct ice_hw *hw = pi->hw;
3610 ice_acquire_lock(&pi->sched_lock);
3611 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3613 if (agg_info->agg_id == agg_id) {
3614 agg_id_present = true;
3617 if (!agg_id_present)
3618 goto exit_agg_priority_per_tc;
3620 tc_node = ice_sched_get_tc_node(pi, tc);
3622 goto exit_agg_priority_per_tc;
3624 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3626 goto exit_agg_priority_per_tc;
3628 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3629 goto exit_agg_priority_per_tc;
3631 for (i = 0; i < num_vsis; i++) {
3632 struct ice_sched_node *vsi_node;
3633 bool vsi_handle_valid = false;
3636 status = ICE_ERR_PARAM;
3637 vsi_handle = vsi_handle_arr[i];
3638 if (!ice_is_vsi_valid(hw, vsi_handle))
3639 goto exit_agg_priority_per_tc;
3640 /* Verify child nodes before applying settings */
3641 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3642 ice_sched_agg_vsi_info, list_entry)
3643 if (agg_vsi_info->vsi_handle == vsi_handle) {
3644 /* cppcheck-suppress unreadVariable */
3645 vsi_handle_valid = true;
3649 if (!vsi_handle_valid)
3650 goto exit_agg_priority_per_tc;
3652 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3654 goto exit_agg_priority_per_tc;
3656 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3657 /* Configure Priority */
3658 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3662 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3669 exit_agg_priority_per_tc:
3670 ice_release_lock(&pi->sched_lock);
3675 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3676 * @pi: port information structure
3677 * @vsi_handle: software VSI handle
3678 * @ena_tcmap: enabled TC map
3679 * @rl_type: Rate limit type CIR/EIR
3680 * @bw_alloc: Array of BW alloc
3682 * This function configures the BW allocation of the passed in VSI's
3683 * node(s) for enabled traffic class.
3686 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3687 enum ice_rl_type rl_type, u8 *bw_alloc)
3689 enum ice_status status = ICE_SUCCESS;
3692 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3693 return ICE_ERR_PARAM;
3695 ice_acquire_lock(&pi->sched_lock);
3697 /* Return success if no nodes are present across TC */
3698 ice_for_each_traffic_class(tc) {
3699 struct ice_sched_node *tc_node, *vsi_node;
3701 if (!ice_is_tc_ena(ena_tcmap, tc))
3704 tc_node = ice_sched_get_tc_node(pi, tc);
3708 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3712 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3716 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3717 rl_type, bw_alloc[tc]);
3722 ice_release_lock(&pi->sched_lock);
3727 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3728 * @pi: port information structure
3729 * @agg_id: aggregator ID
3730 * @ena_tcmap: enabled TC map
3731 * @rl_type: rate limit type CIR/EIR
3732 * @bw_alloc: array of BW alloc
3734 * This function configures the BW allocation of passed in aggregator for
3735 * enabled traffic class(s).
3738 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3739 enum ice_rl_type rl_type, u8 *bw_alloc)
3741 struct ice_sched_agg_info *agg_info;
3742 bool agg_id_present = false;
3743 enum ice_status status = ICE_SUCCESS;
3744 struct ice_hw *hw = pi->hw;
3747 ice_acquire_lock(&pi->sched_lock);
3748 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3750 if (agg_info->agg_id == agg_id) {
3751 agg_id_present = true;
3754 if (!agg_id_present) {
3755 status = ICE_ERR_PARAM;
3756 goto exit_cfg_agg_bw_alloc;
3759 /* Return success if no nodes are present across TC */
3760 ice_for_each_traffic_class(tc) {
3761 struct ice_sched_node *tc_node, *agg_node;
3763 if (!ice_is_tc_ena(ena_tcmap, tc))
3766 tc_node = ice_sched_get_tc_node(pi, tc);
3770 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3774 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3778 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3784 exit_cfg_agg_bw_alloc:
3785 ice_release_lock(&pi->sched_lock);
3790 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3791 * @hw: pointer to the HW struct
3792 * @bw: bandwidth in Kbps
3794 * This function calculates the wakeup parameter of RL profile.
3796 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3798 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3802 /* Get the wakeup integer value */
3803 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3804 wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
3805 if (wakeup_int > 63) {
3806 wakeup = (u16)((1 << 15) | wakeup_int);
3808 /* Calculate fraction value up to 4 decimals
3809 * Convert Integer value to a constant multiplier
3811 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3812 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3813 hw->psm_clk_freq, bytes_per_sec);
3815 /* Get Fraction value */
3816 wakeup_f = wakeup_a - wakeup_b;
3818 /* Round up the Fractional value via Ceil(Fractional value) */
3819 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3822 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3823 ICE_RL_PROF_MULTIPLIER);
3824 wakeup |= (u16)(wakeup_int << 9);
3825 wakeup |= (u16)(0x1ff & wakeup_f_int);
3832 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3833 * @hw: pointer to the HW struct
3834 * @bw: bandwidth in Kbps
3835 * @profile: profile parameters to return
3837 * This function converts the BW to profile structure format.
3839 static enum ice_status
3840 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3841 struct ice_aqc_rl_profile_elem *profile)
3843 enum ice_status status = ICE_ERR_PARAM;
3844 s64 bytes_per_sec, ts_rate, mv_tmp;
3850 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3851 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3854 /* Bytes per second from Kbps */
3855 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3857 /* encode is 6 bits but really useful are 5 bits */
3858 for (i = 0; i < 64; i++) {
3859 u64 pow_result = BIT_ULL(i);
3861 ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
3862 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3866 /* Multiplier value */
3867 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3870 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3871 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3873 /* First multiplier value greater than the given
3876 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3885 wm = ice_sched_calc_wakeup(hw, bw);
3886 profile->rl_multiply = CPU_TO_LE16(mv);
3887 profile->wake_up_calc = CPU_TO_LE16(wm);
3888 profile->rl_encode = CPU_TO_LE16(encode);
3889 status = ICE_SUCCESS;
3891 status = ICE_ERR_DOES_NOT_EXIST;
3898 * ice_sched_add_rl_profile - add RL profile
3899 * @hw: pointer to the hardware structure
3900 * @rl_type: type of rate limit BW - min, max, or shared
3901 * @bw: bandwidth in Kbps - Kilo bits per sec
3902 * @layer_num: specifies in which layer to create profile
3904 * This function first checks the existing list for corresponding BW
3905 * parameter. If it exists, it returns the associated profile otherwise
3906 * it creates a new rate limit profile for requested BW, and adds it to
3907 * the HW DB and local list. It returns the new profile or null on error.
3908 * The caller needs to hold the scheduler lock.
3910 static struct ice_aqc_rl_profile_info *
3911 ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,
3912 u32 bw, u8 layer_num)
3914 struct ice_aqc_rl_profile_info *rl_prof_elem;
3915 u16 profiles_added = 0, num_profiles = 1;
3916 struct ice_aqc_rl_profile_elem *buf;
3917 enum ice_status status;
3920 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3924 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3927 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3930 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3938 LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
3939 ice_aqc_rl_profile_info, list_entry)
3940 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
3941 profile_type && rl_prof_elem->bw == bw)
3942 /* Return existing profile ID info */
3943 return rl_prof_elem;
3945 /* Create new profile ID */
3946 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3947 ice_malloc(hw, sizeof(*rl_prof_elem));
3952 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
3953 if (status != ICE_SUCCESS)
3954 goto exit_add_rl_prof;
3956 rl_prof_elem->bw = bw;
3957 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3958 rl_prof_elem->profile.level = layer_num + 1;
3959 rl_prof_elem->profile.flags = profile_type;
3960 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3962 /* Create new entry in HW DB */
3963 buf = &rl_prof_elem->profile;
3964 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3965 &profiles_added, NULL);
3966 if (status || profiles_added != num_profiles)
3967 goto exit_add_rl_prof;
3969 /* Good entry - add in the list */
3970 rl_prof_elem->prof_id_ref = 0;
3971 LIST_ADD(&rl_prof_elem->list_entry, &hw->rl_prof_list[layer_num]);
3972 return rl_prof_elem;
3975 ice_free(hw, rl_prof_elem);
3980 * ice_sched_cfg_node_bw_lmt - configure node sched params
3981 * @hw: pointer to the HW struct
3982 * @node: sched node to configure
3983 * @rl_type: rate limit type CIR, EIR, or shared
3984 * @rl_prof_id: rate limit profile ID
3986 * This function configures node element's BW limit.
3988 static enum ice_status
3989 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3990 enum ice_rl_type rl_type, u16 rl_prof_id)
3992 struct ice_aqc_txsched_elem_data buf;
3993 struct ice_aqc_txsched_elem *data;
3999 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
4000 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
4003 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
4004 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
4007 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
4008 data->srl_id = CPU_TO_LE16(rl_prof_id);
4011 /* Unknown rate limit type */
4012 return ICE_ERR_PARAM;
4015 /* Configure element */
4016 return ice_sched_update_elem(hw, node, &buf);
4020 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
4022 * @rl_type: rate limit type
4024 * If existing profile matches, it returns the corresponding rate
4025 * limit profile ID, otherwise it returns an invalid ID as error.
4028 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
4029 enum ice_rl_type rl_type)
4031 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
4032 struct ice_aqc_txsched_elem *data;
4034 data = &node->info.data;
4037 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
4038 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
4041 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
4042 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
4045 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
4046 rl_prof_id = LE16_TO_CPU(data->srl_id);
4056 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
4057 * @pi: port information structure
4058 * @rl_type: type of rate limit BW - min, max, or shared
4059 * @layer_index: layer index
4061 * This function returns requested profile creation layer.
4064 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
4067 struct ice_hw *hw = pi->hw;
4069 if (layer_index >= hw->num_tx_sched_layers)
4070 return ICE_SCHED_INVAL_LAYER_NUM;
4073 if (hw->layer_info[layer_index].max_cir_rl_profiles)
4077 if (hw->layer_info[layer_index].max_eir_rl_profiles)
4081 /* if current layer doesn't support SRL profile creation
4082 * then try a layer up or down.
4084 if (hw->layer_info[layer_index].max_srl_profiles)
4086 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4087 hw->layer_info[layer_index + 1].max_srl_profiles)
4088 return layer_index + 1;
4089 else if (layer_index > 0 &&
4090 hw->layer_info[layer_index - 1].max_srl_profiles)
4091 return layer_index - 1;
4096 return ICE_SCHED_INVAL_LAYER_NUM;
4100 * ice_sched_get_srl_node - get shared rate limit node
4102 * @srl_layer: shared rate limit layer
4104 * This function returns SRL node to be used for shared rate limit purpose.
4105 * The caller needs to hold scheduler lock.
4107 static struct ice_sched_node *
4108 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4110 if (srl_layer > node->tx_sched_layer)
4111 return node->children[0];
4112 else if (srl_layer < node->tx_sched_layer)
4113 /* Node can't be created without a parent. It will always
4114 * have a valid parent except root node.
4116 return node->parent;
4122 * ice_sched_rm_rl_profile - remove RL profile ID
4123 * @hw: pointer to the hardware structure
4124 * @layer_num: layer number where profiles are saved
4125 * @profile_type: profile type like EIR, CIR, or SRL
4126 * @profile_id: profile ID to remove
4128 * This function removes rate limit profile from layer 'layer_num' of type
4129 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4132 static enum ice_status
4133 ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,
4136 struct ice_aqc_rl_profile_info *rl_prof_elem;
4137 enum ice_status status = ICE_SUCCESS;
4139 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4140 return ICE_ERR_PARAM;
4141 /* Check the existing list for RL profile */
4142 LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
4143 ice_aqc_rl_profile_info, list_entry)
4144 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
4146 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4148 if (rl_prof_elem->prof_id_ref)
4149 rl_prof_elem->prof_id_ref--;
4151 /* Remove old profile ID from database */
4152 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
4153 if (status && status != ICE_ERR_IN_USE)
4154 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
4157 if (status == ICE_ERR_IN_USE)
4158 status = ICE_SUCCESS;
4163 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4164 * @pi: port information structure
4165 * @node: pointer to node structure
4166 * @rl_type: rate limit type min, max, or shared
4167 * @layer_num: layer number where RL profiles are saved
4169 * This function configures node element's BW rate limit profile ID of
4170 * type CIR, EIR, or SRL to default. This function needs to be called
4171 * with the scheduler lock held.
4173 static enum ice_status
4174 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4175 struct ice_sched_node *node,
4176 enum ice_rl_type rl_type, u8 layer_num)
4178 enum ice_status status;
4187 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4188 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4191 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4192 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4195 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4196 /* No SRL is configured for default case */
4197 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4200 return ICE_ERR_PARAM;
4202 /* Save existing RL prof ID for later clean up */
4203 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4204 /* Configure BW scheduling parameters */
4205 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4209 /* Remove stale RL profile ID */
4210 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4211 old_id == ICE_SCHED_INVAL_PROF_ID)
4214 return ice_sched_rm_rl_profile(hw, layer_num, profile_type, old_id);
4218 * ice_sched_set_node_bw - set node's bandwidth
4219 * @pi: port information structure
4221 * @rl_type: rate limit type min, max, or shared
4222 * @bw: bandwidth in Kbps - Kilo bits per sec
4223 * @layer_num: layer number
4225 * This function adds new profile corresponding to requested BW, configures
4226 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4227 * ID from local database. The caller needs to hold scheduler lock.
4229 static enum ice_status
4230 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4231 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4233 struct ice_aqc_rl_profile_info *rl_prof_info;
4234 enum ice_status status = ICE_ERR_PARAM;
4235 struct ice_hw *hw = pi->hw;
4236 u16 old_id, rl_prof_id;
4238 rl_prof_info = ice_sched_add_rl_profile(hw, rl_type, bw, layer_num);
4242 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4244 /* Save existing RL prof ID for later clean up */
4245 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4246 /* Configure BW scheduling parameters */
4247 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4251 /* New changes has been applied */
4252 /* Increment the profile ID reference count */
4253 rl_prof_info->prof_id_ref++;
4255 /* Check for old ID removal */
4256 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4257 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4260 return ice_sched_rm_rl_profile(hw, layer_num,
4261 rl_prof_info->profile.flags &
4262 ICE_AQC_RL_PROFILE_TYPE_M, old_id);
4266 * ice_sched_set_node_bw_lmt - set node's BW limit
4267 * @pi: port information structure
4269 * @rl_type: rate limit type min, max, or shared
4270 * @bw: bandwidth in Kbps - Kilo bits per sec
4272 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4273 * EIR, or SRL. The caller needs to hold scheduler lock.
4275 * NOTE: Caller provides the correct SRL node in case of shared profile
4278 static enum ice_status
4279 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4280 enum ice_rl_type rl_type, u32 bw)
4286 return ICE_ERR_PARAM;
4288 /* Remove unused RL profile IDs from HW and SW DB */
4289 ice_sched_rm_unused_rl_prof(hw);
4291 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4292 node->tx_sched_layer);
4293 if (layer_num >= hw->num_tx_sched_layers)
4294 return ICE_ERR_PARAM;
4296 if (bw == ICE_SCHED_DFLT_BW)
4297 return ice_sched_set_node_bw_dflt(pi, node, rl_type, layer_num);
4298 return ice_sched_set_node_bw(pi, node, rl_type, bw, layer_num);
4302 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4303 * @pi: port information structure
4304 * @node: pointer to node structure
4305 * @rl_type: rate limit type min, max, or shared
4307 * This function configures node element's BW rate limit profile ID of
4308 * type CIR, EIR, or SRL to default. This function needs to be called
4309 * with the scheduler lock held.
4311 static enum ice_status
4312 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4313 struct ice_sched_node *node,
4314 enum ice_rl_type rl_type)
4316 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4321 * ice_sched_validate_srl_node - Check node for SRL applicability
4322 * @node: sched node to configure
4323 * @sel_layer: selected SRL layer
4325 * This function checks if the SRL can be applied to a selceted layer node on
4326 * behalf of the requested node (first argument). This function needs to be
4327 * called with scheduler lock held.
4329 static enum ice_status
4330 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4332 /* SRL profiles are not available on all layers. Check if the
4333 * SRL profile can be applied to a node above or below the
4334 * requested node. SRL configuration is possible only if the
4335 * selected layer's node has single child.
4337 if (sel_layer == node->tx_sched_layer ||
4338 ((sel_layer == node->tx_sched_layer + 1) &&
4339 node->num_children == 1) ||
4340 ((sel_layer == node->tx_sched_layer - 1) &&
4341 (node->parent && node->parent->num_children == 1)))
4348 * ice_sched_save_q_bw - save queue node's BW information
4349 * @q_ctx: queue context structure
4350 * @rl_type: rate limit type min, max, or shared
4351 * @bw: bandwidth in Kbps - Kilo bits per sec
4353 * Save BW information of queue type node for post replay use.
4355 static enum ice_status
4356 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4360 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4363 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4366 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4369 return ICE_ERR_PARAM;
4375 * ice_sched_set_q_bw_lmt - sets queue BW limit
4376 * @pi: port information structure
4377 * @vsi_handle: sw VSI handle
4378 * @tc: traffic class
4379 * @q_handle: software queue handle
4380 * @rl_type: min, max, or shared
4381 * @bw: bandwidth in Kbps
4383 * This function sets BW limit of queue scheduling node.
4385 static enum ice_status
4386 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4387 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4389 enum ice_status status = ICE_ERR_PARAM;
4390 struct ice_sched_node *node;
4391 struct ice_q_ctx *q_ctx;
4393 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4394 return ICE_ERR_PARAM;
4395 ice_acquire_lock(&pi->sched_lock);
4396 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4399 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4401 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4405 /* Return error if it is not a leaf node */
4406 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4409 /* SRL bandwidth layer selection */
4410 if (rl_type == ICE_SHARED_BW) {
4411 u8 sel_layer; /* selected layer */
4413 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4414 node->tx_sched_layer);
4415 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4416 status = ICE_ERR_PARAM;
4419 status = ice_sched_validate_srl_node(node, sel_layer);
4424 if (bw == ICE_SCHED_DFLT_BW)
4425 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4427 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4430 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4433 ice_release_lock(&pi->sched_lock);
4438 * ice_cfg_q_bw_lmt - configure queue BW limit
4439 * @pi: port information structure
4440 * @vsi_handle: sw VSI handle
4441 * @tc: traffic class
4442 * @q_handle: software queue handle
4443 * @rl_type: min, max, or shared
4444 * @bw: bandwidth in Kbps
4446 * This function configures BW limit of queue scheduling node.
4449 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4450 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4452 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4457 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4458 * @pi: port information structure
4459 * @vsi_handle: sw VSI handle
4460 * @tc: traffic class
4461 * @q_handle: software queue handle
4462 * @rl_type: min, max, or shared
4464 * This function configures BW default limit of queue scheduling node.
4467 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4468 u16 q_handle, enum ice_rl_type rl_type)
4470 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4475 * ice_sched_save_tc_node_bw - save TC node BW limit
4476 * @pi: port information structure
4478 * @rl_type: min or max
4479 * @bw: bandwidth in Kbps
4481 * This function saves the modified values of bandwidth settings for later
4482 * replay purpose (restore) after reset.
4484 static enum ice_status
4485 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4486 enum ice_rl_type rl_type, u32 bw)
4488 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4489 return ICE_ERR_PARAM;
4492 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4495 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4498 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4501 return ICE_ERR_PARAM;
4507 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4508 * @pi: port information structure
4510 * @rl_type: min or max
4511 * @bw: bandwidth in Kbps
4513 * This function configures bandwidth limit of TC node.
4515 static enum ice_status
4516 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4517 enum ice_rl_type rl_type, u32 bw)
4519 enum ice_status status = ICE_ERR_PARAM;
4520 struct ice_sched_node *tc_node;
4522 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4524 ice_acquire_lock(&pi->sched_lock);
4525 tc_node = ice_sched_get_tc_node(pi, tc);
4527 goto exit_set_tc_node_bw;
4528 if (bw == ICE_SCHED_DFLT_BW)
4529 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4531 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4533 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4535 exit_set_tc_node_bw:
4536 ice_release_lock(&pi->sched_lock);
4541 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4542 * @pi: port information structure
4544 * @rl_type: min or max
4545 * @bw: bandwidth in Kbps
4547 * This function configures BW limit of TC node.
4548 * Note: The minimum guaranteed reservation is done via DCBX.
4551 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4552 enum ice_rl_type rl_type, u32 bw)
4554 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4558 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4559 * @pi: port information structure
4561 * @rl_type: min or max
4563 * This function configures BW default limit of TC node.
4566 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4567 enum ice_rl_type rl_type)
4569 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4573 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4574 * @pi: port information structure
4575 * @tc: traffic class
4576 * @rl_type: rate limit type min or max
4577 * @bw_alloc: Bandwidth allocation information
4579 * Save BW alloc information of VSI type node for post replay use.
4581 static enum ice_status
4582 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4583 enum ice_rl_type rl_type, u16 bw_alloc)
4585 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4586 return ICE_ERR_PARAM;
4589 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4593 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4597 return ICE_ERR_PARAM;
4603 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4604 * @pi: port information structure
4606 * @rl_type: min or max
4607 * @bw_alloc: bandwidth alloc
4609 * This function configures bandwidth alloc of TC node, also saves the
4610 * changed settings for replay purpose, and return success if it succeeds
4611 * in modifying bandwidth alloc setting.
4613 static enum ice_status
4614 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4615 enum ice_rl_type rl_type, u8 bw_alloc)
4617 enum ice_status status = ICE_ERR_PARAM;
4618 struct ice_sched_node *tc_node;
4620 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4622 ice_acquire_lock(&pi->sched_lock);
4623 tc_node = ice_sched_get_tc_node(pi, tc);
4625 goto exit_set_tc_node_bw_alloc;
4626 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4629 goto exit_set_tc_node_bw_alloc;
4630 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4632 exit_set_tc_node_bw_alloc:
4633 ice_release_lock(&pi->sched_lock);
4638 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4639 * @pi: port information structure
4641 * @rl_type: min or max
4642 * @bw_alloc: bandwidth alloc
4644 * This function configures BW limit of TC node.
4645 * Note: The minimum guaranteed reservation is done via DCBX.
4648 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4649 enum ice_rl_type rl_type, u8 bw_alloc)
4651 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4655 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4656 * @pi: port information structure
4657 * @vsi_handle: software VSI handle
4659 * This function retrieves the aggregator ID based on VSI ID and TC,
4660 * and sets node's BW limit to default. This function needs to be
4661 * called with the scheduler lock held.
4664 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4666 struct ice_vsi_ctx *vsi_ctx;
4667 enum ice_status status = ICE_SUCCESS;
4670 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4671 return ICE_ERR_PARAM;
4672 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4674 return ICE_ERR_PARAM;
4676 ice_for_each_traffic_class(tc) {
4677 struct ice_sched_node *node;
4679 node = vsi_ctx->sched.ag_node[tc];
4683 /* Set min profile to default */
4684 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4688 /* Set max profile to default */
4689 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4693 /* Remove shared profile, if there is one */
4694 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4704 * ice_sched_get_node_by_id_type - get node from ID type
4705 * @pi: port information structure
4707 * @agg_type: type of aggregator
4708 * @tc: traffic class
4710 * This function returns node identified by ID of type aggregator, and
4711 * based on traffic class (TC). This function needs to be called with
4712 * the scheduler lock held.
4714 static struct ice_sched_node *
4715 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4716 enum ice_agg_type agg_type, u8 tc)
4718 struct ice_sched_node *node = NULL;
4719 struct ice_sched_node *child_node;
4722 case ICE_AGG_TYPE_VSI: {
4723 struct ice_vsi_ctx *vsi_ctx;
4724 u16 vsi_handle = (u16)id;
4726 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4728 /* Get sched_vsi_info */
4729 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4732 node = vsi_ctx->sched.vsi_node[tc];
4736 case ICE_AGG_TYPE_AGG: {
4737 struct ice_sched_node *tc_node;
4739 tc_node = ice_sched_get_tc_node(pi, tc);
4741 node = ice_sched_get_agg_node(pi, tc_node, id);
4745 case ICE_AGG_TYPE_Q:
4746 /* The current implementation allows single queue to modify */
4747 node = ice_sched_get_node(pi, id);
4750 case ICE_AGG_TYPE_QG:
4751 /* The current implementation allows single qg to modify */
4752 child_node = ice_sched_get_node(pi, id);
4755 node = child_node->parent;
4766 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4767 * @pi: port information structure
4768 * @id: ID (software VSI handle or AGG ID)
4769 * @agg_type: aggregator type (VSI or AGG type node)
4770 * @tc: traffic class
4771 * @rl_type: min or max
4772 * @bw: bandwidth in Kbps
4774 * This function sets BW limit of VSI or Aggregator scheduling node
4775 * based on TC information from passed in argument BW.
4778 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4779 enum ice_agg_type agg_type, u8 tc,
4780 enum ice_rl_type rl_type, u32 bw)
4782 enum ice_status status = ICE_ERR_PARAM;
4783 struct ice_sched_node *node;
4788 if (rl_type == ICE_UNKNOWN_BW)
4791 ice_acquire_lock(&pi->sched_lock);
4792 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4794 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4795 goto exit_set_node_bw_lmt_per_tc;
4797 if (bw == ICE_SCHED_DFLT_BW)
4798 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4800 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4802 exit_set_node_bw_lmt_per_tc:
4803 ice_release_lock(&pi->sched_lock);
4808 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4809 * @pi: port information structure
4810 * @vsi_handle: software VSI handle
4812 * This function validates SRL node of the VSI node if available SRL layer is
4813 * different than the VSI node layer on all TC(s).This function needs to be
4814 * called with scheduler lock held.
4816 static enum ice_status
4817 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4819 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4822 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4823 return ICE_ERR_PARAM;
4825 /* Return success if no nodes are present across TC */
4826 ice_for_each_traffic_class(tc) {
4827 struct ice_sched_node *tc_node, *vsi_node;
4828 enum ice_rl_type rl_type = ICE_SHARED_BW;
4829 enum ice_status status;
4831 tc_node = ice_sched_get_tc_node(pi, tc);
4835 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4839 /* SRL bandwidth layer selection */
4840 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4841 u8 node_layer = vsi_node->tx_sched_layer;
4844 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4846 if (layer_num >= pi->hw->num_tx_sched_layers)
4847 return ICE_ERR_PARAM;
4848 sel_layer = layer_num;
4851 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4859 * ice_sched_set_save_vsi_srl_node_bw - set VSI shared limit values
4860 * @pi: port information structure
4861 * @vsi_handle: software VSI handle
4862 * @tc: traffic class
4863 * @srl_node: sched node to configure
4864 * @rl_type: rate limit type minimum, maximum, or shared
4865 * @bw: minimum, maximum, or shared bandwidth in Kbps
4867 * Configure shared rate limiter(SRL) of VSI type nodes across given traffic
4868 * class, and saves those value for later use for replaying purposes. The
4869 * caller holds the scheduler lock.
4871 static enum ice_status
4872 ice_sched_set_save_vsi_srl_node_bw(struct ice_port_info *pi, u16 vsi_handle,
4873 u8 tc, struct ice_sched_node *srl_node,
4874 enum ice_rl_type rl_type, u32 bw)
4876 enum ice_status status;
4878 if (bw == ICE_SCHED_DFLT_BW) {
4879 status = ice_sched_set_node_bw_dflt_lmt(pi, srl_node, rl_type);
4881 status = ice_sched_set_node_bw_lmt(pi, srl_node, rl_type, bw);
4884 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4890 * ice_sched_set_vsi_node_srl_per_tc - set VSI node BW shared limit for tc
4891 * @pi: port information structure
4892 * @vsi_handle: software VSI handle
4893 * @tc: traffic class
4894 * @min_bw: minimum bandwidth in Kbps
4895 * @max_bw: maximum bandwidth in Kbps
4896 * @shared_bw: shared bandwidth in Kbps
4898 * Configure shared rate limiter(SRL) of VSI type nodes across requested
4899 * traffic class for VSI matching handle. When BW value of ICE_SCHED_DFLT_BW
4900 * is passed, it removes the corresponding bw from the node. The caller
4901 * holds scheduler lock.
4903 static enum ice_status
4904 ice_sched_set_vsi_node_srl_per_tc(struct ice_port_info *pi, u16 vsi_handle,
4905 u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
4907 struct ice_sched_node *tc_node, *vsi_node, *cfg_node;
4908 enum ice_status status;
4911 tc_node = ice_sched_get_tc_node(pi, tc);
4915 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4919 layer_num = ice_sched_get_rl_prof_layer(pi, ICE_SHARED_BW,
4920 vsi_node->tx_sched_layer);
4921 if (layer_num >= pi->hw->num_tx_sched_layers)
4922 return ICE_ERR_PARAM;
4924 /* SRL node may be different */
4925 cfg_node = ice_sched_get_srl_node(vsi_node, layer_num);
4929 status = ice_sched_set_save_vsi_srl_node_bw(pi, vsi_handle, tc,
4930 cfg_node, ICE_MIN_BW,
4935 status = ice_sched_set_save_vsi_srl_node_bw(pi, vsi_handle, tc,
4936 cfg_node, ICE_MAX_BW,
4941 return ice_sched_set_save_vsi_srl_node_bw(pi, vsi_handle, tc, cfg_node,
4942 ICE_SHARED_BW, shared_bw);
4946 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4947 * @pi: port information structure
4948 * @vsi_handle: software VSI handle
4949 * @min_bw: minimum bandwidth in Kbps
4950 * @max_bw: maximum bandwidth in Kbps
4951 * @shared_bw: shared bandwidth in Kbps
4953 * Configure shared rate limiter(SRL) of all VSI type nodes across all traffic
4954 * classes for VSI matching handle. When BW value of ICE_SCHED_DFLT_BW is
4955 * passed, it removes those value(s) from the node.
4958 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4959 u32 min_bw, u32 max_bw, u32 shared_bw)
4961 enum ice_status status = ICE_SUCCESS;
4965 return ICE_ERR_PARAM;
4967 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4968 return ICE_ERR_PARAM;
4970 ice_acquire_lock(&pi->sched_lock);
4971 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4973 goto exit_set_vsi_bw_shared_lmt;
4974 /* Return success if no nodes are present across TC */
4975 ice_for_each_traffic_class(tc) {
4976 struct ice_sched_node *tc_node, *vsi_node;
4978 tc_node = ice_sched_get_tc_node(pi, tc);
4982 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4986 status = ice_sched_set_vsi_node_srl_per_tc(pi, vsi_handle, tc,
4993 exit_set_vsi_bw_shared_lmt:
4994 ice_release_lock(&pi->sched_lock);
4999 * ice_sched_validate_agg_srl_node - validate AGG SRL node
5000 * @pi: port information structure
5001 * @agg_id: aggregator ID
5003 * This function validates SRL node of the AGG node if available SRL layer is
5004 * different than the AGG node layer on all TC(s).This function needs to be
5005 * called with scheduler lock held.
5007 static enum ice_status
5008 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
5010 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
5011 struct ice_sched_agg_info *agg_info;
5012 bool agg_id_present = false;
5013 enum ice_status status = ICE_SUCCESS;
5016 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
5018 if (agg_info->agg_id == agg_id) {
5019 agg_id_present = true;
5022 if (!agg_id_present)
5023 return ICE_ERR_PARAM;
5024 /* Return success if no nodes are present across TC */
5025 ice_for_each_traffic_class(tc) {
5026 struct ice_sched_node *tc_node, *agg_node;
5027 enum ice_rl_type rl_type = ICE_SHARED_BW;
5029 tc_node = ice_sched_get_tc_node(pi, tc);
5033 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5036 /* SRL bandwidth layer selection */
5037 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
5038 u8 node_layer = agg_node->tx_sched_layer;
5041 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
5043 if (layer_num >= pi->hw->num_tx_sched_layers)
5044 return ICE_ERR_PARAM;
5045 sel_layer = layer_num;
5048 status = ice_sched_validate_srl_node(agg_node, sel_layer);
5056 * ice_sched_validate_agg_id - Validate aggregator id
5057 * @pi: port information structure
5058 * @agg_id: aggregator ID
5060 * This function validates aggregator id. Caller holds the scheduler lock.
5062 static enum ice_status
5063 ice_sched_validate_agg_id(struct ice_port_info *pi, u32 agg_id)
5065 struct ice_sched_agg_info *agg_info;
5066 struct ice_sched_agg_info *tmp;
5067 bool agg_id_present = false;
5068 enum ice_status status;
5070 status = ice_sched_validate_agg_srl_node(pi, agg_id);
5074 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
5075 ice_sched_agg_info, list_entry)
5076 if (agg_info->agg_id == agg_id) {
5077 agg_id_present = true;
5081 if (!agg_id_present)
5082 return ICE_ERR_PARAM;
5088 * ice_sched_set_save_agg_srl_node_bw - set aggregator shared limit values
5089 * @pi: port information structure
5090 * @agg_id: aggregator ID
5091 * @tc: traffic class
5092 * @srl_node: sched node to configure
5093 * @rl_type: rate limit type minimum, maximum, or shared
5094 * @bw: minimum, maximum, or shared bandwidth in Kbps
5096 * Configure shared rate limiter(SRL) of aggregator type nodes across
5097 * requested traffic class, and saves those value for later use for
5098 * replaying purposes. The caller holds the scheduler lock.
5100 static enum ice_status
5101 ice_sched_set_save_agg_srl_node_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
5102 struct ice_sched_node *srl_node,
5103 enum ice_rl_type rl_type, u32 bw)
5105 enum ice_status status;
5107 if (bw == ICE_SCHED_DFLT_BW) {
5108 status = ice_sched_set_node_bw_dflt_lmt(pi, srl_node, rl_type);
5110 status = ice_sched_set_node_bw_lmt(pi, srl_node, rl_type, bw);
5113 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5119 * ice_sched_set_agg_node_srl_per_tc - set aggregator SRL per tc
5120 * @pi: port information structure
5121 * @agg_id: aggregator ID
5122 * @tc: traffic class
5123 * @min_bw: minimum bandwidth in Kbps
5124 * @max_bw: maximum bandwidth in Kbps
5125 * @shared_bw: shared bandwidth in Kbps
5127 * This function configures the shared rate limiter(SRL) of aggregator type
5128 * node for a given traffic class for aggregator matching agg_id. When BW
5129 * value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the node. Caller
5130 * holds the scheduler lock.
5132 static enum ice_status
5133 ice_sched_set_agg_node_srl_per_tc(struct ice_port_info *pi, u32 agg_id,
5134 u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
5136 struct ice_sched_node *tc_node, *agg_node, *cfg_node;
5137 enum ice_rl_type rl_type = ICE_SHARED_BW;
5138 enum ice_status status = ICE_ERR_CFG;
5141 tc_node = ice_sched_get_tc_node(pi, tc);
5145 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5149 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
5150 agg_node->tx_sched_layer);
5151 if (layer_num >= pi->hw->num_tx_sched_layers)
5152 return ICE_ERR_PARAM;
5154 /* SRL node may be different */
5155 cfg_node = ice_sched_get_srl_node(agg_node, layer_num);
5159 status = ice_sched_set_save_agg_srl_node_bw(pi, agg_id, tc, cfg_node,
5160 ICE_MIN_BW, min_bw);
5164 status = ice_sched_set_save_agg_srl_node_bw(pi, agg_id, tc, cfg_node,
5165 ICE_MAX_BW, max_bw);
5169 status = ice_sched_set_save_agg_srl_node_bw(pi, agg_id, tc, cfg_node,
5170 ICE_SHARED_BW, shared_bw);
5175 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
5176 * @pi: port information structure
5177 * @agg_id: aggregator ID
5178 * @min_bw: minimum bandwidth in Kbps
5179 * @max_bw: maximum bandwidth in Kbps
5180 * @shared_bw: shared bandwidth in Kbps
5182 * This function configures the shared rate limiter(SRL) of all aggregator type
5183 * nodes across all traffic classes for aggregator matching agg_id. When
5184 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
5188 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id,
5189 u32 min_bw, u32 max_bw, u32 shared_bw)
5191 enum ice_status status;
5195 return ICE_ERR_PARAM;
5197 ice_acquire_lock(&pi->sched_lock);
5198 status = ice_sched_validate_agg_id(pi, agg_id);
5200 goto exit_agg_bw_shared_lmt;
5202 /* Return success if no nodes are present across TC */
5203 ice_for_each_traffic_class(tc) {
5204 struct ice_sched_node *tc_node, *agg_node;
5206 tc_node = ice_sched_get_tc_node(pi, tc);
5210 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5214 status = ice_sched_set_agg_node_srl_per_tc(pi, agg_id, tc,
5221 exit_agg_bw_shared_lmt:
5222 ice_release_lock(&pi->sched_lock);
5227 * ice_sched_set_agg_bw_shared_lmt_per_tc - set aggregator BW shared lmt per tc
5228 * @pi: port information structure
5229 * @agg_id: aggregator ID
5230 * @tc: traffic class
5231 * @min_bw: minimum bandwidth in Kbps
5232 * @max_bw: maximum bandwidth in Kbps
5233 * @shared_bw: shared bandwidth in Kbps
5235 * This function configures the shared rate limiter(SRL) of aggregator type
5236 * node for a given traffic class for aggregator matching agg_id. When BW
5237 * value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the node.
5240 ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
5241 u8 tc, u32 min_bw, u32 max_bw,
5244 enum ice_status status;
5247 return ICE_ERR_PARAM;
5248 ice_acquire_lock(&pi->sched_lock);
5249 status = ice_sched_validate_agg_id(pi, agg_id);
5251 goto exit_agg_bw_shared_lmt_per_tc;
5253 status = ice_sched_set_agg_node_srl_per_tc(pi, agg_id, tc, min_bw,
5256 exit_agg_bw_shared_lmt_per_tc:
5257 ice_release_lock(&pi->sched_lock);
5262 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5263 * @pi: port information structure
5264 * @node: sched node to configure
5265 * @priority: sibling priority
5267 * This function configures node element's sibling priority only. This
5268 * function needs to be called with scheduler lock held.
5271 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5272 struct ice_sched_node *node, u8 priority)
5274 struct ice_aqc_txsched_elem_data buf;
5275 struct ice_aqc_txsched_elem *data;
5276 struct ice_hw *hw = pi->hw;
5277 enum ice_status status;
5280 return ICE_ERR_PARAM;
5283 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5284 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5285 ICE_AQC_ELEM_GENERIC_PRIO_M;
5286 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5287 data->generic |= priority;
5289 /* Configure element */
5290 status = ice_sched_update_elem(hw, node, &buf);
5295 * ice_cfg_rl_burst_size - Set burst size value
5296 * @hw: pointer to the HW struct
5297 * @bytes: burst size in bytes
5299 * This function configures/set the burst size to requested new value. The new
5300 * burst size value is used for future rate limit calls. It doesn't change the
5301 * existing or previously created RL profiles.
5303 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5305 u16 burst_size_to_prog;
5307 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5308 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5309 return ICE_ERR_PARAM;
5310 if (ice_round_to_num(bytes, 64) <=
5311 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5312 /* 64 byte granularity case */
5313 /* Disable MSB granularity bit */
5314 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5315 /* round number to nearest 64 byte granularity */
5316 bytes = ice_round_to_num(bytes, 64);
5317 /* The value is in 64 byte chunks */
5318 burst_size_to_prog |= (u16)(bytes / 64);
5320 /* k bytes granularity case */
5321 /* Enable MSB granularity bit */
5322 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5323 /* round number to nearest 1024 granularity */
5324 bytes = ice_round_to_num(bytes, 1024);
5325 /* check rounding doesn't go beyond allowed */
5326 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5327 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5328 /* The value is in k bytes */
5329 burst_size_to_prog |= (u16)(bytes / 1024);
5331 hw->max_burst_size = burst_size_to_prog;
5336 * ice_sched_replay_node_prio - re-configure node priority
5337 * @hw: pointer to the HW struct
5338 * @node: sched node to configure
5339 * @priority: priority value
5341 * This function configures node element's priority value. It
5342 * needs to be called with scheduler lock held.
5344 static enum ice_status
5345 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5348 struct ice_aqc_txsched_elem_data buf;
5349 struct ice_aqc_txsched_elem *data;
5350 enum ice_status status;
5354 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5355 data->generic = priority;
5357 /* Configure element */
5358 status = ice_sched_update_elem(hw, node, &buf);
5363 * ice_sched_replay_node_bw - replay node(s) BW
5364 * @hw: pointer to the HW struct
5365 * @node: sched node to configure
5366 * @bw_t_info: BW type information
5368 * This function restores node's BW from bw_t_info. The caller needs
5369 * to hold the scheduler lock.
5371 static enum ice_status
5372 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5373 struct ice_bw_type_info *bw_t_info)
5375 struct ice_port_info *pi = hw->port_info;
5376 enum ice_status status = ICE_ERR_PARAM;
5381 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5383 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5384 status = ice_sched_replay_node_prio(hw, node,
5385 bw_t_info->generic);
5389 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5390 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5391 bw_t_info->cir_bw.bw);
5395 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5396 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5397 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5402 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5403 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5404 bw_t_info->eir_bw.bw);
5408 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5409 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5410 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5415 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5416 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5417 bw_t_info->shared_bw);
5422 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5423 * @hw: pointer to the HW struct
5424 * @agg_info: aggregator data structure
5426 * This function re-creates aggregator type nodes. The caller needs to hold
5427 * the scheduler lock.
5429 static enum ice_status
5430 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5432 struct ice_sched_node *tc_node, *agg_node;
5433 enum ice_status status = ICE_SUCCESS;
5437 return ICE_ERR_PARAM;
5438 ice_for_each_traffic_class(tc) {
5439 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5442 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5444 status = ICE_ERR_PARAM;
5447 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5450 status = ICE_ERR_PARAM;
5453 status = ice_sched_replay_node_bw(hw, agg_node,
5454 &agg_info->bw_t_info[tc]);
5462 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5463 * @pi: port info struct
5464 * @tc_bitmap: 8 bits TC bitmap to check
5465 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5467 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5468 * may be missing, it returns enabled TCs. This function needs to be called with
5469 * scheduler lock held.
5472 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5473 ice_bitmap_t *ena_tc_bitmap)
5477 /* Some TC(s) may be missing after reset, adjust for replay */
5478 ice_for_each_traffic_class(tc)
5479 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5480 (ice_sched_get_tc_node(pi, tc)))
5481 ice_set_bit(tc, ena_tc_bitmap);
5485 * ice_sched_replay_agg - recreate aggregator node(s)
5486 * @hw: pointer to the HW struct
5488 * This function recreate aggregator type nodes which are not replayed earlier.
5489 * It also replay aggregator BW information. These aggregator nodes are not
5490 * associated with VSI type node yet.
5492 void ice_sched_replay_agg(struct ice_hw *hw)
5494 struct ice_port_info *pi = hw->port_info;
5495 struct ice_sched_agg_info *agg_info;
5497 ice_acquire_lock(&pi->sched_lock);
5498 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5500 /* replay aggregator (re-create aggregator node) */
5501 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5502 agg_info->replay_tc_bitmap,
5503 ICE_MAX_TRAFFIC_CLASS)) {
5504 ice_declare_bitmap(replay_bitmap,
5505 ICE_MAX_TRAFFIC_CLASS);
5506 enum ice_status status;
5508 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5509 ice_sched_get_ena_tc_bitmap(pi,
5510 agg_info->replay_tc_bitmap,
5512 status = ice_sched_cfg_agg(hw->port_info,
5517 ice_info(hw, "Replay agg id[%d] failed\n",
5519 /* Move on to next one */
5522 /* Replay aggregator node BW (restore aggregator BW) */
5523 status = ice_sched_replay_agg_bw(hw, agg_info);
5525 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5528 ice_release_lock(&pi->sched_lock);
5532 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5533 * @hw: pointer to the HW struct
5535 * This function initialize aggregator(s) TC bitmap to zero. A required
5536 * preinit step for replaying aggregators.
5538 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5540 struct ice_port_info *pi = hw->port_info;
5541 struct ice_sched_agg_info *agg_info;
5543 ice_acquire_lock(&pi->sched_lock);
5544 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5546 struct ice_sched_agg_vsi_info *agg_vsi_info;
5548 agg_info->tc_bitmap[0] = 0;
5549 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5550 ice_sched_agg_vsi_info, list_entry)
5551 agg_vsi_info->tc_bitmap[0] = 0;
5553 ice_release_lock(&pi->sched_lock);
5557 * ice_sched_replay_root_node_bw - replay root node BW
5558 * @pi: port information structure
5560 * Replay root node BW settings.
5562 enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi)
5564 enum ice_status status = ICE_SUCCESS;
5567 return ICE_ERR_PARAM;
5568 ice_acquire_lock(&pi->sched_lock);
5570 status = ice_sched_replay_node_bw(pi->hw, pi->root,
5571 &pi->root_node_bw_t_info);
5572 ice_release_lock(&pi->sched_lock);
5577 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5578 * @pi: port information structure
5580 * This function replay TC nodes.
5582 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5584 enum ice_status status = ICE_SUCCESS;
5588 return ICE_ERR_PARAM;
5589 ice_acquire_lock(&pi->sched_lock);
5590 ice_for_each_traffic_class(tc) {
5591 struct ice_sched_node *tc_node;
5593 tc_node = ice_sched_get_tc_node(pi, tc);
5595 continue; /* TC not present */
5596 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5597 &pi->tc_node_bw_t_info[tc]);
5601 ice_release_lock(&pi->sched_lock);
5606 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5607 * @hw: pointer to the HW struct
5608 * @vsi_handle: software VSI handle
5609 * @tc_bitmap: 8 bits TC bitmap
5611 * This function replays VSI type nodes bandwidth. This function needs to be
5612 * called with scheduler lock held.
5614 static enum ice_status
5615 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5616 ice_bitmap_t *tc_bitmap)
5618 struct ice_sched_node *vsi_node, *tc_node;
5619 struct ice_port_info *pi = hw->port_info;
5620 struct ice_bw_type_info *bw_t_info;
5621 struct ice_vsi_ctx *vsi_ctx;
5622 enum ice_status status = ICE_SUCCESS;
5625 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5627 return ICE_ERR_PARAM;
5628 ice_for_each_traffic_class(tc) {
5629 if (!ice_is_tc_ena(*tc_bitmap, tc))
5631 tc_node = ice_sched_get_tc_node(pi, tc);
5634 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5637 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5638 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5646 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5647 * @hw: pointer to the HW struct
5648 * @vsi_handle: software VSI handle
5650 * This function replays aggregator node, VSI to aggregator type nodes, and
5651 * their node bandwidth information. This function needs to be called with
5652 * scheduler lock held.
5654 static enum ice_status
5655 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5657 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5658 struct ice_sched_agg_vsi_info *agg_vsi_info;
5659 struct ice_port_info *pi = hw->port_info;
5660 struct ice_sched_agg_info *agg_info;
5661 enum ice_status status;
5663 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5664 if (!ice_is_vsi_valid(hw, vsi_handle))
5665 return ICE_ERR_PARAM;
5666 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5668 return ICE_SUCCESS; /* Not present in list - default Agg case */
5669 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5671 return ICE_SUCCESS; /* Not present in list - default Agg case */
5672 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5674 /* Replay aggregator node associated to vsi_handle */
5675 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5676 ICE_AGG_TYPE_AGG, replay_bitmap);
5679 /* Replay aggregator node BW (restore aggregator BW) */
5680 status = ice_sched_replay_agg_bw(hw, agg_info);
5684 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5685 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5687 /* Move this VSI (vsi_handle) to above aggregator */
5688 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5692 /* Replay VSI BW (restore VSI BW) */
5693 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5694 agg_vsi_info->tc_bitmap);
5698 * ice_replay_vsi_agg - replay VSI to aggregator node
5699 * @hw: pointer to the HW struct
5700 * @vsi_handle: software VSI handle
5702 * This function replays association of VSI to aggregator type nodes, and
5703 * node bandwidth information.
5705 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5707 struct ice_port_info *pi = hw->port_info;
5708 enum ice_status status;
5710 ice_acquire_lock(&pi->sched_lock);
5711 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5712 ice_release_lock(&pi->sched_lock);
5717 * ice_sched_replay_q_bw - replay queue type node BW
5718 * @pi: port information structure
5719 * @q_ctx: queue context structure
5721 * This function replays queue type node bandwidth. This function needs to be
5722 * called with scheduler lock held.
5725 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5727 struct ice_sched_node *q_node;
5729 /* Following also checks the presence of node in tree */
5730 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5732 return ICE_ERR_PARAM;
5733 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);