1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2020 Intel Corporation
8 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
9 * @pi: port information structure
10 * @info: Scheduler element information from firmware
12 * This function inserts the root node of the scheduling tree topology
15 static enum ice_status
16 ice_sched_add_root_node(struct ice_port_info *pi,
17 struct ice_aqc_txsched_elem_data *info)
19 struct ice_sched_node *root;
27 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
29 return ICE_ERR_NO_MEMORY;
31 /* coverity[suspicious_sizeof] */
32 root->children = (struct ice_sched_node **)
33 ice_calloc(hw, hw->max_children[0], sizeof(*root));
34 if (!root->children) {
36 return ICE_ERR_NO_MEMORY;
39 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
45 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
46 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
47 * @teid: node TEID to search
49 * This function searches for a node matching the TEID in the scheduling tree
50 * from the SW DB. The search is recursive and is restricted by the number of
51 * layers it has searched through; stopping at the max supported layer.
53 * This function needs to be called when holding the port_info->sched_lock
55 struct ice_sched_node *
56 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
60 /* The TEID is same as that of the start_node */
61 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
64 /* The node has no children or is at the max layer */
65 if (!start_node->num_children ||
66 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
67 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
70 /* Check if TEID matches to any of the children nodes */
71 for (i = 0; i < start_node->num_children; i++)
72 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
73 return start_node->children[i];
75 /* Search within each child's sub-tree */
76 for (i = 0; i < start_node->num_children; i++) {
77 struct ice_sched_node *tmp;
79 tmp = ice_sched_find_node_by_teid(start_node->children[i],
89 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
90 * @hw: pointer to the HW struct
91 * @cmd_opc: cmd opcode
92 * @elems_req: number of elements to request
93 * @buf: pointer to buffer
94 * @buf_size: buffer size in bytes
95 * @elems_resp: returns total number of elements response
96 * @cd: pointer to command details structure or NULL
98 * This function sends a scheduling elements cmd (cmd_opc)
100 static enum ice_status
101 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
102 u16 elems_req, void *buf, u16 buf_size,
103 u16 *elems_resp, struct ice_sq_cd *cd)
105 struct ice_aqc_sched_elem_cmd *cmd;
106 struct ice_aq_desc desc;
107 enum ice_status status;
109 cmd = &desc.params.sched_elem_cmd;
110 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
111 cmd->num_elem_req = CPU_TO_LE16(elems_req);
112 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
113 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
114 if (!status && elems_resp)
115 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
121 * ice_aq_query_sched_elems - query scheduler elements
122 * @hw: pointer to the HW struct
123 * @elems_req: number of elements to query
124 * @buf: pointer to buffer
125 * @buf_size: buffer size in bytes
126 * @elems_ret: returns total number of elements returned
127 * @cd: pointer to command details structure or NULL
129 * Query scheduling elements (0x0404)
132 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
133 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
134 u16 *elems_ret, struct ice_sq_cd *cd)
136 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
137 elems_req, (void *)buf, buf_size,
142 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
143 * @pi: port information structure
144 * @layer: Scheduler layer of the node
145 * @info: Scheduler element information from firmware
147 * This function inserts a scheduler node to the SW DB.
150 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
151 struct ice_aqc_txsched_elem_data *info)
153 struct ice_aqc_txsched_elem_data elem;
154 struct ice_sched_node *parent;
155 struct ice_sched_node *node;
156 enum ice_status status;
160 return ICE_ERR_PARAM;
164 /* A valid parent node should be there */
165 parent = ice_sched_find_node_by_teid(pi->root,
166 LE32_TO_CPU(info->parent_teid));
168 ice_debug(hw, ICE_DBG_SCHED,
169 "Parent Node not found for parent_teid=0x%x\n",
170 LE32_TO_CPU(info->parent_teid));
171 return ICE_ERR_PARAM;
174 /* query the current node information from FW before adding it
177 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
180 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
182 return ICE_ERR_NO_MEMORY;
183 if (hw->max_children[layer]) {
184 /* coverity[suspicious_sizeof] */
185 node->children = (struct ice_sched_node **)
186 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
187 if (!node->children) {
189 return ICE_ERR_NO_MEMORY;
194 node->parent = parent;
195 node->tx_sched_layer = layer;
196 parent->children[parent->num_children++] = node;
202 * ice_aq_delete_sched_elems - delete scheduler elements
203 * @hw: pointer to the HW struct
204 * @grps_req: number of groups to delete
205 * @buf: pointer to buffer
206 * @buf_size: buffer size in bytes
207 * @grps_del: returns total number of elements deleted
208 * @cd: pointer to command details structure or NULL
210 * Delete scheduling elements (0x040F)
212 static enum ice_status
213 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
214 struct ice_aqc_delete_elem *buf, u16 buf_size,
215 u16 *grps_del, struct ice_sq_cd *cd)
217 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
218 grps_req, (void *)buf, buf_size,
223 * ice_sched_remove_elems - remove nodes from HW
224 * @hw: pointer to the HW struct
225 * @parent: pointer to the parent node
226 * @num_nodes: number of nodes
227 * @node_teids: array of node teids to be deleted
229 * This function remove nodes from HW
231 static enum ice_status
232 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
233 u16 num_nodes, u32 *node_teids)
235 struct ice_aqc_delete_elem *buf;
236 u16 i, num_groups_removed = 0;
237 enum ice_status status;
240 buf_size = ice_struct_size(buf, teid, num_nodes);
241 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
243 return ICE_ERR_NO_MEMORY;
245 buf->hdr.parent_teid = parent->info.node_teid;
246 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
247 for (i = 0; i < num_nodes; i++)
248 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
250 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
251 &num_groups_removed, NULL);
252 if (status != ICE_SUCCESS || num_groups_removed != 1)
253 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
254 hw->adminq.sq_last_status);
261 * ice_sched_get_first_node - get the first node of the given layer
262 * @pi: port information structure
263 * @parent: pointer the base node of the subtree
264 * @layer: layer number
266 * This function retrieves the first node of the given layer from the subtree
268 static struct ice_sched_node *
269 ice_sched_get_first_node(struct ice_port_info *pi,
270 struct ice_sched_node *parent, u8 layer)
272 return pi->sib_head[parent->tc_num][layer];
276 * ice_sched_get_tc_node - get pointer to TC node
277 * @pi: port information structure
280 * This function returns the TC node pointer
282 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
286 if (!pi || !pi->root)
288 for (i = 0; i < pi->root->num_children; i++)
289 if (pi->root->children[i]->tc_num == tc)
290 return pi->root->children[i];
295 * ice_free_sched_node - Free a Tx scheduler node from SW DB
296 * @pi: port information structure
297 * @node: pointer to the ice_sched_node struct
299 * This function frees up a node from SW DB as well as from HW
301 * This function needs to be called with the port_info->sched_lock held
303 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
305 struct ice_sched_node *parent;
306 struct ice_hw *hw = pi->hw;
309 /* Free the children before freeing up the parent node
310 * The parent array is updated below and that shifts the nodes
311 * in the array. So always pick the first child if num children > 0
313 while (node->num_children)
314 ice_free_sched_node(pi, node->children[0]);
316 /* Leaf, TC and root nodes can't be deleted by SW */
317 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
321 u32 teid = LE32_TO_CPU(node->info.node_teid);
323 ice_sched_remove_elems(hw, node->parent, 1, &teid);
325 parent = node->parent;
326 /* root has no parent */
328 struct ice_sched_node *p;
330 /* update the parent */
331 for (i = 0; i < parent->num_children; i++)
332 if (parent->children[i] == node) {
333 for (j = i + 1; j < parent->num_children; j++)
334 parent->children[j - 1] =
336 parent->num_children--;
340 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
342 if (p->sibling == node) {
343 p->sibling = node->sibling;
349 /* update the sibling head if head is getting removed */
350 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
351 pi->sib_head[node->tc_num][node->tx_sched_layer] =
355 /* leaf nodes have no children */
357 ice_free(hw, node->children);
362 * ice_aq_get_dflt_topo - gets default scheduler topology
363 * @hw: pointer to the HW struct
364 * @lport: logical port number
365 * @buf: pointer to buffer
366 * @buf_size: buffer size in bytes
367 * @num_branches: returns total number of queue to port branches
368 * @cd: pointer to command details structure or NULL
370 * Get default scheduler topology (0x400)
372 static enum ice_status
373 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
374 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
375 u8 *num_branches, struct ice_sq_cd *cd)
377 struct ice_aqc_get_topo *cmd;
378 struct ice_aq_desc desc;
379 enum ice_status status;
381 cmd = &desc.params.get_topo;
382 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
383 cmd->port_num = lport;
384 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
385 if (!status && num_branches)
386 *num_branches = cmd->num_branches;
392 * ice_aq_add_sched_elems - adds scheduling element
393 * @hw: pointer to the HW struct
394 * @grps_req: the number of groups that are requested to be added
395 * @buf: pointer to buffer
396 * @buf_size: buffer size in bytes
397 * @grps_added: returns total number of groups added
398 * @cd: pointer to command details structure or NULL
400 * Add scheduling elements (0x0401)
402 static enum ice_status
403 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
404 struct ice_aqc_add_elem *buf, u16 buf_size,
405 u16 *grps_added, struct ice_sq_cd *cd)
407 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
408 grps_req, (void *)buf, buf_size,
413 * ice_aq_cfg_sched_elems - configures scheduler elements
414 * @hw: pointer to the HW struct
415 * @elems_req: number of elements to configure
416 * @buf: pointer to buffer
417 * @buf_size: buffer size in bytes
418 * @elems_cfgd: returns total number of elements configured
419 * @cd: pointer to command details structure or NULL
421 * Configure scheduling elements (0x0403)
423 static enum ice_status
424 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
425 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
426 u16 *elems_cfgd, struct ice_sq_cd *cd)
428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
429 elems_req, (void *)buf, buf_size,
434 * ice_aq_move_sched_elems - move scheduler elements
435 * @hw: pointer to the HW struct
436 * @grps_req: number of groups to move
437 * @buf: pointer to buffer
438 * @buf_size: buffer size in bytes
439 * @grps_movd: returns total number of groups moved
440 * @cd: pointer to command details structure or NULL
442 * Move scheduling elements (0x0408)
444 static enum ice_status
445 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
446 struct ice_aqc_move_elem *buf, u16 buf_size,
447 u16 *grps_movd, struct ice_sq_cd *cd)
449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
450 grps_req, (void *)buf, buf_size,
455 * ice_aq_suspend_sched_elems - suspend scheduler elements
456 * @hw: pointer to the HW struct
457 * @elems_req: number of elements to suspend
458 * @buf: pointer to buffer
459 * @buf_size: buffer size in bytes
460 * @elems_ret: returns total number of elements suspended
461 * @cd: pointer to command details structure or NULL
463 * Suspend scheduling elements (0x0409)
465 static enum ice_status
466 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
467 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
469 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
470 elems_req, (void *)buf, buf_size,
475 * ice_aq_resume_sched_elems - resume scheduler elements
476 * @hw: pointer to the HW struct
477 * @elems_req: number of elements to resume
478 * @buf: pointer to buffer
479 * @buf_size: buffer size in bytes
480 * @elems_ret: returns total number of elements resumed
481 * @cd: pointer to command details structure or NULL
483 * resume scheduling elements (0x040A)
485 static enum ice_status
486 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
487 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
489 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
490 elems_req, (void *)buf, buf_size,
495 * ice_aq_query_sched_res - query scheduler resource
496 * @hw: pointer to the HW struct
497 * @buf_size: buffer size in bytes
498 * @buf: pointer to buffer
499 * @cd: pointer to command details structure or NULL
501 * Query scheduler resource allocation (0x0412)
503 static enum ice_status
504 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
505 struct ice_aqc_query_txsched_res_resp *buf,
506 struct ice_sq_cd *cd)
508 struct ice_aq_desc desc;
510 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
511 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
515 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
516 * @hw: pointer to the HW struct
517 * @num_nodes: number of nodes
518 * @node_teids: array of node teids to be suspended or resumed
519 * @suspend: true means suspend / false means resume
521 * This function suspends or resumes HW nodes
523 static enum ice_status
524 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
527 u16 i, buf_size, num_elem_ret = 0;
528 enum ice_status status;
531 buf_size = sizeof(*buf) * num_nodes;
532 buf = (__le32 *)ice_malloc(hw, buf_size);
534 return ICE_ERR_NO_MEMORY;
536 for (i = 0; i < num_nodes; i++)
537 buf[i] = CPU_TO_LE32(node_teids[i]);
540 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
541 buf_size, &num_elem_ret,
544 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
545 buf_size, &num_elem_ret,
547 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
548 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
555 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
556 * @hw: pointer to the HW struct
557 * @vsi_handle: VSI handle
559 * @new_numqs: number of queues
561 static enum ice_status
562 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
564 struct ice_vsi_ctx *vsi_ctx;
565 struct ice_q_ctx *q_ctx;
567 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
569 return ICE_ERR_PARAM;
570 /* allocate LAN queue contexts */
571 if (!vsi_ctx->lan_q_ctx[tc]) {
572 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
573 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
574 if (!vsi_ctx->lan_q_ctx[tc])
575 return ICE_ERR_NO_MEMORY;
576 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
579 /* num queues are increased, update the queue contexts */
580 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
581 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
583 q_ctx = (struct ice_q_ctx *)
584 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
586 return ICE_ERR_NO_MEMORY;
587 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
588 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
589 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
590 vsi_ctx->lan_q_ctx[tc] = q_ctx;
591 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
597 * ice_aq_rl_profile - performs a rate limiting task
598 * @hw: pointer to the HW struct
599 * @opcode: opcode for add, query, or remove profile(s)
600 * @num_profiles: the number of profiles
601 * @buf: pointer to buffer
602 * @buf_size: buffer size in bytes
603 * @num_processed: number of processed add or remove profile(s) to return
604 * @cd: pointer to command details structure
606 * RL profile function to add, query, or remove profile(s)
608 static enum ice_status
609 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
610 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
611 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
613 struct ice_aqc_rl_profile *cmd;
614 struct ice_aq_desc desc;
615 enum ice_status status;
617 cmd = &desc.params.rl_profile;
619 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
620 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
621 cmd->num_profiles = CPU_TO_LE16(num_profiles);
622 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
623 if (!status && num_processed)
624 *num_processed = LE16_TO_CPU(cmd->num_processed);
629 * ice_aq_add_rl_profile - adds rate limiting profile(s)
630 * @hw: pointer to the HW struct
631 * @num_profiles: the number of profile(s) to be add
632 * @buf: pointer to buffer
633 * @buf_size: buffer size in bytes
634 * @num_profiles_added: total number of profiles added to return
635 * @cd: pointer to command details structure
637 * Add RL profile (0x0410)
639 static enum ice_status
640 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
641 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
642 u16 *num_profiles_added, struct ice_sq_cd *cd)
644 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
645 buf, buf_size, num_profiles_added, cd);
649 * ice_aq_query_rl_profile - query rate limiting profile(s)
650 * @hw: pointer to the HW struct
651 * @num_profiles: the number of profile(s) to query
652 * @buf: pointer to buffer
653 * @buf_size: buffer size in bytes
654 * @cd: pointer to command details structure
656 * Query RL profile (0x0411)
659 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
660 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
661 struct ice_sq_cd *cd)
663 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
664 num_profiles, buf, buf_size, NULL, cd);
668 * ice_aq_remove_rl_profile - removes RL profile(s)
669 * @hw: pointer to the HW struct
670 * @num_profiles: the number of profile(s) to remove
671 * @buf: pointer to buffer
672 * @buf_size: buffer size in bytes
673 * @num_profiles_removed: total number of profiles removed to return
674 * @cd: pointer to command details structure or NULL
676 * Remove RL profile (0x0415)
678 static enum ice_status
679 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
680 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
681 u16 *num_profiles_removed, struct ice_sq_cd *cd)
683 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
684 num_profiles, buf, buf_size,
685 num_profiles_removed, cd);
689 * ice_sched_del_rl_profile - remove RL profile
690 * @hw: pointer to the HW struct
691 * @rl_info: rate limit profile information
693 * If the profile ID is not referenced anymore, it removes profile ID with
694 * its associated parameters from HW DB,and locally. The caller needs to
695 * hold scheduler lock.
697 static enum ice_status
698 ice_sched_del_rl_profile(struct ice_hw *hw,
699 struct ice_aqc_rl_profile_info *rl_info)
701 struct ice_aqc_rl_profile_elem *buf;
702 u16 num_profiles_removed;
703 enum ice_status status;
704 u16 num_profiles = 1;
706 if (rl_info->prof_id_ref != 0)
707 return ICE_ERR_IN_USE;
709 /* Safe to remove profile ID */
710 buf = &rl_info->profile;
711 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
712 &num_profiles_removed, NULL);
713 if (status || num_profiles_removed != num_profiles)
716 /* Delete stale entry now */
717 LIST_DEL(&rl_info->list_entry);
718 ice_free(hw, rl_info);
723 * ice_sched_clear_rl_prof - clears RL prof entries
724 * @pi: port information structure
726 * This function removes all RL profile from HW as well as from SW DB.
728 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
732 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
733 struct ice_aqc_rl_profile_info *rl_prof_elem;
734 struct ice_aqc_rl_profile_info *rl_prof_tmp;
736 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
737 &pi->rl_prof_list[ln],
738 ice_aqc_rl_profile_info, list_entry) {
739 struct ice_hw *hw = pi->hw;
740 enum ice_status status;
742 rl_prof_elem->prof_id_ref = 0;
743 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
745 ice_debug(hw, ICE_DBG_SCHED,
746 "Remove rl profile failed\n");
747 /* On error, free mem required */
748 LIST_DEL(&rl_prof_elem->list_entry);
749 ice_free(hw, rl_prof_elem);
756 * ice_sched_clear_agg - clears the aggregator related information
757 * @hw: pointer to the hardware structure
759 * This function removes aggregator list and free up aggregator related memory
760 * previously allocated.
762 void ice_sched_clear_agg(struct ice_hw *hw)
764 struct ice_sched_agg_info *agg_info;
765 struct ice_sched_agg_info *atmp;
767 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
770 struct ice_sched_agg_vsi_info *agg_vsi_info;
771 struct ice_sched_agg_vsi_info *vtmp;
773 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
774 &agg_info->agg_vsi_list,
775 ice_sched_agg_vsi_info, list_entry) {
776 LIST_DEL(&agg_vsi_info->list_entry);
777 ice_free(hw, agg_vsi_info);
779 LIST_DEL(&agg_info->list_entry);
780 ice_free(hw, agg_info);
785 * ice_sched_clear_tx_topo - clears the scheduler tree nodes
786 * @pi: port information structure
788 * This function removes all the nodes from HW as well as from SW DB.
790 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
794 /* remove RL profiles related lists */
795 ice_sched_clear_rl_prof(pi);
797 ice_free_sched_node(pi, pi->root);
803 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
804 * @pi: port information structure
806 * Cleanup scheduling elements from SW DB
808 void ice_sched_clear_port(struct ice_port_info *pi)
810 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
813 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
814 ice_acquire_lock(&pi->sched_lock);
815 ice_sched_clear_tx_topo(pi);
816 ice_release_lock(&pi->sched_lock);
817 ice_destroy_lock(&pi->sched_lock);
821 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
822 * @hw: pointer to the HW struct
824 * Cleanup scheduling elements from SW DB for all the ports
826 void ice_sched_cleanup_all(struct ice_hw *hw)
831 if (hw->layer_info) {
832 ice_free(hw, hw->layer_info);
833 hw->layer_info = NULL;
836 ice_sched_clear_port(hw->port_info);
838 hw->num_tx_sched_layers = 0;
839 hw->num_tx_sched_phys_layers = 0;
840 hw->flattened_layers = 0;
845 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
846 * @hw: pointer to the HW struct
847 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
848 * @buf: pointer to buffer
849 * @buf_size: buffer size in bytes
850 * @cd: pointer to command details structure or NULL
852 * Configure L2 Node CGD (0x0414)
855 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
856 struct ice_aqc_cfg_l2_node_cgd_elem *buf,
857 u16 buf_size, struct ice_sq_cd *cd)
859 struct ice_aqc_cfg_l2_node_cgd *cmd;
860 struct ice_aq_desc desc;
862 cmd = &desc.params.cfg_l2_node_cgd;
863 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
864 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
866 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
867 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
871 * ice_sched_add_elems - add nodes to HW and SW DB
872 * @pi: port information structure
873 * @tc_node: pointer to the branch node
874 * @parent: pointer to the parent node
875 * @layer: layer number to add nodes
876 * @num_nodes: number of nodes
877 * @num_nodes_added: pointer to num nodes added
878 * @first_node_teid: if new nodes are added then return the TEID of first node
880 * This function add nodes to HW as well as to SW DB for a given layer
882 static enum ice_status
883 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
884 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
885 u16 *num_nodes_added, u32 *first_node_teid)
887 struct ice_sched_node *prev, *new_node;
888 struct ice_aqc_add_elem *buf;
889 u16 i, num_groups_added = 0;
890 enum ice_status status = ICE_SUCCESS;
891 struct ice_hw *hw = pi->hw;
895 buf_size = ice_struct_size(buf, generic, num_nodes);
896 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
898 return ICE_ERR_NO_MEMORY;
900 buf->hdr.parent_teid = parent->info.node_teid;
901 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
902 for (i = 0; i < num_nodes; i++) {
903 buf->generic[i].parent_teid = parent->info.node_teid;
904 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
905 buf->generic[i].data.valid_sections =
906 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
907 ICE_AQC_ELEM_VALID_EIR;
908 buf->generic[i].data.generic = 0;
909 buf->generic[i].data.cir_bw.bw_profile_idx =
910 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
911 buf->generic[i].data.cir_bw.bw_alloc =
912 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
913 buf->generic[i].data.eir_bw.bw_profile_idx =
914 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
915 buf->generic[i].data.eir_bw.bw_alloc =
916 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
919 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
920 &num_groups_added, NULL);
921 if (status != ICE_SUCCESS || num_groups_added != 1) {
922 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
923 hw->adminq.sq_last_status);
928 *num_nodes_added = num_nodes;
929 /* add nodes to the SW DB */
930 for (i = 0; i < num_nodes; i++) {
931 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
932 if (status != ICE_SUCCESS) {
933 ice_debug(hw, ICE_DBG_SCHED,
934 "add nodes in SW DB failed status =%d\n",
939 teid = LE32_TO_CPU(buf->generic[i].node_teid);
940 new_node = ice_sched_find_node_by_teid(parent, teid);
942 ice_debug(hw, ICE_DBG_SCHED,
943 "Node is missing for teid =%d\n", teid);
947 new_node->sibling = NULL;
948 new_node->tc_num = tc_node->tc_num;
950 /* add it to previous node sibling pointer */
951 /* Note: siblings are not linked across branches */
952 prev = ice_sched_get_first_node(pi, tc_node, layer);
953 if (prev && prev != new_node) {
954 while (prev->sibling)
955 prev = prev->sibling;
956 prev->sibling = new_node;
959 /* initialize the sibling head */
960 if (!pi->sib_head[tc_node->tc_num][layer])
961 pi->sib_head[tc_node->tc_num][layer] = new_node;
964 *first_node_teid = teid;
972 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
973 * @pi: port information structure
974 * @tc_node: pointer to TC node
975 * @parent: pointer to parent node
976 * @layer: layer number to add nodes
977 * @num_nodes: number of nodes to be added
978 * @first_node_teid: pointer to the first node TEID
979 * @num_nodes_added: pointer to number of nodes added
981 * This function add nodes to a given layer.
983 static enum ice_status
984 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
985 struct ice_sched_node *tc_node,
986 struct ice_sched_node *parent, u8 layer,
987 u16 num_nodes, u32 *first_node_teid,
988 u16 *num_nodes_added)
990 u32 *first_teid_ptr = first_node_teid;
991 u16 new_num_nodes, max_child_nodes;
992 enum ice_status status = ICE_SUCCESS;
993 struct ice_hw *hw = pi->hw;
997 *num_nodes_added = 0;
1002 if (!parent || layer < hw->sw_entry_point_layer)
1003 return ICE_ERR_PARAM;
1005 /* max children per node per layer */
1006 max_child_nodes = hw->max_children[parent->tx_sched_layer];
1008 /* current number of children + required nodes exceed max children ? */
1009 if ((parent->num_children + num_nodes) > max_child_nodes) {
1010 /* Fail if the parent is a TC node */
1011 if (parent == tc_node)
1014 /* utilize all the spaces if the parent is not full */
1015 if (parent->num_children < max_child_nodes) {
1016 new_num_nodes = max_child_nodes - parent->num_children;
1017 /* this recursion is intentional, and wouldn't
1018 * go more than 2 calls
1020 status = ice_sched_add_nodes_to_layer(pi, tc_node,
1025 if (status != ICE_SUCCESS)
1028 *num_nodes_added += num_added;
1030 /* Don't modify the first node TEID memory if the first node was
1031 * added already in the above call. Instead send some temp
1032 * memory for all other recursive calls.
1035 first_teid_ptr = &temp;
1037 new_num_nodes = num_nodes - num_added;
1039 /* This parent is full, try the next sibling */
1040 parent = parent->sibling;
1042 /* this recursion is intentional, for 1024 queues
1043 * per VSI, it goes max of 16 iterations.
1044 * 1024 / 8 = 128 layer 8 nodes
1045 * 128 /8 = 16 (add 8 nodes per iteration)
1047 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1048 layer, new_num_nodes,
1051 *num_nodes_added += num_added;
1055 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1056 num_nodes_added, first_node_teid);
1061 * ice_sched_get_qgrp_layer - get the current queue group layer number
1062 * @hw: pointer to the HW struct
1064 * This function returns the current queue group layer number
1066 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1068 /* It's always total layers - 1, the array is 0 relative so -2 */
1069 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1073 * ice_sched_get_vsi_layer - get the current VSI layer number
1074 * @hw: pointer to the HW struct
1076 * This function returns the current VSI layer number
1078 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1080 /* Num Layers VSI layer
1083 * 5 or less sw_entry_point_layer
1085 /* calculate the VSI layer based on number of layers. */
1086 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1087 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1089 if (layer > hw->sw_entry_point_layer)
1092 return hw->sw_entry_point_layer;
1096 * ice_sched_get_agg_layer - get the current aggregator layer number
1097 * @hw: pointer to the HW struct
1099 * This function returns the current aggregator layer number
1101 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1103 /* Num Layers aggregator layer
1105 * 7 or less sw_entry_point_layer
1107 /* calculate the aggregator layer based on number of layers. */
1108 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1109 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1111 if (layer > hw->sw_entry_point_layer)
1114 return hw->sw_entry_point_layer;
1118 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1119 * @pi: port information structure
1121 * This function removes the leaf node that was created by the FW
1122 * during initialization
1124 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1126 struct ice_sched_node *node;
1130 if (!node->num_children)
1132 node = node->children[0];
1134 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1135 u32 teid = LE32_TO_CPU(node->info.node_teid);
1136 enum ice_status status;
1138 /* remove the default leaf node */
1139 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1141 ice_free_sched_node(pi, node);
1146 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1147 * @pi: port information structure
1149 * This function frees all the nodes except root and TC that were created by
1150 * the FW during initialization
1152 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1154 struct ice_sched_node *node;
1156 ice_rm_dflt_leaf_node(pi);
1158 /* remove the default nodes except TC and root nodes */
1161 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1162 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1163 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1164 ice_free_sched_node(pi, node);
1168 if (!node->num_children)
1170 node = node->children[0];
1175 * ice_sched_init_port - Initialize scheduler by querying information from FW
1176 * @pi: port info structure for the tree to cleanup
1178 * This function is the initial call to find the total number of Tx scheduler
1179 * resources, default topology created by firmware and storing the information
1182 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1184 struct ice_aqc_get_topo_elem *buf;
1185 enum ice_status status;
1192 return ICE_ERR_PARAM;
1195 /* Query the Default Topology from FW */
1196 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1197 ICE_AQ_MAX_BUF_LEN);
1199 return ICE_ERR_NO_MEMORY;
1201 /* Query default scheduling tree topology */
1202 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1203 &num_branches, NULL);
1207 /* num_branches should be between 1-8 */
1208 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1209 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1211 status = ICE_ERR_PARAM;
1215 /* get the number of elements on the default/first branch */
1216 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1218 /* num_elems should always be between 1-9 */
1219 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1220 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1222 status = ICE_ERR_PARAM;
1226 /* If the last node is a leaf node then the index of the queue group
1227 * layer is two less than the number of elements.
1229 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1230 ICE_AQC_ELEM_TYPE_LEAF)
1231 pi->last_node_teid =
1232 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1234 pi->last_node_teid =
1235 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1237 /* Insert the Tx Sched root node */
1238 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1242 /* Parse the default tree and cache the information */
1243 for (i = 0; i < num_branches; i++) {
1244 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1246 /* Skip root element as already inserted */
1247 for (j = 1; j < num_elems; j++) {
1248 /* update the sw entry point */
1249 if (buf[0].generic[j].data.elem_type ==
1250 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1251 hw->sw_entry_point_layer = j;
1253 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1259 /* Remove the default nodes. */
1261 ice_sched_rm_dflt_nodes(pi);
1263 /* initialize the port for handling the scheduler tree */
1264 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1265 ice_init_lock(&pi->sched_lock);
1266 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1267 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1270 if (status && pi->root) {
1271 ice_free_sched_node(pi, pi->root);
1280 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1281 * @pi: port information structure
1282 * @teid: Scheduler node TEID
1284 * This function retrieves the ice_sched_node struct for given TEID from
1285 * the SW DB and returns it to the caller.
1287 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1289 struct ice_sched_node *node;
1294 /* Find the node starting from root */
1295 ice_acquire_lock(&pi->sched_lock);
1296 node = ice_sched_find_node_by_teid(pi->root, teid);
1297 ice_release_lock(&pi->sched_lock);
1300 ice_debug(pi->hw, ICE_DBG_SCHED,
1301 "Node not found for teid=0x%x\n", teid);
1307 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1308 * @hw: pointer to the HW struct
1310 * query FW for allocated scheduler resources and store in HW struct
1312 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1314 struct ice_aqc_query_txsched_res_resp *buf;
1315 enum ice_status status = ICE_SUCCESS;
1322 buf = (struct ice_aqc_query_txsched_res_resp *)
1323 ice_malloc(hw, sizeof(*buf));
1325 return ICE_ERR_NO_MEMORY;
1327 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1329 goto sched_query_out;
1331 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1332 hw->num_tx_sched_phys_layers =
1333 LE16_TO_CPU(buf->sched_props.phys_levels);
1334 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1335 hw->max_cgds = buf->sched_props.max_pf_cgds;
1337 /* max sibling group size of current layer refers to the max children
1338 * of the below layer node.
1339 * layer 1 node max children will be layer 2 max sibling group size
1340 * layer 2 node max children will be layer 3 max sibling group size
1341 * and so on. This array will be populated from root (index 0) to
1342 * qgroup layer 7. Leaf node has no children.
1344 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1345 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1346 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1349 hw->layer_info = (struct ice_aqc_layer_props *)
1350 ice_memdup(hw, buf->layer_props,
1351 (hw->num_tx_sched_layers *
1352 sizeof(*hw->layer_info)),
1354 if (!hw->layer_info) {
1355 status = ICE_ERR_NO_MEMORY;
1356 goto sched_query_out;
1365 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1366 * @hw: pointer to the HW struct
1368 * Determine the PSM clock frequency and store in HW struct
1370 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1374 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1375 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1376 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1378 #define PSM_CLK_SRC_367_MHZ 0x0
1379 #define PSM_CLK_SRC_416_MHZ 0x1
1380 #define PSM_CLK_SRC_446_MHZ 0x2
1381 #define PSM_CLK_SRC_390_MHZ 0x3
1384 case PSM_CLK_SRC_367_MHZ:
1385 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1387 case PSM_CLK_SRC_416_MHZ:
1388 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1390 case PSM_CLK_SRC_446_MHZ:
1391 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1393 case PSM_CLK_SRC_390_MHZ:
1394 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1397 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1399 /* fall back to a safe default */
1400 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1405 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1406 * @hw: pointer to the HW struct
1407 * @base: pointer to the base node
1408 * @node: pointer to the node to search
1410 * This function checks whether a given node is part of the base node
1414 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1415 struct ice_sched_node *node)
1419 for (i = 0; i < base->num_children; i++) {
1420 struct ice_sched_node *child = base->children[i];
1425 if (child->tx_sched_layer > node->tx_sched_layer)
1428 /* this recursion is intentional, and wouldn't
1429 * go more than 8 calls
1431 if (ice_sched_find_node_in_subtree(hw, child, node))
1438 * ice_sched_get_free_qgrp - Scan all Q group siblings and find a free node
1439 * @pi: port information structure
1440 * @vsi_node: software VSI handle
1441 * @qgrp_node: first Q group node identified for scanning
1442 * @owner: LAN or RDMA
1444 * This function retrieves a free LAN or RDMA Q group node by scanning
1445 * qgrp_node and its siblings for the Q group with the fewest number
1446 * of queues currently assigned.
1448 static struct ice_sched_node *
1449 ice_sched_get_free_qgrp(struct ice_port_info *pi,
1450 struct ice_sched_node *vsi_node,
1451 struct ice_sched_node *qgrp_node, u8 owner)
1453 struct ice_sched_node *min_qgrp;
1458 min_children = qgrp_node->num_children;
1461 min_qgrp = qgrp_node;
1462 /* scan all Q groups until find a node which has less than the
1463 * minimum number of children. This way all Q group nodes get
1464 * equal number of shares and active. The bandwidth will be equally
1465 * distributed across all Qs.
1468 /* make sure the qgroup node is part of the VSI subtree */
1469 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1470 if (qgrp_node->num_children < min_children &&
1471 qgrp_node->owner == owner) {
1472 /* replace the new min Q group node */
1473 min_qgrp = qgrp_node;
1474 min_children = min_qgrp->num_children;
1475 /* break if it has no children, */
1479 qgrp_node = qgrp_node->sibling;
1485 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1486 * @pi: port information structure
1487 * @vsi_handle: software VSI handle
1488 * @tc: branch number
1489 * @owner: LAN or RDMA
1491 * This function retrieves a free LAN or RDMA queue group node
1493 struct ice_sched_node *
1494 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1497 struct ice_sched_node *vsi_node, *qgrp_node;
1498 struct ice_vsi_ctx *vsi_ctx;
1502 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1503 max_children = pi->hw->max_children[qgrp_layer];
1505 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1508 vsi_node = vsi_ctx->sched.vsi_node[tc];
1509 /* validate invalid VSI ID */
1513 /* get the first queue group node from VSI sub-tree */
1514 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1516 /* make sure the qgroup node is part of the VSI subtree */
1517 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1518 if (qgrp_node->num_children < max_children &&
1519 qgrp_node->owner == owner)
1521 qgrp_node = qgrp_node->sibling;
1524 /* Select the best queue group */
1525 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
1529 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1530 * @pi: pointer to the port information structure
1531 * @tc_node: pointer to the TC node
1532 * @vsi_handle: software VSI handle
1534 * This function retrieves a VSI node for a given VSI ID from a given
1537 struct ice_sched_node *
1538 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1541 struct ice_sched_node *node;
1544 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1545 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1547 /* Check whether it already exists */
1549 if (node->vsi_handle == vsi_handle)
1551 node = node->sibling;
1558 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1559 * @pi: pointer to the port information structure
1560 * @tc_node: pointer to the TC node
1561 * @agg_id: aggregator ID
1563 * This function retrieves an aggregator node for a given aggregator ID from
1566 static struct ice_sched_node *
1567 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1570 struct ice_sched_node *node;
1571 struct ice_hw *hw = pi->hw;
1576 agg_layer = ice_sched_get_agg_layer(hw);
1577 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1579 /* Check whether it already exists */
1581 if (node->agg_id == agg_id)
1583 node = node->sibling;
1590 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1591 * @hw: pointer to the HW struct
1592 * @node: pointer to the ice_sched_node struct
1594 * This function queries and compares the HW element with SW DB node parameters
1596 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1598 struct ice_aqc_txsched_elem_data buf;
1599 enum ice_status status;
1602 node_teid = LE32_TO_CPU(node->info.node_teid);
1603 status = ice_sched_query_elem(hw, node_teid, &buf);
1604 if (status != ICE_SUCCESS)
1607 if (memcmp(&buf, &node->info, sizeof(buf))) {
1608 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1617 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1618 * @hw: pointer to the HW struct
1619 * @num_qs: number of queues
1620 * @num_nodes: num nodes array
1622 * This function calculates the number of VSI child nodes based on the
1626 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1631 qgl = ice_sched_get_qgrp_layer(hw);
1632 vsil = ice_sched_get_vsi_layer(hw);
1634 /* calculate num nodes from queue group to VSI layer */
1635 for (i = qgl; i > vsil; i--) {
1636 /* round to the next integer if there is a remainder */
1637 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1639 /* need at least one node */
1640 num_nodes[i] = num ? num : 1;
1645 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1646 * @pi: port information structure
1647 * @vsi_handle: software VSI handle
1648 * @tc_node: pointer to the TC node
1649 * @num_nodes: pointer to the num nodes that needs to be added per layer
1650 * @owner: node owner (LAN or RDMA)
1652 * This function adds the VSI child nodes to tree. It gets called for
1653 * LAN and RDMA separately.
1655 static enum ice_status
1656 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1657 struct ice_sched_node *tc_node, u16 *num_nodes,
1660 struct ice_sched_node *parent, *node;
1661 struct ice_hw *hw = pi->hw;
1662 enum ice_status status;
1663 u32 first_node_teid;
1667 qgl = ice_sched_get_qgrp_layer(hw);
1668 vsil = ice_sched_get_vsi_layer(hw);
1669 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1670 for (i = vsil + 1; i <= qgl; i++) {
1674 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1678 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1681 /* The newly added node can be a new parent for the next
1685 parent = ice_sched_find_node_by_teid(tc_node,
1689 node->owner = owner;
1690 node = node->sibling;
1693 parent = parent->children[0];
1701 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1702 * @pi: pointer to the port info structure
1703 * @tc_node: pointer to TC node
1704 * @num_nodes: pointer to num nodes array
1706 * This function calculates the number of supported nodes needed to add this
1707 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1711 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1712 struct ice_sched_node *tc_node, u16 *num_nodes)
1714 struct ice_sched_node *node;
1718 vsil = ice_sched_get_vsi_layer(pi->hw);
1719 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1720 /* Add intermediate nodes if TC has no children and
1721 * need at least one node for VSI
1723 if (!tc_node->num_children || i == vsil) {
1726 /* If intermediate nodes are reached max children
1727 * then add a new one.
1729 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1730 /* scan all the siblings */
1732 if (node->num_children <
1733 pi->hw->max_children[i])
1735 node = node->sibling;
1738 /* tree has one intermediate node to add this new VSI.
1739 * So no need to calculate supported nodes for below
1744 /* all the nodes are full, allocate a new one */
1750 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1751 * @pi: port information structure
1752 * @vsi_handle: software VSI handle
1753 * @tc_node: pointer to TC node
1754 * @num_nodes: pointer to num nodes array
1756 * This function adds the VSI supported nodes into Tx tree including the
1757 * VSI, its parent and intermediate nodes in below layers
1759 static enum ice_status
1760 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1761 struct ice_sched_node *tc_node, u16 *num_nodes)
1763 struct ice_sched_node *parent = tc_node;
1764 enum ice_status status;
1765 u32 first_node_teid;
1770 return ICE_ERR_PARAM;
1772 vsil = ice_sched_get_vsi_layer(pi->hw);
1773 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1774 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1778 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1781 /* The newly added node can be a new parent for the next
1785 parent = ice_sched_find_node_by_teid(tc_node,
1788 parent = parent->children[0];
1794 parent->vsi_handle = vsi_handle;
1801 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1802 * @pi: port information structure
1803 * @vsi_handle: software VSI handle
1806 * This function adds a new VSI into scheduler tree
1808 static enum ice_status
1809 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1811 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1812 struct ice_sched_node *tc_node;
1814 tc_node = ice_sched_get_tc_node(pi, tc);
1816 return ICE_ERR_PARAM;
1818 /* calculate number of supported nodes needed for this VSI */
1819 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1821 /* add VSI supported nodes to TC subtree */
1822 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1827 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1828 * @pi: port information structure
1829 * @vsi_handle: software VSI handle
1831 * @new_numqs: new number of max queues
1832 * @owner: owner of this subtree
1834 * This function updates the VSI child nodes based on the number of queues
1836 static enum ice_status
1837 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1838 u8 tc, u16 new_numqs, u8 owner)
1840 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1841 struct ice_sched_node *vsi_node;
1842 struct ice_sched_node *tc_node;
1843 struct ice_vsi_ctx *vsi_ctx;
1844 enum ice_status status = ICE_SUCCESS;
1845 struct ice_hw *hw = pi->hw;
1848 tc_node = ice_sched_get_tc_node(pi, tc);
1852 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1856 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1858 return ICE_ERR_PARAM;
1860 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1861 /* num queues are not changed or less than the previous number */
1862 if (new_numqs <= prev_numqs)
1864 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1869 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1870 /* Keep the max number of queue configuration all the time. Update the
1871 * tree only if number of queues > previous number of queues. This may
1872 * leave some extra nodes in the tree if number of queues < previous
1873 * number but that wouldn't harm anything. Removing those extra nodes
1874 * may complicate the code if those nodes are part of SRL or
1875 * individually rate limited.
1877 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1878 new_num_nodes, owner);
1881 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1887 * ice_sched_cfg_vsi - configure the new/existing VSI
1888 * @pi: port information structure
1889 * @vsi_handle: software VSI handle
1891 * @maxqs: max number of queues
1892 * @owner: LAN or RDMA
1893 * @enable: TC enabled or disabled
1895 * This function adds/updates VSI nodes based on the number of queues. If TC is
1896 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1897 * disabled then suspend the VSI if it is not already.
1900 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1901 u8 owner, bool enable)
1903 struct ice_sched_node *vsi_node, *tc_node;
1904 struct ice_vsi_ctx *vsi_ctx;
1905 enum ice_status status = ICE_SUCCESS;
1906 struct ice_hw *hw = pi->hw;
1908 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1909 tc_node = ice_sched_get_tc_node(pi, tc);
1911 return ICE_ERR_PARAM;
1912 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1914 return ICE_ERR_PARAM;
1915 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1917 /* suspend the VSI if TC is not enabled */
1919 if (vsi_node && vsi_node->in_use) {
1920 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1922 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1925 vsi_node->in_use = false;
1930 /* TC is enabled, if it is a new VSI then add it to the tree */
1932 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1936 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1940 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1941 vsi_node->in_use = true;
1942 /* invalidate the max queues whenever VSI gets added first time
1943 * into the scheduler tree (boot or after reset). We need to
1944 * recreate the child nodes all the time in these cases.
1946 vsi_ctx->sched.max_lanq[tc] = 0;
1949 /* update the VSI child nodes */
1950 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1955 /* TC is enabled, resume the VSI if it is in the suspend state */
1956 if (!vsi_node->in_use) {
1957 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1959 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1961 vsi_node->in_use = true;
1968 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1969 * @pi: port information structure
1970 * @vsi_handle: software VSI handle
1972 * This function removes single aggregator VSI info entry from
1975 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1977 struct ice_sched_agg_info *agg_info;
1978 struct ice_sched_agg_info *atmp;
1980 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1983 struct ice_sched_agg_vsi_info *agg_vsi_info;
1984 struct ice_sched_agg_vsi_info *vtmp;
1986 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1987 &agg_info->agg_vsi_list,
1988 ice_sched_agg_vsi_info, list_entry)
1989 if (agg_vsi_info->vsi_handle == vsi_handle) {
1990 LIST_DEL(&agg_vsi_info->list_entry);
1991 ice_free(pi->hw, agg_vsi_info);
1998 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1999 * @node: pointer to the sub-tree node
2001 * This function checks for a leaf node presence in a given sub-tree node.
2003 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
2007 for (i = 0; i < node->num_children; i++)
2008 if (ice_sched_is_leaf_node_present(node->children[i]))
2010 /* check for a leaf node */
2011 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
2015 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
2016 * @pi: port information structure
2017 * @vsi_handle: software VSI handle
2018 * @owner: LAN or RDMA
2020 * This function removes the VSI and its LAN or RDMA children nodes from the
2023 static enum ice_status
2024 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
2026 enum ice_status status = ICE_ERR_PARAM;
2027 struct ice_vsi_ctx *vsi_ctx;
2030 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
2031 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2033 ice_acquire_lock(&pi->sched_lock);
2034 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2036 goto exit_sched_rm_vsi_cfg;
2038 ice_for_each_traffic_class(i) {
2039 struct ice_sched_node *vsi_node, *tc_node;
2042 tc_node = ice_sched_get_tc_node(pi, i);
2046 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2050 if (ice_sched_is_leaf_node_present(vsi_node)) {
2051 ice_debug(pi->hw, ICE_DBG_SCHED,
2052 "VSI has leaf nodes in TC %d\n", i);
2053 status = ICE_ERR_IN_USE;
2054 goto exit_sched_rm_vsi_cfg;
2056 while (j < vsi_node->num_children) {
2057 if (vsi_node->children[j]->owner == owner) {
2058 ice_free_sched_node(pi, vsi_node->children[j]);
2060 /* reset the counter again since the num
2061 * children will be updated after node removal
2068 /* remove the VSI if it has no children */
2069 if (!vsi_node->num_children) {
2070 ice_free_sched_node(pi, vsi_node);
2071 vsi_ctx->sched.vsi_node[i] = NULL;
2073 /* clean up aggregator related VSI info if any */
2074 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2076 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2077 vsi_ctx->sched.max_lanq[i] = 0;
2079 status = ICE_SUCCESS;
2081 exit_sched_rm_vsi_cfg:
2082 ice_release_lock(&pi->sched_lock);
2087 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2088 * @pi: port information structure
2089 * @vsi_handle: software VSI handle
2091 * This function clears the VSI and its LAN children nodes from scheduler tree
2094 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2096 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2100 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2101 * @hw: pointer to the HW struct
2102 * @node: pointer to the ice_sched_node struct
2104 * This function compares all the nodes for a given tree against HW DB nodes
2105 * This function needs to be called with the port_info->sched_lock held
2107 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2111 /* start from the leaf node */
2112 for (i = 0; i < node->num_children; i++)
2113 /* Fail if node doesn't match with the SW DB
2114 * this recursion is intentional, and wouldn't
2115 * go more than 9 calls
2117 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2120 return ice_sched_check_node(hw, node);
2124 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2125 * @hw: pointer to the HW struct
2126 * @node_teid: node TEID
2127 * @buf: pointer to buffer
2128 * @buf_size: buffer size in bytes
2129 * @cd: pointer to command details structure or NULL
2131 * This function retrieves the tree topology from the firmware for a given
2132 * node TEID to the root node.
2135 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2136 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
2137 struct ice_sq_cd *cd)
2139 struct ice_aqc_query_node_to_root *cmd;
2140 struct ice_aq_desc desc;
2142 cmd = &desc.params.query_node_to_root;
2143 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2144 cmd->teid = CPU_TO_LE32(node_teid);
2145 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2149 * ice_get_agg_info - get the aggregator ID
2150 * @hw: pointer to the hardware structure
2151 * @agg_id: aggregator ID
2153 * This function validates aggregator ID. The function returns info if
2154 * aggregator ID is present in list otherwise it returns null.
2156 static struct ice_sched_agg_info *
2157 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2159 struct ice_sched_agg_info *agg_info;
2161 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2163 if (agg_info->agg_id == agg_id)
2170 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2171 * @hw: pointer to the HW struct
2172 * @node: pointer to a child node
2173 * @num_nodes: num nodes count array
2175 * This function walks through the aggregator subtree to find a free parent
2178 static struct ice_sched_node *
2179 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2182 u8 l = node->tx_sched_layer;
2185 vsil = ice_sched_get_vsi_layer(hw);
2187 /* Is it VSI parent layer ? */
2189 return (node->num_children < hw->max_children[l]) ? node : NULL;
2191 /* We have intermediate nodes. Let's walk through the subtree. If the
2192 * intermediate node has space to add a new node then clear the count
2194 if (node->num_children < hw->max_children[l])
2196 /* The below recursive call is intentional and wouldn't go more than
2197 * 2 or 3 iterations.
2200 for (i = 0; i < node->num_children; i++) {
2201 struct ice_sched_node *parent;
2203 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2213 * ice_sched_update_parent - update the new parent in SW DB
2214 * @new_parent: pointer to a new parent node
2215 * @node: pointer to a child node
2217 * This function removes the child from the old parent and adds it to a new
2221 ice_sched_update_parent(struct ice_sched_node *new_parent,
2222 struct ice_sched_node *node)
2224 struct ice_sched_node *old_parent;
2227 old_parent = node->parent;
2229 /* update the old parent children */
2230 for (i = 0; i < old_parent->num_children; i++)
2231 if (old_parent->children[i] == node) {
2232 for (j = i + 1; j < old_parent->num_children; j++)
2233 old_parent->children[j - 1] =
2234 old_parent->children[j];
2235 old_parent->num_children--;
2239 /* now move the node to a new parent */
2240 new_parent->children[new_parent->num_children++] = node;
2241 node->parent = new_parent;
2242 node->info.parent_teid = new_parent->info.node_teid;
2246 * ice_sched_move_nodes - move child nodes to a given parent
2247 * @pi: port information structure
2248 * @parent: pointer to parent node
2249 * @num_items: number of child nodes to be moved
2250 * @list: pointer to child node teids
2252 * This function move the child nodes to a given parent.
2254 static enum ice_status
2255 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2256 u16 num_items, u32 *list)
2258 enum ice_status status = ICE_SUCCESS;
2259 struct ice_aqc_move_elem *buf;
2260 struct ice_sched_node *node;
2261 u16 i, grps_movd = 0;
2267 if (!parent || !num_items)
2268 return ICE_ERR_PARAM;
2270 /* Does parent have enough space */
2271 if (parent->num_children + num_items >
2272 hw->max_children[parent->tx_sched_layer])
2273 return ICE_ERR_AQ_FULL;
2275 buf_len = ice_struct_size(buf, teid, 1);
2276 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);
2278 return ICE_ERR_NO_MEMORY;
2280 for (i = 0; i < num_items; i++) {
2281 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2283 status = ICE_ERR_PARAM;
2287 buf->hdr.src_parent_teid = node->info.parent_teid;
2288 buf->hdr.dest_parent_teid = parent->info.node_teid;
2289 buf->teid[0] = node->info.node_teid;
2290 buf->hdr.num_elems = CPU_TO_LE16(1);
2291 status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,
2293 if (status && grps_movd != 1) {
2294 status = ICE_ERR_CFG;
2298 /* update the SW DB */
2299 ice_sched_update_parent(parent, node);
2308 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2309 * @pi: port information structure
2310 * @vsi_handle: software VSI handle
2311 * @agg_id: aggregator ID
2314 * This function moves a VSI to an aggregator node or its subtree.
2315 * Intermediate nodes may be created if required.
2317 static enum ice_status
2318 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2321 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2322 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2323 u32 first_node_teid, vsi_teid;
2324 enum ice_status status;
2325 u16 num_nodes_added;
2328 tc_node = ice_sched_get_tc_node(pi, tc);
2332 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2334 return ICE_ERR_DOES_NOT_EXIST;
2336 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2338 return ICE_ERR_DOES_NOT_EXIST;
2340 /* Is this VSI already part of given aggregator? */
2341 if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))
2344 aggl = ice_sched_get_agg_layer(pi->hw);
2345 vsil = ice_sched_get_vsi_layer(pi->hw);
2347 /* set intermediate node count to 1 between aggregator and VSI layers */
2348 for (i = aggl + 1; i < vsil; i++)
2351 /* Check if the aggregator subtree has any free node to add the VSI */
2352 for (i = 0; i < agg_node->num_children; i++) {
2353 parent = ice_sched_get_free_vsi_parent(pi->hw,
2354 agg_node->children[i],
2362 for (i = aggl + 1; i < vsil; i++) {
2363 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2367 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2370 /* The newly added node can be a new parent for the next
2373 if (num_nodes_added)
2374 parent = ice_sched_find_node_by_teid(tc_node,
2377 parent = parent->children[0];
2384 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2385 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2389 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2390 * @pi: port information structure
2391 * @agg_info: aggregator info
2392 * @tc: traffic class number
2393 * @rm_vsi_info: true or false
2395 * This function move all the VSI(s) to the default aggregator and delete
2396 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2397 * caller holds the scheduler lock.
2399 static enum ice_status
2400 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2401 struct ice_sched_agg_info *agg_info, u8 tc,
2404 struct ice_sched_agg_vsi_info *agg_vsi_info;
2405 struct ice_sched_agg_vsi_info *tmp;
2406 enum ice_status status = ICE_SUCCESS;
2408 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2409 ice_sched_agg_vsi_info, list_entry) {
2410 u16 vsi_handle = agg_vsi_info->vsi_handle;
2412 /* Move VSI to default aggregator */
2413 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2416 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2417 ICE_DFLT_AGG_ID, tc);
2421 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2422 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2423 LIST_DEL(&agg_vsi_info->list_entry);
2424 ice_free(pi->hw, agg_vsi_info);
2432 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2433 * @pi: port information structure
2434 * @node: node pointer
2436 * This function checks whether the aggregator is attached with any VSI or not.
2439 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2443 vsil = ice_sched_get_vsi_layer(pi->hw);
2444 if (node->tx_sched_layer < vsil - 1) {
2445 for (i = 0; i < node->num_children; i++)
2446 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2450 return node->num_children ? true : false;
2455 * ice_sched_rm_agg_cfg - remove the aggregator node
2456 * @pi: port information structure
2457 * @agg_id: aggregator ID
2460 * This function removes the aggregator node and intermediate nodes if any
2463 static enum ice_status
2464 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2466 struct ice_sched_node *tc_node, *agg_node;
2467 struct ice_hw *hw = pi->hw;
2469 tc_node = ice_sched_get_tc_node(pi, tc);
2473 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2475 return ICE_ERR_DOES_NOT_EXIST;
2477 /* Can't remove the aggregator node if it has children */
2478 if (ice_sched_is_agg_inuse(pi, agg_node))
2479 return ICE_ERR_IN_USE;
2481 /* need to remove the whole subtree if aggregator node is the
2484 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2485 struct ice_sched_node *parent = agg_node->parent;
2490 if (parent->num_children > 1)
2496 ice_free_sched_node(pi, agg_node);
2501 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2502 * @pi: port information structure
2503 * @agg_info: aggregator ID
2505 * @rm_vsi_info: bool value true or false
2507 * This function removes aggregator reference to VSI of given TC. It removes
2508 * the aggregator configuration completely for requested TC. The caller needs
2509 * to hold the scheduler lock.
2511 static enum ice_status
2512 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2513 u8 tc, bool rm_vsi_info)
2515 enum ice_status status = ICE_SUCCESS;
2517 /* If nothing to remove - return success */
2518 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2519 goto exit_rm_agg_cfg_tc;
2521 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2523 goto exit_rm_agg_cfg_tc;
2525 /* Delete aggregator node(s) */
2526 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2528 goto exit_rm_agg_cfg_tc;
2530 ice_clear_bit(tc, agg_info->tc_bitmap);
2536 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2537 * @pi: port information structure
2538 * @agg_id: aggregator ID
2539 * @tc_bitmap: 8 bits TC bitmap
2541 * Save aggregator TC bitmap. This function needs to be called with scheduler
2544 static enum ice_status
2545 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2546 ice_bitmap_t *tc_bitmap)
2548 struct ice_sched_agg_info *agg_info;
2550 agg_info = ice_get_agg_info(pi->hw, agg_id);
2552 return ICE_ERR_PARAM;
2553 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2554 ICE_MAX_TRAFFIC_CLASS);
2559 * ice_sched_add_agg_cfg - create an aggregator node
2560 * @pi: port information structure
2561 * @agg_id: aggregator ID
2564 * This function creates an aggregator node and intermediate nodes if required
2567 static enum ice_status
2568 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2570 struct ice_sched_node *parent, *agg_node, *tc_node;
2571 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2572 enum ice_status status = ICE_SUCCESS;
2573 struct ice_hw *hw = pi->hw;
2574 u32 first_node_teid;
2575 u16 num_nodes_added;
2578 tc_node = ice_sched_get_tc_node(pi, tc);
2582 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2583 /* Does Agg node already exist ? */
2587 aggl = ice_sched_get_agg_layer(hw);
2589 /* need one node in Agg layer */
2590 num_nodes[aggl] = 1;
2592 /* Check whether the intermediate nodes have space to add the
2593 * new aggregator. If they are full, then SW needs to allocate a new
2594 * intermediate node on those layers
2596 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2597 parent = ice_sched_get_first_node(pi, tc_node, i);
2599 /* scan all the siblings */
2601 if (parent->num_children < hw->max_children[i])
2603 parent = parent->sibling;
2606 /* all the nodes are full, reserve one for this layer */
2611 /* add the aggregator node */
2613 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2617 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2621 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2624 /* The newly added node can be a new parent for the next
2627 if (num_nodes_added) {
2628 parent = ice_sched_find_node_by_teid(tc_node,
2630 /* register aggregator ID with the aggregator node */
2631 if (parent && i == aggl)
2632 parent->agg_id = agg_id;
2634 parent = parent->children[0];
2642 * ice_sched_cfg_agg - configure aggregator node
2643 * @pi: port information structure
2644 * @agg_id: aggregator ID
2645 * @agg_type: aggregator type queue, VSI, or aggregator group
2646 * @tc_bitmap: bits TC bitmap
2648 * It registers a unique aggregator node into scheduler services. It
2649 * allows a user to register with a unique ID to track it's resources.
2650 * The aggregator type determines if this is a queue group, VSI group
2651 * or aggregator group. It then creates the aggregator node(s) for requested
2652 * TC(s) or removes an existing aggregator node including its configuration
2653 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2654 * resources and remove aggregator ID.
2655 * This function needs to be called with scheduler lock held.
2657 static enum ice_status
2658 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2659 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2661 struct ice_sched_agg_info *agg_info;
2662 enum ice_status status = ICE_SUCCESS;
2663 struct ice_hw *hw = pi->hw;
2666 agg_info = ice_get_agg_info(hw, agg_id);
2668 /* Create new entry for new aggregator ID */
2669 agg_info = (struct ice_sched_agg_info *)
2670 ice_malloc(hw, sizeof(*agg_info));
2672 status = ICE_ERR_NO_MEMORY;
2675 agg_info->agg_id = agg_id;
2676 agg_info->agg_type = agg_type;
2677 agg_info->tc_bitmap[0] = 0;
2679 /* Initialize the aggregator VSI list head */
2680 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2682 /* Add new entry in aggregator list */
2683 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2685 /* Create aggregator node(s) for requested TC(s) */
2686 ice_for_each_traffic_class(tc) {
2687 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2688 /* Delete aggregator cfg TC if it exists previously */
2689 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2695 /* Check if aggregator node for TC already exists */
2696 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2699 /* Create new aggregator node for TC */
2700 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2704 /* Save aggregator node's TC information */
2705 ice_set_bit(tc, agg_info->tc_bitmap);
2712 * ice_cfg_agg - config aggregator node
2713 * @pi: port information structure
2714 * @agg_id: aggregator ID
2715 * @agg_type: aggregator type queue, VSI, or aggregator group
2716 * @tc_bitmap: bits TC bitmap
2718 * This function configures aggregator node(s).
2721 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2724 ice_bitmap_t bitmap = tc_bitmap;
2725 enum ice_status status;
2727 ice_acquire_lock(&pi->sched_lock);
2728 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2729 (ice_bitmap_t *)&bitmap);
2731 status = ice_save_agg_tc_bitmap(pi, agg_id,
2732 (ice_bitmap_t *)&bitmap);
2733 ice_release_lock(&pi->sched_lock);
2738 * ice_get_agg_vsi_info - get the aggregator ID
2739 * @agg_info: aggregator info
2740 * @vsi_handle: software VSI handle
2742 * The function returns aggregator VSI info based on VSI handle. This function
2743 * needs to be called with scheduler lock held.
2745 static struct ice_sched_agg_vsi_info *
2746 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2748 struct ice_sched_agg_vsi_info *agg_vsi_info;
2750 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2751 ice_sched_agg_vsi_info, list_entry)
2752 if (agg_vsi_info->vsi_handle == vsi_handle)
2753 return agg_vsi_info;
2759 * ice_get_vsi_agg_info - get the aggregator info of VSI
2760 * @hw: pointer to the hardware structure
2761 * @vsi_handle: Sw VSI handle
2763 * The function returns aggregator info of VSI represented via vsi_handle. The
2764 * VSI has in this case a different aggregator than the default one. This
2765 * function needs to be called with scheduler lock held.
2767 static struct ice_sched_agg_info *
2768 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2770 struct ice_sched_agg_info *agg_info;
2772 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2774 struct ice_sched_agg_vsi_info *agg_vsi_info;
2776 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2784 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2785 * @pi: port information structure
2786 * @agg_id: aggregator ID
2787 * @vsi_handle: software VSI handle
2788 * @tc_bitmap: TC bitmap of enabled TC(s)
2790 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2793 static enum ice_status
2794 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2795 ice_bitmap_t *tc_bitmap)
2797 struct ice_sched_agg_vsi_info *agg_vsi_info;
2798 struct ice_sched_agg_info *agg_info;
2800 agg_info = ice_get_agg_info(pi->hw, agg_id);
2802 return ICE_ERR_PARAM;
2803 /* check if entry already exist */
2804 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2806 return ICE_ERR_PARAM;
2807 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2808 ICE_MAX_TRAFFIC_CLASS);
2813 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2814 * @pi: port information structure
2815 * @agg_id: aggregator ID
2816 * @vsi_handle: software VSI handle
2817 * @tc_bitmap: TC bitmap of enabled TC(s)
2819 * This function moves VSI to a new or default aggregator node. If VSI is
2820 * already associated to the aggregator node then no operation is performed on
2821 * the tree. This function needs to be called with scheduler lock held.
2823 static enum ice_status
2824 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2825 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2827 struct ice_sched_agg_vsi_info *agg_vsi_info;
2828 struct ice_sched_agg_info *agg_info;
2829 enum ice_status status = ICE_SUCCESS;
2830 struct ice_hw *hw = pi->hw;
2833 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2834 return ICE_ERR_PARAM;
2835 agg_info = ice_get_agg_info(hw, agg_id);
2837 return ICE_ERR_PARAM;
2838 /* check if entry already exist */
2839 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2840 if (!agg_vsi_info) {
2841 /* Create new entry for VSI under aggregator list */
2842 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2843 ice_malloc(hw, sizeof(*agg_vsi_info));
2845 return ICE_ERR_PARAM;
2847 /* add VSI ID into the aggregator list */
2848 agg_vsi_info->vsi_handle = vsi_handle;
2849 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2851 /* Move VSI node to new aggregator node for requested TC(s) */
2852 ice_for_each_traffic_class(tc) {
2853 if (!ice_is_tc_ena(*tc_bitmap, tc))
2856 /* Move VSI to new aggregator */
2857 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2861 if (agg_id != ICE_DFLT_AGG_ID)
2862 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2864 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2866 /* If VSI moved back to default aggregator, delete agg_vsi_info. */
2867 if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
2868 ICE_MAX_TRAFFIC_CLASS)) {
2869 LIST_DEL(&agg_vsi_info->list_entry);
2870 ice_free(hw, agg_vsi_info);
2876 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2877 * @pi: port information structure
2879 * This function removes unused rate limit profiles from the HW and
2880 * SW DB. The caller needs to hold scheduler lock.
2882 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
2886 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
2887 struct ice_aqc_rl_profile_info *rl_prof_elem;
2888 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2890 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2891 &pi->rl_prof_list[ln],
2892 ice_aqc_rl_profile_info, list_entry) {
2893 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
2894 ice_debug(pi->hw, ICE_DBG_SCHED,
2895 "Removed rl profile\n");
2901 * ice_sched_update_elem - update element
2902 * @hw: pointer to the HW struct
2903 * @node: pointer to node
2904 * @info: node info to update
2906 * Update the HW DB, and local SW DB of node. Update the scheduling
2907 * parameters of node from argument info data buffer (Info->data buf) and
2908 * returns success or error on config sched element failure. The caller
2909 * needs to hold scheduler lock.
2911 static enum ice_status
2912 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2913 struct ice_aqc_txsched_elem_data *info)
2915 struct ice_aqc_txsched_elem_data buf;
2916 enum ice_status status;
2921 /* Parent TEID is reserved field in this aq call */
2922 buf.parent_teid = 0;
2923 /* Element type is reserved field in this aq call */
2924 buf.data.elem_type = 0;
2925 /* Flags is reserved field in this aq call */
2929 /* Configure element node */
2930 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2932 if (status || elem_cfgd != num_elems) {
2933 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2937 /* Config success case */
2938 /* Now update local SW DB */
2939 /* Only copy the data portion of info buffer */
2940 node->info.data = info->data;
2945 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2946 * @hw: pointer to the HW struct
2947 * @node: sched node to configure
2948 * @rl_type: rate limit type CIR, EIR, or shared
2949 * @bw_alloc: BW weight/allocation
2951 * This function configures node element's BW allocation.
2953 static enum ice_status
2954 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2955 enum ice_rl_type rl_type, u16 bw_alloc)
2957 struct ice_aqc_txsched_elem_data buf;
2958 struct ice_aqc_txsched_elem *data;
2959 enum ice_status status;
2963 if (rl_type == ICE_MIN_BW) {
2964 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2965 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2966 } else if (rl_type == ICE_MAX_BW) {
2967 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2968 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2970 return ICE_ERR_PARAM;
2973 /* Configure element */
2974 status = ice_sched_update_elem(hw, node, &buf);
2979 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2980 * @pi: port information structure
2981 * @agg_id: aggregator ID
2982 * @vsi_handle: software VSI handle
2983 * @tc_bitmap: TC bitmap of enabled TC(s)
2985 * Move or associate VSI to a new or default aggregator node.
2988 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2991 ice_bitmap_t bitmap = tc_bitmap;
2992 enum ice_status status;
2994 ice_acquire_lock(&pi->sched_lock);
2995 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2996 (ice_bitmap_t *)&bitmap);
2998 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2999 (ice_bitmap_t *)&bitmap);
3000 ice_release_lock(&pi->sched_lock);
3005 * ice_rm_agg_cfg - remove aggregator configuration
3006 * @pi: port information structure
3007 * @agg_id: aggregator ID
3009 * This function removes aggregator reference to VSI and delete aggregator ID
3010 * info. It removes the aggregator configuration completely.
3012 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
3014 struct ice_sched_agg_info *agg_info;
3015 enum ice_status status = ICE_SUCCESS;
3018 ice_acquire_lock(&pi->sched_lock);
3019 agg_info = ice_get_agg_info(pi->hw, agg_id);
3021 status = ICE_ERR_DOES_NOT_EXIST;
3022 goto exit_ice_rm_agg_cfg;
3025 ice_for_each_traffic_class(tc) {
3026 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
3028 goto exit_ice_rm_agg_cfg;
3031 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
3032 status = ICE_ERR_IN_USE;
3033 goto exit_ice_rm_agg_cfg;
3036 /* Safe to delete entry now */
3037 LIST_DEL(&agg_info->list_entry);
3038 ice_free(pi->hw, agg_info);
3040 /* Remove unused RL profile IDs from HW and SW DB */
3041 ice_sched_rm_unused_rl_prof(pi);
3043 exit_ice_rm_agg_cfg:
3044 ice_release_lock(&pi->sched_lock);
3049 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
3050 * @bw_t_info: bandwidth type information structure
3051 * @bw_alloc: Bandwidth allocation information
3053 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
3057 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3059 bw_t_info->cir_bw.bw_alloc = bw_alloc;
3060 if (bw_t_info->cir_bw.bw_alloc)
3061 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3063 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3067 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
3068 * @bw_t_info: bandwidth type information structure
3069 * @bw_alloc: Bandwidth allocation information
3071 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
3075 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3077 bw_t_info->eir_bw.bw_alloc = bw_alloc;
3078 if (bw_t_info->eir_bw.bw_alloc)
3079 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3081 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3085 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3086 * @pi: port information structure
3087 * @vsi_handle: sw VSI handle
3088 * @tc: traffic class
3089 * @rl_type: rate limit type min or max
3090 * @bw_alloc: Bandwidth allocation information
3092 * Save BW alloc information of VSI type node for post replay use.
3094 static enum ice_status
3095 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3096 enum ice_rl_type rl_type, u16 bw_alloc)
3098 struct ice_vsi_ctx *vsi_ctx;
3100 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3101 return ICE_ERR_PARAM;
3102 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3104 return ICE_ERR_PARAM;
3107 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3111 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3115 return ICE_ERR_PARAM;
3121 * ice_set_clear_cir_bw - set or clear CIR BW
3122 * @bw_t_info: bandwidth type information structure
3123 * @bw: bandwidth in Kbps - Kilo bits per sec
3125 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3127 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3129 if (bw == ICE_SCHED_DFLT_BW) {
3130 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3131 bw_t_info->cir_bw.bw = 0;
3133 /* Save type of BW information */
3134 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3135 bw_t_info->cir_bw.bw = bw;
3140 * ice_set_clear_eir_bw - set or clear EIR BW
3141 * @bw_t_info: bandwidth type information structure
3142 * @bw: bandwidth in Kbps - Kilo bits per sec
3144 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3146 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3148 if (bw == ICE_SCHED_DFLT_BW) {
3149 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3150 bw_t_info->eir_bw.bw = 0;
3152 /* EIR BW and Shared BW profiles are mutually exclusive and
3153 * hence only one of them may be set for any given element.
3154 * First clear earlier saved shared BW information.
3156 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3157 bw_t_info->shared_bw = 0;
3158 /* save EIR BW information */
3159 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3160 bw_t_info->eir_bw.bw = bw;
3165 * ice_set_clear_shared_bw - set or clear shared BW
3166 * @bw_t_info: bandwidth type information structure
3167 * @bw: bandwidth in Kbps - Kilo bits per sec
3169 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3171 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3173 if (bw == ICE_SCHED_DFLT_BW) {
3174 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3175 bw_t_info->shared_bw = 0;
3177 /* EIR BW and Shared BW profiles are mutually exclusive and
3178 * hence only one of them may be set for any given element.
3179 * First clear earlier saved EIR BW information.
3181 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3182 bw_t_info->eir_bw.bw = 0;
3183 /* save shared BW information */
3184 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3185 bw_t_info->shared_bw = bw;
3190 * ice_sched_save_vsi_bw - save VSI node's BW information
3191 * @pi: port information structure
3192 * @vsi_handle: sw VSI handle
3193 * @tc: traffic class
3194 * @rl_type: rate limit type min, max, or shared
3195 * @bw: bandwidth in Kbps - Kilo bits per sec
3197 * Save BW information of VSI type node for post replay use.
3199 static enum ice_status
3200 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3201 enum ice_rl_type rl_type, u32 bw)
3203 struct ice_vsi_ctx *vsi_ctx;
3205 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3206 return ICE_ERR_PARAM;
3207 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3209 return ICE_ERR_PARAM;
3212 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3215 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3218 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3221 return ICE_ERR_PARAM;
3227 * ice_set_clear_prio - set or clear priority information
3228 * @bw_t_info: bandwidth type information structure
3229 * @prio: priority to save
3231 * Save or clear priority (prio) in the passed param bw_t_info.
3233 static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3235 bw_t_info->generic = prio;
3236 if (bw_t_info->generic)
3237 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3239 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3243 * ice_sched_save_vsi_prio - save VSI node's priority information
3244 * @pi: port information structure
3245 * @vsi_handle: Software VSI handle
3246 * @tc: traffic class
3247 * @prio: priority to save
3249 * Save priority information of VSI type node for post replay use.
3251 static enum ice_status
3252 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3255 struct ice_vsi_ctx *vsi_ctx;
3257 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3258 return ICE_ERR_PARAM;
3259 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3261 return ICE_ERR_PARAM;
3262 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3263 return ICE_ERR_PARAM;
3264 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3269 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3270 * @pi: port information structure
3271 * @agg_id: node aggregator ID
3272 * @tc: traffic class
3273 * @rl_type: rate limit type min or max
3274 * @bw_alloc: bandwidth alloc information
3276 * Save BW alloc information of AGG type node for post replay use.
3278 static enum ice_status
3279 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3280 enum ice_rl_type rl_type, u16 bw_alloc)
3282 struct ice_sched_agg_info *agg_info;
3284 agg_info = ice_get_agg_info(pi->hw, agg_id);
3286 return ICE_ERR_PARAM;
3287 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3288 return ICE_ERR_PARAM;
3291 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3294 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3297 return ICE_ERR_PARAM;
3303 * ice_sched_save_agg_bw - save aggregator node's BW information
3304 * @pi: port information structure
3305 * @agg_id: node aggregator ID
3306 * @tc: traffic class
3307 * @rl_type: rate limit type min, max, or shared
3308 * @bw: bandwidth in Kbps - Kilo bits per sec
3310 * Save BW information of AGG type node for post replay use.
3312 static enum ice_status
3313 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3314 enum ice_rl_type rl_type, u32 bw)
3316 struct ice_sched_agg_info *agg_info;
3318 agg_info = ice_get_agg_info(pi->hw, agg_id);
3320 return ICE_ERR_PARAM;
3321 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3322 return ICE_ERR_PARAM;
3325 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3328 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3331 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3334 return ICE_ERR_PARAM;
3340 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3341 * @pi: port information structure
3342 * @vsi_handle: software VSI handle
3343 * @tc: traffic class
3344 * @rl_type: min or max
3345 * @bw: bandwidth in Kbps
3347 * This function configures BW limit of VSI scheduling node based on TC
3351 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3352 enum ice_rl_type rl_type, u32 bw)
3354 enum ice_status status;
3356 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3360 ice_acquire_lock(&pi->sched_lock);
3361 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3362 ice_release_lock(&pi->sched_lock);
3368 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3369 * @pi: port information structure
3370 * @vsi_handle: software VSI handle
3371 * @tc: traffic class
3372 * @rl_type: min or max
3374 * This function configures default BW limit of VSI scheduling node based on TC
3378 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3379 enum ice_rl_type rl_type)
3381 enum ice_status status;
3383 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3388 ice_acquire_lock(&pi->sched_lock);
3389 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3391 ice_release_lock(&pi->sched_lock);
3397 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3398 * @pi: port information structure
3399 * @agg_id: aggregator ID
3400 * @tc: traffic class
3401 * @rl_type: min or max
3402 * @bw: bandwidth in Kbps
3404 * This function applies BW limit to aggregator scheduling node based on TC
3408 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3409 enum ice_rl_type rl_type, u32 bw)
3411 enum ice_status status;
3413 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3416 ice_acquire_lock(&pi->sched_lock);
3417 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3418 ice_release_lock(&pi->sched_lock);
3424 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3425 * @pi: port information structure
3426 * @agg_id: aggregator ID
3427 * @tc: traffic class
3428 * @rl_type: min or max
3430 * This function applies default BW limit to aggregator scheduling node based
3431 * on TC information.
3434 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3435 enum ice_rl_type rl_type)
3437 enum ice_status status;
3439 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3443 ice_acquire_lock(&pi->sched_lock);
3444 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3446 ice_release_lock(&pi->sched_lock);
3452 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3453 * @pi: port information structure
3454 * @vsi_handle: software VSI handle
3455 * @bw: bandwidth in Kbps
3457 * This function Configures shared rate limiter(SRL) of all VSI type nodes
3458 * across all traffic classes for VSI matching handle.
3461 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
3463 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
3467 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3468 * @pi: port information structure
3469 * @vsi_handle: software VSI handle
3471 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3472 * across all traffic classes for VSI matching handle.
3475 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3477 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3482 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3483 * @pi: port information structure
3484 * @agg_id: aggregator ID
3485 * @bw: bandwidth in Kbps
3487 * This function configures the shared rate limiter(SRL) of all aggregator type
3488 * nodes across all traffic classes for aggregator matching agg_id.
3491 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
3493 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
3497 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3498 * @pi: port information structure
3499 * @agg_id: aggregator ID
3501 * This function removes the shared rate limiter(SRL) of all aggregator type
3502 * nodes across all traffic classes for aggregator matching agg_id.
3505 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3507 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
3511 * ice_config_vsi_queue_priority - config VSI queue priority of node
3512 * @pi: port information structure
3513 * @num_qs: number of VSI queues
3514 * @q_ids: queue IDs array
3515 * @q_prio: queue priority array
3517 * This function configures the queue node priority (Sibling Priority) of the
3518 * passed in VSI's queue(s) for a given traffic class (TC).
3521 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3524 enum ice_status status = ICE_ERR_PARAM;
3527 ice_acquire_lock(&pi->sched_lock);
3529 for (i = 0; i < num_qs; i++) {
3530 struct ice_sched_node *node;
3532 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3533 if (!node || node->info.data.elem_type !=
3534 ICE_AQC_ELEM_TYPE_LEAF) {
3535 status = ICE_ERR_PARAM;
3538 /* Configure Priority */
3539 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3544 ice_release_lock(&pi->sched_lock);
3549 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3550 * @pi: port information structure
3551 * @agg_id: Aggregator ID
3552 * @num_vsis: number of VSI(s)
3553 * @vsi_handle_arr: array of software VSI handles
3554 * @node_prio: pointer to node priority
3555 * @tc: traffic class
3557 * This function configures the node priority (Sibling Priority) of the
3558 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3561 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3562 u16 num_vsis, u16 *vsi_handle_arr,
3563 u8 *node_prio, u8 tc)
3565 struct ice_sched_agg_vsi_info *agg_vsi_info;
3566 struct ice_sched_node *tc_node, *agg_node;
3567 enum ice_status status = ICE_ERR_PARAM;
3568 struct ice_sched_agg_info *agg_info;
3569 bool agg_id_present = false;
3570 struct ice_hw *hw = pi->hw;
3573 ice_acquire_lock(&pi->sched_lock);
3574 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3576 if (agg_info->agg_id == agg_id) {
3577 agg_id_present = true;
3580 if (!agg_id_present)
3581 goto exit_agg_priority_per_tc;
3583 tc_node = ice_sched_get_tc_node(pi, tc);
3585 goto exit_agg_priority_per_tc;
3587 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3589 goto exit_agg_priority_per_tc;
3591 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3592 goto exit_agg_priority_per_tc;
3594 for (i = 0; i < num_vsis; i++) {
3595 struct ice_sched_node *vsi_node;
3596 bool vsi_handle_valid = false;
3599 status = ICE_ERR_PARAM;
3600 vsi_handle = vsi_handle_arr[i];
3601 if (!ice_is_vsi_valid(hw, vsi_handle))
3602 goto exit_agg_priority_per_tc;
3603 /* Verify child nodes before applying settings */
3604 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3605 ice_sched_agg_vsi_info, list_entry)
3606 if (agg_vsi_info->vsi_handle == vsi_handle) {
3607 /* cppcheck-suppress unreadVariable */
3608 vsi_handle_valid = true;
3612 if (!vsi_handle_valid)
3613 goto exit_agg_priority_per_tc;
3615 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3617 goto exit_agg_priority_per_tc;
3619 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3620 /* Configure Priority */
3621 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3625 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3632 exit_agg_priority_per_tc:
3633 ice_release_lock(&pi->sched_lock);
3638 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3639 * @pi: port information structure
3640 * @vsi_handle: software VSI handle
3641 * @ena_tcmap: enabled TC map
3642 * @rl_type: Rate limit type CIR/EIR
3643 * @bw_alloc: Array of BW alloc
3645 * This function configures the BW allocation of the passed in VSI's
3646 * node(s) for enabled traffic class.
3649 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3650 enum ice_rl_type rl_type, u8 *bw_alloc)
3652 enum ice_status status = ICE_SUCCESS;
3655 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3656 return ICE_ERR_PARAM;
3658 ice_acquire_lock(&pi->sched_lock);
3660 /* Return success if no nodes are present across TC */
3661 ice_for_each_traffic_class(tc) {
3662 struct ice_sched_node *tc_node, *vsi_node;
3664 if (!ice_is_tc_ena(ena_tcmap, tc))
3667 tc_node = ice_sched_get_tc_node(pi, tc);
3671 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3675 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3679 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3680 rl_type, bw_alloc[tc]);
3685 ice_release_lock(&pi->sched_lock);
3690 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3691 * @pi: port information structure
3692 * @agg_id: aggregator ID
3693 * @ena_tcmap: enabled TC map
3694 * @rl_type: rate limit type CIR/EIR
3695 * @bw_alloc: array of BW alloc
3697 * This function configures the BW allocation of passed in aggregator for
3698 * enabled traffic class(s).
3701 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3702 enum ice_rl_type rl_type, u8 *bw_alloc)
3704 struct ice_sched_agg_info *agg_info;
3705 bool agg_id_present = false;
3706 enum ice_status status = ICE_SUCCESS;
3707 struct ice_hw *hw = pi->hw;
3710 ice_acquire_lock(&pi->sched_lock);
3711 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3713 if (agg_info->agg_id == agg_id) {
3714 agg_id_present = true;
3717 if (!agg_id_present) {
3718 status = ICE_ERR_PARAM;
3719 goto exit_cfg_agg_bw_alloc;
3722 /* Return success if no nodes are present across TC */
3723 ice_for_each_traffic_class(tc) {
3724 struct ice_sched_node *tc_node, *agg_node;
3726 if (!ice_is_tc_ena(ena_tcmap, tc))
3729 tc_node = ice_sched_get_tc_node(pi, tc);
3733 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3737 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3741 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3747 exit_cfg_agg_bw_alloc:
3748 ice_release_lock(&pi->sched_lock);
3753 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3754 * @hw: pointer to the HW struct
3755 * @bw: bandwidth in Kbps
3757 * This function calculates the wakeup parameter of RL profile.
3759 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3761 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3765 /* Get the wakeup integer value */
3766 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3767 wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
3768 if (wakeup_int > 63) {
3769 wakeup = (u16)((1 << 15) | wakeup_int);
3771 /* Calculate fraction value up to 4 decimals
3772 * Convert Integer value to a constant multiplier
3774 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3775 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3776 hw->psm_clk_freq, bytes_per_sec);
3778 /* Get Fraction value */
3779 wakeup_f = wakeup_a - wakeup_b;
3781 /* Round up the Fractional value via Ceil(Fractional value) */
3782 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3785 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3786 ICE_RL_PROF_MULTIPLIER);
3787 wakeup |= (u16)(wakeup_int << 9);
3788 wakeup |= (u16)(0x1ff & wakeup_f_int);
3795 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3796 * @hw: pointer to the HW struct
3797 * @bw: bandwidth in Kbps
3798 * @profile: profile parameters to return
3800 * This function converts the BW to profile structure format.
3802 static enum ice_status
3803 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3804 struct ice_aqc_rl_profile_elem *profile)
3806 enum ice_status status = ICE_ERR_PARAM;
3807 s64 bytes_per_sec, ts_rate, mv_tmp;
3813 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3814 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3817 /* Bytes per second from Kbps */
3818 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3820 /* encode is 6 bits but really useful are 5 bits */
3821 for (i = 0; i < 64; i++) {
3822 u64 pow_result = BIT_ULL(i);
3824 ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
3825 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3829 /* Multiplier value */
3830 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3833 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3834 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3836 /* First multiplier value greater than the given
3839 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3848 wm = ice_sched_calc_wakeup(hw, bw);
3849 profile->rl_multiply = CPU_TO_LE16(mv);
3850 profile->wake_up_calc = CPU_TO_LE16(wm);
3851 profile->rl_encode = CPU_TO_LE16(encode);
3852 status = ICE_SUCCESS;
3854 status = ICE_ERR_DOES_NOT_EXIST;
3861 * ice_sched_add_rl_profile - add RL profile
3862 * @pi: port information structure
3863 * @rl_type: type of rate limit BW - min, max, or shared
3864 * @bw: bandwidth in Kbps - Kilo bits per sec
3865 * @layer_num: specifies in which layer to create profile
3867 * This function first checks the existing list for corresponding BW
3868 * parameter. If it exists, it returns the associated profile otherwise
3869 * it creates a new rate limit profile for requested BW, and adds it to
3870 * the HW DB and local list. It returns the new profile or null on error.
3871 * The caller needs to hold the scheduler lock.
3873 static struct ice_aqc_rl_profile_info *
3874 ice_sched_add_rl_profile(struct ice_port_info *pi,
3875 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3877 struct ice_aqc_rl_profile_info *rl_prof_elem;
3878 u16 profiles_added = 0, num_profiles = 1;
3879 struct ice_aqc_rl_profile_elem *buf;
3880 enum ice_status status;
3884 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3888 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3891 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3894 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3903 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3904 ice_aqc_rl_profile_info, list_entry)
3905 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
3906 profile_type && rl_prof_elem->bw == bw)
3907 /* Return existing profile ID info */
3908 return rl_prof_elem;
3910 /* Create new profile ID */
3911 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3912 ice_malloc(hw, sizeof(*rl_prof_elem));
3917 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
3918 if (status != ICE_SUCCESS)
3919 goto exit_add_rl_prof;
3921 rl_prof_elem->bw = bw;
3922 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3923 rl_prof_elem->profile.level = layer_num + 1;
3924 rl_prof_elem->profile.flags = profile_type;
3925 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3927 /* Create new entry in HW DB */
3928 buf = &rl_prof_elem->profile;
3929 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3930 &profiles_added, NULL);
3931 if (status || profiles_added != num_profiles)
3932 goto exit_add_rl_prof;
3934 /* Good entry - add in the list */
3935 rl_prof_elem->prof_id_ref = 0;
3936 LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3937 return rl_prof_elem;
3940 ice_free(hw, rl_prof_elem);
3945 * ice_sched_cfg_node_bw_lmt - configure node sched params
3946 * @hw: pointer to the HW struct
3947 * @node: sched node to configure
3948 * @rl_type: rate limit type CIR, EIR, or shared
3949 * @rl_prof_id: rate limit profile ID
3951 * This function configures node element's BW limit.
3953 static enum ice_status
3954 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3955 enum ice_rl_type rl_type, u16 rl_prof_id)
3957 struct ice_aqc_txsched_elem_data buf;
3958 struct ice_aqc_txsched_elem *data;
3964 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3965 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3968 /* EIR BW and Shared BW profiles are mutually exclusive and
3969 * hence only one of them may be set for any given element
3971 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3973 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3974 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3977 /* Check for removing shared BW */
3978 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3979 /* remove shared profile */
3980 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3981 data->srl_id = 0; /* clear SRL field */
3983 /* enable back EIR to default profile */
3984 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3985 data->eir_bw.bw_profile_idx =
3986 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3989 /* EIR BW and Shared BW profiles are mutually exclusive and
3990 * hence only one of them may be set for any given element
3992 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3993 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3994 ICE_SCHED_DFLT_RL_PROF_ID))
3996 /* EIR BW is set to default, disable it */
3997 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3998 /* Okay to enable shared BW now */
3999 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
4000 data->srl_id = CPU_TO_LE16(rl_prof_id);
4003 /* Unknown rate limit type */
4004 return ICE_ERR_PARAM;
4007 /* Configure element */
4008 return ice_sched_update_elem(hw, node, &buf);
4012 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
4014 * @rl_type: rate limit type
4016 * If existing profile matches, it returns the corresponding rate
4017 * limit profile ID, otherwise it returns an invalid ID as error.
4020 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
4021 enum ice_rl_type rl_type)
4023 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
4024 struct ice_aqc_txsched_elem *data;
4026 data = &node->info.data;
4029 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
4030 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
4033 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
4034 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
4037 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
4038 rl_prof_id = LE16_TO_CPU(data->srl_id);
4048 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
4049 * @pi: port information structure
4050 * @rl_type: type of rate limit BW - min, max, or shared
4051 * @layer_index: layer index
4053 * This function returns requested profile creation layer.
4056 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
4059 struct ice_hw *hw = pi->hw;
4061 if (layer_index >= hw->num_tx_sched_layers)
4062 return ICE_SCHED_INVAL_LAYER_NUM;
4065 if (hw->layer_info[layer_index].max_cir_rl_profiles)
4069 if (hw->layer_info[layer_index].max_eir_rl_profiles)
4073 /* if current layer doesn't support SRL profile creation
4074 * then try a layer up or down.
4076 if (hw->layer_info[layer_index].max_srl_profiles)
4078 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4079 hw->layer_info[layer_index + 1].max_srl_profiles)
4080 return layer_index + 1;
4081 else if (layer_index > 0 &&
4082 hw->layer_info[layer_index - 1].max_srl_profiles)
4083 return layer_index - 1;
4088 return ICE_SCHED_INVAL_LAYER_NUM;
4092 * ice_sched_get_srl_node - get shared rate limit node
4094 * @srl_layer: shared rate limit layer
4096 * This function returns SRL node to be used for shared rate limit purpose.
4097 * The caller needs to hold scheduler lock.
4099 static struct ice_sched_node *
4100 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4102 if (srl_layer > node->tx_sched_layer)
4103 return node->children[0];
4104 else if (srl_layer < node->tx_sched_layer)
4105 /* Node can't be created without a parent. It will always
4106 * have a valid parent except root node.
4108 return node->parent;
4114 * ice_sched_rm_rl_profile - remove RL profile ID
4115 * @pi: port information structure
4116 * @layer_num: layer number where profiles are saved
4117 * @profile_type: profile type like EIR, CIR, or SRL
4118 * @profile_id: profile ID to remove
4120 * This function removes rate limit profile from layer 'layer_num' of type
4121 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4124 static enum ice_status
4125 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
4128 struct ice_aqc_rl_profile_info *rl_prof_elem;
4129 enum ice_status status = ICE_SUCCESS;
4131 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4132 return ICE_ERR_PARAM;
4133 /* Check the existing list for RL profile */
4134 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
4135 ice_aqc_rl_profile_info, list_entry)
4136 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
4138 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4140 if (rl_prof_elem->prof_id_ref)
4141 rl_prof_elem->prof_id_ref--;
4143 /* Remove old profile ID from database */
4144 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
4145 if (status && status != ICE_ERR_IN_USE)
4146 ice_debug(pi->hw, ICE_DBG_SCHED,
4147 "Remove rl profile failed\n");
4150 if (status == ICE_ERR_IN_USE)
4151 status = ICE_SUCCESS;
4156 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4157 * @pi: port information structure
4158 * @node: pointer to node structure
4159 * @rl_type: rate limit type min, max, or shared
4160 * @layer_num: layer number where RL profiles are saved
4162 * This function configures node element's BW rate limit profile ID of
4163 * type CIR, EIR, or SRL to default. This function needs to be called
4164 * with the scheduler lock held.
4166 static enum ice_status
4167 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4168 struct ice_sched_node *node,
4169 enum ice_rl_type rl_type, u8 layer_num)
4171 enum ice_status status;
4180 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4181 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4184 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4185 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4188 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4189 /* No SRL is configured for default case */
4190 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4193 return ICE_ERR_PARAM;
4195 /* Save existing RL prof ID for later clean up */
4196 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4197 /* Configure BW scheduling parameters */
4198 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4202 /* Remove stale RL profile ID */
4203 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4204 old_id == ICE_SCHED_INVAL_PROF_ID)
4207 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
4211 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
4212 * @pi: port information structure
4213 * @node: pointer to node structure
4214 * @layer_num: layer number where rate limit profiles are saved
4215 * @rl_type: rate limit type min, max, or shared
4216 * @bw: bandwidth value
4218 * This function prepares node element's bandwidth to SRL or EIR exclusively.
4219 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
4220 * them may be set for any given element. This function needs to be called
4221 * with the scheduler lock held.
4223 static enum ice_status
4224 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
4225 struct ice_sched_node *node,
4226 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
4228 if (rl_type == ICE_SHARED_BW) {
4229 /* SRL node passed in this case, it may be different node */
4230 if (bw == ICE_SCHED_DFLT_BW)
4231 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
4232 * enables EIR to default. EIR is not set in this
4233 * case, so no additional action is required.
4237 /* SRL being configured, set EIR to default here.
4238 * ice_sched_cfg_node_bw_lmt() disables EIR when it
4241 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
4243 } else if (rl_type == ICE_MAX_BW &&
4244 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
4245 /* Remove Shared profile. Set default shared BW call
4246 * removes shared profile for a node.
4248 return ice_sched_set_node_bw_dflt(pi, node,
4256 * ice_sched_set_node_bw - set node's bandwidth
4257 * @pi: port information structure
4259 * @rl_type: rate limit type min, max, or shared
4260 * @bw: bandwidth in Kbps - Kilo bits per sec
4261 * @layer_num: layer number
4263 * This function adds new profile corresponding to requested BW, configures
4264 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4265 * ID from local database. The caller needs to hold scheduler lock.
4267 static enum ice_status
4268 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4269 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4271 struct ice_aqc_rl_profile_info *rl_prof_info;
4272 enum ice_status status = ICE_ERR_PARAM;
4273 struct ice_hw *hw = pi->hw;
4274 u16 old_id, rl_prof_id;
4276 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
4280 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4282 /* Save existing RL prof ID for later clean up */
4283 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4284 /* Configure BW scheduling parameters */
4285 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4289 /* New changes has been applied */
4290 /* Increment the profile ID reference count */
4291 rl_prof_info->prof_id_ref++;
4293 /* Check for old ID removal */
4294 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4295 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4298 return ice_sched_rm_rl_profile(pi, layer_num,
4299 rl_prof_info->profile.flags &
4300 ICE_AQC_RL_PROFILE_TYPE_M, old_id);
4304 * ice_sched_set_node_bw_lmt - set node's BW limit
4305 * @pi: port information structure
4307 * @rl_type: rate limit type min, max, or shared
4308 * @bw: bandwidth in Kbps - Kilo bits per sec
4310 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4311 * EIR, or SRL. The caller needs to hold scheduler lock.
4313 static enum ice_status
4314 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4315 enum ice_rl_type rl_type, u32 bw)
4317 struct ice_sched_node *cfg_node = node;
4318 enum ice_status status;
4324 return ICE_ERR_PARAM;
4326 /* Remove unused RL profile IDs from HW and SW DB */
4327 ice_sched_rm_unused_rl_prof(pi);
4328 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4329 node->tx_sched_layer);
4330 if (layer_num >= hw->num_tx_sched_layers)
4331 return ICE_ERR_PARAM;
4333 if (rl_type == ICE_SHARED_BW) {
4334 /* SRL node may be different */
4335 cfg_node = ice_sched_get_srl_node(node, layer_num);
4339 /* EIR BW and Shared BW profiles are mutually exclusive and
4340 * hence only one of them may be set for any given element
4342 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
4346 if (bw == ICE_SCHED_DFLT_BW)
4347 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
4349 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
4353 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4354 * @pi: port information structure
4355 * @node: pointer to node structure
4356 * @rl_type: rate limit type min, max, or shared
4358 * This function configures node element's BW rate limit profile ID of
4359 * type CIR, EIR, or SRL to default. This function needs to be called
4360 * with the scheduler lock held.
4362 static enum ice_status
4363 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4364 struct ice_sched_node *node,
4365 enum ice_rl_type rl_type)
4367 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4372 * ice_sched_validate_srl_node - Check node for SRL applicability
4373 * @node: sched node to configure
4374 * @sel_layer: selected SRL layer
4376 * This function checks if the SRL can be applied to a selceted layer node on
4377 * behalf of the requested node (first argument). This function needs to be
4378 * called with scheduler lock held.
4380 static enum ice_status
4381 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4383 /* SRL profiles are not available on all layers. Check if the
4384 * SRL profile can be applied to a node above or below the
4385 * requested node. SRL configuration is possible only if the
4386 * selected layer's node has single child.
4388 if (sel_layer == node->tx_sched_layer ||
4389 ((sel_layer == node->tx_sched_layer + 1) &&
4390 node->num_children == 1) ||
4391 ((sel_layer == node->tx_sched_layer - 1) &&
4392 (node->parent && node->parent->num_children == 1)))
4399 * ice_sched_save_q_bw - save queue node's BW information
4400 * @q_ctx: queue context structure
4401 * @rl_type: rate limit type min, max, or shared
4402 * @bw: bandwidth in Kbps - Kilo bits per sec
4404 * Save BW information of queue type node for post replay use.
4406 static enum ice_status
4407 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4411 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4414 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4417 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4420 return ICE_ERR_PARAM;
4426 * ice_sched_set_q_bw_lmt - sets queue BW limit
4427 * @pi: port information structure
4428 * @vsi_handle: sw VSI handle
4429 * @tc: traffic class
4430 * @q_handle: software queue handle
4431 * @rl_type: min, max, or shared
4432 * @bw: bandwidth in Kbps
4434 * This function sets BW limit of queue scheduling node.
4436 static enum ice_status
4437 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4438 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4440 enum ice_status status = ICE_ERR_PARAM;
4441 struct ice_sched_node *node;
4442 struct ice_q_ctx *q_ctx;
4444 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4445 return ICE_ERR_PARAM;
4446 ice_acquire_lock(&pi->sched_lock);
4447 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4450 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4452 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4456 /* Return error if it is not a leaf node */
4457 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4460 /* SRL bandwidth layer selection */
4461 if (rl_type == ICE_SHARED_BW) {
4462 u8 sel_layer; /* selected layer */
4464 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4465 node->tx_sched_layer);
4466 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4467 status = ICE_ERR_PARAM;
4470 status = ice_sched_validate_srl_node(node, sel_layer);
4475 if (bw == ICE_SCHED_DFLT_BW)
4476 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4478 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4481 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4484 ice_release_lock(&pi->sched_lock);
4489 * ice_cfg_q_bw_lmt - configure queue BW limit
4490 * @pi: port information structure
4491 * @vsi_handle: sw VSI handle
4492 * @tc: traffic class
4493 * @q_handle: software queue handle
4494 * @rl_type: min, max, or shared
4495 * @bw: bandwidth in Kbps
4497 * This function configures BW limit of queue scheduling node.
4500 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4501 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4503 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4508 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4509 * @pi: port information structure
4510 * @vsi_handle: sw VSI handle
4511 * @tc: traffic class
4512 * @q_handle: software queue handle
4513 * @rl_type: min, max, or shared
4515 * This function configures BW default limit of queue scheduling node.
4518 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4519 u16 q_handle, enum ice_rl_type rl_type)
4521 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4526 * ice_sched_save_tc_node_bw - save TC node BW limit
4527 * @pi: port information structure
4529 * @rl_type: min or max
4530 * @bw: bandwidth in Kbps
4532 * This function saves the modified values of bandwidth settings for later
4533 * replay purpose (restore) after reset.
4535 static enum ice_status
4536 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4537 enum ice_rl_type rl_type, u32 bw)
4539 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4540 return ICE_ERR_PARAM;
4543 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4546 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4549 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4552 return ICE_ERR_PARAM;
4558 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4559 * @pi: port information structure
4561 * @rl_type: min or max
4562 * @bw: bandwidth in Kbps
4564 * This function configures bandwidth limit of TC node.
4566 static enum ice_status
4567 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4568 enum ice_rl_type rl_type, u32 bw)
4570 enum ice_status status = ICE_ERR_PARAM;
4571 struct ice_sched_node *tc_node;
4573 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4575 ice_acquire_lock(&pi->sched_lock);
4576 tc_node = ice_sched_get_tc_node(pi, tc);
4578 goto exit_set_tc_node_bw;
4579 if (bw == ICE_SCHED_DFLT_BW)
4580 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4582 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4584 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4586 exit_set_tc_node_bw:
4587 ice_release_lock(&pi->sched_lock);
4592 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4593 * @pi: port information structure
4595 * @rl_type: min or max
4596 * @bw: bandwidth in Kbps
4598 * This function configures BW limit of TC node.
4599 * Note: The minimum guaranteed reservation is done via DCBX.
4602 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4603 enum ice_rl_type rl_type, u32 bw)
4605 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4609 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4610 * @pi: port information structure
4612 * @rl_type: min or max
4614 * This function configures BW default limit of TC node.
4617 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4618 enum ice_rl_type rl_type)
4620 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4624 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4625 * @pi: port information structure
4626 * @tc: traffic class
4627 * @rl_type: rate limit type min or max
4628 * @bw_alloc: Bandwidth allocation information
4630 * Save BW alloc information of VSI type node for post replay use.
4632 static enum ice_status
4633 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4634 enum ice_rl_type rl_type, u16 bw_alloc)
4636 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4637 return ICE_ERR_PARAM;
4640 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4644 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4648 return ICE_ERR_PARAM;
4654 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4655 * @pi: port information structure
4657 * @rl_type: min or max
4658 * @bw_alloc: bandwidth alloc
4660 * This function configures bandwidth alloc of TC node, also saves the
4661 * changed settings for replay purpose, and return success if it succeeds
4662 * in modifying bandwidth alloc setting.
4664 static enum ice_status
4665 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4666 enum ice_rl_type rl_type, u8 bw_alloc)
4668 enum ice_status status = ICE_ERR_PARAM;
4669 struct ice_sched_node *tc_node;
4671 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4673 ice_acquire_lock(&pi->sched_lock);
4674 tc_node = ice_sched_get_tc_node(pi, tc);
4676 goto exit_set_tc_node_bw_alloc;
4677 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4680 goto exit_set_tc_node_bw_alloc;
4681 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4683 exit_set_tc_node_bw_alloc:
4684 ice_release_lock(&pi->sched_lock);
4689 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4690 * @pi: port information structure
4692 * @rl_type: min or max
4693 * @bw_alloc: bandwidth alloc
4695 * This function configures BW limit of TC node.
4696 * Note: The minimum guaranteed reservation is done via DCBX.
4699 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4700 enum ice_rl_type rl_type, u8 bw_alloc)
4702 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4706 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4707 * @pi: port information structure
4708 * @vsi_handle: software VSI handle
4710 * This function retrieves the aggregator ID based on VSI ID and TC,
4711 * and sets node's BW limit to default. This function needs to be
4712 * called with the scheduler lock held.
4715 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4717 struct ice_vsi_ctx *vsi_ctx;
4718 enum ice_status status = ICE_SUCCESS;
4721 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4722 return ICE_ERR_PARAM;
4723 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4725 return ICE_ERR_PARAM;
4727 ice_for_each_traffic_class(tc) {
4728 struct ice_sched_node *node;
4730 node = vsi_ctx->sched.ag_node[tc];
4734 /* Set min profile to default */
4735 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4739 /* Set max profile to default */
4740 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4744 /* Remove shared profile, if there is one */
4745 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4755 * ice_sched_get_node_by_id_type - get node from ID type
4756 * @pi: port information structure
4758 * @agg_type: type of aggregator
4759 * @tc: traffic class
4761 * This function returns node identified by ID of type aggregator, and
4762 * based on traffic class (TC). This function needs to be called with
4763 * the scheduler lock held.
4765 static struct ice_sched_node *
4766 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4767 enum ice_agg_type agg_type, u8 tc)
4769 struct ice_sched_node *node = NULL;
4770 struct ice_sched_node *child_node;
4773 case ICE_AGG_TYPE_VSI: {
4774 struct ice_vsi_ctx *vsi_ctx;
4775 u16 vsi_handle = (u16)id;
4777 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4779 /* Get sched_vsi_info */
4780 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4783 node = vsi_ctx->sched.vsi_node[tc];
4787 case ICE_AGG_TYPE_AGG: {
4788 struct ice_sched_node *tc_node;
4790 tc_node = ice_sched_get_tc_node(pi, tc);
4792 node = ice_sched_get_agg_node(pi, tc_node, id);
4796 case ICE_AGG_TYPE_Q:
4797 /* The current implementation allows single queue to modify */
4798 node = ice_sched_get_node(pi, id);
4801 case ICE_AGG_TYPE_QG:
4802 /* The current implementation allows single qg to modify */
4803 child_node = ice_sched_get_node(pi, id);
4806 node = child_node->parent;
4817 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4818 * @pi: port information structure
4819 * @id: ID (software VSI handle or AGG ID)
4820 * @agg_type: aggregator type (VSI or AGG type node)
4821 * @tc: traffic class
4822 * @rl_type: min or max
4823 * @bw: bandwidth in Kbps
4825 * This function sets BW limit of VSI or Aggregator scheduling node
4826 * based on TC information from passed in argument BW.
4829 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4830 enum ice_agg_type agg_type, u8 tc,
4831 enum ice_rl_type rl_type, u32 bw)
4833 enum ice_status status = ICE_ERR_PARAM;
4834 struct ice_sched_node *node;
4839 if (rl_type == ICE_UNKNOWN_BW)
4842 ice_acquire_lock(&pi->sched_lock);
4843 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4845 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4846 goto exit_set_node_bw_lmt_per_tc;
4848 if (bw == ICE_SCHED_DFLT_BW)
4849 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4851 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4853 exit_set_node_bw_lmt_per_tc:
4854 ice_release_lock(&pi->sched_lock);
4859 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4860 * @pi: port information structure
4861 * @vsi_handle: software VSI handle
4863 * This function validates SRL node of the VSI node if available SRL layer is
4864 * different than the VSI node layer on all TC(s).This function needs to be
4865 * called with scheduler lock held.
4867 static enum ice_status
4868 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4870 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4873 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4874 return ICE_ERR_PARAM;
4876 /* Return success if no nodes are present across TC */
4877 ice_for_each_traffic_class(tc) {
4878 struct ice_sched_node *tc_node, *vsi_node;
4879 enum ice_rl_type rl_type = ICE_SHARED_BW;
4880 enum ice_status status;
4882 tc_node = ice_sched_get_tc_node(pi, tc);
4886 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4890 /* SRL bandwidth layer selection */
4891 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4892 u8 node_layer = vsi_node->tx_sched_layer;
4895 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4897 if (layer_num >= pi->hw->num_tx_sched_layers)
4898 return ICE_ERR_PARAM;
4899 sel_layer = layer_num;
4902 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4910 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4911 * @pi: port information structure
4912 * @vsi_handle: software VSI handle
4913 * @bw: bandwidth in Kbps
4915 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4916 * across all traffic classes for VSI matching handle. When BW value of
4917 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4920 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4923 enum ice_status status = ICE_SUCCESS;
4927 return ICE_ERR_PARAM;
4929 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4930 return ICE_ERR_PARAM;
4932 ice_acquire_lock(&pi->sched_lock);
4933 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4935 goto exit_set_vsi_bw_shared_lmt;
4936 /* Return success if no nodes are present across TC */
4937 ice_for_each_traffic_class(tc) {
4938 struct ice_sched_node *tc_node, *vsi_node;
4939 enum ice_rl_type rl_type = ICE_SHARED_BW;
4941 tc_node = ice_sched_get_tc_node(pi, tc);
4945 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4949 if (bw == ICE_SCHED_DFLT_BW)
4950 /* It removes existing SRL from the node */
4951 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4954 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4958 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4963 exit_set_vsi_bw_shared_lmt:
4964 ice_release_lock(&pi->sched_lock);
4969 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4970 * @pi: port information structure
4971 * @agg_id: aggregator ID
4973 * This function validates SRL node of the AGG node if available SRL layer is
4974 * different than the AGG node layer on all TC(s).This function needs to be
4975 * called with scheduler lock held.
4977 static enum ice_status
4978 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4980 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4981 struct ice_sched_agg_info *agg_info;
4982 bool agg_id_present = false;
4983 enum ice_status status = ICE_SUCCESS;
4986 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4988 if (agg_info->agg_id == agg_id) {
4989 agg_id_present = true;
4992 if (!agg_id_present)
4993 return ICE_ERR_PARAM;
4994 /* Return success if no nodes are present across TC */
4995 ice_for_each_traffic_class(tc) {
4996 struct ice_sched_node *tc_node, *agg_node;
4997 enum ice_rl_type rl_type = ICE_SHARED_BW;
4999 tc_node = ice_sched_get_tc_node(pi, tc);
5003 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5006 /* SRL bandwidth layer selection */
5007 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
5008 u8 node_layer = agg_node->tx_sched_layer;
5011 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
5013 if (layer_num >= pi->hw->num_tx_sched_layers)
5014 return ICE_ERR_PARAM;
5015 sel_layer = layer_num;
5018 status = ice_sched_validate_srl_node(agg_node, sel_layer);
5026 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
5027 * @pi: port information structure
5028 * @agg_id: aggregator ID
5029 * @bw: bandwidth in Kbps
5031 * This function configures the shared rate limiter(SRL) of all aggregator type
5032 * nodes across all traffic classes for aggregator matching agg_id. When
5033 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
5037 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
5039 struct ice_sched_agg_info *agg_info;
5040 struct ice_sched_agg_info *tmp;
5041 bool agg_id_present = false;
5042 enum ice_status status = ICE_SUCCESS;
5046 return ICE_ERR_PARAM;
5048 ice_acquire_lock(&pi->sched_lock);
5049 status = ice_sched_validate_agg_srl_node(pi, agg_id);
5051 goto exit_agg_bw_shared_lmt;
5053 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
5054 ice_sched_agg_info, list_entry)
5055 if (agg_info->agg_id == agg_id) {
5056 agg_id_present = true;
5060 if (!agg_id_present) {
5061 status = ICE_ERR_PARAM;
5062 goto exit_agg_bw_shared_lmt;
5065 /* Return success if no nodes are present across TC */
5066 ice_for_each_traffic_class(tc) {
5067 enum ice_rl_type rl_type = ICE_SHARED_BW;
5068 struct ice_sched_node *tc_node, *agg_node;
5070 tc_node = ice_sched_get_tc_node(pi, tc);
5074 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5078 if (bw == ICE_SCHED_DFLT_BW)
5079 /* It removes existing SRL from the node */
5080 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
5083 status = ice_sched_set_node_bw_lmt(pi, agg_node,
5087 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5092 exit_agg_bw_shared_lmt:
5093 ice_release_lock(&pi->sched_lock);
5098 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5099 * @pi: port information structure
5100 * @node: sched node to configure
5101 * @priority: sibling priority
5103 * This function configures node element's sibling priority only. This
5104 * function needs to be called with scheduler lock held.
5107 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5108 struct ice_sched_node *node, u8 priority)
5110 struct ice_aqc_txsched_elem_data buf;
5111 struct ice_aqc_txsched_elem *data;
5112 struct ice_hw *hw = pi->hw;
5113 enum ice_status status;
5116 return ICE_ERR_PARAM;
5119 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5120 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5121 ICE_AQC_ELEM_GENERIC_PRIO_M;
5122 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5123 data->generic |= priority;
5125 /* Configure element */
5126 status = ice_sched_update_elem(hw, node, &buf);
5131 * ice_cfg_rl_burst_size - Set burst size value
5132 * @hw: pointer to the HW struct
5133 * @bytes: burst size in bytes
5135 * This function configures/set the burst size to requested new value. The new
5136 * burst size value is used for future rate limit calls. It doesn't change the
5137 * existing or previously created RL profiles.
5139 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5141 u16 burst_size_to_prog;
5143 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5144 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5145 return ICE_ERR_PARAM;
5146 if (ice_round_to_num(bytes, 64) <=
5147 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5148 /* 64 byte granularity case */
5149 /* Disable MSB granularity bit */
5150 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5151 /* round number to nearest 64 byte granularity */
5152 bytes = ice_round_to_num(bytes, 64);
5153 /* The value is in 64 byte chunks */
5154 burst_size_to_prog |= (u16)(bytes / 64);
5156 /* k bytes granularity case */
5157 /* Enable MSB granularity bit */
5158 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5159 /* round number to nearest 1024 granularity */
5160 bytes = ice_round_to_num(bytes, 1024);
5161 /* check rounding doesn't go beyond allowed */
5162 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5163 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5164 /* The value is in k bytes */
5165 burst_size_to_prog |= (u16)(bytes / 1024);
5167 hw->max_burst_size = burst_size_to_prog;
5172 * ice_sched_replay_node_prio - re-configure node priority
5173 * @hw: pointer to the HW struct
5174 * @node: sched node to configure
5175 * @priority: priority value
5177 * This function configures node element's priority value. It
5178 * needs to be called with scheduler lock held.
5180 static enum ice_status
5181 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5184 struct ice_aqc_txsched_elem_data buf;
5185 struct ice_aqc_txsched_elem *data;
5186 enum ice_status status;
5190 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5191 data->generic = priority;
5193 /* Configure element */
5194 status = ice_sched_update_elem(hw, node, &buf);
5199 * ice_sched_replay_node_bw - replay node(s) BW
5200 * @hw: pointer to the HW struct
5201 * @node: sched node to configure
5202 * @bw_t_info: BW type information
5204 * This function restores node's BW from bw_t_info. The caller needs
5205 * to hold the scheduler lock.
5207 static enum ice_status
5208 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5209 struct ice_bw_type_info *bw_t_info)
5211 struct ice_port_info *pi = hw->port_info;
5212 enum ice_status status = ICE_ERR_PARAM;
5217 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5219 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5220 status = ice_sched_replay_node_prio(hw, node,
5221 bw_t_info->generic);
5225 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5226 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5227 bw_t_info->cir_bw.bw);
5231 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5232 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5233 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5238 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5239 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5240 bw_t_info->eir_bw.bw);
5244 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5245 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5246 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5251 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5252 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5253 bw_t_info->shared_bw);
5258 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5259 * @hw: pointer to the HW struct
5260 * @agg_info: aggregator data structure
5262 * This function re-creates aggregator type nodes. The caller needs to hold
5263 * the scheduler lock.
5265 static enum ice_status
5266 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5268 struct ice_sched_node *tc_node, *agg_node;
5269 enum ice_status status = ICE_SUCCESS;
5273 return ICE_ERR_PARAM;
5274 ice_for_each_traffic_class(tc) {
5275 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5278 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5280 status = ICE_ERR_PARAM;
5283 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5286 status = ICE_ERR_PARAM;
5289 status = ice_sched_replay_node_bw(hw, agg_node,
5290 &agg_info->bw_t_info[tc]);
5298 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5299 * @pi: port info struct
5300 * @tc_bitmap: 8 bits TC bitmap to check
5301 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5303 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5304 * may be missing, it returns enabled TCs. This function needs to be called with
5305 * scheduler lock held.
5308 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5309 ice_bitmap_t *ena_tc_bitmap)
5313 /* Some TC(s) may be missing after reset, adjust for replay */
5314 ice_for_each_traffic_class(tc)
5315 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5316 (ice_sched_get_tc_node(pi, tc)))
5317 ice_set_bit(tc, ena_tc_bitmap);
5321 * ice_sched_replay_agg - recreate aggregator node(s)
5322 * @hw: pointer to the HW struct
5324 * This function recreate aggregator type nodes which are not replayed earlier.
5325 * It also replay aggregator BW information. These aggregator nodes are not
5326 * associated with VSI type node yet.
5328 void ice_sched_replay_agg(struct ice_hw *hw)
5330 struct ice_port_info *pi = hw->port_info;
5331 struct ice_sched_agg_info *agg_info;
5333 ice_acquire_lock(&pi->sched_lock);
5334 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5336 /* replay aggregator (re-create aggregator node) */
5337 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5338 agg_info->replay_tc_bitmap,
5339 ICE_MAX_TRAFFIC_CLASS)) {
5340 ice_declare_bitmap(replay_bitmap,
5341 ICE_MAX_TRAFFIC_CLASS);
5342 enum ice_status status;
5344 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5345 ice_sched_get_ena_tc_bitmap(pi,
5346 agg_info->replay_tc_bitmap,
5348 status = ice_sched_cfg_agg(hw->port_info,
5353 ice_info(hw, "Replay agg id[%d] failed\n",
5355 /* Move on to next one */
5358 /* Replay aggregator node BW (restore aggregator BW) */
5359 status = ice_sched_replay_agg_bw(hw, agg_info);
5361 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5364 ice_release_lock(&pi->sched_lock);
5368 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5369 * @hw: pointer to the HW struct
5371 * This function initialize aggregator(s) TC bitmap to zero. A required
5372 * preinit step for replaying aggregators.
5374 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5376 struct ice_port_info *pi = hw->port_info;
5377 struct ice_sched_agg_info *agg_info;
5379 ice_acquire_lock(&pi->sched_lock);
5380 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5382 struct ice_sched_agg_vsi_info *agg_vsi_info;
5384 agg_info->tc_bitmap[0] = 0;
5385 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5386 ice_sched_agg_vsi_info, list_entry)
5387 agg_vsi_info->tc_bitmap[0] = 0;
5389 ice_release_lock(&pi->sched_lock);
5393 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5394 * @pi: port information structure
5396 * This function replay TC nodes.
5398 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5400 enum ice_status status = ICE_SUCCESS;
5404 return ICE_ERR_PARAM;
5405 ice_acquire_lock(&pi->sched_lock);
5406 ice_for_each_traffic_class(tc) {
5407 struct ice_sched_node *tc_node;
5409 tc_node = ice_sched_get_tc_node(pi, tc);
5411 continue; /* TC not present */
5412 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5413 &pi->tc_node_bw_t_info[tc]);
5417 ice_release_lock(&pi->sched_lock);
5422 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5423 * @hw: pointer to the HW struct
5424 * @vsi_handle: software VSI handle
5425 * @tc_bitmap: 8 bits TC bitmap
5427 * This function replays VSI type nodes bandwidth. This function needs to be
5428 * called with scheduler lock held.
5430 static enum ice_status
5431 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5432 ice_bitmap_t *tc_bitmap)
5434 struct ice_sched_node *vsi_node, *tc_node;
5435 struct ice_port_info *pi = hw->port_info;
5436 struct ice_bw_type_info *bw_t_info;
5437 struct ice_vsi_ctx *vsi_ctx;
5438 enum ice_status status = ICE_SUCCESS;
5441 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5443 return ICE_ERR_PARAM;
5444 ice_for_each_traffic_class(tc) {
5445 if (!ice_is_tc_ena(*tc_bitmap, tc))
5447 tc_node = ice_sched_get_tc_node(pi, tc);
5450 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5453 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5454 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5462 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5463 * @hw: pointer to the HW struct
5464 * @vsi_handle: software VSI handle
5466 * This function replays aggregator node, VSI to aggregator type nodes, and
5467 * their node bandwidth information. This function needs to be called with
5468 * scheduler lock held.
5470 static enum ice_status
5471 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5473 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5474 struct ice_sched_agg_vsi_info *agg_vsi_info;
5475 struct ice_port_info *pi = hw->port_info;
5476 struct ice_sched_agg_info *agg_info;
5477 enum ice_status status;
5479 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5480 if (!ice_is_vsi_valid(hw, vsi_handle))
5481 return ICE_ERR_PARAM;
5482 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5484 return ICE_SUCCESS; /* Not present in list - default Agg case */
5485 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5487 return ICE_SUCCESS; /* Not present in list - default Agg case */
5488 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5490 /* Replay aggregator node associated to vsi_handle */
5491 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5492 ICE_AGG_TYPE_AGG, replay_bitmap);
5495 /* Replay aggregator node BW (restore aggregator BW) */
5496 status = ice_sched_replay_agg_bw(hw, agg_info);
5500 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5501 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5503 /* Move this VSI (vsi_handle) to above aggregator */
5504 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5508 /* Replay VSI BW (restore VSI BW) */
5509 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5510 agg_vsi_info->tc_bitmap);
5514 * ice_replay_vsi_agg - replay VSI to aggregator node
5515 * @hw: pointer to the HW struct
5516 * @vsi_handle: software VSI handle
5518 * This function replays association of VSI to aggregator type nodes, and
5519 * node bandwidth information.
5521 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5523 struct ice_port_info *pi = hw->port_info;
5524 enum ice_status status;
5526 ice_acquire_lock(&pi->sched_lock);
5527 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5528 ice_release_lock(&pi->sched_lock);
5533 * ice_sched_replay_q_bw - replay queue type node BW
5534 * @pi: port information structure
5535 * @q_ctx: queue context structure
5537 * This function replays queue type node bandwidth. This function needs to be
5538 * called with scheduler lock held.
5541 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5543 struct ice_sched_node *q_node;
5545 /* Following also checks the presence of node in tree */
5546 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5548 return ICE_ERR_PARAM;
5549 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);