1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2020 Intel Corporation
8 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
9 * @pi: port information structure
10 * @info: Scheduler element information from firmware
12 * This function inserts the root node of the scheduling tree topology
15 static enum ice_status
16 ice_sched_add_root_node(struct ice_port_info *pi,
17 struct ice_aqc_txsched_elem_data *info)
19 struct ice_sched_node *root;
27 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
29 return ICE_ERR_NO_MEMORY;
31 /* coverity[suspicious_sizeof] */
32 root->children = (struct ice_sched_node **)
33 ice_calloc(hw, hw->max_children[0], sizeof(*root));
34 if (!root->children) {
36 return ICE_ERR_NO_MEMORY;
39 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
45 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
46 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
47 * @teid: node TEID to search
49 * This function searches for a node matching the TEID in the scheduling tree
50 * from the SW DB. The search is recursive and is restricted by the number of
51 * layers it has searched through; stopping at the max supported layer.
53 * This function needs to be called when holding the port_info->sched_lock
55 struct ice_sched_node *
56 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
60 /* The TEID is same as that of the start_node */
61 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
64 /* The node has no children or is at the max layer */
65 if (!start_node->num_children ||
66 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
67 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
70 /* Check if TEID matches to any of the children nodes */
71 for (i = 0; i < start_node->num_children; i++)
72 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
73 return start_node->children[i];
75 /* Search within each child's sub-tree */
76 for (i = 0; i < start_node->num_children; i++) {
77 struct ice_sched_node *tmp;
79 tmp = ice_sched_find_node_by_teid(start_node->children[i],
89 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
90 * @hw: pointer to the HW struct
91 * @cmd_opc: cmd opcode
92 * @elems_req: number of elements to request
93 * @buf: pointer to buffer
94 * @buf_size: buffer size in bytes
95 * @elems_resp: returns total number of elements response
96 * @cd: pointer to command details structure or NULL
98 * This function sends a scheduling elements cmd (cmd_opc)
100 static enum ice_status
101 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
102 u16 elems_req, void *buf, u16 buf_size,
103 u16 *elems_resp, struct ice_sq_cd *cd)
105 struct ice_aqc_sched_elem_cmd *cmd;
106 struct ice_aq_desc desc;
107 enum ice_status status;
109 cmd = &desc.params.sched_elem_cmd;
110 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
111 cmd->num_elem_req = CPU_TO_LE16(elems_req);
112 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
113 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
114 if (!status && elems_resp)
115 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
121 * ice_aq_query_sched_elems - query scheduler elements
122 * @hw: pointer to the HW struct
123 * @elems_req: number of elements to query
124 * @buf: pointer to buffer
125 * @buf_size: buffer size in bytes
126 * @elems_ret: returns total number of elements returned
127 * @cd: pointer to command details structure or NULL
129 * Query scheduling elements (0x0404)
132 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
133 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
134 u16 *elems_ret, struct ice_sq_cd *cd)
136 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
137 elems_req, (void *)buf, buf_size,
142 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
143 * @pi: port information structure
144 * @layer: Scheduler layer of the node
145 * @info: Scheduler element information from firmware
147 * This function inserts a scheduler node to the SW DB.
150 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
151 struct ice_aqc_txsched_elem_data *info)
153 struct ice_aqc_txsched_elem_data elem;
154 struct ice_sched_node *parent;
155 struct ice_sched_node *node;
156 enum ice_status status;
160 return ICE_ERR_PARAM;
164 /* A valid parent node should be there */
165 parent = ice_sched_find_node_by_teid(pi->root,
166 LE32_TO_CPU(info->parent_teid));
168 ice_debug(hw, ICE_DBG_SCHED,
169 "Parent Node not found for parent_teid=0x%x\n",
170 LE32_TO_CPU(info->parent_teid));
171 return ICE_ERR_PARAM;
174 /* query the current node information from FW before adding it
177 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
180 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
182 return ICE_ERR_NO_MEMORY;
183 if (hw->max_children[layer]) {
184 /* coverity[suspicious_sizeof] */
185 node->children = (struct ice_sched_node **)
186 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
187 if (!node->children) {
189 return ICE_ERR_NO_MEMORY;
194 node->parent = parent;
195 node->tx_sched_layer = layer;
196 parent->children[parent->num_children++] = node;
202 * ice_aq_delete_sched_elems - delete scheduler elements
203 * @hw: pointer to the HW struct
204 * @grps_req: number of groups to delete
205 * @buf: pointer to buffer
206 * @buf_size: buffer size in bytes
207 * @grps_del: returns total number of elements deleted
208 * @cd: pointer to command details structure or NULL
210 * Delete scheduling elements (0x040F)
212 static enum ice_status
213 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
214 struct ice_aqc_delete_elem *buf, u16 buf_size,
215 u16 *grps_del, struct ice_sq_cd *cd)
217 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
218 grps_req, (void *)buf, buf_size,
223 * ice_sched_remove_elems - remove nodes from HW
224 * @hw: pointer to the HW struct
225 * @parent: pointer to the parent node
226 * @num_nodes: number of nodes
227 * @node_teids: array of node teids to be deleted
229 * This function remove nodes from HW
231 static enum ice_status
232 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
233 u16 num_nodes, u32 *node_teids)
235 struct ice_aqc_delete_elem *buf;
236 u16 i, num_groups_removed = 0;
237 enum ice_status status;
240 buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
241 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
243 return ICE_ERR_NO_MEMORY;
245 buf->hdr.parent_teid = parent->info.node_teid;
246 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
247 for (i = 0; i < num_nodes; i++)
248 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
250 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
251 &num_groups_removed, NULL);
252 if (status != ICE_SUCCESS || num_groups_removed != 1)
253 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
254 hw->adminq.sq_last_status);
261 * ice_sched_get_first_node - get the first node of the given layer
262 * @pi: port information structure
263 * @parent: pointer the base node of the subtree
264 * @layer: layer number
266 * This function retrieves the first node of the given layer from the subtree
268 static struct ice_sched_node *
269 ice_sched_get_first_node(struct ice_port_info *pi,
270 struct ice_sched_node *parent, u8 layer)
272 return pi->sib_head[parent->tc_num][layer];
276 * ice_sched_get_tc_node - get pointer to TC node
277 * @pi: port information structure
280 * This function returns the TC node pointer
282 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
286 if (!pi || !pi->root)
288 for (i = 0; i < pi->root->num_children; i++)
289 if (pi->root->children[i]->tc_num == tc)
290 return pi->root->children[i];
295 * ice_free_sched_node - Free a Tx scheduler node from SW DB
296 * @pi: port information structure
297 * @node: pointer to the ice_sched_node struct
299 * This function frees up a node from SW DB as well as from HW
301 * This function needs to be called with the port_info->sched_lock held
303 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
305 struct ice_sched_node *parent;
306 struct ice_hw *hw = pi->hw;
309 /* Free the children before freeing up the parent node
310 * The parent array is updated below and that shifts the nodes
311 * in the array. So always pick the first child if num children > 0
313 while (node->num_children)
314 ice_free_sched_node(pi, node->children[0]);
316 /* Leaf, TC and root nodes can't be deleted by SW */
317 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
321 u32 teid = LE32_TO_CPU(node->info.node_teid);
323 ice_sched_remove_elems(hw, node->parent, 1, &teid);
325 parent = node->parent;
326 /* root has no parent */
328 struct ice_sched_node *p;
330 /* update the parent */
331 for (i = 0; i < parent->num_children; i++)
332 if (parent->children[i] == node) {
333 for (j = i + 1; j < parent->num_children; j++)
334 parent->children[j - 1] =
336 parent->num_children--;
340 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
342 if (p->sibling == node) {
343 p->sibling = node->sibling;
349 /* update the sibling head if head is getting removed */
350 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
351 pi->sib_head[node->tc_num][node->tx_sched_layer] =
355 /* leaf nodes have no children */
357 ice_free(hw, node->children);
362 * ice_aq_get_dflt_topo - gets default scheduler topology
363 * @hw: pointer to the HW struct
364 * @lport: logical port number
365 * @buf: pointer to buffer
366 * @buf_size: buffer size in bytes
367 * @num_branches: returns total number of queue to port branches
368 * @cd: pointer to command details structure or NULL
370 * Get default scheduler topology (0x400)
372 static enum ice_status
373 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
374 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
375 u8 *num_branches, struct ice_sq_cd *cd)
377 struct ice_aqc_get_topo *cmd;
378 struct ice_aq_desc desc;
379 enum ice_status status;
381 cmd = &desc.params.get_topo;
382 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
383 cmd->port_num = lport;
384 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
385 if (!status && num_branches)
386 *num_branches = cmd->num_branches;
392 * ice_aq_add_sched_elems - adds scheduling element
393 * @hw: pointer to the HW struct
394 * @grps_req: the number of groups that are requested to be added
395 * @buf: pointer to buffer
396 * @buf_size: buffer size in bytes
397 * @grps_added: returns total number of groups added
398 * @cd: pointer to command details structure or NULL
400 * Add scheduling elements (0x0401)
402 static enum ice_status
403 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
404 struct ice_aqc_add_elem *buf, u16 buf_size,
405 u16 *grps_added, struct ice_sq_cd *cd)
407 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
408 grps_req, (void *)buf, buf_size,
413 * ice_aq_cfg_sched_elems - configures scheduler elements
414 * @hw: pointer to the HW struct
415 * @elems_req: number of elements to configure
416 * @buf: pointer to buffer
417 * @buf_size: buffer size in bytes
418 * @elems_cfgd: returns total number of elements configured
419 * @cd: pointer to command details structure or NULL
421 * Configure scheduling elements (0x0403)
423 static enum ice_status
424 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
425 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
426 u16 *elems_cfgd, struct ice_sq_cd *cd)
428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
429 elems_req, (void *)buf, buf_size,
434 * ice_aq_move_sched_elems - move scheduler elements
435 * @hw: pointer to the HW struct
436 * @grps_req: number of groups to move
437 * @buf: pointer to buffer
438 * @buf_size: buffer size in bytes
439 * @grps_movd: returns total number of groups moved
440 * @cd: pointer to command details structure or NULL
442 * Move scheduling elements (0x0408)
444 static enum ice_status
445 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
446 struct ice_aqc_move_elem *buf, u16 buf_size,
447 u16 *grps_movd, struct ice_sq_cd *cd)
449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
450 grps_req, (void *)buf, buf_size,
455 * ice_aq_suspend_sched_elems - suspend scheduler elements
456 * @hw: pointer to the HW struct
457 * @elems_req: number of elements to suspend
458 * @buf: pointer to buffer
459 * @buf_size: buffer size in bytes
460 * @elems_ret: returns total number of elements suspended
461 * @cd: pointer to command details structure or NULL
463 * Suspend scheduling elements (0x0409)
465 static enum ice_status
466 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
467 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
469 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
470 elems_req, (void *)buf, buf_size,
475 * ice_aq_resume_sched_elems - resume scheduler elements
476 * @hw: pointer to the HW struct
477 * @elems_req: number of elements to resume
478 * @buf: pointer to buffer
479 * @buf_size: buffer size in bytes
480 * @elems_ret: returns total number of elements resumed
481 * @cd: pointer to command details structure or NULL
483 * resume scheduling elements (0x040A)
485 static enum ice_status
486 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
487 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
489 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
490 elems_req, (void *)buf, buf_size,
495 * ice_aq_query_sched_res - query scheduler resource
496 * @hw: pointer to the HW struct
497 * @buf_size: buffer size in bytes
498 * @buf: pointer to buffer
499 * @cd: pointer to command details structure or NULL
501 * Query scheduler resource allocation (0x0412)
503 static enum ice_status
504 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
505 struct ice_aqc_query_txsched_res_resp *buf,
506 struct ice_sq_cd *cd)
508 struct ice_aq_desc desc;
510 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
511 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
515 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
516 * @hw: pointer to the HW struct
517 * @num_nodes: number of nodes
518 * @node_teids: array of node teids to be suspended or resumed
519 * @suspend: true means suspend / false means resume
521 * This function suspends or resumes HW nodes
523 static enum ice_status
524 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
527 u16 i, buf_size, num_elem_ret = 0;
528 enum ice_status status;
531 buf_size = sizeof(*buf) * num_nodes;
532 buf = (__le32 *)ice_malloc(hw, buf_size);
534 return ICE_ERR_NO_MEMORY;
536 for (i = 0; i < num_nodes; i++)
537 buf[i] = CPU_TO_LE32(node_teids[i]);
540 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
541 buf_size, &num_elem_ret,
544 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
545 buf_size, &num_elem_ret,
547 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
548 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
555 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
556 * @hw: pointer to the HW struct
557 * @vsi_handle: VSI handle
559 * @new_numqs: number of queues
561 static enum ice_status
562 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
564 struct ice_vsi_ctx *vsi_ctx;
565 struct ice_q_ctx *q_ctx;
567 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
569 return ICE_ERR_PARAM;
570 /* allocate LAN queue contexts */
571 if (!vsi_ctx->lan_q_ctx[tc]) {
572 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
573 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
574 if (!vsi_ctx->lan_q_ctx[tc])
575 return ICE_ERR_NO_MEMORY;
576 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
579 /* num queues are increased, update the queue contexts */
580 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
581 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
583 q_ctx = (struct ice_q_ctx *)
584 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
586 return ICE_ERR_NO_MEMORY;
587 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
588 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
589 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
590 vsi_ctx->lan_q_ctx[tc] = q_ctx;
591 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
597 * ice_aq_rl_profile - performs a rate limiting task
598 * @hw: pointer to the HW struct
599 * @opcode: opcode for add, query, or remove profile(s)
600 * @num_profiles: the number of profiles
601 * @buf: pointer to buffer
602 * @buf_size: buffer size in bytes
603 * @num_processed: number of processed add or remove profile(s) to return
604 * @cd: pointer to command details structure
606 * RL profile function to add, query, or remove profile(s)
608 static enum ice_status
609 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
610 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
611 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
613 struct ice_aqc_rl_profile *cmd;
614 struct ice_aq_desc desc;
615 enum ice_status status;
617 cmd = &desc.params.rl_profile;
619 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
620 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
621 cmd->num_profiles = CPU_TO_LE16(num_profiles);
622 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
623 if (!status && num_processed)
624 *num_processed = LE16_TO_CPU(cmd->num_processed);
629 * ice_aq_add_rl_profile - adds rate limiting profile(s)
630 * @hw: pointer to the HW struct
631 * @num_profiles: the number of profile(s) to be add
632 * @buf: pointer to buffer
633 * @buf_size: buffer size in bytes
634 * @num_profiles_added: total number of profiles added to return
635 * @cd: pointer to command details structure
637 * Add RL profile (0x0410)
639 static enum ice_status
640 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
641 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
642 u16 *num_profiles_added, struct ice_sq_cd *cd)
644 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
645 buf, buf_size, num_profiles_added, cd);
649 * ice_aq_query_rl_profile - query rate limiting profile(s)
650 * @hw: pointer to the HW struct
651 * @num_profiles: the number of profile(s) to query
652 * @buf: pointer to buffer
653 * @buf_size: buffer size in bytes
654 * @cd: pointer to command details structure
656 * Query RL profile (0x0411)
659 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
660 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
661 struct ice_sq_cd *cd)
663 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
664 num_profiles, buf, buf_size, NULL, cd);
668 * ice_aq_remove_rl_profile - removes RL profile(s)
669 * @hw: pointer to the HW struct
670 * @num_profiles: the number of profile(s) to remove
671 * @buf: pointer to buffer
672 * @buf_size: buffer size in bytes
673 * @num_profiles_removed: total number of profiles removed to return
674 * @cd: pointer to command details structure or NULL
676 * Remove RL profile (0x0415)
678 static enum ice_status
679 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
680 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
681 u16 *num_profiles_removed, struct ice_sq_cd *cd)
683 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
684 num_profiles, buf, buf_size,
685 num_profiles_removed, cd);
689 * ice_sched_del_rl_profile - remove RL profile
690 * @hw: pointer to the HW struct
691 * @rl_info: rate limit profile information
693 * If the profile ID is not referenced anymore, it removes profile ID with
694 * its associated parameters from HW DB,and locally. The caller needs to
695 * hold scheduler lock.
697 static enum ice_status
698 ice_sched_del_rl_profile(struct ice_hw *hw,
699 struct ice_aqc_rl_profile_info *rl_info)
701 struct ice_aqc_rl_profile_elem *buf;
702 u16 num_profiles_removed;
703 enum ice_status status;
704 u16 num_profiles = 1;
706 if (rl_info->prof_id_ref != 0)
707 return ICE_ERR_IN_USE;
709 /* Safe to remove profile ID */
710 buf = &rl_info->profile;
711 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
712 &num_profiles_removed, NULL);
713 if (status || num_profiles_removed != num_profiles)
716 /* Delete stale entry now */
717 LIST_DEL(&rl_info->list_entry);
718 ice_free(hw, rl_info);
723 * ice_sched_clear_rl_prof - clears RL prof entries
724 * @pi: port information structure
726 * This function removes all RL profile from HW as well as from SW DB.
728 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
732 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
733 struct ice_aqc_rl_profile_info *rl_prof_elem;
734 struct ice_aqc_rl_profile_info *rl_prof_tmp;
736 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
737 &pi->rl_prof_list[ln],
738 ice_aqc_rl_profile_info, list_entry) {
739 struct ice_hw *hw = pi->hw;
740 enum ice_status status;
742 rl_prof_elem->prof_id_ref = 0;
743 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
745 ice_debug(hw, ICE_DBG_SCHED,
746 "Remove rl profile failed\n");
747 /* On error, free mem required */
748 LIST_DEL(&rl_prof_elem->list_entry);
749 ice_free(hw, rl_prof_elem);
756 * ice_sched_clear_agg - clears the aggregator related information
757 * @hw: pointer to the hardware structure
759 * This function removes aggregator list and free up aggregator related memory
760 * previously allocated.
762 void ice_sched_clear_agg(struct ice_hw *hw)
764 struct ice_sched_agg_info *agg_info;
765 struct ice_sched_agg_info *atmp;
767 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
770 struct ice_sched_agg_vsi_info *agg_vsi_info;
771 struct ice_sched_agg_vsi_info *vtmp;
773 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
774 &agg_info->agg_vsi_list,
775 ice_sched_agg_vsi_info, list_entry) {
776 LIST_DEL(&agg_vsi_info->list_entry);
777 ice_free(hw, agg_vsi_info);
779 LIST_DEL(&agg_info->list_entry);
780 ice_free(hw, agg_info);
785 * ice_sched_clear_tx_topo - clears the scheduler tree nodes
786 * @pi: port information structure
788 * This function removes all the nodes from HW as well as from SW DB.
790 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
794 /* remove RL profiles related lists */
795 ice_sched_clear_rl_prof(pi);
797 ice_free_sched_node(pi, pi->root);
803 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
804 * @pi: port information structure
806 * Cleanup scheduling elements from SW DB
808 void ice_sched_clear_port(struct ice_port_info *pi)
810 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
813 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
814 ice_acquire_lock(&pi->sched_lock);
815 ice_sched_clear_tx_topo(pi);
816 ice_release_lock(&pi->sched_lock);
817 ice_destroy_lock(&pi->sched_lock);
821 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
822 * @hw: pointer to the HW struct
824 * Cleanup scheduling elements from SW DB for all the ports
826 void ice_sched_cleanup_all(struct ice_hw *hw)
831 if (hw->layer_info) {
832 ice_free(hw, hw->layer_info);
833 hw->layer_info = NULL;
836 ice_sched_clear_port(hw->port_info);
838 hw->num_tx_sched_layers = 0;
839 hw->num_tx_sched_phys_layers = 0;
840 hw->flattened_layers = 0;
845 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
846 * @hw: pointer to the HW struct
847 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
848 * @buf: pointer to buffer
849 * @buf_size: buffer size in bytes
850 * @cd: pointer to command details structure or NULL
852 * Configure L2 Node CGD (0x0414)
855 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
856 struct ice_aqc_cfg_l2_node_cgd_elem *buf,
857 u16 buf_size, struct ice_sq_cd *cd)
859 struct ice_aqc_cfg_l2_node_cgd *cmd;
860 struct ice_aq_desc desc;
862 cmd = &desc.params.cfg_l2_node_cgd;
863 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
864 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
866 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
867 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
871 * ice_sched_add_elems - add nodes to HW and SW DB
872 * @pi: port information structure
873 * @tc_node: pointer to the branch node
874 * @parent: pointer to the parent node
875 * @layer: layer number to add nodes
876 * @num_nodes: number of nodes
877 * @num_nodes_added: pointer to num nodes added
878 * @first_node_teid: if new nodes are added then return the TEID of first node
880 * This function add nodes to HW as well as to SW DB for a given layer
882 static enum ice_status
883 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
884 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
885 u16 *num_nodes_added, u32 *first_node_teid)
887 struct ice_sched_node *prev, *new_node;
888 struct ice_aqc_add_elem *buf;
889 u16 i, num_groups_added = 0;
890 enum ice_status status = ICE_SUCCESS;
891 struct ice_hw *hw = pi->hw;
895 buf_size = ice_struct_size(buf, generic, num_nodes - 1);
896 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
898 return ICE_ERR_NO_MEMORY;
900 buf->hdr.parent_teid = parent->info.node_teid;
901 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
902 for (i = 0; i < num_nodes; i++) {
903 buf->generic[i].parent_teid = parent->info.node_teid;
904 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
905 buf->generic[i].data.valid_sections =
906 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
907 ICE_AQC_ELEM_VALID_EIR;
908 buf->generic[i].data.generic = 0;
909 buf->generic[i].data.cir_bw.bw_profile_idx =
910 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
911 buf->generic[i].data.cir_bw.bw_alloc =
912 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
913 buf->generic[i].data.eir_bw.bw_profile_idx =
914 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
915 buf->generic[i].data.eir_bw.bw_alloc =
916 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
919 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
920 &num_groups_added, NULL);
921 if (status != ICE_SUCCESS || num_groups_added != 1) {
922 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
923 hw->adminq.sq_last_status);
928 *num_nodes_added = num_nodes;
929 /* add nodes to the SW DB */
930 for (i = 0; i < num_nodes; i++) {
931 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
932 if (status != ICE_SUCCESS) {
933 ice_debug(hw, ICE_DBG_SCHED,
934 "add nodes in SW DB failed status =%d\n",
939 teid = LE32_TO_CPU(buf->generic[i].node_teid);
940 new_node = ice_sched_find_node_by_teid(parent, teid);
942 ice_debug(hw, ICE_DBG_SCHED,
943 "Node is missing for teid =%d\n", teid);
947 new_node->sibling = NULL;
948 new_node->tc_num = tc_node->tc_num;
950 /* add it to previous node sibling pointer */
951 /* Note: siblings are not linked across branches */
952 prev = ice_sched_get_first_node(pi, tc_node, layer);
953 if (prev && prev != new_node) {
954 while (prev->sibling)
955 prev = prev->sibling;
956 prev->sibling = new_node;
959 /* initialize the sibling head */
960 if (!pi->sib_head[tc_node->tc_num][layer])
961 pi->sib_head[tc_node->tc_num][layer] = new_node;
964 *first_node_teid = teid;
972 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
973 * @pi: port information structure
974 * @tc_node: pointer to TC node
975 * @parent: pointer to parent node
976 * @layer: layer number to add nodes
977 * @num_nodes: number of nodes to be added
978 * @first_node_teid: pointer to the first node TEID
979 * @num_nodes_added: pointer to number of nodes added
981 * This function add nodes to a given layer.
983 static enum ice_status
984 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
985 struct ice_sched_node *tc_node,
986 struct ice_sched_node *parent, u8 layer,
987 u16 num_nodes, u32 *first_node_teid,
988 u16 *num_nodes_added)
990 u32 *first_teid_ptr = first_node_teid;
991 u16 new_num_nodes, max_child_nodes;
992 enum ice_status status = ICE_SUCCESS;
993 struct ice_hw *hw = pi->hw;
997 *num_nodes_added = 0;
1002 if (!parent || layer < hw->sw_entry_point_layer)
1003 return ICE_ERR_PARAM;
1005 /* max children per node per layer */
1006 max_child_nodes = hw->max_children[parent->tx_sched_layer];
1008 /* current number of children + required nodes exceed max children ? */
1009 if ((parent->num_children + num_nodes) > max_child_nodes) {
1010 /* Fail if the parent is a TC node */
1011 if (parent == tc_node)
1014 /* utilize all the spaces if the parent is not full */
1015 if (parent->num_children < max_child_nodes) {
1016 new_num_nodes = max_child_nodes - parent->num_children;
1017 /* this recursion is intentional, and wouldn't
1018 * go more than 2 calls
1020 status = ice_sched_add_nodes_to_layer(pi, tc_node,
1025 if (status != ICE_SUCCESS)
1028 *num_nodes_added += num_added;
1030 /* Don't modify the first node TEID memory if the first node was
1031 * added already in the above call. Instead send some temp
1032 * memory for all other recursive calls.
1035 first_teid_ptr = &temp;
1037 new_num_nodes = num_nodes - num_added;
1039 /* This parent is full, try the next sibling */
1040 parent = parent->sibling;
1042 /* this recursion is intentional, for 1024 queues
1043 * per VSI, it goes max of 16 iterations.
1044 * 1024 / 8 = 128 layer 8 nodes
1045 * 128 /8 = 16 (add 8 nodes per iteration)
1047 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1048 layer, new_num_nodes,
1051 *num_nodes_added += num_added;
1055 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1056 num_nodes_added, first_node_teid);
1061 * ice_sched_get_qgrp_layer - get the current queue group layer number
1062 * @hw: pointer to the HW struct
1064 * This function returns the current queue group layer number
1066 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1068 /* It's always total layers - 1, the array is 0 relative so -2 */
1069 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1073 * ice_sched_get_vsi_layer - get the current VSI layer number
1074 * @hw: pointer to the HW struct
1076 * This function returns the current VSI layer number
1078 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1080 /* Num Layers VSI layer
1083 * 5 or less sw_entry_point_layer
1085 /* calculate the VSI layer based on number of layers. */
1086 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1087 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1089 if (layer > hw->sw_entry_point_layer)
1092 return hw->sw_entry_point_layer;
1096 * ice_sched_get_agg_layer - get the current aggregator layer number
1097 * @hw: pointer to the HW struct
1099 * This function returns the current aggregator layer number
1101 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1103 /* Num Layers aggregator layer
1105 * 7 or less sw_entry_point_layer
1107 /* calculate the aggregator layer based on number of layers. */
1108 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1109 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1111 if (layer > hw->sw_entry_point_layer)
1114 return hw->sw_entry_point_layer;
1118 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1119 * @pi: port information structure
1121 * This function removes the leaf node that was created by the FW
1122 * during initialization
1124 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1126 struct ice_sched_node *node;
1130 if (!node->num_children)
1132 node = node->children[0];
1134 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1135 u32 teid = LE32_TO_CPU(node->info.node_teid);
1136 enum ice_status status;
1138 /* remove the default leaf node */
1139 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1141 ice_free_sched_node(pi, node);
1146 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1147 * @pi: port information structure
1149 * This function frees all the nodes except root and TC that were created by
1150 * the FW during initialization
1152 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1154 struct ice_sched_node *node;
1156 ice_rm_dflt_leaf_node(pi);
1158 /* remove the default nodes except TC and root nodes */
1161 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1162 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1163 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1164 ice_free_sched_node(pi, node);
1168 if (!node->num_children)
1170 node = node->children[0];
1175 * ice_sched_init_port - Initialize scheduler by querying information from FW
1176 * @pi: port info structure for the tree to cleanup
1178 * This function is the initial call to find the total number of Tx scheduler
1179 * resources, default topology created by firmware and storing the information
1182 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1184 struct ice_aqc_get_topo_elem *buf;
1185 enum ice_status status;
1192 return ICE_ERR_PARAM;
1195 /* Query the Default Topology from FW */
1196 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1197 ICE_AQ_MAX_BUF_LEN);
1199 return ICE_ERR_NO_MEMORY;
1201 /* Query default scheduling tree topology */
1202 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1203 &num_branches, NULL);
1207 /* num_branches should be between 1-8 */
1208 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1209 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1211 status = ICE_ERR_PARAM;
1215 /* get the number of elements on the default/first branch */
1216 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1218 /* num_elems should always be between 1-9 */
1219 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1220 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1222 status = ICE_ERR_PARAM;
1226 /* If the last node is a leaf node then the index of the queue group
1227 * layer is two less than the number of elements.
1229 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1230 ICE_AQC_ELEM_TYPE_LEAF)
1231 pi->last_node_teid =
1232 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1234 pi->last_node_teid =
1235 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1237 /* Insert the Tx Sched root node */
1238 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1242 /* Parse the default tree and cache the information */
1243 for (i = 0; i < num_branches; i++) {
1244 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1246 /* Skip root element as already inserted */
1247 for (j = 1; j < num_elems; j++) {
1248 /* update the sw entry point */
1249 if (buf[0].generic[j].data.elem_type ==
1250 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1251 hw->sw_entry_point_layer = j;
1253 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1259 /* Remove the default nodes. */
1261 ice_sched_rm_dflt_nodes(pi);
1263 /* initialize the port for handling the scheduler tree */
1264 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1265 ice_init_lock(&pi->sched_lock);
1266 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1267 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1270 if (status && pi->root) {
1271 ice_free_sched_node(pi, pi->root);
1280 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1281 * @pi: port information structure
1282 * @teid: Scheduler node TEID
1284 * This function retrieves the ice_sched_node struct for given TEID from
1285 * the SW DB and returns it to the caller.
1287 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1289 struct ice_sched_node *node;
1294 /* Find the node starting from root */
1295 ice_acquire_lock(&pi->sched_lock);
1296 node = ice_sched_find_node_by_teid(pi->root, teid);
1297 ice_release_lock(&pi->sched_lock);
1300 ice_debug(pi->hw, ICE_DBG_SCHED,
1301 "Node not found for teid=0x%x\n", teid);
1307 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1308 * @hw: pointer to the HW struct
1310 * query FW for allocated scheduler resources and store in HW struct
1312 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1314 struct ice_aqc_query_txsched_res_resp *buf;
1315 enum ice_status status = ICE_SUCCESS;
1322 buf = (struct ice_aqc_query_txsched_res_resp *)
1323 ice_malloc(hw, sizeof(*buf));
1325 return ICE_ERR_NO_MEMORY;
1327 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1329 goto sched_query_out;
1331 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1332 hw->num_tx_sched_phys_layers =
1333 LE16_TO_CPU(buf->sched_props.phys_levels);
1334 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1335 hw->max_cgds = buf->sched_props.max_pf_cgds;
1337 /* max sibling group size of current layer refers to the max children
1338 * of the below layer node.
1339 * layer 1 node max children will be layer 2 max sibling group size
1340 * layer 2 node max children will be layer 3 max sibling group size
1341 * and so on. This array will be populated from root (index 0) to
1342 * qgroup layer 7. Leaf node has no children.
1344 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1345 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1346 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1349 hw->layer_info = (struct ice_aqc_layer_props *)
1350 ice_memdup(hw, buf->layer_props,
1351 (hw->num_tx_sched_layers *
1352 sizeof(*hw->layer_info)),
1354 if (!hw->layer_info) {
1355 status = ICE_ERR_NO_MEMORY;
1356 goto sched_query_out;
1365 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1366 * @hw: pointer to the HW struct
1368 * Determine the PSM clock frequency and store in HW struct
1370 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1374 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1375 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1376 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1378 #define PSM_CLK_SRC_367_MHZ 0x0
1379 #define PSM_CLK_SRC_416_MHZ 0x1
1380 #define PSM_CLK_SRC_446_MHZ 0x2
1381 #define PSM_CLK_SRC_390_MHZ 0x3
1384 case PSM_CLK_SRC_367_MHZ:
1385 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1387 case PSM_CLK_SRC_416_MHZ:
1388 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1390 case PSM_CLK_SRC_446_MHZ:
1391 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1393 case PSM_CLK_SRC_390_MHZ:
1394 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1397 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1399 /* fall back to a safe default */
1400 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1405 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1406 * @hw: pointer to the HW struct
1407 * @base: pointer to the base node
1408 * @node: pointer to the node to search
1410 * This function checks whether a given node is part of the base node
1414 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1415 struct ice_sched_node *node)
1419 for (i = 0; i < base->num_children; i++) {
1420 struct ice_sched_node *child = base->children[i];
1425 if (child->tx_sched_layer > node->tx_sched_layer)
1428 /* this recursion is intentional, and wouldn't
1429 * go more than 8 calls
1431 if (ice_sched_find_node_in_subtree(hw, child, node))
1438 * ice_sched_get_free_qgrp - Scan all Q group siblings and find a free node
1439 * @pi: port information structure
1440 * @vsi_node: software VSI handle
1441 * @qgrp_node: first Q group node identified for scanning
1442 * @owner: LAN or RDMA
1444 * This function retrieves a free LAN or RDMA Q group node by scanning
1445 * qgrp_node and its siblings for the Q group with the fewest number
1446 * of queues currently assigned.
1448 static struct ice_sched_node *
1449 ice_sched_get_free_qgrp(struct ice_port_info *pi,
1450 struct ice_sched_node *vsi_node,
1451 struct ice_sched_node *qgrp_node, u8 owner)
1453 struct ice_sched_node *min_qgrp;
1458 min_children = qgrp_node->num_children;
1461 min_qgrp = qgrp_node;
1462 /* scan all Q groups until find a node which has less than the
1463 * minimum number of children. This way all Q group nodes get
1464 * equal number of shares and active. The bandwidth will be equally
1465 * distributed across all Qs.
1468 /* make sure the qgroup node is part of the VSI subtree */
1469 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1470 if (qgrp_node->num_children < min_children &&
1471 qgrp_node->owner == owner) {
1472 /* replace the new min Q group node */
1473 min_qgrp = qgrp_node;
1474 min_children = min_qgrp->num_children;
1475 /* break if it has no children, */
1479 qgrp_node = qgrp_node->sibling;
1485 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1486 * @pi: port information structure
1487 * @vsi_handle: software VSI handle
1488 * @tc: branch number
1489 * @owner: LAN or RDMA
1491 * This function retrieves a free LAN or RDMA queue group node
1493 struct ice_sched_node *
1494 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1497 struct ice_sched_node *vsi_node, *qgrp_node;
1498 struct ice_vsi_ctx *vsi_ctx;
1502 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1503 max_children = pi->hw->max_children[qgrp_layer];
1505 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1508 vsi_node = vsi_ctx->sched.vsi_node[tc];
1509 /* validate invalid VSI ID */
1513 /* get the first queue group node from VSI sub-tree */
1514 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1516 /* make sure the qgroup node is part of the VSI subtree */
1517 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1518 if (qgrp_node->num_children < max_children &&
1519 qgrp_node->owner == owner)
1521 qgrp_node = qgrp_node->sibling;
1524 /* Select the best queue group */
1525 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
1529 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1530 * @pi: pointer to the port information structure
1531 * @tc_node: pointer to the TC node
1532 * @vsi_handle: software VSI handle
1534 * This function retrieves a VSI node for a given VSI ID from a given
1537 struct ice_sched_node *
1538 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1541 struct ice_sched_node *node;
1544 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1545 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1547 /* Check whether it already exists */
1549 if (node->vsi_handle == vsi_handle)
1551 node = node->sibling;
1558 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1559 * @pi: pointer to the port information structure
1560 * @tc_node: pointer to the TC node
1561 * @agg_id: aggregator ID
1563 * This function retrieves an aggregator node for a given aggregator ID from
1566 static struct ice_sched_node *
1567 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1570 struct ice_sched_node *node;
1571 struct ice_hw *hw = pi->hw;
1576 agg_layer = ice_sched_get_agg_layer(hw);
1577 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1579 /* Check whether it already exists */
1581 if (node->agg_id == agg_id)
1583 node = node->sibling;
1590 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1591 * @hw: pointer to the HW struct
1592 * @node: pointer to the ice_sched_node struct
1594 * This function queries and compares the HW element with SW DB node parameters
1596 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1598 struct ice_aqc_txsched_elem_data buf;
1599 enum ice_status status;
1602 node_teid = LE32_TO_CPU(node->info.node_teid);
1603 status = ice_sched_query_elem(hw, node_teid, &buf);
1604 if (status != ICE_SUCCESS)
1607 if (memcmp(&buf, &node->info, sizeof(buf))) {
1608 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1617 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1618 * @hw: pointer to the HW struct
1619 * @num_qs: number of queues
1620 * @num_nodes: num nodes array
1622 * This function calculates the number of VSI child nodes based on the
1626 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1631 qgl = ice_sched_get_qgrp_layer(hw);
1632 vsil = ice_sched_get_vsi_layer(hw);
1634 /* calculate num nodes from queue group to VSI layer */
1635 for (i = qgl; i > vsil; i--) {
1636 /* round to the next integer if there is a remainder */
1637 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1639 /* need at least one node */
1640 num_nodes[i] = num ? num : 1;
1645 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1646 * @pi: port information structure
1647 * @vsi_handle: software VSI handle
1648 * @tc_node: pointer to the TC node
1649 * @num_nodes: pointer to the num nodes that needs to be added per layer
1650 * @owner: node owner (LAN or RDMA)
1652 * This function adds the VSI child nodes to tree. It gets called for
1653 * LAN and RDMA separately.
1655 static enum ice_status
1656 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1657 struct ice_sched_node *tc_node, u16 *num_nodes,
1660 struct ice_sched_node *parent, *node;
1661 struct ice_hw *hw = pi->hw;
1662 enum ice_status status;
1663 u32 first_node_teid;
1667 qgl = ice_sched_get_qgrp_layer(hw);
1668 vsil = ice_sched_get_vsi_layer(hw);
1669 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1670 for (i = vsil + 1; i <= qgl; i++) {
1674 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1678 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1681 /* The newly added node can be a new parent for the next
1685 parent = ice_sched_find_node_by_teid(tc_node,
1689 node->owner = owner;
1690 node = node->sibling;
1693 parent = parent->children[0];
1701 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1702 * @pi: pointer to the port info structure
1703 * @tc_node: pointer to TC node
1704 * @num_nodes: pointer to num nodes array
1706 * This function calculates the number of supported nodes needed to add this
1707 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1711 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1712 struct ice_sched_node *tc_node, u16 *num_nodes)
1714 struct ice_sched_node *node;
1718 vsil = ice_sched_get_vsi_layer(pi->hw);
1719 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1720 /* Add intermediate nodes if TC has no children and
1721 * need at least one node for VSI
1723 if (!tc_node->num_children || i == vsil) {
1726 /* If intermediate nodes are reached max children
1727 * then add a new one.
1729 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1730 /* scan all the siblings */
1732 if (node->num_children <
1733 pi->hw->max_children[i])
1735 node = node->sibling;
1738 /* tree has one intermediate node to add this new VSI.
1739 * So no need to calculate supported nodes for below
1744 /* all the nodes are full, allocate a new one */
1750 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1751 * @pi: port information structure
1752 * @vsi_handle: software VSI handle
1753 * @tc_node: pointer to TC node
1754 * @num_nodes: pointer to num nodes array
1756 * This function adds the VSI supported nodes into Tx tree including the
1757 * VSI, its parent and intermediate nodes in below layers
1759 static enum ice_status
1760 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1761 struct ice_sched_node *tc_node, u16 *num_nodes)
1763 struct ice_sched_node *parent = tc_node;
1764 enum ice_status status;
1765 u32 first_node_teid;
1770 return ICE_ERR_PARAM;
1772 vsil = ice_sched_get_vsi_layer(pi->hw);
1773 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1774 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1778 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1781 /* The newly added node can be a new parent for the next
1785 parent = ice_sched_find_node_by_teid(tc_node,
1788 parent = parent->children[0];
1794 parent->vsi_handle = vsi_handle;
1801 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1802 * @pi: port information structure
1803 * @vsi_handle: software VSI handle
1806 * This function adds a new VSI into scheduler tree
1808 static enum ice_status
1809 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1811 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1812 struct ice_sched_node *tc_node;
1814 tc_node = ice_sched_get_tc_node(pi, tc);
1816 return ICE_ERR_PARAM;
1818 /* calculate number of supported nodes needed for this VSI */
1819 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1821 /* add VSI supported nodes to TC subtree */
1822 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1827 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1828 * @pi: port information structure
1829 * @vsi_handle: software VSI handle
1831 * @new_numqs: new number of max queues
1832 * @owner: owner of this subtree
1834 * This function updates the VSI child nodes based on the number of queues
1836 static enum ice_status
1837 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1838 u8 tc, u16 new_numqs, u8 owner)
1840 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1841 struct ice_sched_node *vsi_node;
1842 struct ice_sched_node *tc_node;
1843 struct ice_vsi_ctx *vsi_ctx;
1844 enum ice_status status = ICE_SUCCESS;
1845 struct ice_hw *hw = pi->hw;
1848 tc_node = ice_sched_get_tc_node(pi, tc);
1852 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1856 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1858 return ICE_ERR_PARAM;
1860 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1861 /* num queues are not changed or less than the previous number */
1862 if (new_numqs <= prev_numqs)
1864 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1869 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1870 /* Keep the max number of queue configuration all the time. Update the
1871 * tree only if number of queues > previous number of queues. This may
1872 * leave some extra nodes in the tree if number of queues < previous
1873 * number but that wouldn't harm anything. Removing those extra nodes
1874 * may complicate the code if those nodes are part of SRL or
1875 * individually rate limited.
1877 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1878 new_num_nodes, owner);
1881 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1887 * ice_sched_cfg_vsi - configure the new/existing VSI
1888 * @pi: port information structure
1889 * @vsi_handle: software VSI handle
1891 * @maxqs: max number of queues
1892 * @owner: LAN or RDMA
1893 * @enable: TC enabled or disabled
1895 * This function adds/updates VSI nodes based on the number of queues. If TC is
1896 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1897 * disabled then suspend the VSI if it is not already.
1900 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1901 u8 owner, bool enable)
1903 struct ice_sched_node *vsi_node, *tc_node;
1904 struct ice_vsi_ctx *vsi_ctx;
1905 enum ice_status status = ICE_SUCCESS;
1906 struct ice_hw *hw = pi->hw;
1908 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1909 tc_node = ice_sched_get_tc_node(pi, tc);
1911 return ICE_ERR_PARAM;
1912 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1914 return ICE_ERR_PARAM;
1915 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1917 /* suspend the VSI if TC is not enabled */
1919 if (vsi_node && vsi_node->in_use) {
1920 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1922 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1925 vsi_node->in_use = false;
1930 /* TC is enabled, if it is a new VSI then add it to the tree */
1932 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1936 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1940 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1941 vsi_node->in_use = true;
1942 /* invalidate the max queues whenever VSI gets added first time
1943 * into the scheduler tree (boot or after reset). We need to
1944 * recreate the child nodes all the time in these cases.
1946 vsi_ctx->sched.max_lanq[tc] = 0;
1949 /* update the VSI child nodes */
1950 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1955 /* TC is enabled, resume the VSI if it is in the suspend state */
1956 if (!vsi_node->in_use) {
1957 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1959 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1961 vsi_node->in_use = true;
1968 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1969 * @pi: port information structure
1970 * @vsi_handle: software VSI handle
1972 * This function removes single aggregator VSI info entry from
1975 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1977 struct ice_sched_agg_info *agg_info;
1978 struct ice_sched_agg_info *atmp;
1980 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1983 struct ice_sched_agg_vsi_info *agg_vsi_info;
1984 struct ice_sched_agg_vsi_info *vtmp;
1986 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1987 &agg_info->agg_vsi_list,
1988 ice_sched_agg_vsi_info, list_entry)
1989 if (agg_vsi_info->vsi_handle == vsi_handle) {
1990 LIST_DEL(&agg_vsi_info->list_entry);
1991 ice_free(pi->hw, agg_vsi_info);
1998 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1999 * @node: pointer to the sub-tree node
2001 * This function checks for a leaf node presence in a given sub-tree node.
2003 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
2007 for (i = 0; i < node->num_children; i++)
2008 if (ice_sched_is_leaf_node_present(node->children[i]))
2010 /* check for a leaf node */
2011 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
2015 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
2016 * @pi: port information structure
2017 * @vsi_handle: software VSI handle
2018 * @owner: LAN or RDMA
2020 * This function removes the VSI and its LAN or RDMA children nodes from the
2023 static enum ice_status
2024 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
2026 enum ice_status status = ICE_ERR_PARAM;
2027 struct ice_vsi_ctx *vsi_ctx;
2030 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
2031 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2033 ice_acquire_lock(&pi->sched_lock);
2034 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2036 goto exit_sched_rm_vsi_cfg;
2038 ice_for_each_traffic_class(i) {
2039 struct ice_sched_node *vsi_node, *tc_node;
2042 tc_node = ice_sched_get_tc_node(pi, i);
2046 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2050 if (ice_sched_is_leaf_node_present(vsi_node)) {
2051 ice_debug(pi->hw, ICE_DBG_SCHED,
2052 "VSI has leaf nodes in TC %d\n", i);
2053 status = ICE_ERR_IN_USE;
2054 goto exit_sched_rm_vsi_cfg;
2056 while (j < vsi_node->num_children) {
2057 if (vsi_node->children[j]->owner == owner) {
2058 ice_free_sched_node(pi, vsi_node->children[j]);
2060 /* reset the counter again since the num
2061 * children will be updated after node removal
2068 /* remove the VSI if it has no children */
2069 if (!vsi_node->num_children) {
2070 ice_free_sched_node(pi, vsi_node);
2071 vsi_ctx->sched.vsi_node[i] = NULL;
2073 /* clean up aggregator related VSI info if any */
2074 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2076 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2077 vsi_ctx->sched.max_lanq[i] = 0;
2079 status = ICE_SUCCESS;
2081 exit_sched_rm_vsi_cfg:
2082 ice_release_lock(&pi->sched_lock);
2087 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2088 * @pi: port information structure
2089 * @vsi_handle: software VSI handle
2091 * This function clears the VSI and its LAN children nodes from scheduler tree
2094 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2096 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2100 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2101 * @hw: pointer to the HW struct
2102 * @node: pointer to the ice_sched_node struct
2104 * This function compares all the nodes for a given tree against HW DB nodes
2105 * This function needs to be called with the port_info->sched_lock held
2107 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2111 /* start from the leaf node */
2112 for (i = 0; i < node->num_children; i++)
2113 /* Fail if node doesn't match with the SW DB
2114 * this recursion is intentional, and wouldn't
2115 * go more than 9 calls
2117 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2120 return ice_sched_check_node(hw, node);
2124 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2125 * @hw: pointer to the HW struct
2126 * @node_teid: node TEID
2127 * @buf: pointer to buffer
2128 * @buf_size: buffer size in bytes
2129 * @cd: pointer to command details structure or NULL
2131 * This function retrieves the tree topology from the firmware for a given
2132 * node TEID to the root node.
2135 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2136 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
2137 struct ice_sq_cd *cd)
2139 struct ice_aqc_query_node_to_root *cmd;
2140 struct ice_aq_desc desc;
2142 cmd = &desc.params.query_node_to_root;
2143 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2144 cmd->teid = CPU_TO_LE32(node_teid);
2145 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2149 * ice_get_agg_info - get the aggregator ID
2150 * @hw: pointer to the hardware structure
2151 * @agg_id: aggregator ID
2153 * This function validates aggregator ID. The function returns info if
2154 * aggregator ID is present in list otherwise it returns null.
2156 static struct ice_sched_agg_info *
2157 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2159 struct ice_sched_agg_info *agg_info;
2161 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2163 if (agg_info->agg_id == agg_id)
2170 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2171 * @hw: pointer to the HW struct
2172 * @node: pointer to a child node
2173 * @num_nodes: num nodes count array
2175 * This function walks through the aggregator subtree to find a free parent
2178 static struct ice_sched_node *
2179 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2182 u8 l = node->tx_sched_layer;
2185 vsil = ice_sched_get_vsi_layer(hw);
2187 /* Is it VSI parent layer ? */
2189 return (node->num_children < hw->max_children[l]) ? node : NULL;
2191 /* We have intermediate nodes. Let's walk through the subtree. If the
2192 * intermediate node has space to add a new node then clear the count
2194 if (node->num_children < hw->max_children[l])
2196 /* The below recursive call is intentional and wouldn't go more than
2197 * 2 or 3 iterations.
2200 for (i = 0; i < node->num_children; i++) {
2201 struct ice_sched_node *parent;
2203 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2213 * ice_sched_update_parent - update the new parent in SW DB
2214 * @new_parent: pointer to a new parent node
2215 * @node: pointer to a child node
2217 * This function removes the child from the old parent and adds it to a new
2221 ice_sched_update_parent(struct ice_sched_node *new_parent,
2222 struct ice_sched_node *node)
2224 struct ice_sched_node *old_parent;
2227 old_parent = node->parent;
2229 /* update the old parent children */
2230 for (i = 0; i < old_parent->num_children; i++)
2231 if (old_parent->children[i] == node) {
2232 for (j = i + 1; j < old_parent->num_children; j++)
2233 old_parent->children[j - 1] =
2234 old_parent->children[j];
2235 old_parent->num_children--;
2239 /* now move the node to a new parent */
2240 new_parent->children[new_parent->num_children++] = node;
2241 node->parent = new_parent;
2242 node->info.parent_teid = new_parent->info.node_teid;
2246 * ice_sched_move_nodes - move child nodes to a given parent
2247 * @pi: port information structure
2248 * @parent: pointer to parent node
2249 * @num_items: number of child nodes to be moved
2250 * @list: pointer to child node teids
2252 * This function move the child nodes to a given parent.
2254 static enum ice_status
2255 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2256 u16 num_items, u32 *list)
2258 enum ice_status status = ICE_SUCCESS;
2259 struct ice_aqc_move_elem *buf;
2260 struct ice_sched_node *node;
2261 u16 i, grps_movd = 0;
2266 if (!parent || !num_items)
2267 return ICE_ERR_PARAM;
2269 /* Does parent have enough space */
2270 if (parent->num_children + num_items >=
2271 hw->max_children[parent->tx_sched_layer])
2272 return ICE_ERR_AQ_FULL;
2274 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
2276 return ICE_ERR_NO_MEMORY;
2278 for (i = 0; i < num_items; i++) {
2279 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2281 status = ICE_ERR_PARAM;
2285 buf->hdr.src_parent_teid = node->info.parent_teid;
2286 buf->hdr.dest_parent_teid = parent->info.node_teid;
2287 buf->teid[0] = node->info.node_teid;
2288 buf->hdr.num_elems = CPU_TO_LE16(1);
2289 status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
2291 if (status && grps_movd != 1) {
2292 status = ICE_ERR_CFG;
2296 /* update the SW DB */
2297 ice_sched_update_parent(parent, node);
2306 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2307 * @pi: port information structure
2308 * @vsi_handle: software VSI handle
2309 * @agg_id: aggregator ID
2312 * This function moves a VSI to an aggregator node or its subtree.
2313 * Intermediate nodes may be created if required.
2315 static enum ice_status
2316 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2319 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2320 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2321 u32 first_node_teid, vsi_teid;
2322 enum ice_status status;
2323 u16 num_nodes_added;
2326 tc_node = ice_sched_get_tc_node(pi, tc);
2330 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2332 return ICE_ERR_DOES_NOT_EXIST;
2334 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2336 return ICE_ERR_DOES_NOT_EXIST;
2338 aggl = ice_sched_get_agg_layer(pi->hw);
2339 vsil = ice_sched_get_vsi_layer(pi->hw);
2341 /* set intermediate node count to 1 between aggregator and VSI layers */
2342 for (i = aggl + 1; i < vsil; i++)
2345 /* Check if the aggregator subtree has any free node to add the VSI */
2346 for (i = 0; i < agg_node->num_children; i++) {
2347 parent = ice_sched_get_free_vsi_parent(pi->hw,
2348 agg_node->children[i],
2356 for (i = aggl + 1; i < vsil; i++) {
2357 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2361 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2364 /* The newly added node can be a new parent for the next
2367 if (num_nodes_added)
2368 parent = ice_sched_find_node_by_teid(tc_node,
2371 parent = parent->children[0];
2378 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2379 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2383 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2384 * @pi: port information structure
2385 * @agg_info: aggregator info
2386 * @tc: traffic class number
2387 * @rm_vsi_info: true or false
2389 * This function move all the VSI(s) to the default aggregator and delete
2390 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2391 * caller holds the scheduler lock.
2393 static enum ice_status
2394 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2395 struct ice_sched_agg_info *agg_info, u8 tc,
2398 struct ice_sched_agg_vsi_info *agg_vsi_info;
2399 struct ice_sched_agg_vsi_info *tmp;
2400 enum ice_status status = ICE_SUCCESS;
2402 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2403 ice_sched_agg_vsi_info, list_entry) {
2404 u16 vsi_handle = agg_vsi_info->vsi_handle;
2406 /* Move VSI to default aggregator */
2407 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2410 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2411 ICE_DFLT_AGG_ID, tc);
2415 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2416 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2417 LIST_DEL(&agg_vsi_info->list_entry);
2418 ice_free(pi->hw, agg_vsi_info);
2426 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2427 * @pi: port information structure
2428 * @node: node pointer
2430 * This function checks whether the aggregator is attached with any VSI or not.
2433 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2437 vsil = ice_sched_get_vsi_layer(pi->hw);
2438 if (node->tx_sched_layer < vsil - 1) {
2439 for (i = 0; i < node->num_children; i++)
2440 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2444 return node->num_children ? true : false;
2449 * ice_sched_rm_agg_cfg - remove the aggregator node
2450 * @pi: port information structure
2451 * @agg_id: aggregator ID
2454 * This function removes the aggregator node and intermediate nodes if any
2457 static enum ice_status
2458 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2460 struct ice_sched_node *tc_node, *agg_node;
2461 struct ice_hw *hw = pi->hw;
2463 tc_node = ice_sched_get_tc_node(pi, tc);
2467 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2469 return ICE_ERR_DOES_NOT_EXIST;
2471 /* Can't remove the aggregator node if it has children */
2472 if (ice_sched_is_agg_inuse(pi, agg_node))
2473 return ICE_ERR_IN_USE;
2475 /* need to remove the whole subtree if aggregator node is the
2478 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2479 struct ice_sched_node *parent = agg_node->parent;
2484 if (parent->num_children > 1)
2490 ice_free_sched_node(pi, agg_node);
2495 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2496 * @pi: port information structure
2497 * @agg_info: aggregator ID
2499 * @rm_vsi_info: bool value true or false
2501 * This function removes aggregator reference to VSI of given TC. It removes
2502 * the aggregator configuration completely for requested TC. The caller needs
2503 * to hold the scheduler lock.
2505 static enum ice_status
2506 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2507 u8 tc, bool rm_vsi_info)
2509 enum ice_status status = ICE_SUCCESS;
2511 /* If nothing to remove - return success */
2512 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2513 goto exit_rm_agg_cfg_tc;
2515 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2517 goto exit_rm_agg_cfg_tc;
2519 /* Delete aggregator node(s) */
2520 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2522 goto exit_rm_agg_cfg_tc;
2524 ice_clear_bit(tc, agg_info->tc_bitmap);
2530 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2531 * @pi: port information structure
2532 * @agg_id: aggregator ID
2533 * @tc_bitmap: 8 bits TC bitmap
2535 * Save aggregator TC bitmap. This function needs to be called with scheduler
2538 static enum ice_status
2539 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2540 ice_bitmap_t *tc_bitmap)
2542 struct ice_sched_agg_info *agg_info;
2544 agg_info = ice_get_agg_info(pi->hw, agg_id);
2546 return ICE_ERR_PARAM;
2547 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2548 ICE_MAX_TRAFFIC_CLASS);
2553 * ice_sched_add_agg_cfg - create an aggregator node
2554 * @pi: port information structure
2555 * @agg_id: aggregator ID
2558 * This function creates an aggregator node and intermediate nodes if required
2561 static enum ice_status
2562 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2564 struct ice_sched_node *parent, *agg_node, *tc_node;
2565 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2566 enum ice_status status = ICE_SUCCESS;
2567 struct ice_hw *hw = pi->hw;
2568 u32 first_node_teid;
2569 u16 num_nodes_added;
2572 tc_node = ice_sched_get_tc_node(pi, tc);
2576 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2577 /* Does Agg node already exist ? */
2581 aggl = ice_sched_get_agg_layer(hw);
2583 /* need one node in Agg layer */
2584 num_nodes[aggl] = 1;
2586 /* Check whether the intermediate nodes have space to add the
2587 * new aggregator. If they are full, then SW needs to allocate a new
2588 * intermediate node on those layers
2590 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2591 parent = ice_sched_get_first_node(pi, tc_node, i);
2593 /* scan all the siblings */
2595 if (parent->num_children < hw->max_children[i])
2597 parent = parent->sibling;
2600 /* all the nodes are full, reserve one for this layer */
2605 /* add the aggregator node */
2607 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2611 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2615 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2618 /* The newly added node can be a new parent for the next
2621 if (num_nodes_added) {
2622 parent = ice_sched_find_node_by_teid(tc_node,
2624 /* register aggregator ID with the aggregator node */
2625 if (parent && i == aggl)
2626 parent->agg_id = agg_id;
2628 parent = parent->children[0];
2636 * ice_sched_cfg_agg - configure aggregator node
2637 * @pi: port information structure
2638 * @agg_id: aggregator ID
2639 * @agg_type: aggregator type queue, VSI, or aggregator group
2640 * @tc_bitmap: bits TC bitmap
2642 * It registers a unique aggregator node into scheduler services. It
2643 * allows a user to register with a unique ID to track it's resources.
2644 * The aggregator type determines if this is a queue group, VSI group
2645 * or aggregator group. It then creates the aggregator node(s) for requested
2646 * TC(s) or removes an existing aggregator node including its configuration
2647 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2648 * resources and remove aggregator ID.
2649 * This function needs to be called with scheduler lock held.
2651 static enum ice_status
2652 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2653 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2655 struct ice_sched_agg_info *agg_info;
2656 enum ice_status status = ICE_SUCCESS;
2657 struct ice_hw *hw = pi->hw;
2660 agg_info = ice_get_agg_info(hw, agg_id);
2662 /* Create new entry for new aggregator ID */
2663 agg_info = (struct ice_sched_agg_info *)
2664 ice_malloc(hw, sizeof(*agg_info));
2666 status = ICE_ERR_NO_MEMORY;
2669 agg_info->agg_id = agg_id;
2670 agg_info->agg_type = agg_type;
2671 agg_info->tc_bitmap[0] = 0;
2673 /* Initialize the aggregator VSI list head */
2674 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2676 /* Add new entry in aggregator list */
2677 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2679 /* Create aggregator node(s) for requested TC(s) */
2680 ice_for_each_traffic_class(tc) {
2681 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2682 /* Delete aggregator cfg TC if it exists previously */
2683 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2689 /* Check if aggregator node for TC already exists */
2690 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2693 /* Create new aggregator node for TC */
2694 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2698 /* Save aggregator node's TC information */
2699 ice_set_bit(tc, agg_info->tc_bitmap);
2706 * ice_cfg_agg - config aggregator node
2707 * @pi: port information structure
2708 * @agg_id: aggregator ID
2709 * @agg_type: aggregator type queue, VSI, or aggregator group
2710 * @tc_bitmap: bits TC bitmap
2712 * This function configures aggregator node(s).
2715 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2718 ice_bitmap_t bitmap = tc_bitmap;
2719 enum ice_status status;
2721 ice_acquire_lock(&pi->sched_lock);
2722 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2723 (ice_bitmap_t *)&bitmap);
2725 status = ice_save_agg_tc_bitmap(pi, agg_id,
2726 (ice_bitmap_t *)&bitmap);
2727 ice_release_lock(&pi->sched_lock);
2732 * ice_get_agg_vsi_info - get the aggregator ID
2733 * @agg_info: aggregator info
2734 * @vsi_handle: software VSI handle
2736 * The function returns aggregator VSI info based on VSI handle. This function
2737 * needs to be called with scheduler lock held.
2739 static struct ice_sched_agg_vsi_info *
2740 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2742 struct ice_sched_agg_vsi_info *agg_vsi_info;
2744 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2745 ice_sched_agg_vsi_info, list_entry)
2746 if (agg_vsi_info->vsi_handle == vsi_handle)
2747 return agg_vsi_info;
2753 * ice_get_vsi_agg_info - get the aggregator info of VSI
2754 * @hw: pointer to the hardware structure
2755 * @vsi_handle: Sw VSI handle
2757 * The function returns aggregator info of VSI represented via vsi_handle. The
2758 * VSI has in this case a different aggregator than the default one. This
2759 * function needs to be called with scheduler lock held.
2761 static struct ice_sched_agg_info *
2762 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2764 struct ice_sched_agg_info *agg_info;
2766 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2768 struct ice_sched_agg_vsi_info *agg_vsi_info;
2770 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2778 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2779 * @pi: port information structure
2780 * @agg_id: aggregator ID
2781 * @vsi_handle: software VSI handle
2782 * @tc_bitmap: TC bitmap of enabled TC(s)
2784 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2787 static enum ice_status
2788 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2789 ice_bitmap_t *tc_bitmap)
2791 struct ice_sched_agg_vsi_info *agg_vsi_info;
2792 struct ice_sched_agg_info *agg_info;
2794 agg_info = ice_get_agg_info(pi->hw, agg_id);
2796 return ICE_ERR_PARAM;
2797 /* check if entry already exist */
2798 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2800 return ICE_ERR_PARAM;
2801 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2802 ICE_MAX_TRAFFIC_CLASS);
2807 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2808 * @pi: port information structure
2809 * @agg_id: aggregator ID
2810 * @vsi_handle: software VSI handle
2811 * @tc_bitmap: TC bitmap of enabled TC(s)
2813 * This function moves VSI to a new or default aggregator node. If VSI is
2814 * already associated to the aggregator node then no operation is performed on
2815 * the tree. This function needs to be called with scheduler lock held.
2817 static enum ice_status
2818 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2819 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2821 struct ice_sched_agg_vsi_info *agg_vsi_info;
2822 struct ice_sched_agg_info *agg_info;
2823 enum ice_status status = ICE_SUCCESS;
2824 struct ice_hw *hw = pi->hw;
2827 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2828 return ICE_ERR_PARAM;
2829 agg_info = ice_get_agg_info(hw, agg_id);
2831 return ICE_ERR_PARAM;
2832 /* check if entry already exist */
2833 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2834 if (!agg_vsi_info) {
2835 /* Create new entry for VSI under aggregator list */
2836 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2837 ice_malloc(hw, sizeof(*agg_vsi_info));
2839 return ICE_ERR_PARAM;
2841 /* add VSI ID into the aggregator list */
2842 agg_vsi_info->vsi_handle = vsi_handle;
2843 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2845 /* Move VSI node to new aggregator node for requested TC(s) */
2846 ice_for_each_traffic_class(tc) {
2847 if (!ice_is_tc_ena(*tc_bitmap, tc))
2850 /* Move VSI to new aggregator */
2851 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2855 if (agg_id != ICE_DFLT_AGG_ID)
2856 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2858 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2860 /* If VSI moved back to default aggregator, delete agg_vsi_info. */
2861 if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
2862 ICE_MAX_TRAFFIC_CLASS)) {
2863 LIST_DEL(&agg_vsi_info->list_entry);
2864 ice_free(hw, agg_vsi_info);
2870 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2871 * @pi: port information structure
2873 * This function removes unused rate limit profiles from the HW and
2874 * SW DB. The caller needs to hold scheduler lock.
2876 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
2880 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
2881 struct ice_aqc_rl_profile_info *rl_prof_elem;
2882 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2884 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2885 &pi->rl_prof_list[ln],
2886 ice_aqc_rl_profile_info, list_entry) {
2887 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
2888 ice_debug(pi->hw, ICE_DBG_SCHED,
2889 "Removed rl profile\n");
2895 * ice_sched_update_elem - update element
2896 * @hw: pointer to the HW struct
2897 * @node: pointer to node
2898 * @info: node info to update
2900 * Update the HW DB, and local SW DB of node. Update the scheduling
2901 * parameters of node from argument info data buffer (Info->data buf) and
2902 * returns success or error on config sched element failure. The caller
2903 * needs to hold scheduler lock.
2905 static enum ice_status
2906 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2907 struct ice_aqc_txsched_elem_data *info)
2909 struct ice_aqc_txsched_elem_data buf;
2910 enum ice_status status;
2915 /* Parent TEID is reserved field in this aq call */
2916 buf.parent_teid = 0;
2917 /* Element type is reserved field in this aq call */
2918 buf.data.elem_type = 0;
2919 /* Flags is reserved field in this aq call */
2923 /* Configure element node */
2924 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2926 if (status || elem_cfgd != num_elems) {
2927 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2931 /* Config success case */
2932 /* Now update local SW DB */
2933 /* Only copy the data portion of info buffer */
2934 node->info.data = info->data;
2939 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2940 * @hw: pointer to the HW struct
2941 * @node: sched node to configure
2942 * @rl_type: rate limit type CIR, EIR, or shared
2943 * @bw_alloc: BW weight/allocation
2945 * This function configures node element's BW allocation.
2947 static enum ice_status
2948 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2949 enum ice_rl_type rl_type, u16 bw_alloc)
2951 struct ice_aqc_txsched_elem_data buf;
2952 struct ice_aqc_txsched_elem *data;
2953 enum ice_status status;
2957 if (rl_type == ICE_MIN_BW) {
2958 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2959 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2960 } else if (rl_type == ICE_MAX_BW) {
2961 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2962 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2964 return ICE_ERR_PARAM;
2967 /* Configure element */
2968 status = ice_sched_update_elem(hw, node, &buf);
2973 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2974 * @pi: port information structure
2975 * @agg_id: aggregator ID
2976 * @vsi_handle: software VSI handle
2977 * @tc_bitmap: TC bitmap of enabled TC(s)
2979 * Move or associate VSI to a new or default aggregator node.
2982 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2985 ice_bitmap_t bitmap = tc_bitmap;
2986 enum ice_status status;
2988 ice_acquire_lock(&pi->sched_lock);
2989 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2990 (ice_bitmap_t *)&bitmap);
2992 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2993 (ice_bitmap_t *)&bitmap);
2994 ice_release_lock(&pi->sched_lock);
2999 * ice_rm_agg_cfg - remove aggregator configuration
3000 * @pi: port information structure
3001 * @agg_id: aggregator ID
3003 * This function removes aggregator reference to VSI and delete aggregator ID
3004 * info. It removes the aggregator configuration completely.
3006 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
3008 struct ice_sched_agg_info *agg_info;
3009 enum ice_status status = ICE_SUCCESS;
3012 ice_acquire_lock(&pi->sched_lock);
3013 agg_info = ice_get_agg_info(pi->hw, agg_id);
3015 status = ICE_ERR_DOES_NOT_EXIST;
3016 goto exit_ice_rm_agg_cfg;
3019 ice_for_each_traffic_class(tc) {
3020 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
3022 goto exit_ice_rm_agg_cfg;
3025 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
3026 status = ICE_ERR_IN_USE;
3027 goto exit_ice_rm_agg_cfg;
3030 /* Safe to delete entry now */
3031 LIST_DEL(&agg_info->list_entry);
3032 ice_free(pi->hw, agg_info);
3034 /* Remove unused RL profile IDs from HW and SW DB */
3035 ice_sched_rm_unused_rl_prof(pi);
3037 exit_ice_rm_agg_cfg:
3038 ice_release_lock(&pi->sched_lock);
3043 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
3044 * @bw_t_info: bandwidth type information structure
3045 * @bw_alloc: Bandwidth allocation information
3047 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
3051 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3053 bw_t_info->cir_bw.bw_alloc = bw_alloc;
3054 if (bw_t_info->cir_bw.bw_alloc)
3055 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3057 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3061 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
3062 * @bw_t_info: bandwidth type information structure
3063 * @bw_alloc: Bandwidth allocation information
3065 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
3069 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3071 bw_t_info->eir_bw.bw_alloc = bw_alloc;
3072 if (bw_t_info->eir_bw.bw_alloc)
3073 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3075 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3079 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3080 * @pi: port information structure
3081 * @vsi_handle: sw VSI handle
3082 * @tc: traffic class
3083 * @rl_type: rate limit type min or max
3084 * @bw_alloc: Bandwidth allocation information
3086 * Save BW alloc information of VSI type node for post replay use.
3088 static enum ice_status
3089 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3090 enum ice_rl_type rl_type, u16 bw_alloc)
3092 struct ice_vsi_ctx *vsi_ctx;
3094 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3095 return ICE_ERR_PARAM;
3096 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3098 return ICE_ERR_PARAM;
3101 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3105 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3109 return ICE_ERR_PARAM;
3115 * ice_set_clear_cir_bw - set or clear CIR BW
3116 * @bw_t_info: bandwidth type information structure
3117 * @bw: bandwidth in Kbps - Kilo bits per sec
3119 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3121 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3123 if (bw == ICE_SCHED_DFLT_BW) {
3124 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3125 bw_t_info->cir_bw.bw = 0;
3127 /* Save type of BW information */
3128 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3129 bw_t_info->cir_bw.bw = bw;
3134 * ice_set_clear_eir_bw - set or clear EIR BW
3135 * @bw_t_info: bandwidth type information structure
3136 * @bw: bandwidth in Kbps - Kilo bits per sec
3138 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3140 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3142 if (bw == ICE_SCHED_DFLT_BW) {
3143 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3144 bw_t_info->eir_bw.bw = 0;
3146 /* EIR BW and Shared BW profiles are mutually exclusive and
3147 * hence only one of them may be set for any given element.
3148 * First clear earlier saved shared BW information.
3150 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3151 bw_t_info->shared_bw = 0;
3152 /* save EIR BW information */
3153 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3154 bw_t_info->eir_bw.bw = bw;
3159 * ice_set_clear_shared_bw - set or clear shared BW
3160 * @bw_t_info: bandwidth type information structure
3161 * @bw: bandwidth in Kbps - Kilo bits per sec
3163 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3165 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3167 if (bw == ICE_SCHED_DFLT_BW) {
3168 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3169 bw_t_info->shared_bw = 0;
3171 /* EIR BW and Shared BW profiles are mutually exclusive and
3172 * hence only one of them may be set for any given element.
3173 * First clear earlier saved EIR BW information.
3175 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3176 bw_t_info->eir_bw.bw = 0;
3177 /* save shared BW information */
3178 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3179 bw_t_info->shared_bw = bw;
3184 * ice_sched_save_vsi_bw - save VSI node's BW information
3185 * @pi: port information structure
3186 * @vsi_handle: sw VSI handle
3187 * @tc: traffic class
3188 * @rl_type: rate limit type min, max, or shared
3189 * @bw: bandwidth in Kbps - Kilo bits per sec
3191 * Save BW information of VSI type node for post replay use.
3193 static enum ice_status
3194 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3195 enum ice_rl_type rl_type, u32 bw)
3197 struct ice_vsi_ctx *vsi_ctx;
3199 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3200 return ICE_ERR_PARAM;
3201 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3203 return ICE_ERR_PARAM;
3206 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3209 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3212 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3215 return ICE_ERR_PARAM;
3221 * ice_set_clear_prio - set or clear priority information
3222 * @bw_t_info: bandwidth type information structure
3223 * @prio: priority to save
3225 * Save or clear priority (prio) in the passed param bw_t_info.
3227 static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3229 bw_t_info->generic = prio;
3230 if (bw_t_info->generic)
3231 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3233 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3237 * ice_sched_save_vsi_prio - save VSI node's priority information
3238 * @pi: port information structure
3239 * @vsi_handle: Software VSI handle
3240 * @tc: traffic class
3241 * @prio: priority to save
3243 * Save priority information of VSI type node for post replay use.
3245 static enum ice_status
3246 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3249 struct ice_vsi_ctx *vsi_ctx;
3251 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3252 return ICE_ERR_PARAM;
3253 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3255 return ICE_ERR_PARAM;
3256 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3257 return ICE_ERR_PARAM;
3258 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3263 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3264 * @pi: port information structure
3265 * @agg_id: node aggregator ID
3266 * @tc: traffic class
3267 * @rl_type: rate limit type min or max
3268 * @bw_alloc: bandwidth alloc information
3270 * Save BW alloc information of AGG type node for post replay use.
3272 static enum ice_status
3273 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3274 enum ice_rl_type rl_type, u16 bw_alloc)
3276 struct ice_sched_agg_info *agg_info;
3278 agg_info = ice_get_agg_info(pi->hw, agg_id);
3280 return ICE_ERR_PARAM;
3281 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3282 return ICE_ERR_PARAM;
3285 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3288 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3291 return ICE_ERR_PARAM;
3297 * ice_sched_save_agg_bw - save aggregator node's BW information
3298 * @pi: port information structure
3299 * @agg_id: node aggregator ID
3300 * @tc: traffic class
3301 * @rl_type: rate limit type min, max, or shared
3302 * @bw: bandwidth in Kbps - Kilo bits per sec
3304 * Save BW information of AGG type node for post replay use.
3306 static enum ice_status
3307 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3308 enum ice_rl_type rl_type, u32 bw)
3310 struct ice_sched_agg_info *agg_info;
3312 agg_info = ice_get_agg_info(pi->hw, agg_id);
3314 return ICE_ERR_PARAM;
3315 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3316 return ICE_ERR_PARAM;
3319 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3322 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3325 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3328 return ICE_ERR_PARAM;
3334 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3335 * @pi: port information structure
3336 * @vsi_handle: software VSI handle
3337 * @tc: traffic class
3338 * @rl_type: min or max
3339 * @bw: bandwidth in Kbps
3341 * This function configures BW limit of VSI scheduling node based on TC
3345 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3346 enum ice_rl_type rl_type, u32 bw)
3348 enum ice_status status;
3350 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3354 ice_acquire_lock(&pi->sched_lock);
3355 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3356 ice_release_lock(&pi->sched_lock);
3362 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3363 * @pi: port information structure
3364 * @vsi_handle: software VSI handle
3365 * @tc: traffic class
3366 * @rl_type: min or max
3368 * This function configures default BW limit of VSI scheduling node based on TC
3372 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3373 enum ice_rl_type rl_type)
3375 enum ice_status status;
3377 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3382 ice_acquire_lock(&pi->sched_lock);
3383 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3385 ice_release_lock(&pi->sched_lock);
3391 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3392 * @pi: port information structure
3393 * @agg_id: aggregator ID
3394 * @tc: traffic class
3395 * @rl_type: min or max
3396 * @bw: bandwidth in Kbps
3398 * This function applies BW limit to aggregator scheduling node based on TC
3402 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3403 enum ice_rl_type rl_type, u32 bw)
3405 enum ice_status status;
3407 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3410 ice_acquire_lock(&pi->sched_lock);
3411 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3412 ice_release_lock(&pi->sched_lock);
3418 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3419 * @pi: port information structure
3420 * @agg_id: aggregator ID
3421 * @tc: traffic class
3422 * @rl_type: min or max
3424 * This function applies default BW limit to aggregator scheduling node based
3425 * on TC information.
3428 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3429 enum ice_rl_type rl_type)
3431 enum ice_status status;
3433 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3437 ice_acquire_lock(&pi->sched_lock);
3438 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3440 ice_release_lock(&pi->sched_lock);
3446 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3447 * @pi: port information structure
3448 * @vsi_handle: software VSI handle
3449 * @bw: bandwidth in Kbps
3451 * This function Configures shared rate limiter(SRL) of all VSI type nodes
3452 * across all traffic classes for VSI matching handle.
3455 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
3457 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
3461 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3462 * @pi: port information structure
3463 * @vsi_handle: software VSI handle
3465 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3466 * across all traffic classes for VSI matching handle.
3469 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3471 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3476 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3477 * @pi: port information structure
3478 * @agg_id: aggregator ID
3479 * @bw: bandwidth in Kbps
3481 * This function configures the shared rate limiter(SRL) of all aggregator type
3482 * nodes across all traffic classes for aggregator matching agg_id.
3485 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
3487 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
3491 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3492 * @pi: port information structure
3493 * @agg_id: aggregator ID
3495 * This function removes the shared rate limiter(SRL) of all aggregator type
3496 * nodes across all traffic classes for aggregator matching agg_id.
3499 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3501 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
3505 * ice_config_vsi_queue_priority - config VSI queue priority of node
3506 * @pi: port information structure
3507 * @num_qs: number of VSI queues
3508 * @q_ids: queue IDs array
3509 * @q_prio: queue priority array
3511 * This function configures the queue node priority (Sibling Priority) of the
3512 * passed in VSI's queue(s) for a given traffic class (TC).
3515 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3518 enum ice_status status = ICE_ERR_PARAM;
3521 ice_acquire_lock(&pi->sched_lock);
3523 for (i = 0; i < num_qs; i++) {
3524 struct ice_sched_node *node;
3526 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3527 if (!node || node->info.data.elem_type !=
3528 ICE_AQC_ELEM_TYPE_LEAF) {
3529 status = ICE_ERR_PARAM;
3532 /* Configure Priority */
3533 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3538 ice_release_lock(&pi->sched_lock);
3543 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3544 * @pi: port information structure
3545 * @agg_id: Aggregator ID
3546 * @num_vsis: number of VSI(s)
3547 * @vsi_handle_arr: array of software VSI handles
3548 * @node_prio: pointer to node priority
3549 * @tc: traffic class
3551 * This function configures the node priority (Sibling Priority) of the
3552 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3555 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3556 u16 num_vsis, u16 *vsi_handle_arr,
3557 u8 *node_prio, u8 tc)
3559 struct ice_sched_agg_vsi_info *agg_vsi_info;
3560 struct ice_sched_node *tc_node, *agg_node;
3561 enum ice_status status = ICE_ERR_PARAM;
3562 struct ice_sched_agg_info *agg_info;
3563 bool agg_id_present = false;
3564 struct ice_hw *hw = pi->hw;
3567 ice_acquire_lock(&pi->sched_lock);
3568 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3570 if (agg_info->agg_id == agg_id) {
3571 agg_id_present = true;
3574 if (!agg_id_present)
3575 goto exit_agg_priority_per_tc;
3577 tc_node = ice_sched_get_tc_node(pi, tc);
3579 goto exit_agg_priority_per_tc;
3581 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3583 goto exit_agg_priority_per_tc;
3585 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3586 goto exit_agg_priority_per_tc;
3588 for (i = 0; i < num_vsis; i++) {
3589 struct ice_sched_node *vsi_node;
3590 bool vsi_handle_valid = false;
3593 status = ICE_ERR_PARAM;
3594 vsi_handle = vsi_handle_arr[i];
3595 if (!ice_is_vsi_valid(hw, vsi_handle))
3596 goto exit_agg_priority_per_tc;
3597 /* Verify child nodes before applying settings */
3598 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3599 ice_sched_agg_vsi_info, list_entry)
3600 if (agg_vsi_info->vsi_handle == vsi_handle) {
3601 /* cppcheck-suppress unreadVariable */
3602 vsi_handle_valid = true;
3606 if (!vsi_handle_valid)
3607 goto exit_agg_priority_per_tc;
3609 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3611 goto exit_agg_priority_per_tc;
3613 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3614 /* Configure Priority */
3615 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3619 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3626 exit_agg_priority_per_tc:
3627 ice_release_lock(&pi->sched_lock);
3632 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3633 * @pi: port information structure
3634 * @vsi_handle: software VSI handle
3635 * @ena_tcmap: enabled TC map
3636 * @rl_type: Rate limit type CIR/EIR
3637 * @bw_alloc: Array of BW alloc
3639 * This function configures the BW allocation of the passed in VSI's
3640 * node(s) for enabled traffic class.
3643 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3644 enum ice_rl_type rl_type, u8 *bw_alloc)
3646 enum ice_status status = ICE_SUCCESS;
3649 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3650 return ICE_ERR_PARAM;
3652 ice_acquire_lock(&pi->sched_lock);
3654 /* Return success if no nodes are present across TC */
3655 ice_for_each_traffic_class(tc) {
3656 struct ice_sched_node *tc_node, *vsi_node;
3658 if (!ice_is_tc_ena(ena_tcmap, tc))
3661 tc_node = ice_sched_get_tc_node(pi, tc);
3665 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3669 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3673 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3674 rl_type, bw_alloc[tc]);
3679 ice_release_lock(&pi->sched_lock);
3684 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3685 * @pi: port information structure
3686 * @agg_id: aggregator ID
3687 * @ena_tcmap: enabled TC map
3688 * @rl_type: rate limit type CIR/EIR
3689 * @bw_alloc: array of BW alloc
3691 * This function configures the BW allocation of passed in aggregator for
3692 * enabled traffic class(s).
3695 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3696 enum ice_rl_type rl_type, u8 *bw_alloc)
3698 struct ice_sched_agg_info *agg_info;
3699 bool agg_id_present = false;
3700 enum ice_status status = ICE_SUCCESS;
3701 struct ice_hw *hw = pi->hw;
3704 ice_acquire_lock(&pi->sched_lock);
3705 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3707 if (agg_info->agg_id == agg_id) {
3708 agg_id_present = true;
3711 if (!agg_id_present) {
3712 status = ICE_ERR_PARAM;
3713 goto exit_cfg_agg_bw_alloc;
3716 /* Return success if no nodes are present across TC */
3717 ice_for_each_traffic_class(tc) {
3718 struct ice_sched_node *tc_node, *agg_node;
3720 if (!ice_is_tc_ena(ena_tcmap, tc))
3723 tc_node = ice_sched_get_tc_node(pi, tc);
3727 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3731 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3735 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3741 exit_cfg_agg_bw_alloc:
3742 ice_release_lock(&pi->sched_lock);
3747 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3748 * @hw: pointer to the HW struct
3749 * @bw: bandwidth in Kbps
3751 * This function calculates the wakeup parameter of RL profile.
3753 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3755 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3759 /* Get the wakeup integer value */
3760 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3761 wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
3762 if (wakeup_int > 63) {
3763 wakeup = (u16)((1 << 15) | wakeup_int);
3765 /* Calculate fraction value up to 4 decimals
3766 * Convert Integer value to a constant multiplier
3768 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3769 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3770 hw->psm_clk_freq, bytes_per_sec);
3772 /* Get Fraction value */
3773 wakeup_f = wakeup_a - wakeup_b;
3775 /* Round up the Fractional value via Ceil(Fractional value) */
3776 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3779 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3780 ICE_RL_PROF_MULTIPLIER);
3781 wakeup |= (u16)(wakeup_int << 9);
3782 wakeup |= (u16)(0x1ff & wakeup_f_int);
3789 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3790 * @hw: pointer to the HW struct
3791 * @bw: bandwidth in Kbps
3792 * @profile: profile parameters to return
3794 * This function converts the BW to profile structure format.
3796 static enum ice_status
3797 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3798 struct ice_aqc_rl_profile_elem *profile)
3800 enum ice_status status = ICE_ERR_PARAM;
3801 s64 bytes_per_sec, ts_rate, mv_tmp;
3807 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3808 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3811 /* Bytes per second from Kbps */
3812 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3814 /* encode is 6 bits but really useful are 5 bits */
3815 for (i = 0; i < 64; i++) {
3816 u64 pow_result = BIT_ULL(i);
3818 ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
3819 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3823 /* Multiplier value */
3824 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3827 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3828 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3830 /* First multiplier value greater than the given
3833 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3842 wm = ice_sched_calc_wakeup(hw, bw);
3843 profile->rl_multiply = CPU_TO_LE16(mv);
3844 profile->wake_up_calc = CPU_TO_LE16(wm);
3845 profile->rl_encode = CPU_TO_LE16(encode);
3846 status = ICE_SUCCESS;
3848 status = ICE_ERR_DOES_NOT_EXIST;
3855 * ice_sched_add_rl_profile - add RL profile
3856 * @pi: port information structure
3857 * @rl_type: type of rate limit BW - min, max, or shared
3858 * @bw: bandwidth in Kbps - Kilo bits per sec
3859 * @layer_num: specifies in which layer to create profile
3861 * This function first checks the existing list for corresponding BW
3862 * parameter. If it exists, it returns the associated profile otherwise
3863 * it creates a new rate limit profile for requested BW, and adds it to
3864 * the HW DB and local list. It returns the new profile or null on error.
3865 * The caller needs to hold the scheduler lock.
3867 static struct ice_aqc_rl_profile_info *
3868 ice_sched_add_rl_profile(struct ice_port_info *pi,
3869 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3871 struct ice_aqc_rl_profile_info *rl_prof_elem;
3872 u16 profiles_added = 0, num_profiles = 1;
3873 struct ice_aqc_rl_profile_elem *buf;
3874 enum ice_status status;
3878 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3882 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3885 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3888 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3897 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3898 ice_aqc_rl_profile_info, list_entry)
3899 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
3900 profile_type && rl_prof_elem->bw == bw)
3901 /* Return existing profile ID info */
3902 return rl_prof_elem;
3904 /* Create new profile ID */
3905 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3906 ice_malloc(hw, sizeof(*rl_prof_elem));
3911 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
3912 if (status != ICE_SUCCESS)
3913 goto exit_add_rl_prof;
3915 rl_prof_elem->bw = bw;
3916 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3917 rl_prof_elem->profile.level = layer_num + 1;
3918 rl_prof_elem->profile.flags = profile_type;
3919 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3921 /* Create new entry in HW DB */
3922 buf = &rl_prof_elem->profile;
3923 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3924 &profiles_added, NULL);
3925 if (status || profiles_added != num_profiles)
3926 goto exit_add_rl_prof;
3928 /* Good entry - add in the list */
3929 rl_prof_elem->prof_id_ref = 0;
3930 LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3931 return rl_prof_elem;
3934 ice_free(hw, rl_prof_elem);
3939 * ice_sched_cfg_node_bw_lmt - configure node sched params
3940 * @hw: pointer to the HW struct
3941 * @node: sched node to configure
3942 * @rl_type: rate limit type CIR, EIR, or shared
3943 * @rl_prof_id: rate limit profile ID
3945 * This function configures node element's BW limit.
3947 static enum ice_status
3948 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3949 enum ice_rl_type rl_type, u16 rl_prof_id)
3951 struct ice_aqc_txsched_elem_data buf;
3952 struct ice_aqc_txsched_elem *data;
3958 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3959 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3962 /* EIR BW and Shared BW profiles are mutually exclusive and
3963 * hence only one of them may be set for any given element
3965 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3967 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3968 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3971 /* Check for removing shared BW */
3972 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3973 /* remove shared profile */
3974 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3975 data->srl_id = 0; /* clear SRL field */
3977 /* enable back EIR to default profile */
3978 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3979 data->eir_bw.bw_profile_idx =
3980 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3983 /* EIR BW and Shared BW profiles are mutually exclusive and
3984 * hence only one of them may be set for any given element
3986 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3987 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3988 ICE_SCHED_DFLT_RL_PROF_ID))
3990 /* EIR BW is set to default, disable it */
3991 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3992 /* Okay to enable shared BW now */
3993 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
3994 data->srl_id = CPU_TO_LE16(rl_prof_id);
3997 /* Unknown rate limit type */
3998 return ICE_ERR_PARAM;
4001 /* Configure element */
4002 return ice_sched_update_elem(hw, node, &buf);
4006 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
4008 * @rl_type: rate limit type
4010 * If existing profile matches, it returns the corresponding rate
4011 * limit profile ID, otherwise it returns an invalid ID as error.
4014 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
4015 enum ice_rl_type rl_type)
4017 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
4018 struct ice_aqc_txsched_elem *data;
4020 data = &node->info.data;
4023 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
4024 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
4027 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
4028 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
4031 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
4032 rl_prof_id = LE16_TO_CPU(data->srl_id);
4042 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
4043 * @pi: port information structure
4044 * @rl_type: type of rate limit BW - min, max, or shared
4045 * @layer_index: layer index
4047 * This function returns requested profile creation layer.
4050 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
4053 struct ice_hw *hw = pi->hw;
4055 if (layer_index >= hw->num_tx_sched_layers)
4056 return ICE_SCHED_INVAL_LAYER_NUM;
4059 if (hw->layer_info[layer_index].max_cir_rl_profiles)
4063 if (hw->layer_info[layer_index].max_eir_rl_profiles)
4067 /* if current layer doesn't support SRL profile creation
4068 * then try a layer up or down.
4070 if (hw->layer_info[layer_index].max_srl_profiles)
4072 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4073 hw->layer_info[layer_index + 1].max_srl_profiles)
4074 return layer_index + 1;
4075 else if (layer_index > 0 &&
4076 hw->layer_info[layer_index - 1].max_srl_profiles)
4077 return layer_index - 1;
4082 return ICE_SCHED_INVAL_LAYER_NUM;
4086 * ice_sched_get_srl_node - get shared rate limit node
4088 * @srl_layer: shared rate limit layer
4090 * This function returns SRL node to be used for shared rate limit purpose.
4091 * The caller needs to hold scheduler lock.
4093 static struct ice_sched_node *
4094 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4096 if (srl_layer > node->tx_sched_layer)
4097 return node->children[0];
4098 else if (srl_layer < node->tx_sched_layer)
4099 /* Node can't be created without a parent. It will always
4100 * have a valid parent except root node.
4102 return node->parent;
4108 * ice_sched_rm_rl_profile - remove RL profile ID
4109 * @pi: port information structure
4110 * @layer_num: layer number where profiles are saved
4111 * @profile_type: profile type like EIR, CIR, or SRL
4112 * @profile_id: profile ID to remove
4114 * This function removes rate limit profile from layer 'layer_num' of type
4115 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4118 static enum ice_status
4119 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
4122 struct ice_aqc_rl_profile_info *rl_prof_elem;
4123 enum ice_status status = ICE_SUCCESS;
4125 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4126 return ICE_ERR_PARAM;
4127 /* Check the existing list for RL profile */
4128 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
4129 ice_aqc_rl_profile_info, list_entry)
4130 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
4132 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4134 if (rl_prof_elem->prof_id_ref)
4135 rl_prof_elem->prof_id_ref--;
4137 /* Remove old profile ID from database */
4138 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
4139 if (status && status != ICE_ERR_IN_USE)
4140 ice_debug(pi->hw, ICE_DBG_SCHED,
4141 "Remove rl profile failed\n");
4144 if (status == ICE_ERR_IN_USE)
4145 status = ICE_SUCCESS;
4150 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4151 * @pi: port information structure
4152 * @node: pointer to node structure
4153 * @rl_type: rate limit type min, max, or shared
4154 * @layer_num: layer number where RL profiles are saved
4156 * This function configures node element's BW rate limit profile ID of
4157 * type CIR, EIR, or SRL to default. This function needs to be called
4158 * with the scheduler lock held.
4160 static enum ice_status
4161 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4162 struct ice_sched_node *node,
4163 enum ice_rl_type rl_type, u8 layer_num)
4165 enum ice_status status;
4174 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4175 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4178 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4179 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4182 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4183 /* No SRL is configured for default case */
4184 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4187 return ICE_ERR_PARAM;
4189 /* Save existing RL prof ID for later clean up */
4190 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4191 /* Configure BW scheduling parameters */
4192 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4196 /* Remove stale RL profile ID */
4197 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4198 old_id == ICE_SCHED_INVAL_PROF_ID)
4201 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
4205 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
4206 * @pi: port information structure
4207 * @node: pointer to node structure
4208 * @layer_num: layer number where rate limit profiles are saved
4209 * @rl_type: rate limit type min, max, or shared
4210 * @bw: bandwidth value
4212 * This function prepares node element's bandwidth to SRL or EIR exclusively.
4213 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
4214 * them may be set for any given element. This function needs to be called
4215 * with the scheduler lock held.
4217 static enum ice_status
4218 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
4219 struct ice_sched_node *node,
4220 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
4222 if (rl_type == ICE_SHARED_BW) {
4223 /* SRL node passed in this case, it may be different node */
4224 if (bw == ICE_SCHED_DFLT_BW)
4225 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
4226 * enables EIR to default. EIR is not set in this
4227 * case, so no additional action is required.
4231 /* SRL being configured, set EIR to default here.
4232 * ice_sched_cfg_node_bw_lmt() disables EIR when it
4235 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
4237 } else if (rl_type == ICE_MAX_BW &&
4238 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
4239 /* Remove Shared profile. Set default shared BW call
4240 * removes shared profile for a node.
4242 return ice_sched_set_node_bw_dflt(pi, node,
4250 * ice_sched_set_node_bw - set node's bandwidth
4251 * @pi: port information structure
4253 * @rl_type: rate limit type min, max, or shared
4254 * @bw: bandwidth in Kbps - Kilo bits per sec
4255 * @layer_num: layer number
4257 * This function adds new profile corresponding to requested BW, configures
4258 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4259 * ID from local database. The caller needs to hold scheduler lock.
4261 static enum ice_status
4262 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4263 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4265 struct ice_aqc_rl_profile_info *rl_prof_info;
4266 enum ice_status status = ICE_ERR_PARAM;
4267 struct ice_hw *hw = pi->hw;
4268 u16 old_id, rl_prof_id;
4270 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
4274 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4276 /* Save existing RL prof ID for later clean up */
4277 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4278 /* Configure BW scheduling parameters */
4279 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4283 /* New changes has been applied */
4284 /* Increment the profile ID reference count */
4285 rl_prof_info->prof_id_ref++;
4287 /* Check for old ID removal */
4288 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4289 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4292 return ice_sched_rm_rl_profile(pi, layer_num,
4293 rl_prof_info->profile.flags &
4294 ICE_AQC_RL_PROFILE_TYPE_M, old_id);
4298 * ice_sched_set_node_bw_lmt - set node's BW limit
4299 * @pi: port information structure
4301 * @rl_type: rate limit type min, max, or shared
4302 * @bw: bandwidth in Kbps - Kilo bits per sec
4304 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4305 * EIR, or SRL. The caller needs to hold scheduler lock.
4307 static enum ice_status
4308 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4309 enum ice_rl_type rl_type, u32 bw)
4311 struct ice_sched_node *cfg_node = node;
4312 enum ice_status status;
4318 return ICE_ERR_PARAM;
4320 /* Remove unused RL profile IDs from HW and SW DB */
4321 ice_sched_rm_unused_rl_prof(pi);
4322 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4323 node->tx_sched_layer);
4324 if (layer_num >= hw->num_tx_sched_layers)
4325 return ICE_ERR_PARAM;
4327 if (rl_type == ICE_SHARED_BW) {
4328 /* SRL node may be different */
4329 cfg_node = ice_sched_get_srl_node(node, layer_num);
4333 /* EIR BW and Shared BW profiles are mutually exclusive and
4334 * hence only one of them may be set for any given element
4336 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
4340 if (bw == ICE_SCHED_DFLT_BW)
4341 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
4343 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
4347 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4348 * @pi: port information structure
4349 * @node: pointer to node structure
4350 * @rl_type: rate limit type min, max, or shared
4352 * This function configures node element's BW rate limit profile ID of
4353 * type CIR, EIR, or SRL to default. This function needs to be called
4354 * with the scheduler lock held.
4356 static enum ice_status
4357 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4358 struct ice_sched_node *node,
4359 enum ice_rl_type rl_type)
4361 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4366 * ice_sched_validate_srl_node - Check node for SRL applicability
4367 * @node: sched node to configure
4368 * @sel_layer: selected SRL layer
4370 * This function checks if the SRL can be applied to a selceted layer node on
4371 * behalf of the requested node (first argument). This function needs to be
4372 * called with scheduler lock held.
4374 static enum ice_status
4375 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4377 /* SRL profiles are not available on all layers. Check if the
4378 * SRL profile can be applied to a node above or below the
4379 * requested node. SRL configuration is possible only if the
4380 * selected layer's node has single child.
4382 if (sel_layer == node->tx_sched_layer ||
4383 ((sel_layer == node->tx_sched_layer + 1) &&
4384 node->num_children == 1) ||
4385 ((sel_layer == node->tx_sched_layer - 1) &&
4386 (node->parent && node->parent->num_children == 1)))
4393 * ice_sched_save_q_bw - save queue node's BW information
4394 * @q_ctx: queue context structure
4395 * @rl_type: rate limit type min, max, or shared
4396 * @bw: bandwidth in Kbps - Kilo bits per sec
4398 * Save BW information of queue type node for post replay use.
4400 static enum ice_status
4401 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4405 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4408 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4411 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4414 return ICE_ERR_PARAM;
4420 * ice_sched_set_q_bw_lmt - sets queue BW limit
4421 * @pi: port information structure
4422 * @vsi_handle: sw VSI handle
4423 * @tc: traffic class
4424 * @q_handle: software queue handle
4425 * @rl_type: min, max, or shared
4426 * @bw: bandwidth in Kbps
4428 * This function sets BW limit of queue scheduling node.
4430 static enum ice_status
4431 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4432 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4434 enum ice_status status = ICE_ERR_PARAM;
4435 struct ice_sched_node *node;
4436 struct ice_q_ctx *q_ctx;
4438 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4439 return ICE_ERR_PARAM;
4440 ice_acquire_lock(&pi->sched_lock);
4441 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4444 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4446 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4450 /* Return error if it is not a leaf node */
4451 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4454 /* SRL bandwidth layer selection */
4455 if (rl_type == ICE_SHARED_BW) {
4456 u8 sel_layer; /* selected layer */
4458 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4459 node->tx_sched_layer);
4460 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4461 status = ICE_ERR_PARAM;
4464 status = ice_sched_validate_srl_node(node, sel_layer);
4469 if (bw == ICE_SCHED_DFLT_BW)
4470 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4472 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4475 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4478 ice_release_lock(&pi->sched_lock);
4483 * ice_cfg_q_bw_lmt - configure queue BW limit
4484 * @pi: port information structure
4485 * @vsi_handle: sw VSI handle
4486 * @tc: traffic class
4487 * @q_handle: software queue handle
4488 * @rl_type: min, max, or shared
4489 * @bw: bandwidth in Kbps
4491 * This function configures BW limit of queue scheduling node.
4494 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4495 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4497 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4502 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4503 * @pi: port information structure
4504 * @vsi_handle: sw VSI handle
4505 * @tc: traffic class
4506 * @q_handle: software queue handle
4507 * @rl_type: min, max, or shared
4509 * This function configures BW default limit of queue scheduling node.
4512 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4513 u16 q_handle, enum ice_rl_type rl_type)
4515 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4520 * ice_sched_save_tc_node_bw - save TC node BW limit
4521 * @pi: port information structure
4523 * @rl_type: min or max
4524 * @bw: bandwidth in Kbps
4526 * This function saves the modified values of bandwidth settings for later
4527 * replay purpose (restore) after reset.
4529 static enum ice_status
4530 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4531 enum ice_rl_type rl_type, u32 bw)
4533 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4534 return ICE_ERR_PARAM;
4537 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4540 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4543 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4546 return ICE_ERR_PARAM;
4552 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4553 * @pi: port information structure
4555 * @rl_type: min or max
4556 * @bw: bandwidth in Kbps
4558 * This function configures bandwidth limit of TC node.
4560 static enum ice_status
4561 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4562 enum ice_rl_type rl_type, u32 bw)
4564 enum ice_status status = ICE_ERR_PARAM;
4565 struct ice_sched_node *tc_node;
4567 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4569 ice_acquire_lock(&pi->sched_lock);
4570 tc_node = ice_sched_get_tc_node(pi, tc);
4572 goto exit_set_tc_node_bw;
4573 if (bw == ICE_SCHED_DFLT_BW)
4574 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4576 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4578 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4580 exit_set_tc_node_bw:
4581 ice_release_lock(&pi->sched_lock);
4586 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4587 * @pi: port information structure
4589 * @rl_type: min or max
4590 * @bw: bandwidth in Kbps
4592 * This function configures BW limit of TC node.
4593 * Note: The minimum guaranteed reservation is done via DCBX.
4596 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4597 enum ice_rl_type rl_type, u32 bw)
4599 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4603 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4604 * @pi: port information structure
4606 * @rl_type: min or max
4608 * This function configures BW default limit of TC node.
4611 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4612 enum ice_rl_type rl_type)
4614 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4618 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4619 * @pi: port information structure
4620 * @tc: traffic class
4621 * @rl_type: rate limit type min or max
4622 * @bw_alloc: Bandwidth allocation information
4624 * Save BW alloc information of VSI type node for post replay use.
4626 static enum ice_status
4627 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4628 enum ice_rl_type rl_type, u16 bw_alloc)
4630 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4631 return ICE_ERR_PARAM;
4634 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4638 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4642 return ICE_ERR_PARAM;
4648 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4649 * @pi: port information structure
4651 * @rl_type: min or max
4652 * @bw_alloc: bandwidth alloc
4654 * This function configures bandwidth alloc of TC node, also saves the
4655 * changed settings for replay purpose, and return success if it succeeds
4656 * in modifying bandwidth alloc setting.
4658 static enum ice_status
4659 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4660 enum ice_rl_type rl_type, u8 bw_alloc)
4662 enum ice_status status = ICE_ERR_PARAM;
4663 struct ice_sched_node *tc_node;
4665 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4667 ice_acquire_lock(&pi->sched_lock);
4668 tc_node = ice_sched_get_tc_node(pi, tc);
4670 goto exit_set_tc_node_bw_alloc;
4671 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4674 goto exit_set_tc_node_bw_alloc;
4675 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4677 exit_set_tc_node_bw_alloc:
4678 ice_release_lock(&pi->sched_lock);
4683 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4684 * @pi: port information structure
4686 * @rl_type: min or max
4687 * @bw_alloc: bandwidth alloc
4689 * This function configures BW limit of TC node.
4690 * Note: The minimum guaranteed reservation is done via DCBX.
4693 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4694 enum ice_rl_type rl_type, u8 bw_alloc)
4696 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4700 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4701 * @pi: port information structure
4702 * @vsi_handle: software VSI handle
4704 * This function retrieves the aggregator ID based on VSI ID and TC,
4705 * and sets node's BW limit to default. This function needs to be
4706 * called with the scheduler lock held.
4709 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4711 struct ice_vsi_ctx *vsi_ctx;
4712 enum ice_status status = ICE_SUCCESS;
4715 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4716 return ICE_ERR_PARAM;
4717 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4719 return ICE_ERR_PARAM;
4721 ice_for_each_traffic_class(tc) {
4722 struct ice_sched_node *node;
4724 node = vsi_ctx->sched.ag_node[tc];
4728 /* Set min profile to default */
4729 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4733 /* Set max profile to default */
4734 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4738 /* Remove shared profile, if there is one */
4739 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4749 * ice_sched_get_node_by_id_type - get node from ID type
4750 * @pi: port information structure
4752 * @agg_type: type of aggregator
4753 * @tc: traffic class
4755 * This function returns node identified by ID of type aggregator, and
4756 * based on traffic class (TC). This function needs to be called with
4757 * the scheduler lock held.
4759 static struct ice_sched_node *
4760 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4761 enum ice_agg_type agg_type, u8 tc)
4763 struct ice_sched_node *node = NULL;
4764 struct ice_sched_node *child_node;
4767 case ICE_AGG_TYPE_VSI: {
4768 struct ice_vsi_ctx *vsi_ctx;
4769 u16 vsi_handle = (u16)id;
4771 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4773 /* Get sched_vsi_info */
4774 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4777 node = vsi_ctx->sched.vsi_node[tc];
4781 case ICE_AGG_TYPE_AGG: {
4782 struct ice_sched_node *tc_node;
4784 tc_node = ice_sched_get_tc_node(pi, tc);
4786 node = ice_sched_get_agg_node(pi, tc_node, id);
4790 case ICE_AGG_TYPE_Q:
4791 /* The current implementation allows single queue to modify */
4792 node = ice_sched_get_node(pi, id);
4795 case ICE_AGG_TYPE_QG:
4796 /* The current implementation allows single qg to modify */
4797 child_node = ice_sched_get_node(pi, id);
4800 node = child_node->parent;
4811 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4812 * @pi: port information structure
4813 * @id: ID (software VSI handle or AGG ID)
4814 * @agg_type: aggregator type (VSI or AGG type node)
4815 * @tc: traffic class
4816 * @rl_type: min or max
4817 * @bw: bandwidth in Kbps
4819 * This function sets BW limit of VSI or Aggregator scheduling node
4820 * based on TC information from passed in argument BW.
4823 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4824 enum ice_agg_type agg_type, u8 tc,
4825 enum ice_rl_type rl_type, u32 bw)
4827 enum ice_status status = ICE_ERR_PARAM;
4828 struct ice_sched_node *node;
4833 if (rl_type == ICE_UNKNOWN_BW)
4836 ice_acquire_lock(&pi->sched_lock);
4837 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4839 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4840 goto exit_set_node_bw_lmt_per_tc;
4842 if (bw == ICE_SCHED_DFLT_BW)
4843 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4845 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4847 exit_set_node_bw_lmt_per_tc:
4848 ice_release_lock(&pi->sched_lock);
4853 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4854 * @pi: port information structure
4855 * @vsi_handle: software VSI handle
4857 * This function validates SRL node of the VSI node if available SRL layer is
4858 * different than the VSI node layer on all TC(s).This function needs to be
4859 * called with scheduler lock held.
4861 static enum ice_status
4862 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4864 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4867 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4868 return ICE_ERR_PARAM;
4870 /* Return success if no nodes are present across TC */
4871 ice_for_each_traffic_class(tc) {
4872 struct ice_sched_node *tc_node, *vsi_node;
4873 enum ice_rl_type rl_type = ICE_SHARED_BW;
4874 enum ice_status status;
4876 tc_node = ice_sched_get_tc_node(pi, tc);
4880 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4884 /* SRL bandwidth layer selection */
4885 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4886 u8 node_layer = vsi_node->tx_sched_layer;
4889 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4891 if (layer_num >= pi->hw->num_tx_sched_layers)
4892 return ICE_ERR_PARAM;
4893 sel_layer = layer_num;
4896 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4904 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4905 * @pi: port information structure
4906 * @vsi_handle: software VSI handle
4907 * @bw: bandwidth in Kbps
4909 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4910 * across all traffic classes for VSI matching handle. When BW value of
4911 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4914 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4917 enum ice_status status = ICE_SUCCESS;
4921 return ICE_ERR_PARAM;
4923 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4924 return ICE_ERR_PARAM;
4926 ice_acquire_lock(&pi->sched_lock);
4927 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4929 goto exit_set_vsi_bw_shared_lmt;
4930 /* Return success if no nodes are present across TC */
4931 ice_for_each_traffic_class(tc) {
4932 struct ice_sched_node *tc_node, *vsi_node;
4933 enum ice_rl_type rl_type = ICE_SHARED_BW;
4935 tc_node = ice_sched_get_tc_node(pi, tc);
4939 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4943 if (bw == ICE_SCHED_DFLT_BW)
4944 /* It removes existing SRL from the node */
4945 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4948 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4952 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4957 exit_set_vsi_bw_shared_lmt:
4958 ice_release_lock(&pi->sched_lock);
4963 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4964 * @pi: port information structure
4965 * @agg_id: aggregator ID
4967 * This function validates SRL node of the AGG node if available SRL layer is
4968 * different than the AGG node layer on all TC(s).This function needs to be
4969 * called with scheduler lock held.
4971 static enum ice_status
4972 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4974 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4975 struct ice_sched_agg_info *agg_info;
4976 bool agg_id_present = false;
4977 enum ice_status status = ICE_SUCCESS;
4980 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4982 if (agg_info->agg_id == agg_id) {
4983 agg_id_present = true;
4986 if (!agg_id_present)
4987 return ICE_ERR_PARAM;
4988 /* Return success if no nodes are present across TC */
4989 ice_for_each_traffic_class(tc) {
4990 struct ice_sched_node *tc_node, *agg_node;
4991 enum ice_rl_type rl_type = ICE_SHARED_BW;
4993 tc_node = ice_sched_get_tc_node(pi, tc);
4997 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5000 /* SRL bandwidth layer selection */
5001 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
5002 u8 node_layer = agg_node->tx_sched_layer;
5005 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
5007 if (layer_num >= pi->hw->num_tx_sched_layers)
5008 return ICE_ERR_PARAM;
5009 sel_layer = layer_num;
5012 status = ice_sched_validate_srl_node(agg_node, sel_layer);
5020 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
5021 * @pi: port information structure
5022 * @agg_id: aggregator ID
5023 * @bw: bandwidth in Kbps
5025 * This function configures the shared rate limiter(SRL) of all aggregator type
5026 * nodes across all traffic classes for aggregator matching agg_id. When
5027 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
5031 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
5033 struct ice_sched_agg_info *agg_info;
5034 struct ice_sched_agg_info *tmp;
5035 bool agg_id_present = false;
5036 enum ice_status status = ICE_SUCCESS;
5040 return ICE_ERR_PARAM;
5042 ice_acquire_lock(&pi->sched_lock);
5043 status = ice_sched_validate_agg_srl_node(pi, agg_id);
5045 goto exit_agg_bw_shared_lmt;
5047 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
5048 ice_sched_agg_info, list_entry)
5049 if (agg_info->agg_id == agg_id) {
5050 agg_id_present = true;
5054 if (!agg_id_present) {
5055 status = ICE_ERR_PARAM;
5056 goto exit_agg_bw_shared_lmt;
5059 /* Return success if no nodes are present across TC */
5060 ice_for_each_traffic_class(tc) {
5061 enum ice_rl_type rl_type = ICE_SHARED_BW;
5062 struct ice_sched_node *tc_node, *agg_node;
5064 tc_node = ice_sched_get_tc_node(pi, tc);
5068 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5072 if (bw == ICE_SCHED_DFLT_BW)
5073 /* It removes existing SRL from the node */
5074 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
5077 status = ice_sched_set_node_bw_lmt(pi, agg_node,
5081 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5086 exit_agg_bw_shared_lmt:
5087 ice_release_lock(&pi->sched_lock);
5092 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5093 * @pi: port information structure
5094 * @node: sched node to configure
5095 * @priority: sibling priority
5097 * This function configures node element's sibling priority only. This
5098 * function needs to be called with scheduler lock held.
5101 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5102 struct ice_sched_node *node, u8 priority)
5104 struct ice_aqc_txsched_elem_data buf;
5105 struct ice_aqc_txsched_elem *data;
5106 struct ice_hw *hw = pi->hw;
5107 enum ice_status status;
5110 return ICE_ERR_PARAM;
5113 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5114 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5115 ICE_AQC_ELEM_GENERIC_PRIO_M;
5116 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5117 data->generic |= priority;
5119 /* Configure element */
5120 status = ice_sched_update_elem(hw, node, &buf);
5125 * ice_cfg_rl_burst_size - Set burst size value
5126 * @hw: pointer to the HW struct
5127 * @bytes: burst size in bytes
5129 * This function configures/set the burst size to requested new value. The new
5130 * burst size value is used for future rate limit calls. It doesn't change the
5131 * existing or previously created RL profiles.
5133 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5135 u16 burst_size_to_prog;
5137 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5138 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5139 return ICE_ERR_PARAM;
5140 if (ice_round_to_num(bytes, 64) <=
5141 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5142 /* 64 byte granularity case */
5143 /* Disable MSB granularity bit */
5144 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5145 /* round number to nearest 64 byte granularity */
5146 bytes = ice_round_to_num(bytes, 64);
5147 /* The value is in 64 byte chunks */
5148 burst_size_to_prog |= (u16)(bytes / 64);
5150 /* k bytes granularity case */
5151 /* Enable MSB granularity bit */
5152 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5153 /* round number to nearest 1024 granularity */
5154 bytes = ice_round_to_num(bytes, 1024);
5155 /* check rounding doesn't go beyond allowed */
5156 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5157 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5158 /* The value is in k bytes */
5159 burst_size_to_prog |= (u16)(bytes / 1024);
5161 hw->max_burst_size = burst_size_to_prog;
5166 * ice_sched_replay_node_prio - re-configure node priority
5167 * @hw: pointer to the HW struct
5168 * @node: sched node to configure
5169 * @priority: priority value
5171 * This function configures node element's priority value. It
5172 * needs to be called with scheduler lock held.
5174 static enum ice_status
5175 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5178 struct ice_aqc_txsched_elem_data buf;
5179 struct ice_aqc_txsched_elem *data;
5180 enum ice_status status;
5184 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5185 data->generic = priority;
5187 /* Configure element */
5188 status = ice_sched_update_elem(hw, node, &buf);
5193 * ice_sched_replay_node_bw - replay node(s) BW
5194 * @hw: pointer to the HW struct
5195 * @node: sched node to configure
5196 * @bw_t_info: BW type information
5198 * This function restores node's BW from bw_t_info. The caller needs
5199 * to hold the scheduler lock.
5201 static enum ice_status
5202 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5203 struct ice_bw_type_info *bw_t_info)
5205 struct ice_port_info *pi = hw->port_info;
5206 enum ice_status status = ICE_ERR_PARAM;
5211 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5213 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5214 status = ice_sched_replay_node_prio(hw, node,
5215 bw_t_info->generic);
5219 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5220 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5221 bw_t_info->cir_bw.bw);
5225 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5226 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5227 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5232 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5233 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5234 bw_t_info->eir_bw.bw);
5238 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5239 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5240 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5245 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5246 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5247 bw_t_info->shared_bw);
5252 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5253 * @hw: pointer to the HW struct
5254 * @agg_info: aggregator data structure
5256 * This function re-creates aggregator type nodes. The caller needs to hold
5257 * the scheduler lock.
5259 static enum ice_status
5260 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5262 struct ice_sched_node *tc_node, *agg_node;
5263 enum ice_status status = ICE_SUCCESS;
5267 return ICE_ERR_PARAM;
5268 ice_for_each_traffic_class(tc) {
5269 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5272 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5274 status = ICE_ERR_PARAM;
5277 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5280 status = ICE_ERR_PARAM;
5283 status = ice_sched_replay_node_bw(hw, agg_node,
5284 &agg_info->bw_t_info[tc]);
5292 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5293 * @pi: port info struct
5294 * @tc_bitmap: 8 bits TC bitmap to check
5295 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5297 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5298 * may be missing, it returns enabled TCs. This function needs to be called with
5299 * scheduler lock held.
5302 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5303 ice_bitmap_t *ena_tc_bitmap)
5307 /* Some TC(s) may be missing after reset, adjust for replay */
5308 ice_for_each_traffic_class(tc)
5309 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5310 (ice_sched_get_tc_node(pi, tc)))
5311 ice_set_bit(tc, ena_tc_bitmap);
5315 * ice_sched_replay_agg - recreate aggregator node(s)
5316 * @hw: pointer to the HW struct
5318 * This function recreate aggregator type nodes which are not replayed earlier.
5319 * It also replay aggregator BW information. These aggregator nodes are not
5320 * associated with VSI type node yet.
5322 void ice_sched_replay_agg(struct ice_hw *hw)
5324 struct ice_port_info *pi = hw->port_info;
5325 struct ice_sched_agg_info *agg_info;
5327 ice_acquire_lock(&pi->sched_lock);
5328 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5330 /* replay aggregator (re-create aggregator node) */
5331 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5332 agg_info->replay_tc_bitmap,
5333 ICE_MAX_TRAFFIC_CLASS)) {
5334 ice_declare_bitmap(replay_bitmap,
5335 ICE_MAX_TRAFFIC_CLASS);
5336 enum ice_status status;
5338 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5339 ice_sched_get_ena_tc_bitmap(pi,
5340 agg_info->replay_tc_bitmap,
5342 status = ice_sched_cfg_agg(hw->port_info,
5347 ice_info(hw, "Replay agg id[%d] failed\n",
5349 /* Move on to next one */
5352 /* Replay aggregator node BW (restore aggregator BW) */
5353 status = ice_sched_replay_agg_bw(hw, agg_info);
5355 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5358 ice_release_lock(&pi->sched_lock);
5362 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5363 * @hw: pointer to the HW struct
5365 * This function initialize aggregator(s) TC bitmap to zero. A required
5366 * preinit step for replaying aggregators.
5368 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5370 struct ice_port_info *pi = hw->port_info;
5371 struct ice_sched_agg_info *agg_info;
5373 ice_acquire_lock(&pi->sched_lock);
5374 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5376 struct ice_sched_agg_vsi_info *agg_vsi_info;
5378 agg_info->tc_bitmap[0] = 0;
5379 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5380 ice_sched_agg_vsi_info, list_entry)
5381 agg_vsi_info->tc_bitmap[0] = 0;
5383 ice_release_lock(&pi->sched_lock);
5387 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5388 * @pi: port information structure
5390 * This function replay TC nodes.
5392 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5394 enum ice_status status = ICE_SUCCESS;
5398 return ICE_ERR_PARAM;
5399 ice_acquire_lock(&pi->sched_lock);
5400 ice_for_each_traffic_class(tc) {
5401 struct ice_sched_node *tc_node;
5403 tc_node = ice_sched_get_tc_node(pi, tc);
5405 continue; /* TC not present */
5406 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5407 &pi->tc_node_bw_t_info[tc]);
5411 ice_release_lock(&pi->sched_lock);
5416 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5417 * @hw: pointer to the HW struct
5418 * @vsi_handle: software VSI handle
5419 * @tc_bitmap: 8 bits TC bitmap
5421 * This function replays VSI type nodes bandwidth. This function needs to be
5422 * called with scheduler lock held.
5424 static enum ice_status
5425 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5426 ice_bitmap_t *tc_bitmap)
5428 struct ice_sched_node *vsi_node, *tc_node;
5429 struct ice_port_info *pi = hw->port_info;
5430 struct ice_bw_type_info *bw_t_info;
5431 struct ice_vsi_ctx *vsi_ctx;
5432 enum ice_status status = ICE_SUCCESS;
5435 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5437 return ICE_ERR_PARAM;
5438 ice_for_each_traffic_class(tc) {
5439 if (!ice_is_tc_ena(*tc_bitmap, tc))
5441 tc_node = ice_sched_get_tc_node(pi, tc);
5444 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5447 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5448 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5456 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5457 * @hw: pointer to the HW struct
5458 * @vsi_handle: software VSI handle
5460 * This function replays aggregator node, VSI to aggregator type nodes, and
5461 * their node bandwidth information. This function needs to be called with
5462 * scheduler lock held.
5464 static enum ice_status
5465 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5467 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5468 struct ice_sched_agg_vsi_info *agg_vsi_info;
5469 struct ice_port_info *pi = hw->port_info;
5470 struct ice_sched_agg_info *agg_info;
5471 enum ice_status status;
5473 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5474 if (!ice_is_vsi_valid(hw, vsi_handle))
5475 return ICE_ERR_PARAM;
5476 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5478 return ICE_SUCCESS; /* Not present in list - default Agg case */
5479 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5481 return ICE_SUCCESS; /* Not present in list - default Agg case */
5482 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5484 /* Replay aggregator node associated to vsi_handle */
5485 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5486 ICE_AGG_TYPE_AGG, replay_bitmap);
5489 /* Replay aggregator node BW (restore aggregator BW) */
5490 status = ice_sched_replay_agg_bw(hw, agg_info);
5494 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5495 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5497 /* Move this VSI (vsi_handle) to above aggregator */
5498 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5502 /* Replay VSI BW (restore VSI BW) */
5503 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5504 agg_vsi_info->tc_bitmap);
5508 * ice_replay_vsi_agg - replay VSI to aggregator node
5509 * @hw: pointer to the HW struct
5510 * @vsi_handle: software VSI handle
5512 * This function replays association of VSI to aggregator type nodes, and
5513 * node bandwidth information.
5515 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5517 struct ice_port_info *pi = hw->port_info;
5518 enum ice_status status;
5520 ice_acquire_lock(&pi->sched_lock);
5521 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5522 ice_release_lock(&pi->sched_lock);
5527 * ice_sched_replay_q_bw - replay queue type node BW
5528 * @pi: port information structure
5529 * @q_ctx: queue context structure
5531 * This function replays queue type node bandwidth. This function needs to be
5532 * called with scheduler lock held.
5535 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5537 struct ice_sched_node *q_node;
5539 /* Following also checks the presence of node in tree */
5540 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5542 return ICE_ERR_PARAM;
5543 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);