1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2021 Intel Corporation
8 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
9 * @pi: port information structure
10 * @info: Scheduler element information from firmware
12 * This function inserts the root node of the scheduling tree topology
15 static enum ice_status
16 ice_sched_add_root_node(struct ice_port_info *pi,
17 struct ice_aqc_txsched_elem_data *info)
19 struct ice_sched_node *root;
27 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
29 return ICE_ERR_NO_MEMORY;
31 /* coverity[suspicious_sizeof] */
32 root->children = (struct ice_sched_node **)
33 ice_calloc(hw, hw->max_children[0], sizeof(*root));
34 if (!root->children) {
36 return ICE_ERR_NO_MEMORY;
39 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
45 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
46 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
47 * @teid: node TEID to search
49 * This function searches for a node matching the TEID in the scheduling tree
50 * from the SW DB. The search is recursive and is restricted by the number of
51 * layers it has searched through; stopping at the max supported layer.
53 * This function needs to be called when holding the port_info->sched_lock
55 struct ice_sched_node *
56 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
60 /* The TEID is same as that of the start_node */
61 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
64 /* The node has no children or is at the max layer */
65 if (!start_node->num_children ||
66 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
67 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
70 /* Check if TEID matches to any of the children nodes */
71 for (i = 0; i < start_node->num_children; i++)
72 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
73 return start_node->children[i];
75 /* Search within each child's sub-tree */
76 for (i = 0; i < start_node->num_children; i++) {
77 struct ice_sched_node *tmp;
79 tmp = ice_sched_find_node_by_teid(start_node->children[i],
89 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
90 * @hw: pointer to the HW struct
91 * @cmd_opc: cmd opcode
92 * @elems_req: number of elements to request
93 * @buf: pointer to buffer
94 * @buf_size: buffer size in bytes
95 * @elems_resp: returns total number of elements response
96 * @cd: pointer to command details structure or NULL
98 * This function sends a scheduling elements cmd (cmd_opc)
100 static enum ice_status
101 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
102 u16 elems_req, void *buf, u16 buf_size,
103 u16 *elems_resp, struct ice_sq_cd *cd)
105 struct ice_aqc_sched_elem_cmd *cmd;
106 struct ice_aq_desc desc;
107 enum ice_status status;
109 cmd = &desc.params.sched_elem_cmd;
110 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
111 cmd->num_elem_req = CPU_TO_LE16(elems_req);
112 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
113 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
114 if (!status && elems_resp)
115 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
121 * ice_aq_query_sched_elems - query scheduler elements
122 * @hw: pointer to the HW struct
123 * @elems_req: number of elements to query
124 * @buf: pointer to buffer
125 * @buf_size: buffer size in bytes
126 * @elems_ret: returns total number of elements returned
127 * @cd: pointer to command details structure or NULL
129 * Query scheduling elements (0x0404)
132 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
133 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
134 u16 *elems_ret, struct ice_sq_cd *cd)
136 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
137 elems_req, (void *)buf, buf_size,
142 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
143 * @pi: port information structure
144 * @layer: Scheduler layer of the node
145 * @info: Scheduler element information from firmware
147 * This function inserts a scheduler node to the SW DB.
150 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
151 struct ice_aqc_txsched_elem_data *info)
153 struct ice_aqc_txsched_elem_data elem;
154 struct ice_sched_node *parent;
155 struct ice_sched_node *node;
156 enum ice_status status;
160 return ICE_ERR_PARAM;
164 /* A valid parent node should be there */
165 parent = ice_sched_find_node_by_teid(pi->root,
166 LE32_TO_CPU(info->parent_teid));
168 ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n",
169 LE32_TO_CPU(info->parent_teid));
170 return ICE_ERR_PARAM;
173 /* query the current node information from FW before adding it
176 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
179 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
181 return ICE_ERR_NO_MEMORY;
182 if (hw->max_children[layer]) {
183 /* coverity[suspicious_sizeof] */
184 node->children = (struct ice_sched_node **)
185 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
186 if (!node->children) {
188 return ICE_ERR_NO_MEMORY;
193 node->parent = parent;
194 node->tx_sched_layer = layer;
195 parent->children[parent->num_children++] = node;
201 * ice_aq_delete_sched_elems - delete scheduler elements
202 * @hw: pointer to the HW struct
203 * @grps_req: number of groups to delete
204 * @buf: pointer to buffer
205 * @buf_size: buffer size in bytes
206 * @grps_del: returns total number of elements deleted
207 * @cd: pointer to command details structure or NULL
209 * Delete scheduling elements (0x040F)
211 static enum ice_status
212 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
213 struct ice_aqc_delete_elem *buf, u16 buf_size,
214 u16 *grps_del, struct ice_sq_cd *cd)
216 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
217 grps_req, (void *)buf, buf_size,
222 * ice_sched_remove_elems - remove nodes from HW
223 * @hw: pointer to the HW struct
224 * @parent: pointer to the parent node
225 * @num_nodes: number of nodes
226 * @node_teids: array of node teids to be deleted
228 * This function remove nodes from HW
230 static enum ice_status
231 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
232 u16 num_nodes, u32 *node_teids)
234 struct ice_aqc_delete_elem *buf;
235 u16 i, num_groups_removed = 0;
236 enum ice_status status;
239 buf_size = ice_struct_size(buf, teid, num_nodes);
240 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
242 return ICE_ERR_NO_MEMORY;
244 buf->hdr.parent_teid = parent->info.node_teid;
245 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
246 for (i = 0; i < num_nodes; i++)
247 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
249 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
250 &num_groups_removed, NULL);
251 if (status != ICE_SUCCESS || num_groups_removed != 1)
252 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
253 hw->adminq.sq_last_status);
260 * ice_sched_get_first_node - get the first node of the given layer
261 * @pi: port information structure
262 * @parent: pointer the base node of the subtree
263 * @layer: layer number
265 * This function retrieves the first node of the given layer from the subtree
267 static struct ice_sched_node *
268 ice_sched_get_first_node(struct ice_port_info *pi,
269 struct ice_sched_node *parent, u8 layer)
271 return pi->sib_head[parent->tc_num][layer];
275 * ice_sched_get_tc_node - get pointer to TC node
276 * @pi: port information structure
279 * This function returns the TC node pointer
281 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
285 if (!pi || !pi->root)
287 for (i = 0; i < pi->root->num_children; i++)
288 if (pi->root->children[i]->tc_num == tc)
289 return pi->root->children[i];
294 * ice_free_sched_node - Free a Tx scheduler node from SW DB
295 * @pi: port information structure
296 * @node: pointer to the ice_sched_node struct
298 * This function frees up a node from SW DB as well as from HW
300 * This function needs to be called with the port_info->sched_lock held
302 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
304 struct ice_sched_node *parent;
305 struct ice_hw *hw = pi->hw;
308 /* Free the children before freeing up the parent node
309 * The parent array is updated below and that shifts the nodes
310 * in the array. So always pick the first child if num children > 0
312 while (node->num_children)
313 ice_free_sched_node(pi, node->children[0]);
315 /* Leaf, TC and root nodes can't be deleted by SW */
316 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
317 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
320 u32 teid = LE32_TO_CPU(node->info.node_teid);
322 ice_sched_remove_elems(hw, node->parent, 1, &teid);
324 parent = node->parent;
325 /* root has no parent */
327 struct ice_sched_node *p;
329 /* update the parent */
330 for (i = 0; i < parent->num_children; i++)
331 if (parent->children[i] == node) {
332 for (j = i + 1; j < parent->num_children; j++)
333 parent->children[j - 1] =
335 parent->num_children--;
339 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
341 if (p->sibling == node) {
342 p->sibling = node->sibling;
348 /* update the sibling head if head is getting removed */
349 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
350 pi->sib_head[node->tc_num][node->tx_sched_layer] =
354 /* leaf nodes have no children */
356 ice_free(hw, node->children);
361 * ice_aq_get_dflt_topo - gets default scheduler topology
362 * @hw: pointer to the HW struct
363 * @lport: logical port number
364 * @buf: pointer to buffer
365 * @buf_size: buffer size in bytes
366 * @num_branches: returns total number of queue to port branches
367 * @cd: pointer to command details structure or NULL
369 * Get default scheduler topology (0x400)
371 static enum ice_status
372 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
373 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
374 u8 *num_branches, struct ice_sq_cd *cd)
376 struct ice_aqc_get_topo *cmd;
377 struct ice_aq_desc desc;
378 enum ice_status status;
380 cmd = &desc.params.get_topo;
381 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
382 cmd->port_num = lport;
383 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
384 if (!status && num_branches)
385 *num_branches = cmd->num_branches;
391 * ice_aq_add_sched_elems - adds scheduling element
392 * @hw: pointer to the HW struct
393 * @grps_req: the number of groups that are requested to be added
394 * @buf: pointer to buffer
395 * @buf_size: buffer size in bytes
396 * @grps_added: returns total number of groups added
397 * @cd: pointer to command details structure or NULL
399 * Add scheduling elements (0x0401)
401 static enum ice_status
402 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
403 struct ice_aqc_add_elem *buf, u16 buf_size,
404 u16 *grps_added, struct ice_sq_cd *cd)
406 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
407 grps_req, (void *)buf, buf_size,
412 * ice_aq_cfg_sched_elems - configures scheduler elements
413 * @hw: pointer to the HW struct
414 * @elems_req: number of elements to configure
415 * @buf: pointer to buffer
416 * @buf_size: buffer size in bytes
417 * @elems_cfgd: returns total number of elements configured
418 * @cd: pointer to command details structure or NULL
420 * Configure scheduling elements (0x0403)
422 static enum ice_status
423 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
424 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
425 u16 *elems_cfgd, struct ice_sq_cd *cd)
427 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
428 elems_req, (void *)buf, buf_size,
433 * ice_aq_move_sched_elems - move scheduler elements
434 * @hw: pointer to the HW struct
435 * @grps_req: number of groups to move
436 * @buf: pointer to buffer
437 * @buf_size: buffer size in bytes
438 * @grps_movd: returns total number of groups moved
439 * @cd: pointer to command details structure or NULL
441 * Move scheduling elements (0x0408)
443 static enum ice_status
444 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
445 struct ice_aqc_move_elem *buf, u16 buf_size,
446 u16 *grps_movd, struct ice_sq_cd *cd)
448 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
449 grps_req, (void *)buf, buf_size,
454 * ice_aq_suspend_sched_elems - suspend scheduler elements
455 * @hw: pointer to the HW struct
456 * @elems_req: number of elements to suspend
457 * @buf: pointer to buffer
458 * @buf_size: buffer size in bytes
459 * @elems_ret: returns total number of elements suspended
460 * @cd: pointer to command details structure or NULL
462 * Suspend scheduling elements (0x0409)
464 static enum ice_status
465 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
466 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
468 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
469 elems_req, (void *)buf, buf_size,
474 * ice_aq_resume_sched_elems - resume scheduler elements
475 * @hw: pointer to the HW struct
476 * @elems_req: number of elements to resume
477 * @buf: pointer to buffer
478 * @buf_size: buffer size in bytes
479 * @elems_ret: returns total number of elements resumed
480 * @cd: pointer to command details structure or NULL
482 * resume scheduling elements (0x040A)
484 static enum ice_status
485 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
486 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
488 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
489 elems_req, (void *)buf, buf_size,
494 * ice_aq_query_sched_res - query scheduler resource
495 * @hw: pointer to the HW struct
496 * @buf_size: buffer size in bytes
497 * @buf: pointer to buffer
498 * @cd: pointer to command details structure or NULL
500 * Query scheduler resource allocation (0x0412)
502 static enum ice_status
503 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
504 struct ice_aqc_query_txsched_res_resp *buf,
505 struct ice_sq_cd *cd)
507 struct ice_aq_desc desc;
509 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
510 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
514 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
515 * @hw: pointer to the HW struct
516 * @num_nodes: number of nodes
517 * @node_teids: array of node teids to be suspended or resumed
518 * @suspend: true means suspend / false means resume
520 * This function suspends or resumes HW nodes
522 static enum ice_status
523 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
526 u16 i, buf_size, num_elem_ret = 0;
527 enum ice_status status;
530 buf_size = sizeof(*buf) * num_nodes;
531 buf = (__le32 *)ice_malloc(hw, buf_size);
533 return ICE_ERR_NO_MEMORY;
535 for (i = 0; i < num_nodes; i++)
536 buf[i] = CPU_TO_LE32(node_teids[i]);
539 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
540 buf_size, &num_elem_ret,
543 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
544 buf_size, &num_elem_ret,
546 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
547 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
554 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
555 * @hw: pointer to the HW struct
556 * @vsi_handle: VSI handle
558 * @new_numqs: number of queues
560 static enum ice_status
561 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
563 struct ice_vsi_ctx *vsi_ctx;
564 struct ice_q_ctx *q_ctx;
566 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
568 return ICE_ERR_PARAM;
569 /* allocate LAN queue contexts */
570 if (!vsi_ctx->lan_q_ctx[tc]) {
571 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
572 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
573 if (!vsi_ctx->lan_q_ctx[tc])
574 return ICE_ERR_NO_MEMORY;
575 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
578 /* num queues are increased, update the queue contexts */
579 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
580 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
582 q_ctx = (struct ice_q_ctx *)
583 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
585 return ICE_ERR_NO_MEMORY;
586 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
587 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
588 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
589 vsi_ctx->lan_q_ctx[tc] = q_ctx;
590 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
596 * ice_aq_rl_profile - performs a rate limiting task
597 * @hw: pointer to the HW struct
598 * @opcode: opcode for add, query, or remove profile(s)
599 * @num_profiles: the number of profiles
600 * @buf: pointer to buffer
601 * @buf_size: buffer size in bytes
602 * @num_processed: number of processed add or remove profile(s) to return
603 * @cd: pointer to command details structure
605 * RL profile function to add, query, or remove profile(s)
607 static enum ice_status
608 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
609 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
610 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
612 struct ice_aqc_rl_profile *cmd;
613 struct ice_aq_desc desc;
614 enum ice_status status;
616 cmd = &desc.params.rl_profile;
618 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
619 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
620 cmd->num_profiles = CPU_TO_LE16(num_profiles);
621 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
622 if (!status && num_processed)
623 *num_processed = LE16_TO_CPU(cmd->num_processed);
628 * ice_aq_add_rl_profile - adds rate limiting profile(s)
629 * @hw: pointer to the HW struct
630 * @num_profiles: the number of profile(s) to be add
631 * @buf: pointer to buffer
632 * @buf_size: buffer size in bytes
633 * @num_profiles_added: total number of profiles added to return
634 * @cd: pointer to command details structure
636 * Add RL profile (0x0410)
638 static enum ice_status
639 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
640 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
641 u16 *num_profiles_added, struct ice_sq_cd *cd)
643 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
644 buf, buf_size, num_profiles_added, cd);
648 * ice_aq_query_rl_profile - query rate limiting profile(s)
649 * @hw: pointer to the HW struct
650 * @num_profiles: the number of profile(s) to query
651 * @buf: pointer to buffer
652 * @buf_size: buffer size in bytes
653 * @cd: pointer to command details structure
655 * Query RL profile (0x0411)
658 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
659 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
660 struct ice_sq_cd *cd)
662 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
663 num_profiles, buf, buf_size, NULL, cd);
667 * ice_aq_remove_rl_profile - removes RL profile(s)
668 * @hw: pointer to the HW struct
669 * @num_profiles: the number of profile(s) to remove
670 * @buf: pointer to buffer
671 * @buf_size: buffer size in bytes
672 * @num_profiles_removed: total number of profiles removed to return
673 * @cd: pointer to command details structure or NULL
675 * Remove RL profile (0x0415)
677 static enum ice_status
678 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
679 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
680 u16 *num_profiles_removed, struct ice_sq_cd *cd)
682 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
683 num_profiles, buf, buf_size,
684 num_profiles_removed, cd);
688 * ice_sched_del_rl_profile - remove RL profile
689 * @hw: pointer to the HW struct
690 * @rl_info: rate limit profile information
692 * If the profile ID is not referenced anymore, it removes profile ID with
693 * its associated parameters from HW DB,and locally. The caller needs to
694 * hold scheduler lock.
696 static enum ice_status
697 ice_sched_del_rl_profile(struct ice_hw *hw,
698 struct ice_aqc_rl_profile_info *rl_info)
700 struct ice_aqc_rl_profile_elem *buf;
701 u16 num_profiles_removed;
702 enum ice_status status;
703 u16 num_profiles = 1;
705 if (rl_info->prof_id_ref != 0)
706 return ICE_ERR_IN_USE;
708 /* Safe to remove profile ID */
709 buf = &rl_info->profile;
710 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
711 &num_profiles_removed, NULL);
712 if (status || num_profiles_removed != num_profiles)
715 /* Delete stale entry now */
716 LIST_DEL(&rl_info->list_entry);
717 ice_free(hw, rl_info);
722 * ice_sched_clear_rl_prof - clears RL prof entries
723 * @pi: port information structure
725 * This function removes all RL profile from HW as well as from SW DB.
727 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
730 struct ice_hw *hw = pi->hw;
732 for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
733 struct ice_aqc_rl_profile_info *rl_prof_elem;
734 struct ice_aqc_rl_profile_info *rl_prof_tmp;
736 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
737 &hw->rl_prof_list[ln],
738 ice_aqc_rl_profile_info, list_entry) {
739 enum ice_status status;
741 rl_prof_elem->prof_id_ref = 0;
742 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
744 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
745 /* On error, free mem required */
746 LIST_DEL(&rl_prof_elem->list_entry);
747 ice_free(hw, rl_prof_elem);
754 * ice_sched_clear_agg - clears the aggregator related information
755 * @hw: pointer to the hardware structure
757 * This function removes aggregator list and free up aggregator related memory
758 * previously allocated.
760 void ice_sched_clear_agg(struct ice_hw *hw)
762 struct ice_sched_agg_info *agg_info;
763 struct ice_sched_agg_info *atmp;
765 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
768 struct ice_sched_agg_vsi_info *agg_vsi_info;
769 struct ice_sched_agg_vsi_info *vtmp;
771 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
772 &agg_info->agg_vsi_list,
773 ice_sched_agg_vsi_info, list_entry) {
774 LIST_DEL(&agg_vsi_info->list_entry);
775 ice_free(hw, agg_vsi_info);
777 LIST_DEL(&agg_info->list_entry);
778 ice_free(hw, agg_info);
783 * ice_sched_clear_tx_topo - clears the scheduler tree nodes
784 * @pi: port information structure
786 * This function removes all the nodes from HW as well as from SW DB.
788 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
792 /* remove RL profiles related lists */
793 ice_sched_clear_rl_prof(pi);
795 ice_free_sched_node(pi, pi->root);
801 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
802 * @pi: port information structure
804 * Cleanup scheduling elements from SW DB
806 void ice_sched_clear_port(struct ice_port_info *pi)
808 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
811 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
812 ice_acquire_lock(&pi->sched_lock);
813 ice_sched_clear_tx_topo(pi);
814 ice_release_lock(&pi->sched_lock);
815 ice_destroy_lock(&pi->sched_lock);
819 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
820 * @hw: pointer to the HW struct
822 * Cleanup scheduling elements from SW DB for all the ports
824 void ice_sched_cleanup_all(struct ice_hw *hw)
829 if (hw->layer_info) {
830 ice_free(hw, hw->layer_info);
831 hw->layer_info = NULL;
834 ice_sched_clear_port(hw->port_info);
836 hw->num_tx_sched_layers = 0;
837 hw->num_tx_sched_phys_layers = 0;
838 hw->flattened_layers = 0;
843 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
844 * @hw: pointer to the HW struct
845 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
846 * @buf: pointer to buffer
847 * @buf_size: buffer size in bytes
848 * @cd: pointer to command details structure or NULL
850 * Configure L2 Node CGD (0x0414)
853 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
854 struct ice_aqc_cfg_l2_node_cgd_elem *buf,
855 u16 buf_size, struct ice_sq_cd *cd)
857 struct ice_aqc_cfg_l2_node_cgd *cmd;
858 struct ice_aq_desc desc;
860 cmd = &desc.params.cfg_l2_node_cgd;
861 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
862 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
864 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
865 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
869 * ice_sched_add_elems - add nodes to HW and SW DB
870 * @pi: port information structure
871 * @tc_node: pointer to the branch node
872 * @parent: pointer to the parent node
873 * @layer: layer number to add nodes
874 * @num_nodes: number of nodes
875 * @num_nodes_added: pointer to num nodes added
876 * @first_node_teid: if new nodes are added then return the TEID of first node
878 * This function add nodes to HW as well as to SW DB for a given layer
880 static enum ice_status
881 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
882 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
883 u16 *num_nodes_added, u32 *first_node_teid)
885 struct ice_sched_node *prev, *new_node;
886 struct ice_aqc_add_elem *buf;
887 u16 i, num_groups_added = 0;
888 enum ice_status status = ICE_SUCCESS;
889 struct ice_hw *hw = pi->hw;
893 buf_size = ice_struct_size(buf, generic, num_nodes);
894 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
896 return ICE_ERR_NO_MEMORY;
898 buf->hdr.parent_teid = parent->info.node_teid;
899 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
900 for (i = 0; i < num_nodes; i++) {
901 buf->generic[i].parent_teid = parent->info.node_teid;
902 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
903 buf->generic[i].data.valid_sections =
904 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
905 ICE_AQC_ELEM_VALID_EIR;
906 buf->generic[i].data.generic = 0;
907 buf->generic[i].data.cir_bw.bw_profile_idx =
908 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
909 buf->generic[i].data.cir_bw.bw_alloc =
910 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
911 buf->generic[i].data.eir_bw.bw_profile_idx =
912 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
913 buf->generic[i].data.eir_bw.bw_alloc =
914 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
917 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
918 &num_groups_added, NULL);
919 if (status != ICE_SUCCESS || num_groups_added != 1) {
920 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
921 hw->adminq.sq_last_status);
926 *num_nodes_added = num_nodes;
927 /* add nodes to the SW DB */
928 for (i = 0; i < num_nodes; i++) {
929 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
930 if (status != ICE_SUCCESS) {
931 ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n",
936 teid = LE32_TO_CPU(buf->generic[i].node_teid);
937 new_node = ice_sched_find_node_by_teid(parent, teid);
939 ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);
943 new_node->sibling = NULL;
944 new_node->tc_num = tc_node->tc_num;
946 /* add it to previous node sibling pointer */
947 /* Note: siblings are not linked across branches */
948 prev = ice_sched_get_first_node(pi, tc_node, layer);
949 if (prev && prev != new_node) {
950 while (prev->sibling)
951 prev = prev->sibling;
952 prev->sibling = new_node;
955 /* initialize the sibling head */
956 if (!pi->sib_head[tc_node->tc_num][layer])
957 pi->sib_head[tc_node->tc_num][layer] = new_node;
960 *first_node_teid = teid;
968 * ice_sched_add_nodes_to_hw_layer - Add nodes to hw layer
969 * @pi: port information structure
970 * @tc_node: pointer to TC node
971 * @parent: pointer to parent node
972 * @layer: layer number to add nodes
973 * @num_nodes: number of nodes to be added
974 * @first_node_teid: pointer to the first node TEID
975 * @num_nodes_added: pointer to number of nodes added
977 * Add nodes into specific hw layer.
979 static enum ice_status
980 ice_sched_add_nodes_to_hw_layer(struct ice_port_info *pi,
981 struct ice_sched_node *tc_node,
982 struct ice_sched_node *parent, u8 layer,
983 u16 num_nodes, u32 *first_node_teid,
984 u16 *num_nodes_added)
988 *num_nodes_added = 0;
993 if (!parent || layer < pi->hw->sw_entry_point_layer)
994 return ICE_ERR_PARAM;
996 /* max children per node per layer */
997 max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];
999 /* current number of children + required nodes exceed max children */
1000 if ((parent->num_children + num_nodes) > max_child_nodes) {
1001 /* Fail if the parent is a TC node */
1002 if (parent == tc_node)
1004 return ICE_ERR_MAX_LIMIT;
1007 return ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1008 num_nodes_added, first_node_teid);
1012 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
1013 * @pi: port information structure
1014 * @tc_node: pointer to TC node
1015 * @parent: pointer to parent node
1016 * @layer: layer number to add nodes
1017 * @num_nodes: number of nodes to be added
1018 * @first_node_teid: pointer to the first node TEID
1019 * @num_nodes_added: pointer to number of nodes added
1021 * This function add nodes to a given layer.
1023 static enum ice_status
1024 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
1025 struct ice_sched_node *tc_node,
1026 struct ice_sched_node *parent, u8 layer,
1027 u16 num_nodes, u32 *first_node_teid,
1028 u16 *num_nodes_added)
1030 u32 *first_teid_ptr = first_node_teid;
1031 u16 new_num_nodes = num_nodes;
1032 enum ice_status status = ICE_SUCCESS;
1034 *num_nodes_added = 0;
1035 while (*num_nodes_added < num_nodes) {
1036 u16 max_child_nodes, num_added = 0;
1039 status = ice_sched_add_nodes_to_hw_layer(pi, tc_node, parent,
1040 layer, new_num_nodes,
1043 if (status == ICE_SUCCESS)
1044 *num_nodes_added += num_added;
1045 /* added more nodes than requested ? */
1046 if (*num_nodes_added > num_nodes) {
1047 ice_debug(pi->hw, ICE_DBG_SCHED, "added extra nodes %d %d\n", num_nodes,
1049 status = ICE_ERR_CFG;
1052 /* break if all the nodes are added successfully */
1053 if (status == ICE_SUCCESS && (*num_nodes_added == num_nodes))
1055 /* break if the error is not max limit */
1056 if (status != ICE_SUCCESS && status != ICE_ERR_MAX_LIMIT)
1058 /* Exceeded the max children */
1059 max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];
1060 /* utilize all the spaces if the parent is not full */
1061 if (parent->num_children < max_child_nodes) {
1062 new_num_nodes = max_child_nodes - parent->num_children;
1064 /* This parent is full, try the next sibling */
1065 parent = parent->sibling;
1066 /* Don't modify the first node TEID memory if the
1067 * first node was added already in the above call.
1068 * Instead send some temp memory for all other
1072 first_teid_ptr = &temp;
1074 new_num_nodes = num_nodes - *num_nodes_added;
1081 * ice_sched_get_qgrp_layer - get the current queue group layer number
1082 * @hw: pointer to the HW struct
1084 * This function returns the current queue group layer number
1086 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1088 /* It's always total layers - 1, the array is 0 relative so -2 */
1089 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1093 * ice_sched_get_vsi_layer - get the current VSI layer number
1094 * @hw: pointer to the HW struct
1096 * This function returns the current VSI layer number
1098 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1100 /* Num Layers VSI layer
1103 * 5 or less sw_entry_point_layer
1105 /* calculate the VSI layer based on number of layers. */
1106 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1107 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1109 if (layer > hw->sw_entry_point_layer)
1112 return hw->sw_entry_point_layer;
1116 * ice_sched_get_agg_layer - get the current aggregator layer number
1117 * @hw: pointer to the HW struct
1119 * This function returns the current aggregator layer number
1121 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1123 /* Num Layers aggregator layer
1125 * 7 or less sw_entry_point_layer
1127 /* calculate the aggregator layer based on number of layers. */
1128 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1129 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1131 if (layer > hw->sw_entry_point_layer)
1134 return hw->sw_entry_point_layer;
1138 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1139 * @pi: port information structure
1141 * This function removes the leaf node that was created by the FW
1142 * during initialization
1144 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1146 struct ice_sched_node *node;
1150 if (!node->num_children)
1152 node = node->children[0];
1154 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1155 u32 teid = LE32_TO_CPU(node->info.node_teid);
1156 enum ice_status status;
1158 /* remove the default leaf node */
1159 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1161 ice_free_sched_node(pi, node);
1166 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1167 * @pi: port information structure
1169 * This function frees all the nodes except root and TC that were created by
1170 * the FW during initialization
1172 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1174 struct ice_sched_node *node;
1176 ice_rm_dflt_leaf_node(pi);
1178 /* remove the default nodes except TC and root nodes */
1181 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1182 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1183 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1184 ice_free_sched_node(pi, node);
1188 if (!node->num_children)
1190 node = node->children[0];
1195 * ice_sched_init_port - Initialize scheduler by querying information from FW
1196 * @pi: port info structure for the tree to cleanup
1198 * This function is the initial call to find the total number of Tx scheduler
1199 * resources, default topology created by firmware and storing the information
1202 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1204 struct ice_aqc_get_topo_elem *buf;
1205 enum ice_status status;
1212 return ICE_ERR_PARAM;
1215 /* Query the Default Topology from FW */
1216 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1217 ICE_AQ_MAX_BUF_LEN);
1219 return ICE_ERR_NO_MEMORY;
1221 /* Query default scheduling tree topology */
1222 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1223 &num_branches, NULL);
1227 /* num_branches should be between 1-8 */
1228 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1229 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1231 status = ICE_ERR_PARAM;
1235 /* get the number of elements on the default/first branch */
1236 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1238 /* num_elems should always be between 1-9 */
1239 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1240 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1242 status = ICE_ERR_PARAM;
1246 /* If the last node is a leaf node then the index of the queue group
1247 * layer is two less than the number of elements.
1249 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1250 ICE_AQC_ELEM_TYPE_LEAF)
1251 pi->last_node_teid =
1252 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1254 pi->last_node_teid =
1255 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1257 /* Insert the Tx Sched root node */
1258 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1262 /* Parse the default tree and cache the information */
1263 for (i = 0; i < num_branches; i++) {
1264 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1266 /* Skip root element as already inserted */
1267 for (j = 1; j < num_elems; j++) {
1268 /* update the sw entry point */
1269 if (buf[0].generic[j].data.elem_type ==
1270 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1271 hw->sw_entry_point_layer = j;
1273 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1279 /* Remove the default nodes. */
1281 ice_sched_rm_dflt_nodes(pi);
1283 /* initialize the port for handling the scheduler tree */
1284 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1285 ice_init_lock(&pi->sched_lock);
1286 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1287 INIT_LIST_HEAD(&hw->rl_prof_list[i]);
1290 if (status && pi->root) {
1291 ice_free_sched_node(pi, pi->root);
1300 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1301 * @pi: port information structure
1302 * @teid: Scheduler node TEID
1304 * This function retrieves the ice_sched_node struct for given TEID from
1305 * the SW DB and returns it to the caller.
1307 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1309 struct ice_sched_node *node;
1314 /* Find the node starting from root */
1315 ice_acquire_lock(&pi->sched_lock);
1316 node = ice_sched_find_node_by_teid(pi->root, teid);
1317 ice_release_lock(&pi->sched_lock);
1320 ice_debug(pi->hw, ICE_DBG_SCHED, "Node not found for teid=0x%x\n", teid);
1326 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1327 * @hw: pointer to the HW struct
1329 * query FW for allocated scheduler resources and store in HW struct
1331 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1333 struct ice_aqc_query_txsched_res_resp *buf;
1334 enum ice_status status = ICE_SUCCESS;
1341 buf = (struct ice_aqc_query_txsched_res_resp *)
1342 ice_malloc(hw, sizeof(*buf));
1344 return ICE_ERR_NO_MEMORY;
1346 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1348 goto sched_query_out;
1350 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1351 hw->num_tx_sched_phys_layers =
1352 LE16_TO_CPU(buf->sched_props.phys_levels);
1353 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1354 hw->max_cgds = buf->sched_props.max_pf_cgds;
1356 /* max sibling group size of current layer refers to the max children
1357 * of the below layer node.
1358 * layer 1 node max children will be layer 2 max sibling group size
1359 * layer 2 node max children will be layer 3 max sibling group size
1360 * and so on. This array will be populated from root (index 0) to
1361 * qgroup layer 7. Leaf node has no children.
1363 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1364 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1365 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1368 hw->layer_info = (struct ice_aqc_layer_props *)
1369 ice_memdup(hw, buf->layer_props,
1370 (hw->num_tx_sched_layers *
1371 sizeof(*hw->layer_info)),
1372 ICE_NONDMA_TO_NONDMA);
1373 if (!hw->layer_info) {
1374 status = ICE_ERR_NO_MEMORY;
1375 goto sched_query_out;
1384 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1385 * @hw: pointer to the HW struct
1387 * Determine the PSM clock frequency and store in HW struct
1389 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1393 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1394 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1395 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1397 #define PSM_CLK_SRC_367_MHZ 0x0
1398 #define PSM_CLK_SRC_416_MHZ 0x1
1399 #define PSM_CLK_SRC_446_MHZ 0x2
1400 #define PSM_CLK_SRC_390_MHZ 0x3
1403 case PSM_CLK_SRC_367_MHZ:
1404 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1406 case PSM_CLK_SRC_416_MHZ:
1407 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1409 case PSM_CLK_SRC_446_MHZ:
1410 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1412 case PSM_CLK_SRC_390_MHZ:
1413 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1416 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1418 /* fall back to a safe default */
1419 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1424 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1425 * @hw: pointer to the HW struct
1426 * @base: pointer to the base node
1427 * @node: pointer to the node to search
1429 * This function checks whether a given node is part of the base node
1433 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1434 struct ice_sched_node *node)
1438 for (i = 0; i < base->num_children; i++) {
1439 struct ice_sched_node *child = base->children[i];
1444 if (child->tx_sched_layer > node->tx_sched_layer)
1447 /* this recursion is intentional, and wouldn't
1448 * go more than 8 calls
1450 if (ice_sched_find_node_in_subtree(hw, child, node))
1457 * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node
1458 * @pi: port information structure
1459 * @vsi_node: software VSI handle
1460 * @qgrp_node: first queue group node identified for scanning
1461 * @owner: LAN or RDMA
1463 * This function retrieves a free LAN or RDMA queue group node by scanning
1464 * qgrp_node and its siblings for the queue group with the fewest number
1465 * of queues currently assigned.
1467 static struct ice_sched_node *
1468 ice_sched_get_free_qgrp(struct ice_port_info *pi,
1469 struct ice_sched_node *vsi_node,
1470 struct ice_sched_node *qgrp_node, u8 owner)
1472 struct ice_sched_node *min_qgrp;
1477 min_children = qgrp_node->num_children;
1480 min_qgrp = qgrp_node;
1481 /* scan all queue groups until find a node which has less than the
1482 * minimum number of children. This way all queue group nodes get
1483 * equal number of shares and active. The bandwidth will be equally
1484 * distributed across all queues.
1487 /* make sure the qgroup node is part of the VSI subtree */
1488 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1489 if (qgrp_node->num_children < min_children &&
1490 qgrp_node->owner == owner) {
1491 /* replace the new min queue group node */
1492 min_qgrp = qgrp_node;
1493 min_children = min_qgrp->num_children;
1494 /* break if it has no children, */
1498 qgrp_node = qgrp_node->sibling;
1504 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1505 * @pi: port information structure
1506 * @vsi_handle: software VSI handle
1507 * @tc: branch number
1508 * @owner: LAN or RDMA
1510 * This function retrieves a free LAN or RDMA queue group node
1512 struct ice_sched_node *
1513 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1516 struct ice_sched_node *vsi_node, *qgrp_node;
1517 struct ice_vsi_ctx *vsi_ctx;
1521 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1522 max_children = pi->hw->max_children[qgrp_layer];
1524 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1527 vsi_node = vsi_ctx->sched.vsi_node[tc];
1528 /* validate invalid VSI ID */
1532 /* get the first queue group node from VSI sub-tree */
1533 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1535 /* make sure the qgroup node is part of the VSI subtree */
1536 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1537 if (qgrp_node->num_children < max_children &&
1538 qgrp_node->owner == owner)
1540 qgrp_node = qgrp_node->sibling;
1543 /* Select the best queue group */
1544 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
1548 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1549 * @pi: pointer to the port information structure
1550 * @tc_node: pointer to the TC node
1551 * @vsi_handle: software VSI handle
1553 * This function retrieves a VSI node for a given VSI ID from a given
1556 struct ice_sched_node *
1557 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1560 struct ice_sched_node *node;
1563 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1564 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1566 /* Check whether it already exists */
1568 if (node->vsi_handle == vsi_handle)
1570 node = node->sibling;
1577 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1578 * @pi: pointer to the port information structure
1579 * @tc_node: pointer to the TC node
1580 * @agg_id: aggregator ID
1582 * This function retrieves an aggregator node for a given aggregator ID from
1585 static struct ice_sched_node *
1586 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1589 struct ice_sched_node *node;
1590 struct ice_hw *hw = pi->hw;
1595 agg_layer = ice_sched_get_agg_layer(hw);
1596 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1598 /* Check whether it already exists */
1600 if (node->agg_id == agg_id)
1602 node = node->sibling;
1609 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1610 * @hw: pointer to the HW struct
1611 * @node: pointer to the ice_sched_node struct
1613 * This function queries and compares the HW element with SW DB node parameters
1615 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1617 struct ice_aqc_txsched_elem_data buf;
1618 enum ice_status status;
1621 node_teid = LE32_TO_CPU(node->info.node_teid);
1622 status = ice_sched_query_elem(hw, node_teid, &buf);
1623 if (status != ICE_SUCCESS)
1626 if (memcmp(&buf, &node->info, sizeof(buf))) {
1627 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1636 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1637 * @hw: pointer to the HW struct
1638 * @num_qs: number of queues
1639 * @num_nodes: num nodes array
1641 * This function calculates the number of VSI child nodes based on the
1645 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1650 qgl = ice_sched_get_qgrp_layer(hw);
1651 vsil = ice_sched_get_vsi_layer(hw);
1653 /* calculate num nodes from queue group to VSI layer */
1654 for (i = qgl; i > vsil; i--) {
1655 /* round to the next integer if there is a remainder */
1656 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1658 /* need at least one node */
1659 num_nodes[i] = num ? num : 1;
1664 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1665 * @pi: port information structure
1666 * @vsi_handle: software VSI handle
1667 * @tc_node: pointer to the TC node
1668 * @num_nodes: pointer to the num nodes that needs to be added per layer
1669 * @owner: node owner (LAN or RDMA)
1671 * This function adds the VSI child nodes to tree. It gets called for
1672 * LAN and RDMA separately.
1674 static enum ice_status
1675 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1676 struct ice_sched_node *tc_node, u16 *num_nodes,
1679 struct ice_sched_node *parent, *node;
1680 struct ice_hw *hw = pi->hw;
1681 enum ice_status status;
1682 u32 first_node_teid;
1686 qgl = ice_sched_get_qgrp_layer(hw);
1687 vsil = ice_sched_get_vsi_layer(hw);
1688 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1689 for (i = vsil + 1; i <= qgl; i++) {
1693 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1697 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1700 /* The newly added node can be a new parent for the next
1704 parent = ice_sched_find_node_by_teid(tc_node,
1708 node->owner = owner;
1709 node = node->sibling;
1712 parent = parent->children[0];
1720 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1721 * @pi: pointer to the port info structure
1722 * @tc_node: pointer to TC node
1723 * @num_nodes: pointer to num nodes array
1725 * This function calculates the number of supported nodes needed to add this
1726 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1730 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1731 struct ice_sched_node *tc_node, u16 *num_nodes)
1733 struct ice_sched_node *node;
1737 vsil = ice_sched_get_vsi_layer(pi->hw);
1738 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1739 /* Add intermediate nodes if TC has no children and
1740 * need at least one node for VSI
1742 if (!tc_node->num_children || i == vsil) {
1745 /* If intermediate nodes are reached max children
1746 * then add a new one.
1748 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1749 /* scan all the siblings */
1751 if (node->num_children <
1752 pi->hw->max_children[i])
1754 node = node->sibling;
1757 /* tree has one intermediate node to add this new VSI.
1758 * So no need to calculate supported nodes for below
1763 /* all the nodes are full, allocate a new one */
1769 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1770 * @pi: port information structure
1771 * @vsi_handle: software VSI handle
1772 * @tc_node: pointer to TC node
1773 * @num_nodes: pointer to num nodes array
1775 * This function adds the VSI supported nodes into Tx tree including the
1776 * VSI, its parent and intermediate nodes in below layers
1778 static enum ice_status
1779 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1780 struct ice_sched_node *tc_node, u16 *num_nodes)
1782 struct ice_sched_node *parent = tc_node;
1783 enum ice_status status;
1784 u32 first_node_teid;
1789 return ICE_ERR_PARAM;
1791 vsil = ice_sched_get_vsi_layer(pi->hw);
1792 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1793 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1797 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1800 /* The newly added node can be a new parent for the next
1804 parent = ice_sched_find_node_by_teid(tc_node,
1807 parent = parent->children[0];
1813 parent->vsi_handle = vsi_handle;
1820 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1821 * @pi: port information structure
1822 * @vsi_handle: software VSI handle
1825 * This function adds a new VSI into scheduler tree
1827 static enum ice_status
1828 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1830 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1831 struct ice_sched_node *tc_node;
1833 tc_node = ice_sched_get_tc_node(pi, tc);
1835 return ICE_ERR_PARAM;
1837 /* calculate number of supported nodes needed for this VSI */
1838 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1840 /* add VSI supported nodes to TC subtree */
1841 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1846 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1847 * @pi: port information structure
1848 * @vsi_handle: software VSI handle
1850 * @new_numqs: new number of max queues
1851 * @owner: owner of this subtree
1853 * This function updates the VSI child nodes based on the number of queues
1855 static enum ice_status
1856 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1857 u8 tc, u16 new_numqs, u8 owner)
1859 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1860 struct ice_sched_node *vsi_node;
1861 struct ice_sched_node *tc_node;
1862 struct ice_vsi_ctx *vsi_ctx;
1863 enum ice_status status = ICE_SUCCESS;
1864 struct ice_hw *hw = pi->hw;
1867 tc_node = ice_sched_get_tc_node(pi, tc);
1871 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1875 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1877 return ICE_ERR_PARAM;
1879 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1880 /* num queues are not changed or less than the previous number */
1881 if (new_numqs <= prev_numqs)
1883 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1888 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1889 /* Keep the max number of queue configuration all the time. Update the
1890 * tree only if number of queues > previous number of queues. This may
1891 * leave some extra nodes in the tree if number of queues < previous
1892 * number but that wouldn't harm anything. Removing those extra nodes
1893 * may complicate the code if those nodes are part of SRL or
1894 * individually rate limited.
1896 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1897 new_num_nodes, owner);
1900 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1906 * ice_sched_cfg_vsi - configure the new/existing VSI
1907 * @pi: port information structure
1908 * @vsi_handle: software VSI handle
1910 * @maxqs: max number of queues
1911 * @owner: LAN or RDMA
1912 * @enable: TC enabled or disabled
1914 * This function adds/updates VSI nodes based on the number of queues. If TC is
1915 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1916 * disabled then suspend the VSI if it is not already.
1919 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1920 u8 owner, bool enable)
1922 struct ice_sched_node *vsi_node, *tc_node;
1923 struct ice_vsi_ctx *vsi_ctx;
1924 enum ice_status status = ICE_SUCCESS;
1925 struct ice_hw *hw = pi->hw;
1927 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1928 tc_node = ice_sched_get_tc_node(pi, tc);
1930 return ICE_ERR_PARAM;
1931 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1933 return ICE_ERR_PARAM;
1934 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1936 /* suspend the VSI if TC is not enabled */
1938 if (vsi_node && vsi_node->in_use) {
1939 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1941 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1944 vsi_node->in_use = false;
1949 /* TC is enabled, if it is a new VSI then add it to the tree */
1951 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1955 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1959 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1960 vsi_node->in_use = true;
1961 /* invalidate the max queues whenever VSI gets added first time
1962 * into the scheduler tree (boot or after reset). We need to
1963 * recreate the child nodes all the time in these cases.
1965 vsi_ctx->sched.max_lanq[tc] = 0;
1968 /* update the VSI child nodes */
1969 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1974 /* TC is enabled, resume the VSI if it is in the suspend state */
1975 if (!vsi_node->in_use) {
1976 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1978 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1980 vsi_node->in_use = true;
1987 * ice_sched_rm_agg_vsi_info - remove aggregator related VSI info entry
1988 * @pi: port information structure
1989 * @vsi_handle: software VSI handle
1991 * This function removes single aggregator VSI info entry from
1994 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1996 struct ice_sched_agg_info *agg_info;
1997 struct ice_sched_agg_info *atmp;
1999 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
2002 struct ice_sched_agg_vsi_info *agg_vsi_info;
2003 struct ice_sched_agg_vsi_info *vtmp;
2005 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
2006 &agg_info->agg_vsi_list,
2007 ice_sched_agg_vsi_info, list_entry)
2008 if (agg_vsi_info->vsi_handle == vsi_handle) {
2009 LIST_DEL(&agg_vsi_info->list_entry);
2010 ice_free(pi->hw, agg_vsi_info);
2017 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
2018 * @node: pointer to the sub-tree node
2020 * This function checks for a leaf node presence in a given sub-tree node.
2022 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
2026 for (i = 0; i < node->num_children; i++)
2027 if (ice_sched_is_leaf_node_present(node->children[i]))
2029 /* check for a leaf node */
2030 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
2034 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
2035 * @pi: port information structure
2036 * @vsi_handle: software VSI handle
2037 * @owner: LAN or RDMA
2039 * This function removes the VSI and its LAN or RDMA children nodes from the
2042 static enum ice_status
2043 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
2045 enum ice_status status = ICE_ERR_PARAM;
2046 struct ice_vsi_ctx *vsi_ctx;
2049 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
2050 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2052 ice_acquire_lock(&pi->sched_lock);
2053 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2055 goto exit_sched_rm_vsi_cfg;
2057 ice_for_each_traffic_class(i) {
2058 struct ice_sched_node *vsi_node, *tc_node;
2061 tc_node = ice_sched_get_tc_node(pi, i);
2065 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2069 if (ice_sched_is_leaf_node_present(vsi_node)) {
2070 ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);
2071 status = ICE_ERR_IN_USE;
2072 goto exit_sched_rm_vsi_cfg;
2074 while (j < vsi_node->num_children) {
2075 if (vsi_node->children[j]->owner == owner) {
2076 ice_free_sched_node(pi, vsi_node->children[j]);
2078 /* reset the counter again since the num
2079 * children will be updated after node removal
2086 /* remove the VSI if it has no children */
2087 if (!vsi_node->num_children) {
2088 ice_free_sched_node(pi, vsi_node);
2089 vsi_ctx->sched.vsi_node[i] = NULL;
2091 /* clean up aggregator related VSI info if any */
2092 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2094 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2095 vsi_ctx->sched.max_lanq[i] = 0;
2097 status = ICE_SUCCESS;
2099 exit_sched_rm_vsi_cfg:
2100 ice_release_lock(&pi->sched_lock);
2105 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2106 * @pi: port information structure
2107 * @vsi_handle: software VSI handle
2109 * This function clears the VSI and its LAN children nodes from scheduler tree
2112 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2114 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2118 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2119 * @hw: pointer to the HW struct
2120 * @node: pointer to the ice_sched_node struct
2122 * This function compares all the nodes for a given tree against HW DB nodes
2123 * This function needs to be called with the port_info->sched_lock held
2125 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2129 /* start from the leaf node */
2130 for (i = 0; i < node->num_children; i++)
2131 /* Fail if node doesn't match with the SW DB
2132 * this recursion is intentional, and wouldn't
2133 * go more than 9 calls
2135 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2138 return ice_sched_check_node(hw, node);
2142 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2143 * @hw: pointer to the HW struct
2144 * @node_teid: node TEID
2145 * @buf: pointer to buffer
2146 * @buf_size: buffer size in bytes
2147 * @cd: pointer to command details structure or NULL
2149 * This function retrieves the tree topology from the firmware for a given
2150 * node TEID to the root node.
2153 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2154 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
2155 struct ice_sq_cd *cd)
2157 struct ice_aqc_query_node_to_root *cmd;
2158 struct ice_aq_desc desc;
2160 cmd = &desc.params.query_node_to_root;
2161 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2162 cmd->teid = CPU_TO_LE32(node_teid);
2163 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2167 * ice_get_agg_info - get the aggregator ID
2168 * @hw: pointer to the hardware structure
2169 * @agg_id: aggregator ID
2171 * This function validates aggregator ID. The function returns info if
2172 * aggregator ID is present in list otherwise it returns null.
2174 static struct ice_sched_agg_info *
2175 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2177 struct ice_sched_agg_info *agg_info;
2179 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2181 if (agg_info->agg_id == agg_id)
2188 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2189 * @hw: pointer to the HW struct
2190 * @node: pointer to a child node
2191 * @num_nodes: num nodes count array
2193 * This function walks through the aggregator subtree to find a free parent
2196 static struct ice_sched_node *
2197 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2200 u8 l = node->tx_sched_layer;
2203 vsil = ice_sched_get_vsi_layer(hw);
2205 /* Is it VSI parent layer ? */
2207 return (node->num_children < hw->max_children[l]) ? node : NULL;
2209 /* We have intermediate nodes. Let's walk through the subtree. If the
2210 * intermediate node has space to add a new node then clear the count
2212 if (node->num_children < hw->max_children[l])
2214 /* The below recursive call is intentional and wouldn't go more than
2215 * 2 or 3 iterations.
2218 for (i = 0; i < node->num_children; i++) {
2219 struct ice_sched_node *parent;
2221 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2231 * ice_sched_update_parent - update the new parent in SW DB
2232 * @new_parent: pointer to a new parent node
2233 * @node: pointer to a child node
2235 * This function removes the child from the old parent and adds it to a new
2239 ice_sched_update_parent(struct ice_sched_node *new_parent,
2240 struct ice_sched_node *node)
2242 struct ice_sched_node *old_parent;
2245 old_parent = node->parent;
2247 /* update the old parent children */
2248 for (i = 0; i < old_parent->num_children; i++)
2249 if (old_parent->children[i] == node) {
2250 for (j = i + 1; j < old_parent->num_children; j++)
2251 old_parent->children[j - 1] =
2252 old_parent->children[j];
2253 old_parent->num_children--;
2257 /* now move the node to a new parent */
2258 new_parent->children[new_parent->num_children++] = node;
2259 node->parent = new_parent;
2260 node->info.parent_teid = new_parent->info.node_teid;
2264 * ice_sched_move_nodes - move child nodes to a given parent
2265 * @pi: port information structure
2266 * @parent: pointer to parent node
2267 * @num_items: number of child nodes to be moved
2268 * @list: pointer to child node teids
2270 * This function move the child nodes to a given parent.
2272 static enum ice_status
2273 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2274 u16 num_items, u32 *list)
2276 enum ice_status status = ICE_SUCCESS;
2277 struct ice_aqc_move_elem *buf;
2278 struct ice_sched_node *node;
2279 u16 i, grps_movd = 0;
2285 if (!parent || !num_items)
2286 return ICE_ERR_PARAM;
2288 /* Does parent have enough space */
2289 if (parent->num_children + num_items >
2290 hw->max_children[parent->tx_sched_layer])
2291 return ICE_ERR_AQ_FULL;
2293 buf_len = ice_struct_size(buf, teid, 1);
2294 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);
2296 return ICE_ERR_NO_MEMORY;
2298 for (i = 0; i < num_items; i++) {
2299 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2301 status = ICE_ERR_PARAM;
2305 buf->hdr.src_parent_teid = node->info.parent_teid;
2306 buf->hdr.dest_parent_teid = parent->info.node_teid;
2307 buf->teid[0] = node->info.node_teid;
2308 buf->hdr.num_elems = CPU_TO_LE16(1);
2309 status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,
2311 if (status && grps_movd != 1) {
2312 status = ICE_ERR_CFG;
2316 /* update the SW DB */
2317 ice_sched_update_parent(parent, node);
2326 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2327 * @pi: port information structure
2328 * @vsi_handle: software VSI handle
2329 * @agg_id: aggregator ID
2332 * This function moves a VSI to an aggregator node or its subtree.
2333 * Intermediate nodes may be created if required.
2335 static enum ice_status
2336 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2339 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2340 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2341 u32 first_node_teid, vsi_teid;
2342 enum ice_status status;
2343 u16 num_nodes_added;
2346 tc_node = ice_sched_get_tc_node(pi, tc);
2350 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2352 return ICE_ERR_DOES_NOT_EXIST;
2354 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2356 return ICE_ERR_DOES_NOT_EXIST;
2358 /* Is this VSI already part of given aggregator? */
2359 if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))
2362 aggl = ice_sched_get_agg_layer(pi->hw);
2363 vsil = ice_sched_get_vsi_layer(pi->hw);
2365 /* set intermediate node count to 1 between aggregator and VSI layers */
2366 for (i = aggl + 1; i < vsil; i++)
2369 /* Check if the aggregator subtree has any free node to add the VSI */
2370 for (i = 0; i < agg_node->num_children; i++) {
2371 parent = ice_sched_get_free_vsi_parent(pi->hw,
2372 agg_node->children[i],
2380 for (i = aggl + 1; i < vsil; i++) {
2381 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2385 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2388 /* The newly added node can be a new parent for the next
2391 if (num_nodes_added)
2392 parent = ice_sched_find_node_by_teid(tc_node,
2395 parent = parent->children[0];
2402 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2403 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2407 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2408 * @pi: port information structure
2409 * @agg_info: aggregator info
2410 * @tc: traffic class number
2411 * @rm_vsi_info: true or false
2413 * This function move all the VSI(s) to the default aggregator and delete
2414 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2415 * caller holds the scheduler lock.
2417 static enum ice_status
2418 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2419 struct ice_sched_agg_info *agg_info, u8 tc,
2422 struct ice_sched_agg_vsi_info *agg_vsi_info;
2423 struct ice_sched_agg_vsi_info *tmp;
2424 enum ice_status status = ICE_SUCCESS;
2426 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2427 ice_sched_agg_vsi_info, list_entry) {
2428 u16 vsi_handle = agg_vsi_info->vsi_handle;
2430 /* Move VSI to default aggregator */
2431 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2434 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2435 ICE_DFLT_AGG_ID, tc);
2439 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2440 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2441 LIST_DEL(&agg_vsi_info->list_entry);
2442 ice_free(pi->hw, agg_vsi_info);
2450 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2451 * @pi: port information structure
2452 * @node: node pointer
2454 * This function checks whether the aggregator is attached with any VSI or not.
2457 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2461 vsil = ice_sched_get_vsi_layer(pi->hw);
2462 if (node->tx_sched_layer < vsil - 1) {
2463 for (i = 0; i < node->num_children; i++)
2464 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2468 return node->num_children ? true : false;
2473 * ice_sched_rm_agg_cfg - remove the aggregator node
2474 * @pi: port information structure
2475 * @agg_id: aggregator ID
2478 * This function removes the aggregator node and intermediate nodes if any
2481 static enum ice_status
2482 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2484 struct ice_sched_node *tc_node, *agg_node;
2485 struct ice_hw *hw = pi->hw;
2487 tc_node = ice_sched_get_tc_node(pi, tc);
2491 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2493 return ICE_ERR_DOES_NOT_EXIST;
2495 /* Can't remove the aggregator node if it has children */
2496 if (ice_sched_is_agg_inuse(pi, agg_node))
2497 return ICE_ERR_IN_USE;
2499 /* need to remove the whole subtree if aggregator node is the
2502 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2503 struct ice_sched_node *parent = agg_node->parent;
2508 if (parent->num_children > 1)
2514 ice_free_sched_node(pi, agg_node);
2519 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2520 * @pi: port information structure
2521 * @agg_info: aggregator ID
2523 * @rm_vsi_info: bool value true or false
2525 * This function removes aggregator reference to VSI of given TC. It removes
2526 * the aggregator configuration completely for requested TC. The caller needs
2527 * to hold the scheduler lock.
2529 static enum ice_status
2530 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2531 u8 tc, bool rm_vsi_info)
2533 enum ice_status status = ICE_SUCCESS;
2535 /* If nothing to remove - return success */
2536 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2537 goto exit_rm_agg_cfg_tc;
2539 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2541 goto exit_rm_agg_cfg_tc;
2543 /* Delete aggregator node(s) */
2544 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2546 goto exit_rm_agg_cfg_tc;
2548 ice_clear_bit(tc, agg_info->tc_bitmap);
2554 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2555 * @pi: port information structure
2556 * @agg_id: aggregator ID
2557 * @tc_bitmap: 8 bits TC bitmap
2559 * Save aggregator TC bitmap. This function needs to be called with scheduler
2562 static enum ice_status
2563 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2564 ice_bitmap_t *tc_bitmap)
2566 struct ice_sched_agg_info *agg_info;
2568 agg_info = ice_get_agg_info(pi->hw, agg_id);
2570 return ICE_ERR_PARAM;
2571 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2572 ICE_MAX_TRAFFIC_CLASS);
2577 * ice_sched_add_agg_cfg - create an aggregator node
2578 * @pi: port information structure
2579 * @agg_id: aggregator ID
2582 * This function creates an aggregator node and intermediate nodes if required
2585 static enum ice_status
2586 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2588 struct ice_sched_node *parent, *agg_node, *tc_node;
2589 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2590 enum ice_status status = ICE_SUCCESS;
2591 struct ice_hw *hw = pi->hw;
2592 u32 first_node_teid;
2593 u16 num_nodes_added;
2596 tc_node = ice_sched_get_tc_node(pi, tc);
2600 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2601 /* Does Agg node already exist ? */
2605 aggl = ice_sched_get_agg_layer(hw);
2607 /* need one node in Agg layer */
2608 num_nodes[aggl] = 1;
2610 /* Check whether the intermediate nodes have space to add the
2611 * new aggregator. If they are full, then SW needs to allocate a new
2612 * intermediate node on those layers
2614 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2615 parent = ice_sched_get_first_node(pi, tc_node, i);
2617 /* scan all the siblings */
2619 if (parent->num_children < hw->max_children[i])
2621 parent = parent->sibling;
2624 /* all the nodes are full, reserve one for this layer */
2629 /* add the aggregator node */
2631 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2635 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2639 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2642 /* The newly added node can be a new parent for the next
2645 if (num_nodes_added) {
2646 parent = ice_sched_find_node_by_teid(tc_node,
2648 /* register aggregator ID with the aggregator node */
2649 if (parent && i == aggl)
2650 parent->agg_id = agg_id;
2652 parent = parent->children[0];
2660 * ice_sched_cfg_agg - configure aggregator node
2661 * @pi: port information structure
2662 * @agg_id: aggregator ID
2663 * @agg_type: aggregator type queue, VSI, or aggregator group
2664 * @tc_bitmap: bits TC bitmap
2666 * It registers a unique aggregator node into scheduler services. It
2667 * allows a user to register with a unique ID to track it's resources.
2668 * The aggregator type determines if this is a queue group, VSI group
2669 * or aggregator group. It then creates the aggregator node(s) for requested
2670 * TC(s) or removes an existing aggregator node including its configuration
2671 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2672 * resources and remove aggregator ID.
2673 * This function needs to be called with scheduler lock held.
2675 static enum ice_status
2676 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2677 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2679 struct ice_sched_agg_info *agg_info;
2680 enum ice_status status = ICE_SUCCESS;
2681 struct ice_hw *hw = pi->hw;
2684 agg_info = ice_get_agg_info(hw, agg_id);
2686 /* Create new entry for new aggregator ID */
2687 agg_info = (struct ice_sched_agg_info *)
2688 ice_malloc(hw, sizeof(*agg_info));
2690 return ICE_ERR_NO_MEMORY;
2692 agg_info->agg_id = agg_id;
2693 agg_info->agg_type = agg_type;
2694 agg_info->tc_bitmap[0] = 0;
2696 /* Initialize the aggregator VSI list head */
2697 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2699 /* Add new entry in aggregator list */
2700 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2702 /* Create aggregator node(s) for requested TC(s) */
2703 ice_for_each_traffic_class(tc) {
2704 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2705 /* Delete aggregator cfg TC if it exists previously */
2706 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2712 /* Check if aggregator node for TC already exists */
2713 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2716 /* Create new aggregator node for TC */
2717 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2721 /* Save aggregator node's TC information */
2722 ice_set_bit(tc, agg_info->tc_bitmap);
2729 * ice_cfg_agg - config aggregator node
2730 * @pi: port information structure
2731 * @agg_id: aggregator ID
2732 * @agg_type: aggregator type queue, VSI, or aggregator group
2733 * @tc_bitmap: bits TC bitmap
2735 * This function configures aggregator node(s).
2738 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2741 ice_bitmap_t bitmap = tc_bitmap;
2742 enum ice_status status;
2744 ice_acquire_lock(&pi->sched_lock);
2745 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2746 (ice_bitmap_t *)&bitmap);
2748 status = ice_save_agg_tc_bitmap(pi, agg_id,
2749 (ice_bitmap_t *)&bitmap);
2750 ice_release_lock(&pi->sched_lock);
2755 * ice_get_agg_vsi_info - get the aggregator ID
2756 * @agg_info: aggregator info
2757 * @vsi_handle: software VSI handle
2759 * The function returns aggregator VSI info based on VSI handle. This function
2760 * needs to be called with scheduler lock held.
2762 static struct ice_sched_agg_vsi_info *
2763 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2765 struct ice_sched_agg_vsi_info *agg_vsi_info;
2767 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2768 ice_sched_agg_vsi_info, list_entry)
2769 if (agg_vsi_info->vsi_handle == vsi_handle)
2770 return agg_vsi_info;
2776 * ice_get_vsi_agg_info - get the aggregator info of VSI
2777 * @hw: pointer to the hardware structure
2778 * @vsi_handle: Sw VSI handle
2780 * The function returns aggregator info of VSI represented via vsi_handle. The
2781 * VSI has in this case a different aggregator than the default one. This
2782 * function needs to be called with scheduler lock held.
2784 static struct ice_sched_agg_info *
2785 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2787 struct ice_sched_agg_info *agg_info;
2789 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2791 struct ice_sched_agg_vsi_info *agg_vsi_info;
2793 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2801 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2802 * @pi: port information structure
2803 * @agg_id: aggregator ID
2804 * @vsi_handle: software VSI handle
2805 * @tc_bitmap: TC bitmap of enabled TC(s)
2807 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2810 static enum ice_status
2811 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2812 ice_bitmap_t *tc_bitmap)
2814 struct ice_sched_agg_vsi_info *agg_vsi_info;
2815 struct ice_sched_agg_info *agg_info;
2817 agg_info = ice_get_agg_info(pi->hw, agg_id);
2819 return ICE_ERR_PARAM;
2820 /* check if entry already exist */
2821 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2823 return ICE_ERR_PARAM;
2824 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2825 ICE_MAX_TRAFFIC_CLASS);
2830 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2831 * @pi: port information structure
2832 * @agg_id: aggregator ID
2833 * @vsi_handle: software VSI handle
2834 * @tc_bitmap: TC bitmap of enabled TC(s)
2836 * This function moves VSI to a new or default aggregator node. If VSI is
2837 * already associated to the aggregator node then no operation is performed on
2838 * the tree. This function needs to be called with scheduler lock held.
2840 static enum ice_status
2841 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2842 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2844 struct ice_sched_agg_vsi_info *agg_vsi_info, *old_agg_vsi_info = NULL;
2845 struct ice_sched_agg_info *agg_info, *old_agg_info;
2846 enum ice_status status = ICE_SUCCESS;
2847 struct ice_hw *hw = pi->hw;
2850 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2851 return ICE_ERR_PARAM;
2852 agg_info = ice_get_agg_info(hw, agg_id);
2854 return ICE_ERR_PARAM;
2855 /* If the vsi is already part of another aggregator then update
2858 old_agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
2859 if (old_agg_info && old_agg_info != agg_info) {
2860 struct ice_sched_agg_vsi_info *vtmp;
2862 LIST_FOR_EACH_ENTRY_SAFE(old_agg_vsi_info, vtmp,
2863 &old_agg_info->agg_vsi_list,
2864 ice_sched_agg_vsi_info, list_entry)
2865 if (old_agg_vsi_info->vsi_handle == vsi_handle)
2869 /* check if entry already exist */
2870 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2871 if (!agg_vsi_info) {
2872 /* Create new entry for VSI under aggregator list */
2873 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2874 ice_malloc(hw, sizeof(*agg_vsi_info));
2876 return ICE_ERR_PARAM;
2878 /* add VSI ID into the aggregator list */
2879 agg_vsi_info->vsi_handle = vsi_handle;
2880 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2882 /* Move VSI node to new aggregator node for requested TC(s) */
2883 ice_for_each_traffic_class(tc) {
2884 if (!ice_is_tc_ena(*tc_bitmap, tc))
2887 /* Move VSI to new aggregator */
2888 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2892 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2893 if (old_agg_vsi_info)
2894 ice_clear_bit(tc, old_agg_vsi_info->tc_bitmap);
2896 if (old_agg_vsi_info && !old_agg_vsi_info->tc_bitmap[0]) {
2897 LIST_DEL(&old_agg_vsi_info->list_entry);
2898 ice_free(pi->hw, old_agg_vsi_info);
2904 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2905 * @hw: pointer to the hardware structure
2907 * This function removes unused rate limit profiles from the HW and
2908 * SW DB. The caller needs to hold scheduler lock.
2910 static void ice_sched_rm_unused_rl_prof(struct ice_hw *hw)
2914 for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
2915 struct ice_aqc_rl_profile_info *rl_prof_elem;
2916 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2918 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2919 &hw->rl_prof_list[ln],
2920 ice_aqc_rl_profile_info, list_entry) {
2921 if (!ice_sched_del_rl_profile(hw, rl_prof_elem))
2922 ice_debug(hw, ICE_DBG_SCHED, "Removed rl profile\n");
2928 * ice_sched_update_elem - update element
2929 * @hw: pointer to the HW struct
2930 * @node: pointer to node
2931 * @info: node info to update
2933 * Update the HW DB, and local SW DB of node. Update the scheduling
2934 * parameters of node from argument info data buffer (Info->data buf) and
2935 * returns success or error on config sched element failure. The caller
2936 * needs to hold scheduler lock.
2938 static enum ice_status
2939 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2940 struct ice_aqc_txsched_elem_data *info)
2942 struct ice_aqc_txsched_elem_data buf;
2943 enum ice_status status;
2948 /* For TC nodes, CIR config is not supported */
2949 if (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_TC)
2950 buf.data.valid_sections &= ~ICE_AQC_ELEM_VALID_CIR;
2951 /* Parent TEID is reserved field in this aq call */
2952 buf.parent_teid = 0;
2953 /* Element type is reserved field in this aq call */
2954 buf.data.elem_type = 0;
2955 /* Flags is reserved field in this aq call */
2959 /* Configure element node */
2960 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2962 if (status || elem_cfgd != num_elems) {
2963 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2967 /* Config success case */
2968 /* Now update local SW DB */
2969 /* Only copy the data portion of info buffer */
2970 node->info.data = info->data;
2975 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2976 * @hw: pointer to the HW struct
2977 * @node: sched node to configure
2978 * @rl_type: rate limit type CIR, EIR, or shared
2979 * @bw_alloc: BW weight/allocation
2981 * This function configures node element's BW allocation.
2983 static enum ice_status
2984 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2985 enum ice_rl_type rl_type, u16 bw_alloc)
2987 struct ice_aqc_txsched_elem_data buf;
2988 struct ice_aqc_txsched_elem *data;
2989 enum ice_status status;
2993 if (rl_type == ICE_MIN_BW) {
2994 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2995 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2996 } else if (rl_type == ICE_MAX_BW) {
2997 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2998 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
3000 return ICE_ERR_PARAM;
3003 /* Configure element */
3004 status = ice_sched_update_elem(hw, node, &buf);
3009 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
3010 * @pi: port information structure
3011 * @agg_id: aggregator ID
3012 * @vsi_handle: software VSI handle
3013 * @tc_bitmap: TC bitmap of enabled TC(s)
3015 * Move or associate VSI to a new or default aggregator node.
3018 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
3021 ice_bitmap_t bitmap = tc_bitmap;
3022 enum ice_status status;
3024 ice_acquire_lock(&pi->sched_lock);
3025 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
3026 (ice_bitmap_t *)&bitmap);
3028 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
3029 (ice_bitmap_t *)&bitmap);
3030 ice_release_lock(&pi->sched_lock);
3035 * ice_rm_agg_cfg - remove aggregator configuration
3036 * @pi: port information structure
3037 * @agg_id: aggregator ID
3039 * This function removes aggregator reference to VSI and delete aggregator ID
3040 * info. It removes the aggregator configuration completely.
3042 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
3044 struct ice_sched_agg_info *agg_info;
3045 enum ice_status status = ICE_SUCCESS;
3048 ice_acquire_lock(&pi->sched_lock);
3049 agg_info = ice_get_agg_info(pi->hw, agg_id);
3051 status = ICE_ERR_DOES_NOT_EXIST;
3052 goto exit_ice_rm_agg_cfg;
3055 ice_for_each_traffic_class(tc) {
3056 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
3058 goto exit_ice_rm_agg_cfg;
3061 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
3062 status = ICE_ERR_IN_USE;
3063 goto exit_ice_rm_agg_cfg;
3066 /* Safe to delete entry now */
3067 LIST_DEL(&agg_info->list_entry);
3068 ice_free(pi->hw, agg_info);
3070 /* Remove unused RL profile IDs from HW and SW DB */
3071 ice_sched_rm_unused_rl_prof(pi->hw);
3073 exit_ice_rm_agg_cfg:
3074 ice_release_lock(&pi->sched_lock);
3079 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
3080 * @bw_t_info: bandwidth type information structure
3081 * @bw_alloc: Bandwidth allocation information
3083 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
3087 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3089 bw_t_info->cir_bw.bw_alloc = bw_alloc;
3090 if (bw_t_info->cir_bw.bw_alloc)
3091 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3093 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
3097 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
3098 * @bw_t_info: bandwidth type information structure
3099 * @bw_alloc: Bandwidth allocation information
3101 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
3105 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
3107 bw_t_info->eir_bw.bw_alloc = bw_alloc;
3108 if (bw_t_info->eir_bw.bw_alloc)
3109 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3111 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3115 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3116 * @pi: port information structure
3117 * @vsi_handle: sw VSI handle
3118 * @tc: traffic class
3119 * @rl_type: rate limit type min or max
3120 * @bw_alloc: Bandwidth allocation information
3122 * Save BW alloc information of VSI type node for post replay use.
3124 static enum ice_status
3125 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3126 enum ice_rl_type rl_type, u16 bw_alloc)
3128 struct ice_vsi_ctx *vsi_ctx;
3130 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3131 return ICE_ERR_PARAM;
3132 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3134 return ICE_ERR_PARAM;
3137 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3141 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3145 return ICE_ERR_PARAM;
3151 * ice_set_clear_cir_bw - set or clear CIR BW
3152 * @bw_t_info: bandwidth type information structure
3153 * @bw: bandwidth in Kbps - Kilo bits per sec
3155 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3157 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3159 if (bw == ICE_SCHED_DFLT_BW) {
3160 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3161 bw_t_info->cir_bw.bw = 0;
3163 /* Save type of BW information */
3164 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3165 bw_t_info->cir_bw.bw = bw;
3170 * ice_set_clear_eir_bw - set or clear EIR BW
3171 * @bw_t_info: bandwidth type information structure
3172 * @bw: bandwidth in Kbps - Kilo bits per sec
3174 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3176 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3178 if (bw == ICE_SCHED_DFLT_BW) {
3179 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3180 bw_t_info->eir_bw.bw = 0;
3182 /* save EIR BW information */
3183 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3184 bw_t_info->eir_bw.bw = bw;
3189 * ice_set_clear_shared_bw - set or clear shared BW
3190 * @bw_t_info: bandwidth type information structure
3191 * @bw: bandwidth in Kbps - Kilo bits per sec
3193 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3195 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3197 if (bw == ICE_SCHED_DFLT_BW) {
3198 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3199 bw_t_info->shared_bw = 0;
3201 /* save shared BW information */
3202 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3203 bw_t_info->shared_bw = bw;
3208 * ice_sched_save_vsi_bw - save VSI node's BW information
3209 * @pi: port information structure
3210 * @vsi_handle: sw VSI handle
3211 * @tc: traffic class
3212 * @rl_type: rate limit type min, max, or shared
3213 * @bw: bandwidth in Kbps - Kilo bits per sec
3215 * Save BW information of VSI type node for post replay use.
3217 static enum ice_status
3218 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3219 enum ice_rl_type rl_type, u32 bw)
3221 struct ice_vsi_ctx *vsi_ctx;
3223 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3224 return ICE_ERR_PARAM;
3225 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3227 return ICE_ERR_PARAM;
3230 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3233 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3236 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3239 return ICE_ERR_PARAM;
3245 * ice_set_clear_prio - set or clear priority information
3246 * @bw_t_info: bandwidth type information structure
3247 * @prio: priority to save
3249 * Save or clear priority (prio) in the passed param bw_t_info.
3251 static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3253 bw_t_info->generic = prio;
3254 if (bw_t_info->generic)
3255 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3257 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3261 * ice_sched_save_vsi_prio - save VSI node's priority information
3262 * @pi: port information structure
3263 * @vsi_handle: Software VSI handle
3264 * @tc: traffic class
3265 * @prio: priority to save
3267 * Save priority information of VSI type node for post replay use.
3269 static enum ice_status
3270 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3273 struct ice_vsi_ctx *vsi_ctx;
3275 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3276 return ICE_ERR_PARAM;
3277 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3279 return ICE_ERR_PARAM;
3280 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3281 return ICE_ERR_PARAM;
3282 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3287 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3288 * @pi: port information structure
3289 * @agg_id: node aggregator ID
3290 * @tc: traffic class
3291 * @rl_type: rate limit type min or max
3292 * @bw_alloc: bandwidth alloc information
3294 * Save BW alloc information of AGG type node for post replay use.
3296 static enum ice_status
3297 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3298 enum ice_rl_type rl_type, u16 bw_alloc)
3300 struct ice_sched_agg_info *agg_info;
3302 agg_info = ice_get_agg_info(pi->hw, agg_id);
3304 return ICE_ERR_PARAM;
3305 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3306 return ICE_ERR_PARAM;
3309 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3312 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3315 return ICE_ERR_PARAM;
3321 * ice_sched_save_agg_bw - save aggregator node's BW information
3322 * @pi: port information structure
3323 * @agg_id: node aggregator ID
3324 * @tc: traffic class
3325 * @rl_type: rate limit type min, max, or shared
3326 * @bw: bandwidth in Kbps - Kilo bits per sec
3328 * Save BW information of AGG type node for post replay use.
3330 static enum ice_status
3331 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3332 enum ice_rl_type rl_type, u32 bw)
3334 struct ice_sched_agg_info *agg_info;
3336 agg_info = ice_get_agg_info(pi->hw, agg_id);
3338 return ICE_ERR_PARAM;
3339 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3340 return ICE_ERR_PARAM;
3343 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3346 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3349 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3352 return ICE_ERR_PARAM;
3358 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3359 * @pi: port information structure
3360 * @vsi_handle: software VSI handle
3361 * @tc: traffic class
3362 * @rl_type: min or max
3363 * @bw: bandwidth in Kbps
3365 * This function configures BW limit of VSI scheduling node based on TC
3369 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3370 enum ice_rl_type rl_type, u32 bw)
3372 enum ice_status status;
3374 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3378 ice_acquire_lock(&pi->sched_lock);
3379 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3380 ice_release_lock(&pi->sched_lock);
3386 * ice_cfg_vsi_bw_dflt_lmt_per_tc - configure default VSI BW limit per TC
3387 * @pi: port information structure
3388 * @vsi_handle: software VSI handle
3389 * @tc: traffic class
3390 * @rl_type: min or max
3392 * This function configures default BW limit of VSI scheduling node based on TC
3396 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3397 enum ice_rl_type rl_type)
3399 enum ice_status status;
3401 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3406 ice_acquire_lock(&pi->sched_lock);
3407 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3409 ice_release_lock(&pi->sched_lock);
3415 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3416 * @pi: port information structure
3417 * @agg_id: aggregator ID
3418 * @tc: traffic class
3419 * @rl_type: min or max
3420 * @bw: bandwidth in Kbps
3422 * This function applies BW limit to aggregator scheduling node based on TC
3426 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3427 enum ice_rl_type rl_type, u32 bw)
3429 enum ice_status status;
3431 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3434 ice_acquire_lock(&pi->sched_lock);
3435 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3436 ice_release_lock(&pi->sched_lock);
3442 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3443 * @pi: port information structure
3444 * @agg_id: aggregator ID
3445 * @tc: traffic class
3446 * @rl_type: min or max
3448 * This function applies default BW limit to aggregator scheduling node based
3449 * on TC information.
3452 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3453 enum ice_rl_type rl_type)
3455 enum ice_status status;
3457 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3461 ice_acquire_lock(&pi->sched_lock);
3462 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3464 ice_release_lock(&pi->sched_lock);
3470 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3471 * @pi: port information structure
3472 * @vsi_handle: software VSI handle
3473 * @min_bw: minimum bandwidth in Kbps
3474 * @max_bw: maximum bandwidth in Kbps
3475 * @shared_bw: shared bandwidth in Kbps
3477 * Configure shared rate limiter(SRL) of all VSI type nodes across all traffic
3478 * classes for VSI matching handle.
3481 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
3482 u32 max_bw, u32 shared_bw)
3484 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, min_bw, max_bw,
3489 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3490 * @pi: port information structure
3491 * @vsi_handle: software VSI handle
3493 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3494 * across all traffic classes for VSI matching handle.
3497 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3499 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3506 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3507 * @pi: port information structure
3508 * @agg_id: aggregator ID
3509 * @min_bw: minimum bandwidth in Kbps
3510 * @max_bw: maximum bandwidth in Kbps
3511 * @shared_bw: shared bandwidth in Kbps
3513 * This function configures the shared rate limiter(SRL) of all aggregator type
3514 * nodes across all traffic classes for aggregator matching agg_id.
3517 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
3518 u32 max_bw, u32 shared_bw)
3520 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, min_bw, max_bw,
3525 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3526 * @pi: port information structure
3527 * @agg_id: aggregator ID
3529 * This function removes the shared rate limiter(SRL) of all aggregator type
3530 * nodes across all traffic classes for aggregator matching agg_id.
3533 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3535 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW,
3541 * ice_cfg_agg_bw_shared_lmt_per_tc - config aggregator BW shared limit per tc
3542 * @pi: port information structure
3543 * @agg_id: aggregator ID
3544 * @tc: traffic class
3545 * @min_bw: minimum bandwidth in Kbps
3546 * @max_bw: maximum bandwidth in Kbps
3547 * @shared_bw: shared bandwidth in Kbps
3549 * This function configures the shared rate limiter(SRL) of all aggregator type
3550 * nodes across all traffic classes for aggregator matching agg_id.
3553 ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3554 u32 min_bw, u32 max_bw, u32 shared_bw)
3556 return ice_sched_set_agg_bw_shared_lmt_per_tc(pi, agg_id, tc, min_bw,
3561 * ice_cfg_agg_bw_no_shared_lmt_per_tc - cfg aggregator BW shared limit per tc
3562 * @pi: port information structure
3563 * @agg_id: aggregator ID
3564 * @tc: traffic class
3566 * This function configures the shared rate limiter(SRL) of all aggregator type
3567 * nodes across all traffic classes for aggregator matching agg_id.
3570 ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc)
3572 return ice_sched_set_agg_bw_shared_lmt_per_tc(pi, agg_id, tc,
3579 * ice_cfg_vsi_q_priority - config VSI queue priority of node
3580 * @pi: port information structure
3581 * @num_qs: number of VSI queues
3582 * @q_ids: queue IDs array
3583 * @q_prio: queue priority array
3585 * This function configures the queue node priority (Sibling Priority) of the
3586 * passed in VSI's queue(s) for a given traffic class (TC).
3589 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3592 enum ice_status status = ICE_ERR_PARAM;
3595 ice_acquire_lock(&pi->sched_lock);
3597 for (i = 0; i < num_qs; i++) {
3598 struct ice_sched_node *node;
3600 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3601 if (!node || node->info.data.elem_type !=
3602 ICE_AQC_ELEM_TYPE_LEAF) {
3603 status = ICE_ERR_PARAM;
3606 /* Configure Priority */
3607 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3612 ice_release_lock(&pi->sched_lock);
3617 * ice_sched_save_q_bw_alloc - save queue node's BW allocation information
3618 * @q_ctx: queue context structure
3619 * @rl_type: rate limit type min, max, or shared
3620 * @bw_alloc: BW weight/allocation
3622 * Save BW information of queue type node for post replay use.
3624 static enum ice_status
3625 ice_sched_save_q_bw_alloc(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type,
3630 ice_set_clear_cir_bw_alloc(&q_ctx->bw_t_info, bw_alloc);
3633 ice_set_clear_eir_bw_alloc(&q_ctx->bw_t_info, bw_alloc);
3636 return ICE_ERR_PARAM;
3642 * ice_cfg_q_bw_alloc - configure queue BW weight/alloc params
3643 * @pi: port information structure
3644 * @vsi_handle: sw VSI handle
3645 * @tc: traffic class
3646 * @q_handle: software queue handle
3647 * @rl_type: min, max, or shared
3648 * @bw_alloc: BW weight/allocation
3650 * This function configures BW allocation of queue scheduling node.
3653 ice_cfg_q_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3654 u16 q_handle, enum ice_rl_type rl_type, u32 bw_alloc)
3656 enum ice_status status = ICE_ERR_PARAM;
3657 struct ice_sched_node *node;
3658 struct ice_q_ctx *q_ctx;
3660 ice_acquire_lock(&pi->sched_lock);
3661 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
3663 goto exit_q_bw_alloc;
3665 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
3667 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
3668 goto exit_q_bw_alloc;
3671 status = ice_sched_cfg_node_bw_alloc(pi->hw, node, rl_type, bw_alloc);
3673 status = ice_sched_save_q_bw_alloc(q_ctx, rl_type, bw_alloc);
3676 ice_release_lock(&pi->sched_lock);
3681 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3682 * @pi: port information structure
3683 * @agg_id: Aggregator ID
3684 * @num_vsis: number of VSI(s)
3685 * @vsi_handle_arr: array of software VSI handles
3686 * @node_prio: pointer to node priority
3687 * @tc: traffic class
3689 * This function configures the node priority (Sibling Priority) of the
3690 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3693 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3694 u16 num_vsis, u16 *vsi_handle_arr,
3695 u8 *node_prio, u8 tc)
3697 struct ice_sched_agg_vsi_info *agg_vsi_info;
3698 struct ice_sched_node *tc_node, *agg_node;
3699 enum ice_status status = ICE_ERR_PARAM;
3700 struct ice_sched_agg_info *agg_info;
3701 bool agg_id_present = false;
3702 struct ice_hw *hw = pi->hw;
3705 ice_acquire_lock(&pi->sched_lock);
3706 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3708 if (agg_info->agg_id == agg_id) {
3709 agg_id_present = true;
3712 if (!agg_id_present)
3713 goto exit_agg_priority_per_tc;
3715 tc_node = ice_sched_get_tc_node(pi, tc);
3717 goto exit_agg_priority_per_tc;
3719 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3721 goto exit_agg_priority_per_tc;
3723 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3724 goto exit_agg_priority_per_tc;
3726 for (i = 0; i < num_vsis; i++) {
3727 struct ice_sched_node *vsi_node;
3728 bool vsi_handle_valid = false;
3731 status = ICE_ERR_PARAM;
3732 vsi_handle = vsi_handle_arr[i];
3733 if (!ice_is_vsi_valid(hw, vsi_handle))
3734 goto exit_agg_priority_per_tc;
3735 /* Verify child nodes before applying settings */
3736 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3737 ice_sched_agg_vsi_info, list_entry)
3738 if (agg_vsi_info->vsi_handle == vsi_handle) {
3739 vsi_handle_valid = true;
3743 if (!vsi_handle_valid)
3744 goto exit_agg_priority_per_tc;
3746 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3748 goto exit_agg_priority_per_tc;
3750 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3751 /* Configure Priority */
3752 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3756 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3763 exit_agg_priority_per_tc:
3764 ice_release_lock(&pi->sched_lock);
3769 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3770 * @pi: port information structure
3771 * @vsi_handle: software VSI handle
3772 * @ena_tcmap: enabled TC map
3773 * @rl_type: Rate limit type CIR/EIR
3774 * @bw_alloc: Array of BW alloc
3776 * This function configures the BW allocation of the passed in VSI's
3777 * node(s) for enabled traffic class.
3780 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3781 enum ice_rl_type rl_type, u8 *bw_alloc)
3783 enum ice_status status = ICE_SUCCESS;
3786 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3787 return ICE_ERR_PARAM;
3789 ice_acquire_lock(&pi->sched_lock);
3791 /* Return success if no nodes are present across TC */
3792 ice_for_each_traffic_class(tc) {
3793 struct ice_sched_node *tc_node, *vsi_node;
3795 if (!ice_is_tc_ena(ena_tcmap, tc))
3798 tc_node = ice_sched_get_tc_node(pi, tc);
3802 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3806 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3810 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3811 rl_type, bw_alloc[tc]);
3816 ice_release_lock(&pi->sched_lock);
3821 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3822 * @pi: port information structure
3823 * @agg_id: aggregator ID
3824 * @ena_tcmap: enabled TC map
3825 * @rl_type: rate limit type CIR/EIR
3826 * @bw_alloc: array of BW alloc
3828 * This function configures the BW allocation of passed in aggregator for
3829 * enabled traffic class(s).
3832 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3833 enum ice_rl_type rl_type, u8 *bw_alloc)
3835 struct ice_sched_agg_info *agg_info;
3836 bool agg_id_present = false;
3837 enum ice_status status = ICE_SUCCESS;
3838 struct ice_hw *hw = pi->hw;
3841 ice_acquire_lock(&pi->sched_lock);
3842 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3844 if (agg_info->agg_id == agg_id) {
3845 agg_id_present = true;
3848 if (!agg_id_present) {
3849 status = ICE_ERR_PARAM;
3850 goto exit_cfg_agg_bw_alloc;
3853 /* Return success if no nodes are present across TC */
3854 ice_for_each_traffic_class(tc) {
3855 struct ice_sched_node *tc_node, *agg_node;
3857 if (!ice_is_tc_ena(ena_tcmap, tc))
3860 tc_node = ice_sched_get_tc_node(pi, tc);
3864 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3868 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3872 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3878 exit_cfg_agg_bw_alloc:
3879 ice_release_lock(&pi->sched_lock);
3884 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3885 * @hw: pointer to the HW struct
3886 * @bw: bandwidth in Kbps
3888 * This function calculates the wakeup parameter of RL profile.
3890 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3892 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3896 /* Get the wakeup integer value */
3897 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3898 wakeup_int = DIV_64BIT(hw->psm_clk_freq, bytes_per_sec);
3899 if (wakeup_int > 63) {
3900 wakeup = (u16)((1 << 15) | wakeup_int);
3902 /* Calculate fraction value up to 4 decimals
3903 * Convert Integer value to a constant multiplier
3905 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3906 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3907 hw->psm_clk_freq, bytes_per_sec);
3909 /* Get Fraction value */
3910 wakeup_f = wakeup_a - wakeup_b;
3912 /* Round up the Fractional value via Ceil(Fractional value) */
3913 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3916 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3917 ICE_RL_PROF_MULTIPLIER);
3918 wakeup |= (u16)(wakeup_int << 9);
3919 wakeup |= (u16)(0x1ff & wakeup_f_int);
3926 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3927 * @hw: pointer to the HW struct
3928 * @bw: bandwidth in Kbps
3929 * @profile: profile parameters to return
3931 * This function converts the BW to profile structure format.
3933 static enum ice_status
3934 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3935 struct ice_aqc_rl_profile_elem *profile)
3937 enum ice_status status = ICE_ERR_PARAM;
3938 s64 bytes_per_sec, ts_rate, mv_tmp;
3944 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3945 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3948 /* Bytes per second from Kbps */
3949 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3951 /* encode is 6 bits but really useful are 5 bits */
3952 for (i = 0; i < 64; i++) {
3953 u64 pow_result = BIT_ULL(i);
3955 ts_rate = DIV_64BIT((s64)hw->psm_clk_freq,
3956 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3960 /* Multiplier value */
3961 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3964 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3965 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3967 /* First multiplier value greater than the given
3970 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3979 wm = ice_sched_calc_wakeup(hw, bw);
3980 profile->rl_multiply = CPU_TO_LE16(mv);
3981 profile->wake_up_calc = CPU_TO_LE16(wm);
3982 profile->rl_encode = CPU_TO_LE16(encode);
3983 status = ICE_SUCCESS;
3985 status = ICE_ERR_DOES_NOT_EXIST;
3992 * ice_sched_add_rl_profile - add RL profile
3993 * @hw: pointer to the hardware structure
3994 * @rl_type: type of rate limit BW - min, max, or shared
3995 * @bw: bandwidth in Kbps - Kilo bits per sec
3996 * @layer_num: specifies in which layer to create profile
3998 * This function first checks the existing list for corresponding BW
3999 * parameter. If it exists, it returns the associated profile otherwise
4000 * it creates a new rate limit profile for requested BW, and adds it to
4001 * the HW DB and local list. It returns the new profile or null on error.
4002 * The caller needs to hold the scheduler lock.
4004 static struct ice_aqc_rl_profile_info *
4005 ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,
4006 u32 bw, u8 layer_num)
4008 struct ice_aqc_rl_profile_info *rl_prof_elem;
4009 u16 profiles_added = 0, num_profiles = 1;
4010 struct ice_aqc_rl_profile_elem *buf;
4011 enum ice_status status;
4014 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4018 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4021 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4024 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4032 LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
4033 ice_aqc_rl_profile_info, list_entry)
4034 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
4035 profile_type && rl_prof_elem->bw == bw)
4036 /* Return existing profile ID info */
4037 return rl_prof_elem;
4039 /* Create new profile ID */
4040 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
4041 ice_malloc(hw, sizeof(*rl_prof_elem));
4046 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
4047 if (status != ICE_SUCCESS)
4048 goto exit_add_rl_prof;
4050 rl_prof_elem->bw = bw;
4051 /* layer_num is zero relative, and fw expects level from 1 to 9 */
4052 rl_prof_elem->profile.level = layer_num + 1;
4053 rl_prof_elem->profile.flags = profile_type;
4054 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
4056 /* Create new entry in HW DB */
4057 buf = &rl_prof_elem->profile;
4058 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
4059 &profiles_added, NULL);
4060 if (status || profiles_added != num_profiles)
4061 goto exit_add_rl_prof;
4063 /* Good entry - add in the list */
4064 rl_prof_elem->prof_id_ref = 0;
4065 LIST_ADD(&rl_prof_elem->list_entry, &hw->rl_prof_list[layer_num]);
4066 return rl_prof_elem;
4069 ice_free(hw, rl_prof_elem);
4074 * ice_sched_cfg_node_bw_lmt - configure node sched params
4075 * @hw: pointer to the HW struct
4076 * @node: sched node to configure
4077 * @rl_type: rate limit type CIR, EIR, or shared
4078 * @rl_prof_id: rate limit profile ID
4080 * This function configures node element's BW limit.
4082 static enum ice_status
4083 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
4084 enum ice_rl_type rl_type, u16 rl_prof_id)
4086 struct ice_aqc_txsched_elem_data buf;
4087 struct ice_aqc_txsched_elem *data;
4093 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
4094 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
4097 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
4098 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
4101 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
4102 data->srl_id = CPU_TO_LE16(rl_prof_id);
4105 /* Unknown rate limit type */
4106 return ICE_ERR_PARAM;
4109 /* Configure element */
4110 return ice_sched_update_elem(hw, node, &buf);
4114 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
4116 * @rl_type: rate limit type
4118 * If existing profile matches, it returns the corresponding rate
4119 * limit profile ID, otherwise it returns an invalid ID as error.
4122 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
4123 enum ice_rl_type rl_type)
4125 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
4126 struct ice_aqc_txsched_elem *data;
4128 data = &node->info.data;
4131 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
4132 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
4135 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
4136 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
4139 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
4140 rl_prof_id = LE16_TO_CPU(data->srl_id);
4150 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
4151 * @pi: port information structure
4152 * @rl_type: type of rate limit BW - min, max, or shared
4153 * @layer_index: layer index
4155 * This function returns requested profile creation layer.
4158 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
4161 struct ice_hw *hw = pi->hw;
4163 if (layer_index >= hw->num_tx_sched_layers)
4164 return ICE_SCHED_INVAL_LAYER_NUM;
4167 if (hw->layer_info[layer_index].max_cir_rl_profiles)
4171 if (hw->layer_info[layer_index].max_eir_rl_profiles)
4175 /* if current layer doesn't support SRL profile creation
4176 * then try a layer up or down.
4178 if (hw->layer_info[layer_index].max_srl_profiles)
4180 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4181 hw->layer_info[layer_index + 1].max_srl_profiles)
4182 return layer_index + 1;
4183 else if (layer_index > 0 &&
4184 hw->layer_info[layer_index - 1].max_srl_profiles)
4185 return layer_index - 1;
4190 return ICE_SCHED_INVAL_LAYER_NUM;
4194 * ice_sched_get_srl_node - get shared rate limit node
4196 * @srl_layer: shared rate limit layer
4198 * This function returns SRL node to be used for shared rate limit purpose.
4199 * The caller needs to hold scheduler lock.
4201 static struct ice_sched_node *
4202 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4204 if (srl_layer > node->tx_sched_layer)
4205 return node->children[0];
4206 else if (srl_layer < node->tx_sched_layer)
4207 /* Node can't be created without a parent. It will always
4208 * have a valid parent except root node.
4210 return node->parent;
4216 * ice_sched_rm_rl_profile - remove RL profile ID
4217 * @hw: pointer to the hardware structure
4218 * @layer_num: layer number where profiles are saved
4219 * @profile_type: profile type like EIR, CIR, or SRL
4220 * @profile_id: profile ID to remove
4222 * This function removes rate limit profile from layer 'layer_num' of type
4223 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4226 static enum ice_status
4227 ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,
4230 struct ice_aqc_rl_profile_info *rl_prof_elem;
4231 enum ice_status status = ICE_SUCCESS;
4233 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
4234 return ICE_ERR_PARAM;
4235 /* Check the existing list for RL profile */
4236 LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
4237 ice_aqc_rl_profile_info, list_entry)
4238 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
4240 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4242 if (rl_prof_elem->prof_id_ref)
4243 rl_prof_elem->prof_id_ref--;
4245 /* Remove old profile ID from database */
4246 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
4247 if (status && status != ICE_ERR_IN_USE)
4248 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
4251 if (status == ICE_ERR_IN_USE)
4252 status = ICE_SUCCESS;
4257 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4258 * @pi: port information structure
4259 * @node: pointer to node structure
4260 * @rl_type: rate limit type min, max, or shared
4261 * @layer_num: layer number where RL profiles are saved
4263 * This function configures node element's BW rate limit profile ID of
4264 * type CIR, EIR, or SRL to default. This function needs to be called
4265 * with the scheduler lock held.
4267 static enum ice_status
4268 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4269 struct ice_sched_node *node,
4270 enum ice_rl_type rl_type, u8 layer_num)
4272 enum ice_status status;
4281 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4282 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4285 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4286 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4289 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4290 /* No SRL is configured for default case */
4291 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4294 return ICE_ERR_PARAM;
4296 /* Save existing RL prof ID for later clean up */
4297 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4298 /* Configure BW scheduling parameters */
4299 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4303 /* Remove stale RL profile ID */
4304 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4305 old_id == ICE_SCHED_INVAL_PROF_ID)
4308 return ice_sched_rm_rl_profile(hw, layer_num, profile_type, old_id);
4312 * ice_sched_set_node_bw - set node's bandwidth
4313 * @pi: port information structure
4315 * @rl_type: rate limit type min, max, or shared
4316 * @bw: bandwidth in Kbps - Kilo bits per sec
4317 * @layer_num: layer number
4319 * This function adds new profile corresponding to requested BW, configures
4320 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4321 * ID from local database. The caller needs to hold scheduler lock.
4323 static enum ice_status
4324 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4325 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4327 struct ice_aqc_rl_profile_info *rl_prof_info;
4328 enum ice_status status = ICE_ERR_PARAM;
4329 struct ice_hw *hw = pi->hw;
4330 u16 old_id, rl_prof_id;
4332 rl_prof_info = ice_sched_add_rl_profile(hw, rl_type, bw, layer_num);
4336 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4338 /* Save existing RL prof ID for later clean up */
4339 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4340 /* Configure BW scheduling parameters */
4341 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4345 /* New changes has been applied */
4346 /* Increment the profile ID reference count */
4347 rl_prof_info->prof_id_ref++;
4349 /* Check for old ID removal */
4350 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4351 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4354 return ice_sched_rm_rl_profile(hw, layer_num,
4355 rl_prof_info->profile.flags &
4356 ICE_AQC_RL_PROFILE_TYPE_M, old_id);
4360 * ice_sched_set_node_bw_lmt - set node's BW limit
4361 * @pi: port information structure
4363 * @rl_type: rate limit type min, max, or shared
4364 * @bw: bandwidth in Kbps - Kilo bits per sec
4366 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4367 * EIR, or SRL. The caller needs to hold scheduler lock.
4369 * NOTE: Caller provides the correct SRL node in case of shared profile
4372 static enum ice_status
4373 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4374 enum ice_rl_type rl_type, u32 bw)
4380 return ICE_ERR_PARAM;
4382 /* Remove unused RL profile IDs from HW and SW DB */
4383 ice_sched_rm_unused_rl_prof(hw);
4385 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4386 node->tx_sched_layer);
4387 if (layer_num >= hw->num_tx_sched_layers)
4388 return ICE_ERR_PARAM;
4390 if (bw == ICE_SCHED_DFLT_BW)
4391 return ice_sched_set_node_bw_dflt(pi, node, rl_type, layer_num);
4392 return ice_sched_set_node_bw(pi, node, rl_type, bw, layer_num);
4396 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4397 * @pi: port information structure
4398 * @node: pointer to node structure
4399 * @rl_type: rate limit type min, max, or shared
4401 * This function configures node element's BW rate limit profile ID of
4402 * type CIR, EIR, or SRL to default. This function needs to be called
4403 * with the scheduler lock held.
4405 static enum ice_status
4406 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4407 struct ice_sched_node *node,
4408 enum ice_rl_type rl_type)
4410 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4415 * ice_sched_validate_srl_node - Check node for SRL applicability
4416 * @node: sched node to configure
4417 * @sel_layer: selected SRL layer
4419 * This function checks if the SRL can be applied to a selceted layer node on
4420 * behalf of the requested node (first argument). This function needs to be
4421 * called with scheduler lock held.
4423 static enum ice_status
4424 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4426 /* SRL profiles are not available on all layers. Check if the
4427 * SRL profile can be applied to a node above or below the
4428 * requested node. SRL configuration is possible only if the
4429 * selected layer's node has single child.
4431 if (sel_layer == node->tx_sched_layer ||
4432 ((sel_layer == node->tx_sched_layer + 1) &&
4433 node->num_children == 1) ||
4434 ((sel_layer == node->tx_sched_layer - 1) &&
4435 (node->parent && node->parent->num_children == 1)))
4442 * ice_sched_save_q_bw - save queue node's BW information
4443 * @q_ctx: queue context structure
4444 * @rl_type: rate limit type min, max, or shared
4445 * @bw: bandwidth in Kbps - Kilo bits per sec
4447 * Save BW information of queue type node for post replay use.
4449 static enum ice_status
4450 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4454 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4457 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4460 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4463 return ICE_ERR_PARAM;
4469 * ice_sched_set_q_bw_lmt - sets queue BW limit
4470 * @pi: port information structure
4471 * @vsi_handle: sw VSI handle
4472 * @tc: traffic class
4473 * @q_handle: software queue handle
4474 * @rl_type: min, max, or shared
4475 * @bw: bandwidth in Kbps
4477 * This function sets BW limit of queue scheduling node.
4479 static enum ice_status
4480 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4481 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4483 enum ice_status status = ICE_ERR_PARAM;
4484 struct ice_sched_node *node;
4485 struct ice_q_ctx *q_ctx;
4487 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4488 return ICE_ERR_PARAM;
4489 ice_acquire_lock(&pi->sched_lock);
4490 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4493 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4495 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4499 /* Return error if it is not a leaf node */
4500 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4503 /* SRL bandwidth layer selection */
4504 if (rl_type == ICE_SHARED_BW) {
4505 u8 sel_layer; /* selected layer */
4507 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4508 node->tx_sched_layer);
4509 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4510 status = ICE_ERR_PARAM;
4513 status = ice_sched_validate_srl_node(node, sel_layer);
4518 if (bw == ICE_SCHED_DFLT_BW)
4519 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4521 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4524 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4527 ice_release_lock(&pi->sched_lock);
4532 * ice_cfg_q_bw_lmt - configure queue BW limit
4533 * @pi: port information structure
4534 * @vsi_handle: sw VSI handle
4535 * @tc: traffic class
4536 * @q_handle: software queue handle
4537 * @rl_type: min, max, or shared
4538 * @bw: bandwidth in Kbps
4540 * This function configures BW limit of queue scheduling node.
4543 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4544 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4546 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4551 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4552 * @pi: port information structure
4553 * @vsi_handle: sw VSI handle
4554 * @tc: traffic class
4555 * @q_handle: software queue handle
4556 * @rl_type: min, max, or shared
4558 * This function configures BW default limit of queue scheduling node.
4561 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4562 u16 q_handle, enum ice_rl_type rl_type)
4564 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4569 * ice_sched_save_tc_node_bw - save TC node BW limit
4570 * @pi: port information structure
4572 * @rl_type: min or max
4573 * @bw: bandwidth in Kbps
4575 * This function saves the modified values of bandwidth settings for later
4576 * replay purpose (restore) after reset.
4578 static enum ice_status
4579 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4580 enum ice_rl_type rl_type, u32 bw)
4582 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4583 return ICE_ERR_PARAM;
4586 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4589 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4592 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4595 return ICE_ERR_PARAM;
4601 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4602 * @pi: port information structure
4604 * @rl_type: min or max
4605 * @bw: bandwidth in Kbps
4607 * This function configures bandwidth limit of TC node.
4609 static enum ice_status
4610 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4611 enum ice_rl_type rl_type, u32 bw)
4613 enum ice_status status = ICE_ERR_PARAM;
4614 struct ice_sched_node *tc_node;
4616 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4618 ice_acquire_lock(&pi->sched_lock);
4619 tc_node = ice_sched_get_tc_node(pi, tc);
4621 goto exit_set_tc_node_bw;
4622 if (bw == ICE_SCHED_DFLT_BW)
4623 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4625 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4627 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4629 exit_set_tc_node_bw:
4630 ice_release_lock(&pi->sched_lock);
4635 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4636 * @pi: port information structure
4638 * @rl_type: min or max
4639 * @bw: bandwidth in Kbps
4641 * This function configures BW limit of TC node.
4642 * Note: The minimum guaranteed reservation is done via DCBX.
4645 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4646 enum ice_rl_type rl_type, u32 bw)
4648 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4652 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4653 * @pi: port information structure
4655 * @rl_type: min or max
4657 * This function configures BW default limit of TC node.
4660 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4661 enum ice_rl_type rl_type)
4663 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4667 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4668 * @pi: port information structure
4669 * @tc: traffic class
4670 * @rl_type: rate limit type min or max
4671 * @bw_alloc: Bandwidth allocation information
4673 * Save BW alloc information of VSI type node for post replay use.
4675 static enum ice_status
4676 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4677 enum ice_rl_type rl_type, u16 bw_alloc)
4679 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4680 return ICE_ERR_PARAM;
4683 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4687 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4691 return ICE_ERR_PARAM;
4697 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4698 * @pi: port information structure
4700 * @rl_type: min or max
4701 * @bw_alloc: bandwidth alloc
4703 * This function configures bandwidth alloc of TC node, also saves the
4704 * changed settings for replay purpose, and return success if it succeeds
4705 * in modifying bandwidth alloc setting.
4707 static enum ice_status
4708 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4709 enum ice_rl_type rl_type, u8 bw_alloc)
4711 enum ice_status status = ICE_ERR_PARAM;
4712 struct ice_sched_node *tc_node;
4714 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4716 ice_acquire_lock(&pi->sched_lock);
4717 tc_node = ice_sched_get_tc_node(pi, tc);
4719 goto exit_set_tc_node_bw_alloc;
4720 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4723 goto exit_set_tc_node_bw_alloc;
4724 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4726 exit_set_tc_node_bw_alloc:
4727 ice_release_lock(&pi->sched_lock);
4732 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4733 * @pi: port information structure
4735 * @rl_type: min or max
4736 * @bw_alloc: bandwidth alloc
4738 * This function configures BW limit of TC node.
4739 * Note: The minimum guaranteed reservation is done via DCBX.
4742 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4743 enum ice_rl_type rl_type, u8 bw_alloc)
4745 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4749 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4750 * @pi: port information structure
4751 * @vsi_handle: software VSI handle
4753 * This function retrieves the aggregator ID based on VSI ID and TC,
4754 * and sets node's BW limit to default. This function needs to be
4755 * called with the scheduler lock held.
4758 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4760 struct ice_vsi_ctx *vsi_ctx;
4761 enum ice_status status = ICE_SUCCESS;
4764 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4765 return ICE_ERR_PARAM;
4766 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4768 return ICE_ERR_PARAM;
4770 ice_for_each_traffic_class(tc) {
4771 struct ice_sched_node *node;
4773 node = vsi_ctx->sched.ag_node[tc];
4777 /* Set min profile to default */
4778 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4782 /* Set max profile to default */
4783 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4787 /* Remove shared profile, if there is one */
4788 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4798 * ice_sched_get_node_by_id_type - get node from ID type
4799 * @pi: port information structure
4801 * @agg_type: type of aggregator
4802 * @tc: traffic class
4804 * This function returns node identified by ID of type aggregator, and
4805 * based on traffic class (TC). This function needs to be called with
4806 * the scheduler lock held.
4808 static struct ice_sched_node *
4809 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4810 enum ice_agg_type agg_type, u8 tc)
4812 struct ice_sched_node *node = NULL;
4813 struct ice_sched_node *child_node;
4816 case ICE_AGG_TYPE_VSI: {
4817 struct ice_vsi_ctx *vsi_ctx;
4818 u16 vsi_handle = (u16)id;
4820 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4822 /* Get sched_vsi_info */
4823 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4826 node = vsi_ctx->sched.vsi_node[tc];
4830 case ICE_AGG_TYPE_AGG: {
4831 struct ice_sched_node *tc_node;
4833 tc_node = ice_sched_get_tc_node(pi, tc);
4835 node = ice_sched_get_agg_node(pi, tc_node, id);
4839 case ICE_AGG_TYPE_Q:
4840 /* The current implementation allows single queue to modify */
4841 node = ice_sched_find_node_by_teid(pi->root, id);
4844 case ICE_AGG_TYPE_QG:
4845 /* The current implementation allows single qg to modify */
4846 child_node = ice_sched_find_node_by_teid(pi->root, id);
4849 node = child_node->parent;
4860 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4861 * @pi: port information structure
4862 * @id: ID (software VSI handle or AGG ID)
4863 * @agg_type: aggregator type (VSI or AGG type node)
4864 * @tc: traffic class
4865 * @rl_type: min or max
4866 * @bw: bandwidth in Kbps
4868 * This function sets BW limit of VSI or Aggregator scheduling node
4869 * based on TC information from passed in argument BW.
4872 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4873 enum ice_agg_type agg_type, u8 tc,
4874 enum ice_rl_type rl_type, u32 bw)
4876 enum ice_status status = ICE_ERR_PARAM;
4877 struct ice_sched_node *node;
4882 if (rl_type == ICE_UNKNOWN_BW)
4885 ice_acquire_lock(&pi->sched_lock);
4886 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4888 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4889 goto exit_set_node_bw_lmt_per_tc;
4891 if (bw == ICE_SCHED_DFLT_BW)
4892 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4894 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4896 exit_set_node_bw_lmt_per_tc:
4897 ice_release_lock(&pi->sched_lock);
4902 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4903 * @pi: port information structure
4904 * @vsi_handle: software VSI handle
4906 * This function validates SRL node of the VSI node if available SRL layer is
4907 * different than the VSI node layer on all TC(s).This function needs to be
4908 * called with scheduler lock held.
4910 static enum ice_status
4911 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4913 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4916 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4917 return ICE_ERR_PARAM;
4919 /* Return success if no nodes are present across TC */
4920 ice_for_each_traffic_class(tc) {
4921 struct ice_sched_node *tc_node, *vsi_node;
4922 enum ice_rl_type rl_type = ICE_SHARED_BW;
4923 enum ice_status status;
4925 tc_node = ice_sched_get_tc_node(pi, tc);
4929 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4933 /* SRL bandwidth layer selection */
4934 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4935 u8 node_layer = vsi_node->tx_sched_layer;
4938 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4940 if (layer_num >= pi->hw->num_tx_sched_layers)
4941 return ICE_ERR_PARAM;
4942 sel_layer = layer_num;
4945 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4953 * ice_sched_set_save_vsi_srl_node_bw - set VSI shared limit values
4954 * @pi: port information structure
4955 * @vsi_handle: software VSI handle
4956 * @tc: traffic class
4957 * @srl_node: sched node to configure
4958 * @rl_type: rate limit type minimum, maximum, or shared
4959 * @bw: minimum, maximum, or shared bandwidth in Kbps
4961 * Configure shared rate limiter(SRL) of VSI type nodes across given traffic
4962 * class, and saves those value for later use for replaying purposes. The
4963 * caller holds the scheduler lock.
4965 static enum ice_status
4966 ice_sched_set_save_vsi_srl_node_bw(struct ice_port_info *pi, u16 vsi_handle,
4967 u8 tc, struct ice_sched_node *srl_node,
4968 enum ice_rl_type rl_type, u32 bw)
4970 enum ice_status status;
4972 if (bw == ICE_SCHED_DFLT_BW) {
4973 status = ice_sched_set_node_bw_dflt_lmt(pi, srl_node, rl_type);
4975 status = ice_sched_set_node_bw_lmt(pi, srl_node, rl_type, bw);
4978 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4984 * ice_sched_set_vsi_node_srl_per_tc - set VSI node BW shared limit for tc
4985 * @pi: port information structure
4986 * @vsi_handle: software VSI handle
4987 * @tc: traffic class
4988 * @min_bw: minimum bandwidth in Kbps
4989 * @max_bw: maximum bandwidth in Kbps
4990 * @shared_bw: shared bandwidth in Kbps
4992 * Configure shared rate limiter(SRL) of VSI type nodes across requested
4993 * traffic class for VSI matching handle. When BW value of ICE_SCHED_DFLT_BW
4994 * is passed, it removes the corresponding bw from the node. The caller
4995 * holds scheduler lock.
4997 static enum ice_status
4998 ice_sched_set_vsi_node_srl_per_tc(struct ice_port_info *pi, u16 vsi_handle,
4999 u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
5001 struct ice_sched_node *tc_node, *vsi_node, *cfg_node;
5002 enum ice_status status;
5005 tc_node = ice_sched_get_tc_node(pi, tc);
5009 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5013 layer_num = ice_sched_get_rl_prof_layer(pi, ICE_SHARED_BW,
5014 vsi_node->tx_sched_layer);
5015 if (layer_num >= pi->hw->num_tx_sched_layers)
5016 return ICE_ERR_PARAM;
5018 /* SRL node may be different */
5019 cfg_node = ice_sched_get_srl_node(vsi_node, layer_num);
5023 status = ice_sched_set_save_vsi_srl_node_bw(pi, vsi_handle, tc,
5024 cfg_node, ICE_MIN_BW,
5029 status = ice_sched_set_save_vsi_srl_node_bw(pi, vsi_handle, tc,
5030 cfg_node, ICE_MAX_BW,
5035 return ice_sched_set_save_vsi_srl_node_bw(pi, vsi_handle, tc, cfg_node,
5036 ICE_SHARED_BW, shared_bw);
5040 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
5041 * @pi: port information structure
5042 * @vsi_handle: software VSI handle
5043 * @min_bw: minimum bandwidth in Kbps
5044 * @max_bw: maximum bandwidth in Kbps
5045 * @shared_bw: shared bandwidth in Kbps
5047 * Configure shared rate limiter(SRL) of all VSI type nodes across all traffic
5048 * classes for VSI matching handle. When BW value of ICE_SCHED_DFLT_BW is
5049 * passed, it removes those value(s) from the node.
5052 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
5053 u32 min_bw, u32 max_bw, u32 shared_bw)
5055 enum ice_status status = ICE_SUCCESS;
5059 return ICE_ERR_PARAM;
5061 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
5062 return ICE_ERR_PARAM;
5064 ice_acquire_lock(&pi->sched_lock);
5065 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
5067 goto exit_set_vsi_bw_shared_lmt;
5068 /* Return success if no nodes are present across TC */
5069 ice_for_each_traffic_class(tc) {
5070 struct ice_sched_node *tc_node, *vsi_node;
5072 tc_node = ice_sched_get_tc_node(pi, tc);
5076 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5080 status = ice_sched_set_vsi_node_srl_per_tc(pi, vsi_handle, tc,
5087 exit_set_vsi_bw_shared_lmt:
5088 ice_release_lock(&pi->sched_lock);
5093 * ice_sched_validate_agg_srl_node - validate AGG SRL node
5094 * @pi: port information structure
5095 * @agg_id: aggregator ID
5097 * This function validates SRL node of the AGG node if available SRL layer is
5098 * different than the AGG node layer on all TC(s).This function needs to be
5099 * called with scheduler lock held.
5101 static enum ice_status
5102 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
5104 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
5105 struct ice_sched_agg_info *agg_info;
5106 bool agg_id_present = false;
5107 enum ice_status status = ICE_SUCCESS;
5110 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
5112 if (agg_info->agg_id == agg_id) {
5113 agg_id_present = true;
5116 if (!agg_id_present)
5117 return ICE_ERR_PARAM;
5118 /* Return success if no nodes are present across TC */
5119 ice_for_each_traffic_class(tc) {
5120 struct ice_sched_node *tc_node, *agg_node;
5121 enum ice_rl_type rl_type = ICE_SHARED_BW;
5123 tc_node = ice_sched_get_tc_node(pi, tc);
5127 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5130 /* SRL bandwidth layer selection */
5131 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
5132 u8 node_layer = agg_node->tx_sched_layer;
5135 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
5137 if (layer_num >= pi->hw->num_tx_sched_layers)
5138 return ICE_ERR_PARAM;
5139 sel_layer = layer_num;
5142 status = ice_sched_validate_srl_node(agg_node, sel_layer);
5150 * ice_sched_validate_agg_id - Validate aggregator id
5151 * @pi: port information structure
5152 * @agg_id: aggregator ID
5154 * This function validates aggregator id. Caller holds the scheduler lock.
5156 static enum ice_status
5157 ice_sched_validate_agg_id(struct ice_port_info *pi, u32 agg_id)
5159 struct ice_sched_agg_info *agg_info;
5160 struct ice_sched_agg_info *tmp;
5161 bool agg_id_present = false;
5162 enum ice_status status;
5164 status = ice_sched_validate_agg_srl_node(pi, agg_id);
5168 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
5169 ice_sched_agg_info, list_entry)
5170 if (agg_info->agg_id == agg_id) {
5171 agg_id_present = true;
5175 if (!agg_id_present)
5176 return ICE_ERR_PARAM;
5182 * ice_sched_set_save_agg_srl_node_bw - set aggregator shared limit values
5183 * @pi: port information structure
5184 * @agg_id: aggregator ID
5185 * @tc: traffic class
5186 * @srl_node: sched node to configure
5187 * @rl_type: rate limit type minimum, maximum, or shared
5188 * @bw: minimum, maximum, or shared bandwidth in Kbps
5190 * Configure shared rate limiter(SRL) of aggregator type nodes across
5191 * requested traffic class, and saves those value for later use for
5192 * replaying purposes. The caller holds the scheduler lock.
5194 static enum ice_status
5195 ice_sched_set_save_agg_srl_node_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
5196 struct ice_sched_node *srl_node,
5197 enum ice_rl_type rl_type, u32 bw)
5199 enum ice_status status;
5201 if (bw == ICE_SCHED_DFLT_BW) {
5202 status = ice_sched_set_node_bw_dflt_lmt(pi, srl_node, rl_type);
5204 status = ice_sched_set_node_bw_lmt(pi, srl_node, rl_type, bw);
5207 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5213 * ice_sched_set_agg_node_srl_per_tc - set aggregator SRL per tc
5214 * @pi: port information structure
5215 * @agg_id: aggregator ID
5216 * @tc: traffic class
5217 * @min_bw: minimum bandwidth in Kbps
5218 * @max_bw: maximum bandwidth in Kbps
5219 * @shared_bw: shared bandwidth in Kbps
5221 * This function configures the shared rate limiter(SRL) of aggregator type
5222 * node for a given traffic class for aggregator matching agg_id. When BW
5223 * value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the node. Caller
5224 * holds the scheduler lock.
5226 static enum ice_status
5227 ice_sched_set_agg_node_srl_per_tc(struct ice_port_info *pi, u32 agg_id,
5228 u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
5230 struct ice_sched_node *tc_node, *agg_node, *cfg_node;
5231 enum ice_rl_type rl_type = ICE_SHARED_BW;
5232 enum ice_status status = ICE_ERR_CFG;
5235 tc_node = ice_sched_get_tc_node(pi, tc);
5239 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5243 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
5244 agg_node->tx_sched_layer);
5245 if (layer_num >= pi->hw->num_tx_sched_layers)
5246 return ICE_ERR_PARAM;
5248 /* SRL node may be different */
5249 cfg_node = ice_sched_get_srl_node(agg_node, layer_num);
5253 status = ice_sched_set_save_agg_srl_node_bw(pi, agg_id, tc, cfg_node,
5254 ICE_MIN_BW, min_bw);
5258 status = ice_sched_set_save_agg_srl_node_bw(pi, agg_id, tc, cfg_node,
5259 ICE_MAX_BW, max_bw);
5263 status = ice_sched_set_save_agg_srl_node_bw(pi, agg_id, tc, cfg_node,
5264 ICE_SHARED_BW, shared_bw);
5269 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
5270 * @pi: port information structure
5271 * @agg_id: aggregator ID
5272 * @min_bw: minimum bandwidth in Kbps
5273 * @max_bw: maximum bandwidth in Kbps
5274 * @shared_bw: shared bandwidth in Kbps
5276 * This function configures the shared rate limiter(SRL) of all aggregator type
5277 * nodes across all traffic classes for aggregator matching agg_id. When
5278 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
5282 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id,
5283 u32 min_bw, u32 max_bw, u32 shared_bw)
5285 enum ice_status status;
5289 return ICE_ERR_PARAM;
5291 ice_acquire_lock(&pi->sched_lock);
5292 status = ice_sched_validate_agg_id(pi, agg_id);
5294 goto exit_agg_bw_shared_lmt;
5296 /* Return success if no nodes are present across TC */
5297 ice_for_each_traffic_class(tc) {
5298 struct ice_sched_node *tc_node, *agg_node;
5300 tc_node = ice_sched_get_tc_node(pi, tc);
5304 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
5308 status = ice_sched_set_agg_node_srl_per_tc(pi, agg_id, tc,
5315 exit_agg_bw_shared_lmt:
5316 ice_release_lock(&pi->sched_lock);
5321 * ice_sched_set_agg_bw_shared_lmt_per_tc - set aggregator BW shared lmt per tc
5322 * @pi: port information structure
5323 * @agg_id: aggregator ID
5324 * @tc: traffic class
5325 * @min_bw: minimum bandwidth in Kbps
5326 * @max_bw: maximum bandwidth in Kbps
5327 * @shared_bw: shared bandwidth in Kbps
5329 * This function configures the shared rate limiter(SRL) of aggregator type
5330 * node for a given traffic class for aggregator matching agg_id. When BW
5331 * value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the node.
5334 ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
5335 u8 tc, u32 min_bw, u32 max_bw,
5338 enum ice_status status;
5341 return ICE_ERR_PARAM;
5342 ice_acquire_lock(&pi->sched_lock);
5343 status = ice_sched_validate_agg_id(pi, agg_id);
5345 goto exit_agg_bw_shared_lmt_per_tc;
5347 status = ice_sched_set_agg_node_srl_per_tc(pi, agg_id, tc, min_bw,
5350 exit_agg_bw_shared_lmt_per_tc:
5351 ice_release_lock(&pi->sched_lock);
5356 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5357 * @pi: port information structure
5358 * @node: sched node to configure
5359 * @priority: sibling priority
5361 * This function configures node element's sibling priority only. This
5362 * function needs to be called with scheduler lock held.
5365 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5366 struct ice_sched_node *node, u8 priority)
5368 struct ice_aqc_txsched_elem_data buf;
5369 struct ice_aqc_txsched_elem *data;
5370 struct ice_hw *hw = pi->hw;
5371 enum ice_status status;
5374 return ICE_ERR_PARAM;
5377 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5378 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5379 ICE_AQC_ELEM_GENERIC_PRIO_M;
5380 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5381 data->generic |= priority;
5383 /* Configure element */
5384 status = ice_sched_update_elem(hw, node, &buf);
5389 * ice_cfg_rl_burst_size - Set burst size value
5390 * @hw: pointer to the HW struct
5391 * @bytes: burst size in bytes
5393 * This function configures/set the burst size to requested new value. The new
5394 * burst size value is used for future rate limit calls. It doesn't change the
5395 * existing or previously created RL profiles.
5397 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5399 u16 burst_size_to_prog;
5401 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5402 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5403 return ICE_ERR_PARAM;
5404 if (ice_round_to_num(bytes, 64) <=
5405 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5406 /* 64 byte granularity case */
5407 /* Disable MSB granularity bit */
5408 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5409 /* round number to nearest 64 byte granularity */
5410 bytes = ice_round_to_num(bytes, 64);
5411 /* The value is in 64 byte chunks */
5412 burst_size_to_prog |= (u16)(bytes / 64);
5414 /* k bytes granularity case */
5415 /* Enable MSB granularity bit */
5416 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5417 /* round number to nearest 1024 granularity */
5418 bytes = ice_round_to_num(bytes, 1024);
5419 /* check rounding doesn't go beyond allowed */
5420 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5421 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5422 /* The value is in k bytes */
5423 burst_size_to_prog |= (u16)(bytes / 1024);
5425 hw->max_burst_size = burst_size_to_prog;
5430 * ice_sched_replay_node_prio - re-configure node priority
5431 * @hw: pointer to the HW struct
5432 * @node: sched node to configure
5433 * @priority: priority value
5435 * This function configures node element's priority value. It
5436 * needs to be called with scheduler lock held.
5438 static enum ice_status
5439 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5442 struct ice_aqc_txsched_elem_data buf;
5443 struct ice_aqc_txsched_elem *data;
5444 enum ice_status status;
5448 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5449 data->generic = priority;
5451 /* Configure element */
5452 status = ice_sched_update_elem(hw, node, &buf);
5457 * ice_sched_replay_node_bw - replay node(s) BW
5458 * @hw: pointer to the HW struct
5459 * @node: sched node to configure
5460 * @bw_t_info: BW type information
5462 * This function restores node's BW from bw_t_info. The caller needs
5463 * to hold the scheduler lock.
5465 static enum ice_status
5466 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5467 struct ice_bw_type_info *bw_t_info)
5469 struct ice_port_info *pi = hw->port_info;
5470 enum ice_status status = ICE_ERR_PARAM;
5475 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5477 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5478 status = ice_sched_replay_node_prio(hw, node,
5479 bw_t_info->generic);
5483 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5484 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5485 bw_t_info->cir_bw.bw);
5489 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5490 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5491 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5496 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5497 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5498 bw_t_info->eir_bw.bw);
5502 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5503 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5504 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5509 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5510 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5511 bw_t_info->shared_bw);
5516 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5517 * @hw: pointer to the HW struct
5518 * @agg_info: aggregator data structure
5520 * This function re-creates aggregator type nodes. The caller needs to hold
5521 * the scheduler lock.
5523 static enum ice_status
5524 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5526 struct ice_sched_node *tc_node, *agg_node;
5527 enum ice_status status = ICE_SUCCESS;
5531 return ICE_ERR_PARAM;
5532 ice_for_each_traffic_class(tc) {
5533 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5536 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5538 status = ICE_ERR_PARAM;
5541 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5544 status = ICE_ERR_PARAM;
5547 status = ice_sched_replay_node_bw(hw, agg_node,
5548 &agg_info->bw_t_info[tc]);
5556 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5557 * @pi: port info struct
5558 * @tc_bitmap: 8 bits TC bitmap to check
5559 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5561 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5562 * may be missing, it returns enabled TCs. This function needs to be called with
5563 * scheduler lock held.
5566 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5567 ice_bitmap_t *ena_tc_bitmap)
5571 /* Some TC(s) may be missing after reset, adjust for replay */
5572 ice_for_each_traffic_class(tc)
5573 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5574 (ice_sched_get_tc_node(pi, tc)))
5575 ice_set_bit(tc, ena_tc_bitmap);
5579 * ice_sched_replay_agg - recreate aggregator node(s)
5580 * @hw: pointer to the HW struct
5582 * This function recreate aggregator type nodes which are not replayed earlier.
5583 * It also replay aggregator BW information. These aggregator nodes are not
5584 * associated with VSI type node yet.
5586 void ice_sched_replay_agg(struct ice_hw *hw)
5588 struct ice_port_info *pi = hw->port_info;
5589 struct ice_sched_agg_info *agg_info;
5591 ice_acquire_lock(&pi->sched_lock);
5592 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5594 /* replay aggregator (re-create aggregator node) */
5595 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5596 agg_info->replay_tc_bitmap,
5597 ICE_MAX_TRAFFIC_CLASS)) {
5598 ice_declare_bitmap(replay_bitmap,
5599 ICE_MAX_TRAFFIC_CLASS);
5600 enum ice_status status;
5602 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5603 ice_sched_get_ena_tc_bitmap(pi,
5604 agg_info->replay_tc_bitmap,
5606 status = ice_sched_cfg_agg(hw->port_info,
5611 ice_info(hw, "Replay agg id[%d] failed\n",
5613 /* Move on to next one */
5616 /* Replay aggregator node BW (restore aggregator BW) */
5617 status = ice_sched_replay_agg_bw(hw, agg_info);
5619 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5622 ice_release_lock(&pi->sched_lock);
5626 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5627 * @hw: pointer to the HW struct
5629 * This function initialize aggregator(s) TC bitmap to zero. A required
5630 * preinit step for replaying aggregators.
5632 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5634 struct ice_port_info *pi = hw->port_info;
5635 struct ice_sched_agg_info *agg_info;
5637 ice_acquire_lock(&pi->sched_lock);
5638 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5640 struct ice_sched_agg_vsi_info *agg_vsi_info;
5642 agg_info->tc_bitmap[0] = 0;
5643 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5644 ice_sched_agg_vsi_info, list_entry)
5645 agg_vsi_info->tc_bitmap[0] = 0;
5647 ice_release_lock(&pi->sched_lock);
5651 * ice_sched_replay_root_node_bw - replay root node BW
5652 * @pi: port information structure
5654 * Replay root node BW settings.
5656 enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi)
5658 enum ice_status status = ICE_SUCCESS;
5661 return ICE_ERR_PARAM;
5662 ice_acquire_lock(&pi->sched_lock);
5664 status = ice_sched_replay_node_bw(pi->hw, pi->root,
5665 &pi->root_node_bw_t_info);
5666 ice_release_lock(&pi->sched_lock);
5671 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5672 * @pi: port information structure
5674 * This function replay TC nodes.
5676 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5678 enum ice_status status = ICE_SUCCESS;
5682 return ICE_ERR_PARAM;
5683 ice_acquire_lock(&pi->sched_lock);
5684 ice_for_each_traffic_class(tc) {
5685 struct ice_sched_node *tc_node;
5687 tc_node = ice_sched_get_tc_node(pi, tc);
5689 continue; /* TC not present */
5690 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5691 &pi->tc_node_bw_t_info[tc]);
5695 ice_release_lock(&pi->sched_lock);
5700 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5701 * @hw: pointer to the HW struct
5702 * @vsi_handle: software VSI handle
5703 * @tc_bitmap: 8 bits TC bitmap
5705 * This function replays VSI type nodes bandwidth. This function needs to be
5706 * called with scheduler lock held.
5708 static enum ice_status
5709 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5710 ice_bitmap_t *tc_bitmap)
5712 struct ice_sched_node *vsi_node, *tc_node;
5713 struct ice_port_info *pi = hw->port_info;
5714 struct ice_bw_type_info *bw_t_info;
5715 struct ice_vsi_ctx *vsi_ctx;
5716 enum ice_status status = ICE_SUCCESS;
5719 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5721 return ICE_ERR_PARAM;
5722 ice_for_each_traffic_class(tc) {
5723 if (!ice_is_tc_ena(*tc_bitmap, tc))
5725 tc_node = ice_sched_get_tc_node(pi, tc);
5728 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5731 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5732 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5740 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5741 * @hw: pointer to the HW struct
5742 * @vsi_handle: software VSI handle
5744 * This function replays aggregator node, VSI to aggregator type nodes, and
5745 * their node bandwidth information. This function needs to be called with
5746 * scheduler lock held.
5748 static enum ice_status
5749 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5751 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5752 struct ice_sched_agg_vsi_info *agg_vsi_info;
5753 struct ice_port_info *pi = hw->port_info;
5754 struct ice_sched_agg_info *agg_info;
5755 enum ice_status status;
5757 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5758 if (!ice_is_vsi_valid(hw, vsi_handle))
5759 return ICE_ERR_PARAM;
5760 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5762 return ICE_SUCCESS; /* Not present in list - default Agg case */
5763 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5765 return ICE_SUCCESS; /* Not present in list - default Agg case */
5766 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5768 /* Replay aggregator node associated to vsi_handle */
5769 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5770 ICE_AGG_TYPE_AGG, replay_bitmap);
5773 /* Replay aggregator node BW (restore aggregator BW) */
5774 status = ice_sched_replay_agg_bw(hw, agg_info);
5778 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5779 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5781 /* Move this VSI (vsi_handle) to above aggregator */
5782 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5786 /* Replay VSI BW (restore VSI BW) */
5787 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5788 agg_vsi_info->tc_bitmap);
5792 * ice_replay_vsi_agg - replay VSI to aggregator node
5793 * @hw: pointer to the HW struct
5794 * @vsi_handle: software VSI handle
5796 * This function replays association of VSI to aggregator type nodes, and
5797 * node bandwidth information.
5799 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5801 struct ice_port_info *pi = hw->port_info;
5802 enum ice_status status;
5804 ice_acquire_lock(&pi->sched_lock);
5805 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5806 ice_release_lock(&pi->sched_lock);
5811 * ice_sched_replay_q_bw - replay queue type node BW
5812 * @pi: port information structure
5813 * @q_ctx: queue context structure
5815 * This function replays queue type node bandwidth. This function needs to be
5816 * called with scheduler lock held.
5819 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5821 struct ice_sched_node *q_node;
5823 /* Following also checks the presence of node in tree */
5824 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5826 return ICE_ERR_PARAM;
5827 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);